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465 lines
7.9 KiB
465 lines
7.9 KiB
/*
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uart_soft
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v0.2
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copyright John Steggall 2009
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*/
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/*
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Copyright 2009 John Steggall (steggall.j@gmail.com)
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Permission to use, copy, modify, and distribute this software
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and its documentation for any purpose and without fee is hereby
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granted, provided that the above copyright notice appear in all
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copies and that both that the copyright notice and this
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permission notice and warranty disclaimer appear in supporting
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documentation, and that the name of the author not be used in
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advertising or publicity pertaining to distribution of the
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software without specific, written prior permission.
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The author disclaim all warranties with regard to this
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software, including all implied warranties of merchantability
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and fitness. In no event shall the author be liable for any
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special, indirect or consequential damages or any damages
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whatsoever resulting from loss of use, data or profits, whether
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in an action of contract, negligence or other tortious action,
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arising out of or in connection with the use or performance of
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this software.
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*/
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#include <avr/io.h>
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#include "SoftUARTConf.h"
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#define SFT_TX_EN 7
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#define SF_UART_TX 1
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#define SF_UART_RX 2
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.section .data
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rxdata:
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.byte 0
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txShifter:
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.byte 0
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txBitcount:
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.byte 0
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rxShifter:
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.byte 0
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rxBitcount:
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.byte 0
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.global status
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status:
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.byte 0
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.section .text
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.global RX_PIN_INT
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/*********************************************
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* External interrupt
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*
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* RX pin has gone low.
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*/
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RX_PIN_INT:
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push r16
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lds r16,SREG
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push r16
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#if (RXPORT>=32)
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lds r16,RXPORT
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sbrc r16,0 // anti glitch
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#else
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sbic RXPORT,0
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#endif
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rjmp ignore
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nop
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nop
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nop
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nop
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#if (RXPORT>=32)
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lds r16,RXPORT
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sbrc r16,0 // anti glitch
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#else
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sbic RXPORT,0
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#endif
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rjmp ignore
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push r17
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// grab timer value
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lds r16,TC_COUNTL
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lds r17,TC_COUNTH
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// set trigger for RX timer (will need to add a little more though)
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sts TC_RX_COMPH,r17
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sts TC_RX_COMPL,r16
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pop r17
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// set bitcount to 0
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ldi r16,0
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sts rxBitcount,r16
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// turn off interrupt, will get annoying.
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cbi EXTI_MASK_REG,EXTI_MASK_BIT
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// turn on interrupt on compare match
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sbi TC_INTFLAG_REG,TC_RX_IF_BIT
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lds r16,TC_INT_MASK_REG
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ori r16,(1<<TC_RX_COMPEN)
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sts TC_INT_MASK_REG,r16
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ignore:
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pop r16
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sts SREG,r16
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pop r16
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reti
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/*********************************************
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* interrupt routine, timer compare match.
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*
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* TX bit rate timing
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*/
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.global TIMER3_COMPB_vect
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TIMER3_COMPB_vect:
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push r16
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lds r16,SREG
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push r16
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push r17
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push r18
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// check if the last bit was sent
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lds r17,txBitcount
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inc r17
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cpi r17,0x0A
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sts txBitcount,r17
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breq lastBitTX
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lds r16,txShifter
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#if (TXPORT>=32)
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lds r17, TXPORT
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sbrs r16,0
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andi r17,~(1<<TXPIN)
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sbrc r16,0
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ori r17,(1<<TXPIN)
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sts TXPORT,r17
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#else
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sbrs r16,0
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cbi TXPORT,TXPIN
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sbrc r16,0
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sbi TXPORT,TXPIN
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#endif
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sec
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ror r16
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txout:
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sts txShifter,r16
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lastBitOut:
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pop r18
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pop r17
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pop r16
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sts SREG,r16
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pop r16
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reti
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// section handles the last bit (stop bit sent/received and sets the flag to say done //
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lastBitTX:
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lds r17,status // get status
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ori r17,SF_UART_TX // set TXC/DRE flag
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sts status,r17
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lds r16,TC_INT_MASK_REG
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andi r16,~(1<<TC_TX_COMPEN)
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sts TC_INT_MASK_REG,r16
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rjmp lastBitOut // over and out
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/*********************************************
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* interrupt routine, timer compare match.
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*
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* RX bit rate timing
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*/
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.global TIMER3_COMPC_vect
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TIMER3_COMPC_vect:
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push r16
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lds r16,SREG
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push r16
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push r17
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push r18
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// check if the last bit has been recieved
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lds r17,rxBitcount
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inc r17
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cpi r17,0x0A
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sts rxBitcount,r17
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breq lastBitRX
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cpi r17,0x01
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breq rx1stbit
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ldi r18,3 // set counter to 3
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ldi r17,0
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#ifdef DEBUG
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#if RXPORT>64
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lds r16,RXPORT
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andi r16,~(1<<TXPIN)
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sts TXPORT,r16
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#else
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cbi TXPORT,TXPIN // marker
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#endif
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#endif
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loopGetBit:
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#if (RXPORT>=32)
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lds r16,RXPORT
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sbrs r16,RXPIN
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#else
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sbic RXPORT,RXPIN
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#endif
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inc r17
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dec r18
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nop
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nop
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nop
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nop
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brne loopGetBit
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#ifdef DEBUG
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#if RXPORT>64
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lds r16,RXPORT
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ori r16,1<<TXPIN
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sts r16
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#else
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sbi TXPORT,TXPIN // marker
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#endif
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#endif
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lds r16,rxShifter
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lsr r16
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cpi r17,2
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brlo skipBitSet
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ori r16,0x80
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skipBitSet:
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sts rxShifter,r16
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rjmp lastBitOut
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lastBitRX:
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lds r17,status // store status
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#if (RXPORT>=32)
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lds r16,RXPORT
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sbrc r16,RXPIN
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#else
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sbic RXPORT,RXPIN
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#endif
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ori r17,0x02 // set flag if stop bit was high
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sts status,r17
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lds r16,rxShifter // get contents of shifter
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sbrc r17,1 // check if we just received a valid byte
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sts rxdata,r16 // if valid rxdata = shifter
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// switch interrupt back on to get another go
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sbi EXTI_FLAG_REG,EXTI_MASK_BIT // clear interrupt flag
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sbi EXTI_MASK_REG,EXTI_MASK_BIT // enable external interrupt 0 (RX)
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// switch off rx bit timer
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lds r16,TC_INT_MASK_REG
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andi r16,~(1<<TC_RX_COMPEN)
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sts TC_INT_MASK_REG,r16
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rjmp lastBitOut // loud and clear
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rx1stbit:
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lds r16,TC_COUNTL
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lds r17,TC_COUNTH
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subi r16,lo8(BITLENGTH / 2)
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sbci r17,hi8(BITLENGTH / 2)
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brcc skipOverflow
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subi r16,lo8(0xFFFF - BITLENGTH)
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sbci r17,hi8(0xFFFF - BITLENGTH)
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skipOverflow:
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sts TC_RX_COMPH,r17
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sts TC_RX_COMPL,r17
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rjmp lastBitOut
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/*********************************************
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* void SoftUART_Init(void)
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*
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* initialises software uart and enables transmit
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*/
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.global SoftUART_Init
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SoftUART_Init:
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#if (TXPORT>=32)
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lds r18,TXPORT
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ori r18,0x02
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sts TXPORT,r18
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lds r18,TXDIR_REG
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ori r18,0x02
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sts TXDIR_REG,r18
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#else
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sbi TXPORT,TXPIN
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sbi TXDIR_REG,TXPIN
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#endif
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ldi r18,(1<<SFT_TX_EN)|SF_UART_TX
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sts status,r18
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ldi r18,lo8(BITLENGTH)
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ldi r19,hi8(BITLENGTH)
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sts OCR3AH,r19
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sts OCR3AL,r18
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// Start timer 3
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ldi r18,0b00001001 // ctc count mode, clock div 1
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sts TC_CTRLB,r18
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// Interrupt on pin change INT0
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sbi EXTI_FLAG_REG,EXTI_MASK_BIT
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sbi EXTI_MASK_REG,EXTI_MASK_BIT
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ret
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/*********************************************
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* char SoftUART_RxByte(char)
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*
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* starts a byte send and returns the byte to be sent
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*/
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.global SoftUART_TxByte
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SoftUART_TxByte:
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lds r18,status
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sbrs r18,SFT_TX_EN
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rjmp SoftUART_TxByte_end
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andi r18,0xFE // clear tx empty flag
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sts status,r18
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sts txShifter,r24
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ldi r18,0
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sts txBitcount,r18
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// grab timer value
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cli // Atomic section start
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lds r18,TC_COUNTL
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lds r19,TC_COUNTH
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// drop down tx line for start bit
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#if (TXPORT>=32)
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lds r20, TXPORT
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andi r20,~(1<<TXPIN)
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sts TXPORT,r20
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#else
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cbi TXPORT,TXPIN
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#endif
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// set trigger for tx timer
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sts TC_TX_COMPH,r19
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sts TC_TX_COMPL,r18
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sei // Atomic section end
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// clear interrupt flag and enable tx interrupt
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sbi TC_INTFLAG_REG,TC_TX_IF_BIT
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lds r18,TC_INT_MASK_REG
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ori r18,(1<<TC_TX_COMPEN)
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sts TC_INT_MASK_REG,r18
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SoftUART_TxByte_end:
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ret
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/*********************************************
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* char SoftUART_RxByte(void)
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*
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* returns the received byte
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*/
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.global SoftUART_RxByte
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SoftUART_RxByte:
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lds r24,rxdata
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lds r18,status
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andi r18,0xFD
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sts status,r18
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ret
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/*********************************************
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* char SoftUART_IsReceived(void)
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*
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* checks if there is a byte in the receive buffer
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*/
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.global SoftUART_IsReceived
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SoftUART_IsReceived:
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lds r24,status
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andi r24,SF_UART_RX
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lsr r24
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ret
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/*********************************************
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* char SoftUART_IsReady(void)
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*
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* Simulates polling UDRE to see if tx buffer is empty and ready
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*
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* returns 1 if empty 0 if not
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*/
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.global SoftUART_IsReady
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SoftUART_IsReady:
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lds r24,status
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andi r24,SF_UART_TX
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ret
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