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152 lines
4.9 KiB
152 lines
4.9 KiB
/*!
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\file gd32vf103_fwdgt.c
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\brief FWDGT driver
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\version 2019-06-05, V1.0.0, firmware for GD32VF103
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*/
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/*
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Copyright (c) 2019, GigaDevice Semiconductor Inc.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice, this
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list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3. Neither the name of the copyright holder nor the names of its contributors
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may be used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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OF SUCH DAMAGE.
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*/
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#include "gd32vf103_fwdgt.h"
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/* write value to FWDGT_CTL_CMD bit field */
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#define CTL_CMD(regval) (BITS(0,15) & ((uint32_t)(regval) << 0))
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/* write value to FWDGT_RLD_RLD bit field */
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#define RLD_RLD(regval) (BITS(0,11) & ((uint32_t)(regval) << 0))
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/*!
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\brief enable write access to FWDGT_PSC and FWDGT_RLD
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\param[in] none
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\param[out] none
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\retval none
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*/
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void fwdgt_write_enable(void)
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{
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FWDGT_CTL = FWDGT_WRITEACCESS_ENABLE;
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}
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/*!
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\brief disable write access to FWDGT_PSC and FWDGT_RLD
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\param[in] none
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\param[out] none
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\retval none
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*/
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void fwdgt_write_disable(void)
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{
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FWDGT_CTL = FWDGT_WRITEACCESS_DISABLE;
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}
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/*!
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\brief start the free watchdog timer counter
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\param[in] none
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\param[out] none
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\retval none
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*/
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void fwdgt_enable(void)
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{
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FWDGT_CTL = FWDGT_KEY_ENABLE;
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}
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/*!
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\brief reload the counter of FWDGT
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\param[in] none
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\param[out] none
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\retval none
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*/
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void fwdgt_counter_reload(void)
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{
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FWDGT_CTL = FWDGT_KEY_RELOAD;
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}
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/*!
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\brief configure counter reload value, and prescaler divider value
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\param[in] reload_value: specify reload value(0x0000 - 0x0FFF)
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\param[in] prescaler_div: FWDGT prescaler value
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only one parameter can be selected which is shown as below:
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\arg FWDGT_PSC_DIV4: FWDGT prescaler set to 4
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\arg FWDGT_PSC_DIV8: FWDGT prescaler set to 8
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\arg FWDGT_PSC_DIV16: FWDGT prescaler set to 16
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\arg FWDGT_PSC_DIV32: FWDGT prescaler set to 32
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\arg FWDGT_PSC_DIV64: FWDGT prescaler set to 64
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\arg FWDGT_PSC_DIV128: FWDGT prescaler set to 128
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\arg FWDGT_PSC_DIV256: FWDGT prescaler set to 256
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\param[out] none
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\retval ErrStatus: ERROR or SUCCESS
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*/
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ErrStatus fwdgt_config(uint16_t reload_value, uint8_t prescaler_div)
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{
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uint32_t timeout = FWDGT_PSC_TIMEOUT;
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uint32_t flag_status = RESET;
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/* enable write access to FWDGT_PSC,and FWDGT_RLD */
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FWDGT_CTL = FWDGT_WRITEACCESS_ENABLE;
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/* wait until the PUD flag to be reset */
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do{
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flag_status = FWDGT_STAT & FWDGT_STAT_PUD;
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}while((--timeout > 0U) && ((uint32_t)RESET != flag_status));
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if((uint32_t)RESET != flag_status){
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return ERROR;
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}
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/* configure FWDGT */
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FWDGT_PSC = (uint32_t)prescaler_div;
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timeout = FWDGT_RLD_TIMEOUT;
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/* wait until the RUD flag to be reset */
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do{
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flag_status = FWDGT_STAT & FWDGT_STAT_RUD;
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}while((--timeout > 0U) && ((uint32_t)RESET != flag_status));
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if((uint32_t)RESET != flag_status){
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return ERROR;
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}
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FWDGT_RLD = RLD_RLD(reload_value);
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/* reload the counter */
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FWDGT_CTL = FWDGT_KEY_RELOAD;
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return SUCCESS;
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}
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/*!
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\brief get flag state of FWDGT
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\param[in] flag: flag to get
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only one parameter can be selected which is shown as below:
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\arg FWDGT_FLAG_PUD: a write operation to FWDGT_PSC register is on going
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\arg FWDGT_FLAG_RUD: a write operation to FWDGT_RLD register is on going
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\param[out] none
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\retval FlagStatus: SET or RESET
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*/
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FlagStatus fwdgt_flag_get(uint16_t flag)
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{
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if(FWDGT_STAT & flag){
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return SET;
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}
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return RESET;
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}
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