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usb-firewall-fork/Hardware/USG_parts.lib

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Initial commit of v1.0 hardware. Schematic done, layout in progress.
9 years ago
EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# DOUBLE_DIODE_CCOM
#
DEF DOUBLE_DIODE_CCOM D 0 30 Y N 1 F N
F0 "D" 75 -100 40 H V C CNN
F1 "DOUBLE_DIODE_CCOM" 0 100 40 H V C CNN
F2 "" 0 0 60 H V C CNN
F3 "" 0 0 60 H V C CNN
DRAW
P 2 0 1 0 -50 0 0 0 N
P 2 0 1 0 -50 50 -50 -50 N
P 2 0 1 0 0 0 0 -100 N
P 2 0 1 0 0 0 50 0 N
P 2 0 1 0 50 50 50 -50 N
P 4 0 1 0 -100 50 -100 -50 -50 0 -100 50 N
P 4 0 1 0 100 50 100 -50 50 0 100 50 N
X Anode 1 -350 0 250 R 40 40 0 1 P
X cathode 2 350 0 250 L 40 40 0 1 P
X AK 3 0 -200 100 U 40 40 0 1 P
ENDDRAW
ENDDEF
#
# NUP4114
#
DEF NUP4114 U 0 0 Y Y 1 F N
F0 "U" -75 -400 60 H V C CNN
F1 "NUP4114" 75 400 60 H V C CNN
F2 "" -150 175 60 H V C CNN
F3 "" -150 175 60 H V C CNN
DRAW
S -150 350 150 -350 0 1 0 N
P 2 0 1 0 -100 0 -150 0 N
P 2 0 1 0 -100 0 -100 -125 N
P 2 0 1 0 -100 0 0 0 N
P 2 0 1 0 -100 125 -100 0 N
P 2 0 1 0 -25 -250 50 -250 N
P 2 0 1 0 -25 -225 -25 -275 N
P 2 0 1 0 -25 -150 50 -150 N
P 2 0 1 0 -25 -125 -25 -175 N
P 2 0 1 0 -25 150 50 150 N
P 2 0 1 0 -25 175 -25 125 N
P 2 0 1 0 -25 250 50 250 N
P 2 0 1 0 -25 275 -25 225 N
P 2 0 1 0 25 -325 15 -325 N
P 2 0 1 0 25 -275 25 -325 N
P 2 0 1 0 25 -275 35 -275 N
P 2 0 1 0 25 -125 15 -125 N
P 2 0 1 0 25 -75 25 -125 N
P 2 0 1 0 25 -75 35 -75 N
P 2 0 1 0 25 -25 15 -25 N
P 2 0 1 0 25 0 150 0 N
P 2 0 1 0 25 25 25 -25 N
P 2 0 1 0 25 25 35 25 N
P 2 0 1 0 25 75 15 75 N
P 2 0 1 0 25 125 25 75 N
P 2 0 1 0 25 125 35 125 N
P 2 0 1 0 25 275 15 275 N
P 2 0 1 0 25 325 25 275 N
P 2 0 1 0 25 325 35 325 N
P 2 0 1 0 75 -225 75 -275 N
P 2 0 1 0 75 -125 75 -175 N
P 2 0 1 0 75 175 75 125 N
P 2 0 1 0 75 275 75 225 N
P 3 0 1 0 0 -250 0 -200 -150 -200 N
P 3 0 1 0 0 150 0 200 -150 200 N
P 3 0 1 0 25 -150 25 -200 150 -200 N
P 3 0 1 0 25 250 25 200 150 200 N
P 4 0 1 0 -75 -125 -100 -125 -100 -275 -75 -275 N
P 4 0 1 0 -75 275 -100 275 -100 125 -75 125 N
P 4 0 1 0 0 -300 -75 -300 -75 -250 -50 -250 N
P 4 0 1 0 0 -100 -75 -100 -75 -150 -50 -150 N
P 4 0 1 0 0 100 -75 100 -75 150 -50 150 N
P 4 0 1 0 0 300 -75 300 -75 250 -50 250 N
P 4 0 1 0 75 -250 100 -250 100 -300 25 -300 N
P 4 0 1 0 75 -150 100 -150 100 -100 25 -100 N
P 4 0 1 0 75 150 100 150 100 100 25 100 N
P 4 0 1 0 75 250 100 250 100 300 25 300 N
P 5 0 1 0 -50 -250 -50 -275 -25 -250 -50 -225 -50 -250 N
P 5 0 1 0 -50 -150 -50 -175 -25 -150 -50 -125 -50 -150 N
P 5 0 1 0 -50 150 -50 125 -25 150 -50 175 -50 150 N
P 5 0 1 0 -50 250 -50 225 -25 250 -50 275 -50 250 N
P 5 0 1 0 0 -300 0 -325 25 -300 0 -275 0 -300 N
P 5 0 1 0 0 -100 0 -125 25 -100 0 -75 0 -100 N
P 5 0 1 0 0 0 0 -25 25 0 0 25 0 0 N
P 5 0 1 0 0 100 0 75 25 100 0 125 0 100 N
P 5 0 1 0 0 300 0 275 25 300 0 325 0 300 N
P 5 0 1 0 50 -250 50 -275 75 -250 50 -225 50 -250 N
P 5 0 1 0 50 -150 50 -175 75 -150 50 -125 50 -150 N
P 5 0 1 0 50 150 50 125 75 150 50 175 50 150 N
P 5 0 1 0 50 250 50 225 75 250 50 275 50 250 N
X IO1 1 -350 200 200 R 50 50 1 1 B
X GND 2 -350 0 200 R 50 50 1 1 B
X IO3 3 -350 -200 200 R 50 50 1 1 B
X IO4 4 350 -200 200 L 50 50 1 1 B
X Vcc 5 350 0 200 L 50 50 1 1 B
X IO2 6 350 200 200 L 50 50 1 1 B
ENDDRAW
ENDDEF
#
# RR
#
DEF RR R 0 0 N Y 1 F N
F0 "R" 80 -50 50 V V C CNN
F1 "RR" -100 -50 50 V V C CNN
F2 "" 0 -50 60 H V C CNN
F3 "" 0 -50 60 H V C CNN
$FPLIST
R?
SM0603
SM0805
R?-*
SM1206
$ENDFPLIST
DRAW
P 6 0 1 0 0 100 -50 75 50 25 -50 -25 50 -75 0 -100 N
X ~ 1 0 200 100 D 60 60 1 1 P
X ~ 2 0 -200 100 U 60 60 1 1 P
ENDDRAW
ENDDEF
#
# STM32F401xB
#
DEF STM32F401xB U 0 40 Y Y 1 F N
F0 "U" -2000 1900 60 H V C CNN
F1 "STM32F401xB" 1750 -1900 60 H V C CNN
F2 "LQFP64" 50 0 50 H V C CIN
F3 "" 0 0 60 H V C CNN
DRAW
S -2050 1850 2050 -1850 0 1 10 f
X VBAT 1 -2200 600 150 R 40 40 1 1 W
X PC13/RTC_TAMP1 2 -2200 -1400 150 R 40 40 1 1 B
X PC14/OSC32_IN 3 -2200 -1500 150 R 40 40 1 1 B
X PC15/OSC32_OUT 4 -2200 -1600 150 R 40 40 1 1 B
X PH0/OSC_IN 5 -2200 1100 150 R 40 40 1 1 I
X PH1/OSC_OUT 6 -2200 900 150 R 40 40 1 1 O
X ~NRST 7 -2200 1600 150 R 40 40 1 1 B
X PC0/ADC1_IN10 8 -2200 -100 150 R 40 40 1 1 B
X PC1/ADC1_IN11 9 -2200 -200 150 R 40 40 1 1 B
X PC2/ADC1_IN12/SPI2_MISO 10 -2200 -300 150 R 40 40 1 1 B
X SPI1_NSS/SPI3_NSS/I2S3_WS/USART2_CK/ADC1_IN4/PA4 20 2200 1200 150 L 40 40 1 1 B
X VCAP_1 30 -2200 450 150 R 40 40 1 1 B
X PC9/I2S_CKIN/I2C3_SDA/TIM3_CH4/SDIO_D1/MCO_2 40 -2200 -1000 150 R 40 40 1 1 B
X JTDI/SPI1_NSS/SPI3_NSS/I2S3_WS/TIM2_CH1/TIM2_ETR/PA15 50 2200 100 150 L 40 40 1 1 B
X BOOT0/Vpp 60 -2200 1400 150 R 40 40 1 1 B
X PC3/ADC1_IN13/SPI2_MOSI 11 -2200 -400 150 R 40 40 1 1 B
X SPI1_SCK/TIM2_CH1/TIM2_ETR/ADC1_IN5/PA5 21 2200 1100 150 L 40 40 1 1 B
X VSS 31 0 -2000 150 U 40 40 1 1 W
X I2C3_SCL/USART1_CK/TIM1_CH1/OTG_FS_SOF/MCO_1/PA8 41 2200 800 150 L 40 40 1 1 B
X PC10/SPI3_SCK/I2S3_CK/SDIO_D2 51 -2200 -1100 150 R 40 40 1 1 B
X I2C1_SCL/TIM4_CH3/TIM10_CH1/SDIO_D4/PB8 61 2200 -900 150 L 40 40 1 1 B
X VSSA/VREF- 12 -400 -2000 150 U 40 40 1 1 W
X SPI1_MISO/TIM1_BKIN/TIM3_CH1/ADC1_IN6/PA6 22 2200 1000 150 L 40 40 1 1 B
X VDD 32 0 2000 150 D 40 40 1 1 W
X I2C3_SMBA/USART1_TX/TIM1_CH2/OTG_FS_VBUS/PA9 42 2200 700 150 L 40 40 1 1 B
X PC11/I2S3ext_SD/SPI3_MISO/SDIO_D3 52 -2200 -1200 150 R 40 40 1 1 B
X SPI2_NSS/I2S2_WS/I2C1_SDA/TIM4_CH4/TIM11_CH1/SDIO_D5/PB9 62 2200 -1000 150 L 40 40 1 1 B
X VDDA/VREF+ 13 -400 2000 150 D 40 40 1 1 W
X SPI1_MOSI/TIM1_CH1N/TIM3_CH2/ADC1_IN7/PA7 23 2200 900 150 L 40 40 1 1 B
X SPI2_NSS/I2S2_WS/I2C2_SMBA/TIM1_BKIN/PB12 33 2200 -1300 150 L 40 40 1 1 B
X USART1_RX/TIM1_CH3/OTG_FS_ID/PA10 43 2200 600 150 L 40 40 1 1 B
X PC12/SPI3_MOSI/I2S3_SD/SDIO_CK 53 -2200 -1300 150 R 40 40 1 1 B
X VSS 63 150 -2000 150 U 40 40 1 1 W
X USART2_CTS/TIM2_CH1/TIM2_ETR/TIM5_CH1/WKUP/ADC1_IN0/PA0 14 2200 1600 150 L 40 40 1 1 B
X PC4/ADC1_IN14 24 -2200 -500 150 R 40 40 1 1 B
X SPI2_SCK/I2S2_CK/TIM1_CH1N/PB13 34 2200 -1400 150 L 40 40 1 1 B
X USART1_CTS/USART6_TX/TIM1_CH4/OTG_FS_DM/PA11 44 2200 500 150 L 40 40 1 1 B
X PD2/TIM3_ETR/SDIO_CMD 54 -2200 100 150 R 40 40 1 1 B
X VDD 64 300 2000 150 D 40 40 1 1 W
X USART2_RTS/TIM2_CH2/TIM5_CH2/ADC1_IN1/PA1 15 2200 1500 150 L 40 40 1 1 B
X PC5/ADC1_IN15 25 -2200 -600 150 R 40 40 1 1 B
X SPI2_MISO/I2S2ext_SD/TIM1_CH2N/PB14 35 2200 -1500 150 L 40 40 1 1 B
X USART1_RTS/USART6_RX/TIM1_ETR/OTG_FS_DP/PA12 45 2200 400 150 L 40 40 1 1 B
X JTDO-SWO/SPI1_SCK/SPI3_SCK/I2S3_CK/I2C2_SDA/TIM2_CH2/PB3 55 2200 -400 150 L 40 40 1 1 B
X USART2_TX/TIM2_CH3/TIM5_CH3/TIM9_CH1/ADC1_IN2/PA2 16 2200 1400 150 L 40 40 1 1 B
X TIM1_CH2N/TIM3_CH3/ADC1_IN8/PB0 26 2200 -100 150 L 40 40 1 1 B
X SPI2_MOSI/I2S2_SD/TIM1_CH3N/RTC_REFIN/PB15 36 2200 -1600 150 L 40 40 1 1 B
X JTMS-SWDIO/PA13 46 2200 300 150 L 40 40 1 1 B
X NJTRST/SPI1_MISO/SPI3_MISO/I2S3ext_SD/I2C3_SDA/TIM3_CH1/PB4 56 2200 -500 150 L 40 40 1 1 B
X USART2_RX/TIM2_CH4/TIM5_CH4/TIM9_CH2/ADC1_IN3/PA3 17 2200 1300 150 L 40 40 1 1 B
X TIM1_CH3N/TIM3_CH4/ADC1_IN9/PB1 27 2200 -200 150 L 40 40 1 1 B
X PC6/I2S2_MCK/USART6_TX/TIM3_CH1/SDIO_D6 37 -2200 -700 150 R 40 40 1 1 B
X VSS 47 300 -2000 150 U 40 40 1 1 W
X SPI1_MOSI/SPI3_MOSI/I2S3_SD/I2C1_SMBA/TIM3_CH2/PB5 57 2200 -600 150 L 40 40 1 1 B
X VSS 18 -150 -2000 150 U 40 40 1 1 W
X BOOT1/PB2 28 2200 -300 150 L 40 40 1 1 B
X PC7/I2S3_MCK/USART6_RX/TIM3_CH2/SDIO_D7 38 -2200 -800 150 R 40 40 1 1 B
X VDD 48 150 2000 150 D 40 40 1 1 W
X I2C1_SCL/USART1_TX/TIM4_CH1/PB6 58 2200 -700 150 L 40 40 1 1 B
X VDD 19 -150 2000 150 D 40 40 1 1 W
X SPI2_SCK/I2S2_CK/I2C2_SCL/TIM2_CH3/PB10 29 2200 -1100 150 L 40 40 1 1 B
X PC8/USART6_CK/TIM3_CH3/SDIO_D0 39 -2200 -900 150 R 40 40 1 1 B
X JTCK-SWCLK/PA14 49 2200 200 150 L 40 40 1 1 B
X I2C1_SDA/USART1_RX/TIM4_CH2/PB7 59 2200 -800 150 L 40 40 1 1 B
ENDDRAW
ENDDEF
#
#End Library