Increase Downstream's host command timeout to 5 seconds. It turns out

some flash drives can take up to 2 seconds to write a single block.

Also, reverting the previous two commits because they didn't actually
help. Aughhhhhh...
pull/7/head
Robert Fisk 9 years ago
parent 39e1960bed
commit 647f088c6b

@ -866,7 +866,8 @@ static void HCD_HC_IN_IRQHandler(HCD_HandleTypeDef *hhcd, uint8_t chnum)
}
else if((hhcd->hc[chnum].state == HC_XACTERR) ||
(hhcd->hc[chnum].state == HC_DATATGLERR))
(hhcd->hc[chnum].state == HC_DATATGLERR) ||
(hhcd->hc[chnum].state == HC_NAK))
{
if(hhcd->hc[chnum].ErrCnt++ > 3)
{
@ -899,20 +900,20 @@ static void HCD_HC_IN_IRQHandler(HCD_HandleTypeDef *hhcd, uint8_t chnum)
else if ((USBx_HC(chnum)->HCINT) & USB_OTG_HCINT_NAK)
{
hhcd->hc[chnum].ErrCnt = 0;
if(hhcd->hc[chnum].ep_type == EP_TYPE_INTR)
{
// if(hhcd->hc[chnum].ep_type == EP_TYPE_INTR)
// {
__HAL_HCD_UNMASK_HALT_HC_INT(chnum);
USB_HC_Halt(hhcd->Instance, chnum);
}
else if ((hhcd->hc[chnum].ep_type == EP_TYPE_CTRL)||
(hhcd->hc[chnum].ep_type == EP_TYPE_BULK))
{
/* re-activate the channel */
tmpreg = USBx_HC(chnum)->HCCHAR;
tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
tmpreg |= USB_OTG_HCCHAR_CHENA;
USBx_HC(chnum)->HCCHAR = tmpreg;
}
// }
// else if ((hhcd->hc[chnum].ep_type == EP_TYPE_CTRL)||
// (hhcd->hc[chnum].ep_type == EP_TYPE_BULK))
// {
// /* re-activate the channel */
// tmpreg = USBx_HC(chnum)->HCCHAR;
// tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
// tmpreg |= USB_OTG_HCCHAR_CHENA;
// USBx_HC(chnum)->HCCHAR = tmpreg;
// }
hhcd->hc[chnum].state = HC_NAK;
__HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_NAK);
}
@ -1013,13 +1014,6 @@ static void HCD_HC_OUT_IRQHandler (HCD_HandleTypeDef *hhcd, uint8_t chnum)
else if ((USBx_HC(chnum)->HCINT) & USB_OTG_HCINT_CHH)
{
__HAL_HCD_MASK_HALT_HC_INT(chnum);
//This shouldn't even exist. So there's a weird host controller hardware bug
//on the STM32F407 that manifests when writing to some FAT filesystems.
//Transactions will stop partway through a 512-byte write, and nothing can
//get them started again. We can avoid this by soft-resetting the
//AHB-interface state machines on every channel halt.
USBx->GRSTCTL |= USB_OTG_GRSTCTL_HSRST;
if(hhcd->hc[chnum].state == HC_XFRC)
{

@ -136,7 +136,9 @@ MSC_HandleTypeDef;
#define USB_REQ_BOT_RESET 0xFF
#define USB_REQ_GET_MAX_LUN 0xFE
#define MSC_TIMEOUT_FRAMES_PER_BLOCK 1000
//#define MSC_TIMEOUT_FRAMES_PER_BLOCK 1000
#define MSC_TIMEOUT_FIXED 5000 //Some flash drives take 2 seconds to write a single block!
/* MSC Class Codes */
#define USB_MSC_CLASS 0x08

@ -735,7 +735,7 @@ USBH_StatusTypeDef USBH_MSC_Read(USBH_HandleTypeDef *phost,
MSC_Handle->unit[lun].state = MSC_READ;
MSC_Handle->rw_lun = lun;
MSC_Handle->RdWrCompleteCallback = callback;
MSC_Handle->timeout = phost->Timer + (length * MSC_TIMEOUT_FRAMES_PER_BLOCK);
MSC_Handle->timeout = phost->Timer + MSC_TIMEOUT_FIXED;
USBH_MSC_SCSI_Read(phost,
lun,
@ -776,7 +776,7 @@ USBH_StatusTypeDef USBH_MSC_Write(USBH_HandleTypeDef *phost,
MSC_Handle->unit[lun].state = MSC_WRITE;
MSC_Handle->rw_lun = lun;
MSC_Handle->RdWrCompleteCallback = callback;
MSC_Handle->timeout = phost->Timer + (length * MSC_TIMEOUT_FRAMES_PER_BLOCK);
MSC_Handle->timeout = phost->Timer + MSC_TIMEOUT_FIXED;
USBH_MSC_SCSI_Write(phost,
lun,

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