From 7b4e4b3c14f330885a199fdb7ec1a548d88b8d1d Mon Sep 17 00:00:00 2001 From: Robert Fisk Date: Sun, 26 Jul 2015 05:51:49 +1200 Subject: [PATCH] Continued polishing work on Downstream project. --- Downstream/.cproject | 1 + .../Inc/stm32f4xx_hal_spi.h | 3 + .../Src/stm32f4xx_ll_usb.c | 2 +- Downstream/Inc/board_config.h | 4 +- Downstream/Inc/upstream_interface_def.h | 45 +++++ Downstream/Inc/upstream_spi.h | 77 +++++++++ Downstream/Inc/usb_host.h | 6 +- .../Class/MSC/Inc/usbh_msc.h | 2 +- .../Class/MSC/Src/usbh_msc.c | 6 +- .../Class/MSC/Src/usbh_msc_bot.c | 8 +- .../Core/Inc/usbh_conf_template.h | 157 ------------------ .../Core/Src/usbh_ctlreq.c | 16 +- Downstream/Src/hal_msp.c | 33 ++-- Downstream/Src/main.c | 67 +------- Downstream/Src/upstream_spi.c | 49 ++++++ Downstream/Src/usb_host.c | 31 ++-- Downstream/Src/usbh_config.c | 78 ++++----- Upstream/Inc/downstream_interface_def.h | 7 + Upstream/Inc/downstream_spi.h | 2 +- Upstream/Src/downstream_spi.c | 38 ++--- Upstream/Src/hal_msp.c | 2 +- 21 files changed, 298 insertions(+), 336 deletions(-) create mode 100644 Downstream/Inc/upstream_interface_def.h create mode 100644 Downstream/Inc/upstream_spi.h delete mode 100644 Downstream/Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_conf_template.h create mode 100644 Downstream/Src/upstream_spi.c diff --git a/Downstream/.cproject b/Downstream/.cproject index d959a93..ae7ab7c 100644 --- a/Downstream/.cproject +++ b/Downstream/.cproject @@ -91,6 +91,7 @@ diff --git a/Downstream/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h b/Downstream/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h index 0ec9967..7565b65 100644 --- a/Downstream/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h +++ b/Downstream/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h @@ -272,6 +272,9 @@ typedef struct __SPI_HandleTypeDef */ #define SPI_CRCCALCULATION_DISABLE ((uint32_t)0x00000000) #define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN + +#define SPI_CRC_DEFAULTPOLYNOMIAL 0x07 + /** * @} */ diff --git a/Downstream/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c b/Downstream/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c index 2335ebf..28fedf4 100644 --- a/Downstream/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c +++ b/Downstream/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c @@ -337,7 +337,7 @@ HAL_StatusTypeDef USB_DevInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef c * @param USBx : Selected device * @param num : FIFO number * This parameter can be a value from 1 to 15 - 15 means Flush all Tx FIFOs + 16 means Flush all Tx FIFOs * @retval HAL status */ HAL_StatusTypeDef USB_FlushTxFifo (USB_OTG_GlobalTypeDef *USBx, uint32_t num ) diff --git a/Downstream/Inc/board_config.h b/Downstream/Inc/board_config.h index 5b2c897..a262258 100644 --- a/Downstream/Inc/board_config.h +++ b/Downstream/Inc/board_config.h @@ -40,8 +40,8 @@ //#define SPI_DMA_ACTIVE_ON SPI_DMA_ACTIVE_PORT->BSRR = (SPI_DMA_ACTIVE_PIN << BSRR_SHIFT_LOW) //#define SPI_DMA_ACTIVE_OFF SPI_DMA_ACTIVE_PORT->BSRR = (SPI_DMA_ACTIVE_PIN << BSRR_SHIFT_HIGH) -#define SPI1_NSS_PIN GPIO_PIN_4 -#define SPI1_NSS_PORT GPIOA +//#define SPI1_NSS_PIN GPIO_PIN_4 +//#define SPI1_NSS_PORT GPIOA #define UPSTREAM_TX_REQUEST_PIN GPIO_PIN_3 #define UPSTREAM_TX_REQUEST_PORT GPIOA diff --git a/Downstream/Inc/upstream_interface_def.h b/Downstream/Inc/upstream_interface_def.h new file mode 100644 index 0000000..fd5e6b6 --- /dev/null +++ b/Downstream/Inc/upstream_interface_def.h @@ -0,0 +1,45 @@ +/* + * upstream_interface_def.h + * + * Created on: 24/07/2015 + * Author: Robert Fisk + */ + +#ifndef INC_UPSTREAM_INTERFACE_DEF_H_ +#define INC_UPSTREAM_INTERFACE_DEF_H_ + + +//*************** +// Attention! +// Keep this file synchronised with downstream_interface_def.h +// in the Upstream project. +//*************** + + + +#define COMMAND_CLASS_DATA_FLAG 0x80 +#define COMMAND_CLASS_MASK ((uint8_t)(~COMMAND_CLASS_DATA_FLAG)) + + +typedef enum +{ + COMMAND_CLASS_INTERFACE = 0, + COMMAND_CLASS_MASS_STORAGE = 1, + COMMAND_CLASS_MAX = 2, +} +InterfaceCommandClassTypeDef; + + +typedef enum +{ + COMMAND_MSC_TEST_UNIT_READY = 0, //Returns HAL_StatusTypeDef result + COMMAND_MSC_GET_CAPACITY = 2, //Returns uint32_t blk_nbr, uint32_t blk_size + COMMAND_MSC_BEGIN_READ = 3, //Returns HAL_StatusTypeDef result, then data stream + COMMAND_MSC_BEGIN_WRITE = 4, //Returns HAL_OK, HAL_ERROR if medium not present, HAL_BUSY if write-protected result, then waits for data stream + COMMAND_MSC_MAX = 5, +} +InterfaceCommandMscTypeDef; + + + +#endif /* INC_UPSTREAM_INTERFACE_DEF_H_ */ diff --git a/Downstream/Inc/upstream_spi.h b/Downstream/Inc/upstream_spi.h new file mode 100644 index 0000000..d63c2ea --- /dev/null +++ b/Downstream/Inc/upstream_spi.h @@ -0,0 +1,77 @@ +/* + * upstream_spi.h + * + * Created on: 24/07/2015 + * Author: Robert Fisk + */ + +#ifndef INC_UPSTREAM_SPI_H_ +#define INC_UPSTREAM_SPI_H_ + + +#include "usbh_config.h" + + +#define UPSTREAM_PACKET_HEADER_LEN (2) //Min length = CommandClass & Command bytes +#define UPSTREAM_PACKET_LEN (UPSTREAM_PACKET_HEADER_LEN + USBH_MAX_DATA_BUFFER) +#define UPSTREAM_PACKET_LEN_MIN (UPSTREAM_PACKET_HEADER_LEN) + + +#define SPI_INTERFACE_FREAKOUT_VOID \ + do { \ + while (1); \ + /*UpstreamInterfaceState = INTERFACE_STATE_ERROR;*/ \ + /*return;*/ \ +} while (0); + +#define SPI_INTERFACE_FREAKOUT_HAL_ERROR \ + do { \ + while (1); \ + /*UpstreamInterfaceState = INTERFACE_STATE_ERROR;*/ \ + /*return HAL_ERROR;*/ \ +} while (0); + + + +typedef enum +{ + INTERFACE_STATE_RESET = 0, +// INTERFACE_STATE_WAITING_CLIENT = 1, +// INTERFACE_STATE_IDLE = 2, +// INTERFACE_STATE_TX_SIZE_WAIT = 3, +// INTERFACE_STATE_TX_SIZE = 4, +// INTERFACE_STATE_TX_PACKET_WAIT = 5, +// INTERFACE_STATE_TX_PACKET = 6, +// INTERFACE_STATE_RX_SIZE_WAIT = 7, +// INTERFACE_STATE_RX_SIZE = 8, +// INTERFACE_STATE_RX_PACKET_WAIT = 9, +// INTERFACE_STATE_RX_PACKET = 10, + INTERFACE_STATE_ERROR = 11 +} InterfaceStateTypeDef; + + +typedef enum +{ + NOT_BUSY = 0, + BUSY = 1 +} PacketBusyTypeDef; + + +typedef struct +{ + PacketBusyTypeDef Busy; //Everything after Busy should be word-aligned + uint16_t Length __ALIGN_END; //Packet length includes CommandClass, Command, and Data + uint8_t CommandClass; + uint8_t Command; + uint8_t Data[USBH_MAX_DATA_BUFFER]; //Should (must?) be word-aligned, for USB copy routine + uint8_t RxCrc; +} +UpstreamPacketTypeDef; + + +void Upstream_InitInterface(void); + + + + +#endif /* INC_UPSTREAM_SPI_H_ */ diff --git a/Downstream/Inc/usb_host.h b/Downstream/Inc/usb_host.h index 9da80cf..2b09dc8 100644 --- a/Downstream/Inc/usb_host.h +++ b/Downstream/Inc/usb_host.h @@ -49,8 +49,10 @@ typedef enum { APPLICATION_DISCONNECT, }ApplicationTypeDef; -void MX_USB_HOST_Init(void); -void MX_USB_HOST_Process(void); + +void USB_Host_Init(void); +void USB_Host_Process(void); + #ifdef __cplusplus } diff --git a/Downstream/Middlewares/ST/STM32_USB_Host_Library/Class/MSC/Inc/usbh_msc.h b/Downstream/Middlewares/ST/STM32_USB_Host_Library/Class/MSC/Inc/usbh_msc.h index c0b5cb8..378a99c 100644 --- a/Downstream/Middlewares/ST/STM32_USB_Host_Library/Class/MSC/Inc/usbh_msc.h +++ b/Downstream/Middlewares/ST/STM32_USB_Host_Library/Class/MSC/Inc/usbh_msc.h @@ -152,7 +152,7 @@ MSC_HandleTypeDef; /* MSC Class Codes */ #define USB_MSC_CLASS 0x08 -/* Interface Descriptor field values for HID Boot Protocol */ +/* Interface Descriptor field values for MSC Protocol */ #define MSC_BOT 0x50 #define MSC_TRANSPARENT 0x06 /** diff --git a/Downstream/Middlewares/ST/STM32_USB_Host_Library/Class/MSC/Src/usbh_msc.c b/Downstream/Middlewares/ST/STM32_USB_Host_Library/Class/MSC/Src/usbh_msc.c index 3cfe52b..8953109 100644 --- a/Downstream/Middlewares/ST/STM32_USB_Host_Library/Class/MSC/Src/usbh_msc.c +++ b/Downstream/Middlewares/ST/STM32_USB_Host_Library/Class/MSC/Src/usbh_msc.c @@ -396,9 +396,9 @@ static USBH_StatusTypeDef USBH_MSC_Process(USBH_HandleTypeDef *phost) { MSC_Handle->unit[MSC_Handle->current_lun].state_changed = 0; } - MSC_Handle->unit[MSC_Handle->current_lun].state = MSC_REQUEST_SENSE; - MSC_Handle->unit[MSC_Handle->current_lun].error = MSC_NOT_READY; - MSC_Handle->unit[MSC_Handle->current_lun].prev_ready_state = USBH_FAIL; + MSC_Handle->unit[MSC_Handle->current_lun].state = MSC_REQUEST_SENSE; + MSC_Handle->unit[MSC_Handle->current_lun].error = MSC_NOT_READY; + MSC_Handle->unit[MSC_Handle->current_lun].prev_ready_state = USBH_FAIL; } else if(ready_status == USBH_UNRECOVERED_ERROR) { diff --git a/Downstream/Middlewares/ST/STM32_USB_Host_Library/Class/MSC/Src/usbh_msc_bot.c b/Downstream/Middlewares/ST/STM32_USB_Host_Library/Class/MSC/Src/usbh_msc_bot.c index cd71190..ffa84cf 100644 --- a/Downstream/Middlewares/ST/STM32_USB_Host_Library/Class/MSC/Src/usbh_msc_bot.c +++ b/Downstream/Middlewares/ST/STM32_USB_Host_Library/Class/MSC/Src/usbh_msc_bot.c @@ -243,7 +243,7 @@ USBH_StatusTypeDef USBH_MSC_BOT_Process (USBH_HandleTypeDef *phost, uint8_t lun) /* Send first packet */ USBH_BulkReceiveData (phost, MSC_Handle->hbot.pbuf, - MSC_Handle->InEpSize , + MSC_Handle->InEpSize , //Todo: Possible buffer overflow here? MSC_Handle->InPipe); MSC_Handle->hbot.state = BOT_DATA_IN_WAIT; @@ -273,7 +273,7 @@ USBH_StatusTypeDef USBH_MSC_BOT_Process (USBH_HandleTypeDef *phost, uint8_t lun) /* Send next packet */ USBH_BulkReceiveData (phost, MSC_Handle->hbot.pbuf, - MSC_Handle->InEpSize , + MSC_Handle->InEpSize , //Todo: Possible buffer overflow here? MSC_Handle->InPipe); } @@ -308,7 +308,7 @@ USBH_StatusTypeDef USBH_MSC_BOT_Process (USBH_HandleTypeDef *phost, uint8_t lun) USBH_BulkSendData (phost, MSC_Handle->hbot.pbuf, - MSC_Handle->OutEpSize , + MSC_Handle->OutEpSize , //?????????? MSC_Handle->OutPipe, 1); @@ -337,7 +337,7 @@ USBH_StatusTypeDef USBH_MSC_BOT_Process (USBH_HandleTypeDef *phost, uint8_t lun) { USBH_BulkSendData (phost, MSC_Handle->hbot.pbuf, - MSC_Handle->OutEpSize , + MSC_Handle->OutEpSize , //????????????? MSC_Handle->OutPipe, 1); } diff --git a/Downstream/Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_conf_template.h b/Downstream/Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_conf_template.h deleted file mode 100644 index decf4e8..0000000 --- a/Downstream/Middlewares/ST/STM32_USB_Host_Library/Core/Inc/usbh_conf_template.h +++ /dev/null @@ -1,157 +0,0 @@ -/** - ****************************************************************************** - * @file usbh_conf_template.h - * @author MCD Application Team - * @version V3.2.1 - * @date 26-June-2015 - * @brief Header file for usbh_conf_template.c - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2015 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __USBH_CONF_TEMPLATE_H -#define __USBH_CONF_TEMPLATE_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32f4xx.h" -#include -#include -#include - -/** @addtogroup USBH_OTG_DRIVER - * @{ - */ - -/** @defgroup USBH_CONF - * @brief usb otg low level driver configuration file - * @{ - */ - -/** @defgroup USBH_CONF_Exported_Defines - * @{ - */ - -#define USBH_MAX_NUM_ENDPOINTS 2 -#define USBH_MAX_NUM_INTERFACES 2 -#define USBH_MAX_NUM_CONFIGURATION 1 -#define USBH_KEEP_CFG_DESCRIPTOR 1 -#define USBH_MAX_NUM_SUPPORTED_CLASS 1 -#define USBH_MAX_SIZE_CONFIGURATION 0x200 -#define USBH_MAX_DATA_BUFFER 0x200 -#define USBH_DEBUG_LEVEL 2 -#define USBH_USE_OS 1 - -/** @defgroup USBH_Exported_Macros - * @{ - */ - - /* Memory management macros */ -#define USBH_malloc malloc -#define USBH_free free -#define USBH_memset memset -#define USBH_memcpy memcpy - - /* DEBUG macros */ - - -#if (USBH_DEBUG_LEVEL > 0) -#define USBH_UsrLog(...) printf(__VA_ARGS__);\ - printf("\n"); -#else -#define USBH_UsrLog(...) -#endif - - -#if (USBH_DEBUG_LEVEL > 1) - -#define USBH_ErrLog(...) printf("ERROR: ") ;\ - printf(__VA_ARGS__);\ - printf("\n"); -#else -#define USBH_ErrLog(...) -#endif - - -#if (USBH_DEBUG_LEVEL > 2) -#define USBH_DbgLog(...) printf("DEBUG : ") ;\ - printf(__VA_ARGS__);\ - printf("\n"); -#else -#define USBH_DbgLog(...) -#endif - -/** - * @} - */ - -/** - * @} - */ - - -/** @defgroup USBH_CONF_Exported_Types - * @{ - */ -/** - * @} - */ - - -/** @defgroup USBH_CONF_Exported_Macros - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_CONF_Exported_Variables - * @{ - */ -/** - * @} - */ - -/** @defgroup USBH_CONF_Exported_FunctionsPrototype - * @{ - */ -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __USBH_CONF_TEMPLATE_H */ - - -/** - * @} - */ - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/Downstream/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c b/Downstream/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c index 5fb9a10..c0d9afe 100644 --- a/Downstream/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c +++ b/Downstream/Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c @@ -140,10 +140,21 @@ USBH_StatusTypeDef USBH_Get_CfgDesc(USBH_HandleTypeDef *phost, { USBH_StatusTypeDef status; uint8_t *pData; + #if (USBH_KEEP_CFG_DESCRIPTOR == 1) pData = phost->device.CfgDesc_Raw; + + if (length > USBH_MAX_SIZE_CONFIGURATION) + { + length = USBH_MAX_SIZE_CONFIGURATION; + } #else pData = phost->device.Data; + + if (length > USBH_MAX_DATA_BUFFER) + { + length = USBH_MAX_DATA_BUFFER; + } #endif if((status = USBH_GetDescriptor(phost, USB_REQ_RECIPIENT_DEVICE | USB_REQ_TYPE_STANDARD, @@ -151,7 +162,6 @@ USBH_StatusTypeDef USBH_Get_CfgDesc(USBH_HandleTypeDef *phost, pData, length)) == USBH_OK) { - /* Commands successfully sent and Response Received */ USBH_ParseCfgDesc (&phost->device.CfgDesc, pData, @@ -392,7 +402,9 @@ static void USBH_ParseCfgDesc (USBH_CfgDescTypeDef* cfg_desc, ptr = USB_LEN_CFG_DESC; pif = (USBH_InterfaceDescTypeDef *)0; - + //*************** + //Todo: This does not check for malformed descriptors. Needs hardening! + //*************** while ((if_ix < USBH_MAX_NUM_INTERFACES ) && (ptr < cfg_desc->wTotalLength)) { pdesc = USBH_GetNextDesc((uint8_t *)pdesc, &ptr); diff --git a/Downstream/Src/hal_msp.c b/Downstream/Src/hal_msp.c index dbead96..b2db449 100644 --- a/Downstream/Src/hal_msp.c +++ b/Downstream/Src/hal_msp.c @@ -34,10 +34,11 @@ /* Includes ------------------------------------------------------------------*/ #include "stm32f4xx_hal.h" #include "interrupts.h" +#include "board_config.h" -extern DMA_HandleTypeDef hdma_spi1_rx; -extern DMA_HandleTypeDef hdma_spi1_tx; +DMA_HandleTypeDef hdma_spi1_rx; +DMA_HandleTypeDef hdma_spi1_tx; @@ -50,24 +51,31 @@ void HAL_MspInit(void) void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) { - GPIO_InitTypeDef GPIO_InitStruct; + if(hspi->Instance==SPI1) { __SPI1_CLK_ENABLE(); + __DMA2_CLK_ENABLE(); - /**SPI1 GPIO Configuration + /**SPI1 GPIO Configuration + PA4 ------> SPI_NSS PA5 ------> SPI1_SCK PA6 ------> SPI1_MISO PA7 ------> SPI1_MOSI */ - GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7; + GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_MEDIUM; GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + UPSTREAM_TX_REQUEST_DEASSERT; + GPIO_InitStruct.Pin = UPSTREAM_TX_REQUEST_PIN; + GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + HAL_GPIO_Init(UPSTREAM_TX_REQUEST_PORT, &GPIO_InitStruct); + /* Peripheral DMA init*/ hdma_spi1_rx.Instance = DMA2_Stream2; hdma_spi1_rx.Init.Channel = DMA_CHANNEL_3; @@ -79,11 +87,7 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) hdma_spi1_rx.Init.Mode = DMA_NORMAL; hdma_spi1_rx.Init.Priority = DMA_PRIORITY_MEDIUM; hdma_spi1_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - hdma_spi1_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; - hdma_spi1_rx.Init.MemBurst = DMA_MBURST_SINGLE; - hdma_spi1_rx.Init.PeriphBurst = DMA_PBURST_SINGLE; HAL_DMA_Init(&hdma_spi1_rx); - __HAL_LINKDMA(hspi,hdmarx,hdma_spi1_rx); hdma_spi1_tx.Instance = DMA2_Stream3; @@ -96,17 +100,18 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) hdma_spi1_tx.Init.Mode = DMA_NORMAL; hdma_spi1_tx.Init.Priority = DMA_PRIORITY_MEDIUM; hdma_spi1_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; - hdma_spi1_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; - hdma_spi1_tx.Init.MemBurst = DMA_MBURST_SINGLE; - hdma_spi1_tx.Init.PeriphBurst = DMA_PBURST_SINGLE; HAL_DMA_Init(&hdma_spi1_tx); - __HAL_LINKDMA(hspi,hdmatx,hdma_spi1_tx); + /* DMA interrupt init */ + HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, INT_PRIORITY_SPI_DMA, 0); + HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn); + HAL_NVIC_SetPriority(DMA2_Stream3_IRQn, INT_PRIORITY_SPI_DMA, 0); + HAL_NVIC_EnableIRQ(DMA2_Stream3_IRQn); } - } + void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi) { diff --git a/Downstream/Src/main.c b/Downstream/Src/main.c index e37e5a9..f74873d 100644 --- a/Downstream/Src/main.c +++ b/Downstream/Src/main.c @@ -34,27 +34,19 @@ #include "stm32f4xx_hal.h" #include "usb_host.h" #include "board_config.h" - - -/* Private variables ---------------------------------------------------------*/ -SPI_HandleTypeDef hspi1; -DMA_HandleTypeDef hdma_spi1_rx; -DMA_HandleTypeDef hdma_spi1_tx; +#include "upstream_spi.h" /* Private function prototypes -----------------------------------------------*/ void SystemClock_Config(void); -static void MX_GPIO_Init(void); -static void MX_DMA_Init(void); -static void MX_SPI1_Init(void); -void MX_USB_HOST_Process(void); +static void GPIO_Init(void); int main(void) { - /* MCU Configuration----------------------------------------------------------*/ + /* MCU Configuration----------------------------------------------------------*/ /* Configure the system clock */ SystemClock_Config(); @@ -63,15 +55,14 @@ int main(void) HAL_Init(); /* Initialize all configured peripherals */ - MX_GPIO_Init(); - MX_DMA_Init(); - MX_SPI1_Init(); - MX_USB_HOST_Init(); + GPIO_Init(); + USB_Host_Init(); + Upstream_InitInterface(); while (1) { - MX_USB_HOST_Process(); + USB_Host_Process(); } } @@ -111,49 +102,9 @@ void SystemClock_Config(void) } -/* SPI1 init function */ -void MX_SPI1_Init(void) -{ - hspi1.Instance = SPI1; - hspi1.Init.Mode = SPI_MODE_SLAVE; - hspi1.Init.Direction = SPI_DIRECTION_2LINES; - hspi1.Init.DataSize = SPI_DATASIZE_8BIT; - hspi1.Init.CLKPolarity = SPI_POLARITY_LOW; - hspi1.Init.CLKPhase = SPI_PHASE_1EDGE; - hspi1.Init.NSS = SPI_NSS_SOFT; - hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; - hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; - hspi1.Init.TIMode = SPI_TIMODE_DISABLED; - hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED; - hspi1.Init.CRCPolynomial = 10; - HAL_SPI_Init(&hspi1); -} -/** - * Enable DMA controller clock - */ -void MX_DMA_Init(void) -{ - /* DMA controller clock enable */ - __DMA2_CLK_ENABLE(); - - /* DMA interrupt init */ - HAL_NVIC_SetPriority(DMA2_Stream2_IRQn, 0, 0); - HAL_NVIC_EnableIRQ(DMA2_Stream2_IRQn); - HAL_NVIC_SetPriority(DMA2_Stream3_IRQn, 0, 0); - HAL_NVIC_EnableIRQ(DMA2_Stream3_IRQn); - -} - -/** Configure pins as - * Analog - * Input - * Output - * EVENT_OUT - * EXTI -*/ -void MX_GPIO_Init(void) +void GPIO_Init(void) { GPIO_InitTypeDef GPIO_InitStruct; @@ -209,9 +160,7 @@ void MX_GPIO_Init(void) HAL_GPIO_Init(STAT_LED_PORT, &GPIO_InitStruct); } -/* USER CODE BEGIN 4 */ -/* USER CODE END 4 */ #ifdef USE_FULL_ASSERT diff --git a/Downstream/Src/upstream_spi.c b/Downstream/Src/upstream_spi.c new file mode 100644 index 0000000..cb26532 --- /dev/null +++ b/Downstream/Src/upstream_spi.c @@ -0,0 +1,49 @@ +/* + * upstream_spi.c + * + * Created on: 24/07/2015 + * Author: Robert Fisk + */ + + +#include "upstream_spi.h" +#include "upstream_interface_def.h" + + +SPI_HandleTypeDef Hspi1; + +InterfaceStateTypeDef UpstreamInterfaceState; + + + +void SPI1_Init(void); + + + +void Upstream_InitInterface(void) +{ + UpstreamInterfaceState = INTERFACE_STATE_RESET; + + SPI1_Init(); + +} + + +void SPI1_Init(void) +{ + Hspi1.Instance = SPI1; + Hspi1.Init.Mode = SPI_MODE_SLAVE; + Hspi1.Init.Direction = SPI_DIRECTION_2LINES; + Hspi1.Init.DataSize = SPI_DATASIZE_8BIT; + Hspi1.Init.CLKPolarity = SPI_POLARITY_LOW; + Hspi1.Init.CLKPhase = SPI_PHASE_1EDGE; + Hspi1.Init.NSS = SPI_NSS_HARD_INPUT; + Hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; + Hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; + Hspi1.Init.TIMode = SPI_TIMODE_DISABLED; + Hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_ENABLE; + Hspi1.Init.CRCPolynomial = SPI_CRC_DEFAULTPOLYNOMIAL; + HAL_SPI_Init(&Hspi1); +} + + diff --git a/Downstream/Src/usb_host.c b/Downstream/Src/usb_host.c index 6fc9f6a..e5c90ad 100644 --- a/Downstream/Src/usb_host.c +++ b/Downstream/Src/usb_host.c @@ -39,29 +39,19 @@ /* USB Host Core handle declaration */ USBH_HandleTypeDef hUsbHostFS; -ApplicationTypeDef Appli_state = APPLICATION_IDLE; +ApplicationTypeDef App_state = APPLICATION_IDLE; -/** -* -- Insert your variables declaration here -- -*/ -/* USER CODE BEGIN 0 */ -/* USER CODE END 0 */ /* -* user callbak declaration +* user callback declaration */ static void USBH_UserProcess (USBH_HandleTypeDef *phost, uint8_t id); -/** -* -- Insert your external function declaration here -- -*/ -/* USER CODE BEGIN 1 */ -/* USER CODE END 1 */ /* init function */ -void MX_USB_HOST_Init(void) +void USB_Host_Init(void) { /* Init Host Library,Add Supported Class and Start the library*/ USBH_Init(&hUsbHostFS, USBH_UserProcess, HOST_FS); @@ -74,39 +64,40 @@ void MX_USB_HOST_Init(void) /* * Background task */ -void MX_USB_HOST_Process() +void USB_Host_Process() { /* USB Host Background task */ USBH_Process(&hUsbHostFS); } + /* - * user callbak definition + * user callback definition */ static void USBH_UserProcess (USBH_HandleTypeDef *phost, uint8_t id) { - /* USER CODE BEGIN 2 */ switch(id) { case HOST_USER_SELECT_CONFIGURATION: + //usbh_core.c only stored the first configuration returned by the device, + //so we don't really have a choice of configurations at this point! break; case HOST_USER_DISCONNECTION: - Appli_state = APPLICATION_DISCONNECT; + App_state = APPLICATION_DISCONNECT; break; case HOST_USER_CLASS_ACTIVE: - Appli_state = APPLICATION_READY; + App_state = APPLICATION_READY; break; case HOST_USER_CONNECTION: - Appli_state = APPLICATION_START; + App_state = APPLICATION_START; break; default: break; } - /* USER CODE END 2 */ } /** diff --git a/Downstream/Src/usbh_config.c b/Downstream/Src/usbh_config.c index 8ef2a9c..e1c2da0 100644 --- a/Downstream/Src/usbh_config.c +++ b/Downstream/Src/usbh_config.c @@ -32,9 +32,12 @@ */ /* Includes ------------------------------------------------------------------*/ #include "usbh_core.h" +#include "interrupts.h" + HCD_HandleTypeDef hhcd_USB_OTG_FS; + /******************************************************************************* LL Driver Callbacks (HCD -> USB Host Library) *******************************************************************************/ @@ -43,22 +46,13 @@ HCD_HandleTypeDef hhcd_USB_OTG_FS; void HAL_HCD_MspInit(HCD_HandleTypeDef* hhcd) { GPIO_InitTypeDef GPIO_InitStruct; + if(hhcd->Instance==USB_OTG_FS) { - /* USER CODE BEGIN USB_OTG_FS_MspInit 0 */ - - /* USER CODE END USB_OTG_FS_MspInit 0 */ - /**USB_OTG_FS GPIO Configuration - PA9 ------> USB_OTG_FS_VBUS PA11 ------> USB_OTG_FS_DM PA12 ------> USB_OTG_FS_DP */ - GPIO_InitStruct.Pin = GPIO_PIN_9; - GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - GPIO_InitStruct.Pull = GPIO_NOPULL; - HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; @@ -70,21 +64,16 @@ void HAL_HCD_MspInit(HCD_HandleTypeDef* hhcd) __USB_OTG_FS_CLK_ENABLE(); /* Peripheral interrupt init*/ - HAL_NVIC_SetPriority(OTG_FS_IRQn, 0, 0); + HAL_NVIC_SetPriority(OTG_FS_IRQn, INT_PRIORITY_OTG_FS, 0); HAL_NVIC_EnableIRQ(OTG_FS_IRQn); - /* USER CODE BEGIN USB_OTG_FS_MspInit 1 */ - - /* USER CODE END USB_OTG_FS_MspInit 1 */ } } + void HAL_HCD_MspDeInit(HCD_HandleTypeDef* hhcd) { if(hhcd->Instance==USB_OTG_FS) { - /* USER CODE BEGIN USB_OTG_FS_MspDeInit 0 */ - - /* USER CODE END USB_OTG_FS_MspDeInit 0 */ /* Peripheral clock disable */ __USB_OTG_FS_CLK_DISABLE(); @@ -93,14 +82,10 @@ void HAL_HCD_MspDeInit(HCD_HandleTypeDef* hhcd) PA11 ------> USB_OTG_FS_DM PA12 ------> USB_OTG_FS_DP */ - HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_11|GPIO_PIN_12); + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_11|GPIO_PIN_12); /* Peripheral interrupt Deinit*/ HAL_NVIC_DisableIRQ(OTG_FS_IRQn); - - /* USER CODE BEGIN USB_OTG_FS_MspDeInit 1 */ - - /* USER CODE END USB_OTG_FS_MspDeInit 1 */ } } @@ -228,17 +213,17 @@ USBH_SpeedTypeDef USBH_LL_GetSpeed (USBH_HandleTypeDef *phost) speed = USBH_SPEED_HIGH; break; - case 1 : - speed = USBH_SPEED_FULL; - break; +// case 1 : +// speed = USBH_SPEED_FULL; +// break; case 2 : speed = USBH_SPEED_LOW; break; - default: - speed = USBH_SPEED_FULL; - break; +// default: +// speed = USBH_SPEED_FULL; +// break; } return speed; } @@ -391,28 +376,21 @@ USBH_URBStateTypeDef USBH_LL_GetURBState (USBH_HandleTypeDef *phost, uint8_t pi */ USBH_StatusTypeDef USBH_LL_DriverVBUS (USBH_HandleTypeDef *phost, uint8_t state) { - /* USER CODE BEGIN 0 */ - /* USER CODE END 0 */ - if(state == 0) - { - /* Drive high Charge pump */ - /* USER CODE BEGIN 1 */ - /* ToDo: Add IOE driver control */ - if (phost->id == HOST_FS) { - } - /* USER CODE END 1 */ - } - else - { - /* Drive low Charge pump */ - /* USER CODE BEGIN 2 */ - /* ToDo: Add IOE driver control */ - if (phost->id == HOST_FS) { - } - /* USER CODE END 2 */ - } - HAL_Delay(200); - return USBH_OK; + //Our VBUS is permanently on, so don't bother with this... + +// if (phost->id == HOST_FS) +// { +// if(state == 0) +// { +// //VBUS off +// } +// else +// { +// //VBUS on +// } +// } +// HAL_Delay(200); + return USBH_OK; } /** diff --git a/Upstream/Inc/downstream_interface_def.h b/Upstream/Inc/downstream_interface_def.h index 28bb61d..34d344c 100644 --- a/Upstream/Inc/downstream_interface_def.h +++ b/Upstream/Inc/downstream_interface_def.h @@ -9,6 +9,13 @@ #define INC_DOWNSTREAM_INTERFACE_DEF_H_ +//*************** +// Attention! +// Keep this file synchronised with upstream_interface_def.h +// in the Downstream project. +//*************** + + //Upstream only supports one LUN. //Downstream may support > 1 LUN and only report the first active one to upstream. #define UPSTREAM_LUN_NBR 1 diff --git a/Upstream/Inc/downstream_spi.h b/Upstream/Inc/downstream_spi.h index 24297b7..55069e7 100644 --- a/Upstream/Inc/downstream_spi.h +++ b/Upstream/Inc/downstream_spi.h @@ -63,7 +63,7 @@ typedef struct uint16_t Length __ALIGN_END; //Packet length includes CommandClass, Command, and Data uint8_t CommandClass; uint8_t Command; - uint8_t Data[USB_HS_MAX_PACKET_SIZE]; //Should (must?) be word-aligned, for USB copy routine + uint8_t Data[MSC_MEDIA_PACKET]; //Should (must?) be word-aligned, for USB copy routine uint8_t RxCrc; } DownstreamPacketTypeDef; diff --git a/Upstream/Src/downstream_spi.c b/Upstream/Src/downstream_spi.c index db10039..bc9c6ac 100644 --- a/Upstream/Src/downstream_spi.c +++ b/Upstream/Src/downstream_spi.c @@ -13,7 +13,7 @@ -SPI_HandleTypeDef hspi1; +SPI_HandleTypeDef Hspi1; DownstreamPacketTypeDef DownstreamPacket0; DownstreamPacketTypeDef DownstreamPacket1; DownstreamPacketTypeDef* CurrentWorkingPacket; @@ -53,20 +53,20 @@ void Downstream_InitInterface(void) void SPI1_Init(void) { - hspi1.Instance = SPI1; - hspi1.State = HAL_SPI_STATE_RESET; - hspi1.Init.Mode = SPI_MODE_MASTER; - hspi1.Init.Direction = SPI_DIRECTION_2LINES; - hspi1.Init.DataSize = SPI_DATASIZE_8BIT; - hspi1.Init.CLKPolarity = SPI_POLARITY_LOW; - hspi1.Init.CLKPhase = SPI_PHASE_1EDGE; - hspi1.Init.NSS = SPI_NSS_SOFT; - hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32; //42MHz APB2 / 32 = 1.3Mbaud - hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; - hspi1.Init.TIMode = SPI_TIMODE_DISABLED; - hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_ENABLED; - hspi1.Init.CRCPolynomial = SPI_CRC_DEFAULTPOLYNOMIAL; - HAL_SPI_Init(&hspi1); + Hspi1.Instance = SPI1; + Hspi1.State = HAL_SPI_STATE_RESET; + Hspi1.Init.Mode = SPI_MODE_MASTER; + Hspi1.Init.Direction = SPI_DIRECTION_2LINES; + Hspi1.Init.DataSize = SPI_DATASIZE_8BIT; + Hspi1.Init.CLKPolarity = SPI_POLARITY_LOW; + Hspi1.Init.CLKPhase = SPI_PHASE_1EDGE; + Hspi1.Init.NSS = SPI_NSS_SOFT; + Hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32; //42MHz APB2 / 32 = 1.3Mbaud + Hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; + Hspi1.Init.TIMode = SPI_TIMODE_DISABLED; + Hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_ENABLED; + Hspi1.Init.CRCPolynomial = SPI_CRC_DEFAULTPOLYNOMIAL; + HAL_SPI_Init(&Hspi1); } @@ -313,7 +313,7 @@ void Downstream_TxOkInterrupt(void) case INTERFACE_STATE_TX_SIZE_WAIT: DownstreamInterfaceState = INTERFACE_STATE_TX_SIZE; SPI1_NSS_ASSERT; - if (HAL_SPI_Transmit_DMA(&hspi1, + if (HAL_SPI_Transmit_DMA(&Hspi1, (uint8_t*)&CurrentWorkingPacket->Length, 2) != HAL_OK) { @@ -324,7 +324,7 @@ void Downstream_TxOkInterrupt(void) case INTERFACE_STATE_TX_PACKET_WAIT: DownstreamInterfaceState = INTERFACE_STATE_TX_PACKET; SPI1_NSS_ASSERT; - if ((HAL_SPI_Transmit_DMA(&hspi1, + if ((HAL_SPI_Transmit_DMA(&Hspi1, &CurrentWorkingPacket->CommandClass, CurrentWorkingPacket->Length)) != HAL_OK) { @@ -339,7 +339,7 @@ void Downstream_TxOkInterrupt(void) case INTERFACE_STATE_RX_PACKET_WAIT: DownstreamInterfaceState = INTERFACE_STATE_RX_PACKET; SPI1_NSS_ASSERT; - if ((HAL_SPI_Receive_DMA(&hspi1, + if ((HAL_SPI_Receive_DMA(&Hspi1, &CurrentWorkingPacket->CommandClass, (CurrentWorkingPacket->Length + 1))) != HAL_OK) //"When the CRC feature is enabled the pData Length must be Size + 1" { @@ -365,7 +365,7 @@ void Downstream_BeginPacketReception(DownstreamPacketTypeDef* freePacket) CurrentWorkingPacket = freePacket; CurrentWorkingPacket->Length = 0; //Our RX buffer is used by HAL_SPI_Receive_DMA as dummy TX data, we set Length to 0 so downstream will know this is a dummy packet. SPI1_NSS_ASSERT; - if (HAL_SPI_Receive_DMA(&hspi1, + if (HAL_SPI_Receive_DMA(&Hspi1, (uint8_t*)&CurrentWorkingPacket->Length, (2 + 1)) != HAL_OK) //"When the CRC feature is enabled the pData Length must be Size + 1" { diff --git a/Upstream/Src/hal_msp.c b/Upstream/Src/hal_msp.c index e3696a4..ec75a86 100755 --- a/Upstream/Src/hal_msp.c +++ b/Upstream/Src/hal_msp.c @@ -143,7 +143,7 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi) PA6 ------> SPI1_MISO PA7 ------> SPI1_MOSI */ - HAL_GPIO_DeInit(GPIOA, GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7); + HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7); HAL_DMA_DeInit(&spiTxDmaHandle); HAL_DMA_DeInit(&spiRxDmaHandle);