From 975f2d00af4b44b896bf2d3549de7581353f7ecf Mon Sep 17 00:00:00 2001 From: Robert Fisk Date: Sun, 21 Aug 2016 13:45:50 +1200 Subject: [PATCH] Fix dynamic crystal frequency detection based on board revision --- Downstream/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c | 2 +- Upstream/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Downstream/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c b/Downstream/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c index 951a780..d824de6 100644 --- a/Downstream/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c +++ b/Downstream/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c @@ -1021,7 +1021,7 @@ __weak uint32_t HAL_RCC_GetSysClockFreq(void) if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI) { /* HSE used as PLL clock source */ - pllvco = ((HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> POSITION_VAL(RCC_PLLCFGR_PLLN))); + pllvco = (((HAL_GetHSECrystalFreqMHz() * (uint32_t)1000000) / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> POSITION_VAL(RCC_PLLCFGR_PLLN))); } else { diff --git a/Upstream/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c b/Upstream/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c index 8143f02..e1c8dab 100755 --- a/Upstream/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c +++ b/Upstream/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c @@ -982,7 +982,7 @@ uint32_t HAL_RCC_GetSysClockFreq(void) if(__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI) { /* HSE used as PLL clock source */ - pllvco = ((HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> POSITION_VAL(RCC_PLLCFGR_PLLN))); + pllvco = (((HAL_GetHSECrystalFreqMHz() * (uint32_t)1000000) / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> POSITION_VAL(RCC_PLLCFGR_PLLN))); } else {