It will sometimes NAK part-way through a multi-packet OUT URB. And what
it wants is for the host to resend beginning from the last even-numbered
packet. NOT the last packet it received, and NOT the beginning of that
URB.
Each USB transaction passed to the driver now consists of multiple
64-byte packets. 8 packets when receiving, 4 packets when transmitting.
The STM32 silicon bugs out when more than 4 packets are scheduled to
write at a time :(
Reads 1.0MB/sec, writes 967kB/sec, not CPU limited :)
interacts with SPI.
It elevates to USB_OTG priority to avoid preemption by SPI, DMA, or USB
interrupts thus avoiding synchronisation issues between USB host stack
and SPI interface.
Also minor improvements to Downstream error handling.