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Robert Fisk 2e3293e84f Increase SPI interface speed 4x, to 5.25Mbps. Required modifications to ... SPI peripheral library. At this speed SPI requires ~60% CPU time at -Og optimisation level. This could be further improved by trimming down the SPI interrupt. But... Speed is now limited by Downstream's single-packet-per-URB restriction, to about 460kB/s. USB Middleware does not implement TX FIFO empty interrupt, so a bit of work is required here.		9 years ago
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.settings	Crazy hardware issues, about to revert Upstream SPI from DMA to	9 years ago
Drivers	Increase SPI interface speed 4x, to 5.25Mbps. Required modifications to	9 years ago
Inc	Code tidyup - remove unused SPI Tx-only and Rx-only routines	9 years ago
Middlewares/ST/STM32_USB_Host_Library	Crazy hardware issues, about to revert Upstream SPI from DMA to	9 years ago
Src	Code tidyup - remove unused SPI Tx-only and Rx-only routines	9 years ago
.cproject	Crazy hardware issues, about to revert Upstream SPI from DMA to	9 years ago
.gitignore	Initial commit of Downstream template project.	9 years ago
.project	Initial commit of Downstream template project.	9 years ago
Downstream Debug.launch	Crazy hardware issues, about to revert Upstream SPI from DMA to	9 years ago
Downstream Release.launch	Crazy hardware issues, about to revert Upstream SPI from DMA to	9 years ago
gcc_arm_stm32f407.ld	Initial commit of Downstream template project.	9 years ago
olimex_stm32_h407.cfg	Initial commit of Downstream template project.	9 years ago