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							62 lines
						
					
					
						
							2.2 KiB
						
					
					
				
			
		
		
	
	
							62 lines
						
					
					
						
							2.2 KiB
						
					
					
				/*
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 * board_config.h
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 *
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 *  Created on: 25/03/2015
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 *      Author: Robert Fisk
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 *
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 * This Source Code Form is subject to the terms of the Mozilla Public
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 * License, v. 2.0. If a copy of the MPL was not distributed with this
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 * file, You can obtain one at https://mozilla.org/MPL/2.0/.
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 */
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#ifndef INC_BOARD_CONFIG_H_
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#define INC_BOARD_CONFIG_H_
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#define BSRR_SHIFT_HIGH         0
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#define BSRR_SHIFT_LOW          16
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#define PA_JTMS                 GPIO_PIN_13
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#define PA_JTCK                 GPIO_PIN_14
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#define PA_JTDI                 GPIO_PIN_15
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#define PB_JTDO                 GPIO_PIN_3
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#define PB_NJTRST               GPIO_PIN_4
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#define FAULT_LED_PIN           GPIO_PIN_13
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#define FAULT_LED_PORT          GPIOC
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#define FAULT_LED_ON            (FAULT_LED_PORT->BSRR = (FAULT_LED_PIN << BSRR_SHIFT_LOW))  //Fault LED is active-low
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#define FAULT_LED_OFF           (FAULT_LED_PORT->BSRR = (FAULT_LED_PIN << BSRR_SHIFT_HIGH))
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#define H405_FAULT_LED_PIN      GPIO_PIN_12     //Fault LED on Olimex H405 board
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#define H405_FAULT_LED_ON       (FAULT_LED_PORT->BSRR = (H405_FAULT_LED_PIN << BSRR_SHIFT_LOW))
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#define INT_ACTIVE_PIN          GPIO_PIN_5          //Temporary indicator of SPI (or whatever) activity
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#define INT_ACTIVE_PORT         GPIOB
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#define INT_ACTIVE_ON           INT_ACTIVE_PORT->BSRR = (INT_ACTIVE_PIN << BSRR_SHIFT_HIGH)
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#define INT_ACTIVE_OFF          INT_ACTIVE_PORT->BSRR = (INT_ACTIVE_PIN << BSRR_SHIFT_LOW)
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#define SPI1_NSS_PIN            GPIO_PIN_4
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#define SPI1_NSS_PORT           GPIOA
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#define SPI1_NSS_ASSERT         SPI1_NSS_PORT->BSRR = (SPI1_NSS_PIN << BSRR_SHIFT_LOW)
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#define SPI1_NSS_DEASSERT       SPI1_NSS_PORT->BSRR = (SPI1_NSS_PIN << BSRR_SHIFT_HIGH)
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#define DOWNSTREAM_TX_OK_PIN    GPIO_PIN_3
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#define DOWNSTREAM_TX_OK_PORT   GPIOA
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#define DOWNSTREAM_TX_OK_ACTIVE (!(DOWNSTREAM_TX_OK_PORT->IDR & DOWNSTREAM_TX_OK_PIN))
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#define DBGMCU_IDCODE_DEV_ID_405_407_415_417    0x413
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#define DBGMCU_IDCODE_DEV_ID_401xB_xC           0x423
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#define BOARD_REV_PIN_MASK      0x07
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#define BOARD_ID_PIN_MASK       0x08
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#define BOARD_REV_ID_PORT       GPIOC
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#define BOARD_REV_1_0_BETA      0
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#define BOARD_REV_1_0_BETA_3    1
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#define BOARD_REV_1_0_BETA_FREQ     8
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#define BOARD_REV_1_0_BETA_3_FREQ   16
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#endif /* INC_BOARD_CONFIG_H_ */
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