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1267 lines
42 KiB
1267 lines
42 KiB
/**
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******************************************************************************
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* @file stm32f4xx_hal_dma2d.c
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* @author MCD Application Team
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* @version V1.3.2
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* @date 26-June-2015
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* @brief DMA2D HAL module driver.
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* This file provides firmware functions to manage the following
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* functionalities of the DMA2D peripheral:
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* + Initialization and de-initialization functions
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* + IO operation functions
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* + Peripheral Control functions
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* + Peripheral State and Errors functions
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*
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@verbatim
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==============================================================================
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##### How to use this driver #####
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==============================================================================
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[..]
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(#) Program the required configuration through following parameters:
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the Transfer Mode, the output color mode and the output offset using
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HAL_DMA2D_Init() function.
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(#) Program the required configuration through following parameters:
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the input color mode, the input color, input alpha value, alpha mode
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and the input offset using HAL_DMA2D_ConfigLayer() function for foreground
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or/and background layer.
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*** Polling mode IO operation ***
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=================================
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[..]
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(+) Configure the pdata, Destination and data length and Enable
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the transfer using HAL_DMA2D_Start()
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(+) Wait for end of transfer using HAL_DMA2D_PollForTransfer(), at this stage
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user can specify the value of timeout according to his end application.
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*** Interrupt mode IO operation ***
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===================================
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[..]
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(#) Configure the pdata, Destination and data length and Enable
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the transfer using HAL_DMA2D_Start_IT()
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(#) Use HAL_DMA2D_IRQHandler() called under DMA2D_IRQHandler() Interrupt subroutine
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(#) At the end of data transfer HAL_DMA2D_IRQHandler() function is executed and user can
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add his own function by customization of function pointer XferCpltCallback and
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XferErrorCallback (i.e a member of DMA2D handle structure).
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-@- In Register-to-Memory transfer mode, the pdata parameter is the register
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color, in Memory-to-memory or memory-to-memory with pixel format
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conversion the pdata is the source address.
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-@- Configure the foreground source address, the background source address,
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the Destination and data length and Enable the transfer using
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HAL_DMA2D_BlendingStart() in polling mode and HAL_DMA2D_BlendingStart_IT()
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in interrupt mode.
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-@- HAL_DMA2D_BlendingStart() and HAL_DMA2D_BlendingStart_IT() functions
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are used if the memory to memory with blending transfer mode is selected.
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(#) Optionally, configure and enable the CLUT using HAL_DMA2D_ConfigCLUT()
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HAL_DMA2D_EnableCLUT() functions.
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(#) Optionally, configure and enable LineInterrupt using the following function:
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HAL_DMA2D_ProgramLineEvent().
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(#) The transfer can be suspended, continued and aborted using the following
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functions: HAL_DMA2D_Suspend(), HAL_DMA2D_Resume(), HAL_DMA2D_Abort().
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(#) To control DMA2D state you can use the following function: HAL_DMA2D_GetState()
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*** DMA2D HAL driver macros list ***
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=============================================
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[..]
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Below the list of most used macros in DMA2D HAL driver :
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(+) __HAL_DMA2D_ENABLE: Enable the DMA2D peripheral.
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(+) __HAL_DMA2D_DISABLE: Disable the DMA2D peripheral.
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(+) __HAL_DMA2D_GET_FLAG: Get the DMA2D pending flags.
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(+) __HAL_DMA2D_CLEAR_FLAG: Clear the DMA2D pending flags.
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(+) __HAL_DMA2D_ENABLE_IT: Enable the specified DMA2D interrupts.
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(+) __HAL_DMA2D_DISABLE_IT: Disable the specified DMA2D interrupts.
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(+) __HAL_DMA2D_GET_IT_SOURCE: Check whether the specified DMA2D interrupt has occurred or not.
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[..]
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(@) You can refer to the DMA2D HAL driver header file for more useful macros
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@endverbatim
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32f4xx_hal.h"
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/** @addtogroup STM32F4xx_HAL_Driver
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* @{
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*/
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/** @addtogroup DMA2D
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* @brief DMA2D HAL module driver
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* @{
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*/
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#ifdef HAL_DMA2D_MODULE_ENABLED
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#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
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/* Private types -------------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/** @addtogroup DMA2D_Private_Defines
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* @{
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*/
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#define HAL_TIMEOUT_DMA2D_ABORT ((uint32_t)1000) /* 1s */
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#define HAL_TIMEOUT_DMA2D_SUSPEND ((uint32_t)1000) /* 1s */
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/**
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* @}
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*/
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/* Private variables ---------------------------------------------------------*/
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/* Private constants ---------------------------------------------------------*/
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/* Private macro -------------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/** @addtogroup DMA2D_Private_Functions_Prototypes
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* @{
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*/
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static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
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/**
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* @}
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*/
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/* Private functions ---------------------------------------------------------*/
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/* Exported functions --------------------------------------------------------*/
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/** @addtogroup DMA2D_Exported_Functions
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* @{
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*/
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/** @defgroup DMA2D_Group1 Initialization and Configuration functions
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* @brief Initialization and Configuration functions
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*
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@verbatim
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===============================================================================
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##### Initialization and Configuration functions #####
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===============================================================================
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[..] This section provides functions allowing to:
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(+) Initialize and configure the DMA2D
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(+) De-initialize the DMA2D
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@endverbatim
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* @{
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*/
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/**
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* @brief Initializes the DMA2D according to the specified
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* parameters in the DMA2D_InitTypeDef and create the associated handle.
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* @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
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* the configuration information for the DMA2D.
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d)
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{
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uint32_t tmp = 0;
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/* Check the DMA2D peripheral state */
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if(hdma2d == NULL)
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{
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return HAL_ERROR;
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}
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/* Check the parameters */
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assert_param(IS_DMA2D_ALL_INSTANCE(hdma2d->Instance));
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assert_param(IS_DMA2D_MODE(hdma2d->Init.Mode));
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assert_param(IS_DMA2D_CMODE(hdma2d->Init.ColorMode));
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assert_param(IS_DMA2D_OFFSET(hdma2d->Init.OutputOffset));
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if(hdma2d->State == HAL_DMA2D_STATE_RESET)
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{
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/* Allocate lock resource and initialize it */
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hdma2d->Lock = HAL_UNLOCKED;
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/* Init the low level hardware */
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HAL_DMA2D_MspInit(hdma2d);
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}
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/* Change DMA2D peripheral state */
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hdma2d->State = HAL_DMA2D_STATE_BUSY;
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/* DMA2D CR register configuration -------------------------------------------*/
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/* Get the CR register value */
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tmp = hdma2d->Instance->CR;
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/* Clear Mode bits */
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tmp &= (uint32_t)~DMA2D_CR_MODE;
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/* Prepare the value to be wrote to the CR register */
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tmp |= hdma2d->Init.Mode;
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/* Write to DMA2D CR register */
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hdma2d->Instance->CR = tmp;
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/* DMA2D OPFCCR register configuration ---------------------------------------*/
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/* Get the OPFCCR register value */
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tmp = hdma2d->Instance->OPFCCR;
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/* Clear Color Mode bits */
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tmp &= (uint32_t)~DMA2D_OPFCCR_CM;
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/* Prepare the value to be wrote to the OPFCCR register */
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tmp |= hdma2d->Init.ColorMode;
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/* Write to DMA2D OPFCCR register */
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hdma2d->Instance->OPFCCR = tmp;
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/* DMA2D OOR register configuration ------------------------------------------*/
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/* Get the OOR register value */
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tmp = hdma2d->Instance->OOR;
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/* Clear Offset bits */
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tmp &= (uint32_t)~DMA2D_OOR_LO;
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/* Prepare the value to be wrote to the OOR register */
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tmp |= hdma2d->Init.OutputOffset;
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/* Write to DMA2D OOR register */
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hdma2d->Instance->OOR = tmp;
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/* Update error code */
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hdma2d->ErrorCode = HAL_DMA2D_ERROR_NONE;
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/* Initialize the DMA2D state*/
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hdma2d->State = HAL_DMA2D_STATE_READY;
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return HAL_OK;
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}
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/**
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* @brief Deinitializes the DMA2D peripheral registers to their default reset
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* values.
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* @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
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* the configuration information for the DMA2D.
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* @retval None
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*/
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HAL_StatusTypeDef HAL_DMA2D_DeInit(DMA2D_HandleTypeDef *hdma2d)
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{
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/* Check the DMA2D peripheral state */
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if(hdma2d == NULL)
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{
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return HAL_ERROR;
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}
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/* DeInit the low level hardware */
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HAL_DMA2D_MspDeInit(hdma2d);
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/* Update error code */
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hdma2d->ErrorCode = HAL_DMA2D_ERROR_NONE;
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/* Initialize the DMA2D state*/
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hdma2d->State = HAL_DMA2D_STATE_RESET;
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/* Release Lock */
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__HAL_UNLOCK(hdma2d);
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return HAL_OK;
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}
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/**
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* @brief Initializes the DMA2D MSP.
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* @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
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* the configuration information for the DMA2D.
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* @retval None
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*/
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__weak void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d)
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{
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/* NOTE : This function Should not be modified, when the callback is needed,
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the HAL_DMA2D_MspInit could be implemented in the user file
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*/
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}
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/**
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* @brief DeInitializes the DMA2D MSP.
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* @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
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* the configuration information for the DMA2D.
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* @retval None
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*/
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__weak void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d)
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{
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/* NOTE : This function Should not be modified, when the callback is needed,
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the HAL_DMA2D_MspDeInit could be implemented in the user file
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*/
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}
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/**
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* @}
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*/
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/** @defgroup DMA2D_Group2 IO operation functions
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* @brief IO operation functions
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*
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@verbatim
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===============================================================================
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##### IO operation functions #####
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===============================================================================
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[..] This section provides functions allowing to:
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(+) Configure the pdata, destination address and data size and
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Start DMA2D transfer.
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(+) Configure the source for foreground and background, destination address
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and data size and Start MultiBuffer DMA2D transfer.
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(+) Configure the pdata, destination address and data size and
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Start DMA2D transfer with interrupt.
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(+) Configure the source for foreground and background, destination address
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and data size and Start MultiBuffer DMA2D transfer with interrupt.
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(+) Abort DMA2D transfer.
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(+) Suspend DMA2D transfer.
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(+) Continue DMA2D transfer.
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(+) Poll for transfer complete.
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(+) handle DMA2D interrupt request.
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@endverbatim
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* @{
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*/
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/**
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* @brief Start the DMA2D Transfer.
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* @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
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* the configuration information for the DMA2D.
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* @param pdata: Configure the source memory Buffer address if
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* the memory to memory or memory to memory with pixel format
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* conversion DMA2D mode is selected, and configure
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* the color value if register to memory DMA2D mode is selected.
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* @param DstAddress: The destination memory Buffer address.
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* @param Width: The width of data to be transferred from source to destination.
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* @param Height: The height of data to be transferred from source to destination.
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height)
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{
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/* Process locked */
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__HAL_LOCK(hdma2d);
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/* Change DMA2D peripheral state */
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hdma2d->State = HAL_DMA2D_STATE_BUSY;
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/* Check the parameters */
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assert_param(IS_DMA2D_LINE(Height));
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assert_param(IS_DMA2D_PIXEL(Width));
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/* Disable the Peripheral */
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__HAL_DMA2D_DISABLE(hdma2d);
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/* Configure the source, destination address and the data size */
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DMA2D_SetConfig(hdma2d, pdata, DstAddress, Width, Height);
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/* Enable the Peripheral */
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__HAL_DMA2D_ENABLE(hdma2d);
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return HAL_OK;
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}
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/**
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* @brief Start the DMA2D Transfer with interrupt enabled.
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* @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
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* the configuration information for the DMA2D.
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* @param pdata: Configure the source memory Buffer address if
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* the memory to memory or memory to memory with pixel format
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* conversion DMA2D mode is selected, and configure
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* the color value if register to memory DMA2D mode is selected.
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* @param DstAddress: The destination memory Buffer address.
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* @param Width: The width of data to be transferred from source to destination.
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* @param Height: The height of data to be transferred from source to destination.
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height)
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{
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/* Process locked */
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__HAL_LOCK(hdma2d);
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/* Change DMA2D peripheral state */
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hdma2d->State = HAL_DMA2D_STATE_BUSY;
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/* Check the parameters */
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assert_param(IS_DMA2D_LINE(Height));
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assert_param(IS_DMA2D_PIXEL(Width));
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/* Disable the Peripheral */
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__HAL_DMA2D_DISABLE(hdma2d);
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/* Configure the source, destination address and the data size */
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DMA2D_SetConfig(hdma2d, pdata, DstAddress, Width, Height);
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/* Enable the transfer complete interrupt */
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__HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TC);
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/* Enable the transfer Error interrupt */
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__HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TE);
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/* Enable the Peripheral */
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__HAL_DMA2D_ENABLE(hdma2d);
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/* Enable the configuration error interrupt */
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__HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_CE);
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return HAL_OK;
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}
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/**
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* @brief Start the multi-source DMA2D Transfer.
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* @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
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* the configuration information for the DMA2D.
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* @param SrcAddress1: The source memory Buffer address of the foreground layer.
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* @param SrcAddress2: The source memory Buffer address of the background layer.
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* @param DstAddress: The destination memory Buffer address
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* @param Width: The width of data to be transferred from source to destination.
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* @param Height: The height of data to be transferred from source to destination.
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height)
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{
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/* Process locked */
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__HAL_LOCK(hdma2d);
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/* Change DMA2D peripheral state */
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hdma2d->State = HAL_DMA2D_STATE_BUSY;
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/* Check the parameters */
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assert_param(IS_DMA2D_LINE(Height));
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assert_param(IS_DMA2D_PIXEL(Width));
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/* Disable the Peripheral */
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__HAL_DMA2D_DISABLE(hdma2d);
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/* Configure DMA2D Stream source2 address */
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hdma2d->Instance->BGMAR = SrcAddress2;
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/* Configure the source, destination address and the data size */
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DMA2D_SetConfig(hdma2d, SrcAddress1, DstAddress, Width, Height);
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/* Enable the Peripheral */
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__HAL_DMA2D_ENABLE(hdma2d);
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return HAL_OK;
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}
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|
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/**
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* @brief Start the multi-source DMA2D Transfer with interrupt enabled.
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* @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
|
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* the configuration information for the DMA2D.
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* @param SrcAddress1: The source memory Buffer address of the foreground layer.
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* @param SrcAddress2: The source memory Buffer address of the background layer.
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* @param DstAddress: The destination memory Buffer address.
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* @param Width: The width of data to be transferred from source to destination.
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* @param Height: The height of data to be transferred from source to destination.
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* @retval HAL status
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*/
|
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HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height)
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{
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/* Process locked */
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__HAL_LOCK(hdma2d);
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/* Change DMA2D peripheral state */
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hdma2d->State = HAL_DMA2D_STATE_BUSY;
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/* Check the parameters */
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assert_param(IS_DMA2D_LINE(Height));
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assert_param(IS_DMA2D_PIXEL(Width));
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/* Disable the Peripheral */
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__HAL_DMA2D_DISABLE(hdma2d);
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/* Configure DMA2D Stream source2 address */
|
|
hdma2d->Instance->BGMAR = SrcAddress2;
|
|
|
|
/* Configure the source, destination address and the data size */
|
|
DMA2D_SetConfig(hdma2d, SrcAddress1, DstAddress, Width, Height);
|
|
|
|
/* Enable the configuration error interrupt */
|
|
__HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_CE);
|
|
|
|
/* Enable the transfer complete interrupt */
|
|
__HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TC);
|
|
|
|
/* Enable the transfer Error interrupt */
|
|
__HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TE);
|
|
|
|
/* Enable the Peripheral */
|
|
__HAL_DMA2D_ENABLE(hdma2d);
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Abort the DMA2D Transfer.
|
|
* @param hdma2d : pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d)
|
|
{
|
|
uint32_t tickstart = 0;
|
|
|
|
/* Disable the DMA2D */
|
|
__HAL_DMA2D_DISABLE(hdma2d);
|
|
|
|
/* Get tick */
|
|
tickstart = HAL_GetTick();
|
|
|
|
/* Check if the DMA2D is effectively disabled */
|
|
while((hdma2d->Instance->CR & DMA2D_CR_START) != 0)
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA2D_ABORT)
|
|
{
|
|
/* Update error code */
|
|
hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
|
|
|
|
/* Change the DMA2D state */
|
|
hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hdma2d);
|
|
|
|
return HAL_TIMEOUT;
|
|
}
|
|
}
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hdma2d);
|
|
|
|
/* Change the DMA2D state*/
|
|
hdma2d->State = HAL_DMA2D_STATE_READY;
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Suspend the DMA2D Transfer.
|
|
* @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d)
|
|
{
|
|
uint32_t tickstart = 0;
|
|
|
|
/* Suspend the DMA2D transfer */
|
|
hdma2d->Instance->CR |= DMA2D_CR_SUSP;
|
|
|
|
/* Get tick */
|
|
tickstart = HAL_GetTick();
|
|
|
|
/* Check if the DMA2D is effectively suspended */
|
|
while((hdma2d->Instance->CR & DMA2D_CR_SUSP) != DMA2D_CR_SUSP)
|
|
{
|
|
if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA2D_SUSPEND)
|
|
{
|
|
/* Update error code */
|
|
hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
|
|
|
|
/* Change the DMA2D state */
|
|
hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
|
|
|
|
return HAL_TIMEOUT;
|
|
}
|
|
}
|
|
/* Change the DMA2D state*/
|
|
hdma2d->State = HAL_DMA2D_STATE_SUSPEND;
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Resume the DMA2D Transfer.
|
|
* @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d)
|
|
{
|
|
/* Resume the DMA2D transfer */
|
|
hdma2d->Instance->CR &= ~DMA2D_CR_SUSP;
|
|
|
|
/* Change the DMA2D state*/
|
|
hdma2d->State = HAL_DMA2D_STATE_BUSY;
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Polling for transfer complete or CLUT loading.
|
|
* @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @param Timeout: Timeout duration
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout)
|
|
{
|
|
uint32_t tmp, tmp1;
|
|
uint32_t tickstart = 0;
|
|
|
|
/* Polling for DMA2D transfer */
|
|
if((hdma2d->Instance->CR & DMA2D_CR_START) != 0)
|
|
{
|
|
/* Get tick */
|
|
tickstart = HAL_GetTick();
|
|
|
|
while(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TC) == RESET)
|
|
{
|
|
tmp = __HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CE);
|
|
tmp1 = __HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TE);
|
|
|
|
if((tmp != RESET) || (tmp1 != RESET))
|
|
{
|
|
/* Clear the transfer and configuration error flags */
|
|
__HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CE);
|
|
__HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TE);
|
|
|
|
/* Change DMA2D state */
|
|
hdma2d->State= HAL_DMA2D_STATE_ERROR;
|
|
|
|
/* Process unlocked */
|
|
__HAL_UNLOCK(hdma2d);
|
|
|
|
return HAL_ERROR;
|
|
}
|
|
/* Check for the Timeout */
|
|
if(Timeout != HAL_MAX_DELAY)
|
|
{
|
|
if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
|
|
{
|
|
/* Process unlocked */
|
|
__HAL_UNLOCK(hdma2d);
|
|
|
|
/* Update error code */
|
|
hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
|
|
|
|
/* Change the DMA2D state */
|
|
hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
|
|
|
|
return HAL_TIMEOUT;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
/* Polling for CLUT loading */
|
|
if((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) != 0)
|
|
{
|
|
/* Get tick */
|
|
tickstart = HAL_GetTick();
|
|
|
|
while(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CTC) == RESET)
|
|
{
|
|
if((__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CAE) != RESET))
|
|
{
|
|
/* Clear the transfer and configuration error flags */
|
|
__HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CAE);
|
|
|
|
/* Change DMA2D state */
|
|
hdma2d->State= HAL_DMA2D_STATE_ERROR;
|
|
|
|
return HAL_ERROR;
|
|
}
|
|
/* Check for the Timeout */
|
|
if(Timeout != HAL_MAX_DELAY)
|
|
{
|
|
if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
|
|
{
|
|
/* Update error code */
|
|
hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
|
|
|
|
/* Change the DMA2D state */
|
|
hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
|
|
|
|
return HAL_TIMEOUT;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
/* Clear the transfer complete flag */
|
|
__HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TC);
|
|
|
|
/* Clear the CLUT loading flag */
|
|
__HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CTC);
|
|
|
|
/* Change DMA2D state */
|
|
hdma2d->State = HAL_DMA2D_STATE_READY;
|
|
|
|
/* Process unlocked */
|
|
__HAL_UNLOCK(hdma2d);
|
|
|
|
return HAL_OK;
|
|
}
|
|
/**
|
|
* @brief Handles DMA2D interrupt request.
|
|
* @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @retval HAL status
|
|
*/
|
|
void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d)
|
|
{
|
|
/* Transfer Error Interrupt management ***************************************/
|
|
if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TE) != RESET)
|
|
{
|
|
if(__HAL_DMA2D_GET_IT_SOURCE(hdma2d, DMA2D_IT_TE) != RESET)
|
|
{
|
|
/* Disable the transfer Error interrupt */
|
|
__HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_TE);
|
|
|
|
/* Update error code */
|
|
hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TE;
|
|
|
|
/* Clear the transfer error flag */
|
|
__HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TE);
|
|
|
|
/* Change DMA2D state */
|
|
hdma2d->State = HAL_DMA2D_STATE_ERROR;
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hdma2d);
|
|
|
|
if(hdma2d->XferErrorCallback != NULL)
|
|
{
|
|
/* Transfer error Callback */
|
|
hdma2d->XferErrorCallback(hdma2d);
|
|
}
|
|
}
|
|
}
|
|
/* Configuration Error Interrupt management **********************************/
|
|
if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CE) != RESET)
|
|
{
|
|
if(__HAL_DMA2D_GET_IT_SOURCE(hdma2d, DMA2D_IT_CE) != RESET)
|
|
{
|
|
/* Disable the Configuration Error interrupt */
|
|
__HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_CE);
|
|
|
|
/* Clear the Configuration error flag */
|
|
__HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CE);
|
|
|
|
/* Update error code */
|
|
hdma2d->ErrorCode |= HAL_DMA2D_ERROR_CE;
|
|
|
|
/* Change DMA2D state */
|
|
hdma2d->State = HAL_DMA2D_STATE_ERROR;
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hdma2d);
|
|
|
|
if(hdma2d->XferErrorCallback != NULL)
|
|
{
|
|
/* Transfer error Callback */
|
|
hdma2d->XferErrorCallback(hdma2d);
|
|
}
|
|
}
|
|
}
|
|
/* Transfer Complete Interrupt management ************************************/
|
|
if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TC) != RESET)
|
|
{
|
|
if(__HAL_DMA2D_GET_IT_SOURCE(hdma2d, DMA2D_IT_TC) != RESET)
|
|
{
|
|
/* Disable the transfer complete interrupt */
|
|
__HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_TC);
|
|
|
|
/* Clear the transfer complete flag */
|
|
__HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TC);
|
|
|
|
/* Update error code */
|
|
hdma2d->ErrorCode |= HAL_DMA2D_ERROR_NONE;
|
|
|
|
/* Change DMA2D state */
|
|
hdma2d->State = HAL_DMA2D_STATE_READY;
|
|
|
|
/* Process Unlocked */
|
|
__HAL_UNLOCK(hdma2d);
|
|
|
|
if(hdma2d->XferCpltCallback != NULL)
|
|
{
|
|
/* Transfer complete Callback */
|
|
hdma2d->XferCpltCallback(hdma2d);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @defgroup DMA2D_Group3 Peripheral Control functions
|
|
* @brief Peripheral Control functions
|
|
*
|
|
@verbatim
|
|
===============================================================================
|
|
##### Peripheral Control functions #####
|
|
===============================================================================
|
|
[..] This section provides functions allowing to:
|
|
(+) Configure the DMA2D foreground or/and background parameters.
|
|
(+) Configure the DMA2D CLUT transfer.
|
|
(+) Enable DMA2D CLUT.
|
|
(+) Disable DMA2D CLUT.
|
|
(+) Configure the line watermark
|
|
|
|
@endverbatim
|
|
* @{
|
|
*/
|
|
/**
|
|
* @brief Configure the DMA2D Layer according to the specified
|
|
* parameters in the DMA2D_InitTypeDef and create the associated handle.
|
|
* @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @param LayerIdx: DMA2D Layer index.
|
|
* This parameter can be one of the following values:
|
|
* 0(background) / 1(foreground)
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
|
|
{
|
|
DMA2D_LayerCfgTypeDef *pLayerCfg = &hdma2d->LayerCfg[LayerIdx];
|
|
|
|
uint32_t tmp = 0;
|
|
|
|
/* Process locked */
|
|
__HAL_LOCK(hdma2d);
|
|
|
|
/* Change DMA2D peripheral state */
|
|
hdma2d->State = HAL_DMA2D_STATE_BUSY;
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_DMA2D_LAYER(LayerIdx));
|
|
assert_param(IS_DMA2D_OFFSET(pLayerCfg->InputOffset));
|
|
if(hdma2d->Init.Mode != DMA2D_R2M)
|
|
{
|
|
assert_param(IS_DMA2D_INPUT_COLOR_MODE(pLayerCfg->InputColorMode));
|
|
if(hdma2d->Init.Mode != DMA2D_M2M)
|
|
{
|
|
assert_param(IS_DMA2D_ALPHA_MODE(pLayerCfg->AlphaMode));
|
|
}
|
|
}
|
|
|
|
/* Configure the background DMA2D layer */
|
|
if(LayerIdx == 0)
|
|
{
|
|
/* DMA2D BGPFCR register configuration -----------------------------------*/
|
|
/* Get the BGPFCCR register value */
|
|
tmp = hdma2d->Instance->BGPFCCR;
|
|
|
|
/* Clear Input color mode, alpha value and alpha mode bits */
|
|
tmp &= (uint32_t)~(DMA2D_BGPFCCR_CM | DMA2D_BGPFCCR_AM | DMA2D_BGPFCCR_ALPHA);
|
|
|
|
if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
|
|
{
|
|
/* Prepare the value to be wrote to the BGPFCCR register */
|
|
tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | ((pLayerCfg->InputAlpha) & 0xFF000000));
|
|
}
|
|
else
|
|
{
|
|
/* Prepare the value to be wrote to the BGPFCCR register */
|
|
tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | (pLayerCfg->InputAlpha << 24));
|
|
}
|
|
|
|
/* Write to DMA2D BGPFCCR register */
|
|
hdma2d->Instance->BGPFCCR = tmp;
|
|
|
|
/* DMA2D BGOR register configuration -------------------------------------*/
|
|
/* Get the BGOR register value */
|
|
tmp = hdma2d->Instance->BGOR;
|
|
|
|
/* Clear colors bits */
|
|
tmp &= (uint32_t)~DMA2D_BGOR_LO;
|
|
|
|
/* Prepare the value to be wrote to the BGOR register */
|
|
tmp |= pLayerCfg->InputOffset;
|
|
|
|
/* Write to DMA2D BGOR register */
|
|
hdma2d->Instance->BGOR = tmp;
|
|
|
|
if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
|
|
{
|
|
/* Prepare the value to be wrote to the BGCOLR register */
|
|
tmp = ((pLayerCfg->InputAlpha) & 0x00FFFFFF);
|
|
|
|
/* Write to DMA2D BGCOLR register */
|
|
hdma2d->Instance->BGCOLR = tmp;
|
|
}
|
|
}
|
|
/* Configure the foreground DMA2D layer */
|
|
else
|
|
{
|
|
/* DMA2D FGPFCR register configuration -----------------------------------*/
|
|
/* Get the FGPFCCR register value */
|
|
tmp = hdma2d->Instance->FGPFCCR;
|
|
|
|
/* Clear Input color mode, alpha value and alpha mode bits */
|
|
tmp &= (uint32_t)~(DMA2D_FGPFCCR_CM | DMA2D_FGPFCCR_AM | DMA2D_FGPFCCR_ALPHA);
|
|
|
|
if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
|
|
{
|
|
/* Prepare the value to be wrote to the FGPFCCR register */
|
|
tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | ((pLayerCfg->InputAlpha) & 0xFF000000));
|
|
}
|
|
else
|
|
{
|
|
/* Prepare the value to be wrote to the FGPFCCR register */
|
|
tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | (pLayerCfg->InputAlpha << 24));
|
|
}
|
|
|
|
/* Write to DMA2D FGPFCCR register */
|
|
hdma2d->Instance->FGPFCCR = tmp;
|
|
|
|
/* DMA2D FGOR register configuration -------------------------------------*/
|
|
/* Get the FGOR register value */
|
|
tmp = hdma2d->Instance->FGOR;
|
|
|
|
/* Clear colors bits */
|
|
tmp &= (uint32_t)~DMA2D_FGOR_LO;
|
|
|
|
/* Prepare the value to be wrote to the FGOR register */
|
|
tmp |= pLayerCfg->InputOffset;
|
|
|
|
/* Write to DMA2D FGOR register */
|
|
hdma2d->Instance->FGOR = tmp;
|
|
|
|
if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
|
|
{
|
|
/* Prepare the value to be wrote to the FGCOLR register */
|
|
tmp = ((pLayerCfg->InputAlpha) & 0x00FFFFFF);
|
|
|
|
/* Write to DMA2D FGCOLR register */
|
|
hdma2d->Instance->FGCOLR = tmp;
|
|
}
|
|
}
|
|
/* Initialize the DMA2D state*/
|
|
hdma2d->State = HAL_DMA2D_STATE_READY;
|
|
|
|
/* Process unlocked */
|
|
__HAL_UNLOCK(hdma2d);
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Configure the DMA2D CLUT Transfer.
|
|
* @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @param CLUTCfg: pointer to a DMA2D_CLUTCfgTypeDef structure that contains
|
|
* the configuration information for the color look up table.
|
|
* @param LayerIdx: DMA2D Layer index.
|
|
* This parameter can be one of the following values:
|
|
* 0(background) / 1(foreground)
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx)
|
|
{
|
|
uint32_t tmp = 0, tmp1 = 0;
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_DMA2D_LAYER(LayerIdx));
|
|
assert_param(IS_DMA2D_CLUT_CM(CLUTCfg.CLUTColorMode));
|
|
assert_param(IS_DMA2D_CLUT_SIZE(CLUTCfg.Size));
|
|
|
|
/* Configure the CLUT of the background DMA2D layer */
|
|
if(LayerIdx == 0)
|
|
{
|
|
/* Get the BGCMAR register value */
|
|
tmp = hdma2d->Instance->BGCMAR;
|
|
|
|
/* Clear CLUT address bits */
|
|
tmp &= (uint32_t)~DMA2D_BGCMAR_MA;
|
|
|
|
/* Prepare the value to be wrote to the BGCMAR register */
|
|
tmp |= (uint32_t)CLUTCfg.pCLUT;
|
|
|
|
/* Write to DMA2D BGCMAR register */
|
|
hdma2d->Instance->BGCMAR = tmp;
|
|
|
|
/* Get the BGPFCCR register value */
|
|
tmp = hdma2d->Instance->BGPFCCR;
|
|
|
|
/* Clear CLUT size and CLUT address bits */
|
|
tmp &= (uint32_t)~(DMA2D_BGPFCCR_CS | DMA2D_BGPFCCR_CCM);
|
|
|
|
/* Get the CLUT size */
|
|
tmp1 = CLUTCfg.Size << 16;
|
|
|
|
/* Prepare the value to be wrote to the BGPFCCR register */
|
|
tmp |= (CLUTCfg.CLUTColorMode | tmp1);
|
|
|
|
/* Write to DMA2D BGPFCCR register */
|
|
hdma2d->Instance->BGPFCCR = tmp;
|
|
}
|
|
/* Configure the CLUT of the foreground DMA2D layer */
|
|
else
|
|
{
|
|
/* Get the FGCMAR register value */
|
|
tmp = hdma2d->Instance->FGCMAR;
|
|
|
|
/* Clear CLUT address bits */
|
|
tmp &= (uint32_t)~DMA2D_FGCMAR_MA;
|
|
|
|
/* Prepare the value to be wrote to the FGCMAR register */
|
|
tmp |= (uint32_t)CLUTCfg.pCLUT;
|
|
|
|
/* Write to DMA2D FGCMAR register */
|
|
hdma2d->Instance->FGCMAR = tmp;
|
|
|
|
/* Get the FGPFCCR register value */
|
|
tmp = hdma2d->Instance->FGPFCCR;
|
|
|
|
/* Clear CLUT size and CLUT address bits */
|
|
tmp &= (uint32_t)~(DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM);
|
|
|
|
/* Get the CLUT size */
|
|
tmp1 = CLUTCfg.Size << 8;
|
|
|
|
/* Prepare the value to be wrote to the FGPFCCR register */
|
|
tmp |= (CLUTCfg.CLUTColorMode | tmp1);
|
|
|
|
/* Write to DMA2D FGPFCCR register */
|
|
hdma2d->Instance->FGPFCCR = tmp;
|
|
}
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Enable the DMA2D CLUT Transfer.
|
|
* @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @param LayerIdx: DMA2D Layer index.
|
|
* This parameter can be one of the following values:
|
|
* 0(background) / 1(foreground)
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_DMA2D_LAYER(LayerIdx));
|
|
|
|
if(LayerIdx == 0)
|
|
{
|
|
/* Enable the CLUT loading for the background */
|
|
hdma2d->Instance->BGPFCCR |= DMA2D_BGPFCCR_START;
|
|
}
|
|
else
|
|
{
|
|
/* Enable the CLUT loading for the foreground */
|
|
hdma2d->Instance->FGPFCCR |= DMA2D_FGPFCCR_START;
|
|
}
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Disable the DMA2D CLUT Transfer.
|
|
* @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @param LayerIdx: DMA2D Layer index.
|
|
* This parameter can be one of the following values:
|
|
* 0(background) / 1(foreground)
|
|
* @retval HAL status
|
|
*/
|
|
HAL_StatusTypeDef HAL_DMA2D_DisableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
|
|
{
|
|
/* Check the parameters */
|
|
assert_param(IS_DMA2D_LAYER(LayerIdx));
|
|
|
|
if(LayerIdx == 0)
|
|
{
|
|
/* Disable the CLUT loading for the background */
|
|
hdma2d->Instance->BGPFCCR &= ~DMA2D_BGPFCCR_START;
|
|
}
|
|
else
|
|
{
|
|
/* Disable the CLUT loading for the foreground */
|
|
hdma2d->Instance->FGPFCCR &= ~DMA2D_FGPFCCR_START;
|
|
}
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @brief Define the configuration of the line watermark .
|
|
* @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @param Line: Line Watermark configuration.
|
|
* @retval HAL status
|
|
*/
|
|
|
|
HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent(DMA2D_HandleTypeDef *hdma2d, uint32_t Line)
|
|
{
|
|
/* Process locked */
|
|
__HAL_LOCK(hdma2d);
|
|
|
|
/* Change DMA2D peripheral state */
|
|
hdma2d->State = HAL_DMA2D_STATE_BUSY;
|
|
|
|
/* Check the parameters */
|
|
assert_param(IS_DMA2D_LineWatermark(Line));
|
|
|
|
/* Sets the Line watermark configuration */
|
|
DMA2D->LWR = (uint32_t)Line;
|
|
|
|
/* Initialize the DMA2D state*/
|
|
hdma2d->State = HAL_DMA2D_STATE_READY;
|
|
|
|
/* Process unlocked */
|
|
__HAL_UNLOCK(hdma2d);
|
|
|
|
return HAL_OK;
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/** @defgroup DMA2D_Group4 Peripheral State functions
|
|
* @brief Peripheral State functions
|
|
*
|
|
@verbatim
|
|
===============================================================================
|
|
##### Peripheral State and Errors functions #####
|
|
===============================================================================
|
|
[..]
|
|
This subsection provides functions allowing to :
|
|
(+) Check the DMA2D state
|
|
(+) Get error code
|
|
|
|
@endverbatim
|
|
* @{
|
|
*/
|
|
|
|
/**
|
|
* @brief Return the DMA2D state
|
|
* @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the DMA2D.
|
|
* @retval HAL state
|
|
*/
|
|
HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d)
|
|
{
|
|
return hdma2d->State;
|
|
}
|
|
|
|
/**
|
|
* @brief Return the DMA2D error code
|
|
* @param hdma2d : pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for DMA2D.
|
|
* @retval DMA2D Error Code
|
|
*/
|
|
uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d)
|
|
{
|
|
return hdma2d->ErrorCode;
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
|
|
/**
|
|
* @brief Set the DMA2D Transfer parameter.
|
|
* @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
|
|
* the configuration information for the specified DMA2D.
|
|
* @param pdata: The source memory Buffer address
|
|
* @param DstAddress: The destination memory Buffer address
|
|
* @param Width: The width of data to be transferred from source to destination.
|
|
* @param Height: The height of data to be transferred from source to destination.
|
|
* @retval HAL status
|
|
*/
|
|
static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height)
|
|
{
|
|
uint32_t tmp = 0;
|
|
uint32_t tmp1 = 0;
|
|
uint32_t tmp2 = 0;
|
|
uint32_t tmp3 = 0;
|
|
uint32_t tmp4 = 0;
|
|
|
|
tmp = Width << 16;
|
|
|
|
/* Configure DMA2D data size */
|
|
hdma2d->Instance->NLR = (Height | tmp);
|
|
|
|
/* Configure DMA2D destination address */
|
|
hdma2d->Instance->OMAR = DstAddress;
|
|
|
|
/* Register to memory DMA2D mode selected */
|
|
if (hdma2d->Init.Mode == DMA2D_R2M)
|
|
{
|
|
tmp1 = pdata & DMA2D_OCOLR_ALPHA_1;
|
|
tmp2 = pdata & DMA2D_OCOLR_RED_1;
|
|
tmp3 = pdata & DMA2D_OCOLR_GREEN_1;
|
|
tmp4 = pdata & DMA2D_OCOLR_BLUE_1;
|
|
|
|
/* Prepare the value to be wrote to the OCOLR register according to the color mode */
|
|
if (hdma2d->Init.ColorMode == DMA2D_ARGB8888)
|
|
{
|
|
tmp = (tmp3 | tmp2 | tmp1| tmp4);
|
|
}
|
|
else if (hdma2d->Init.ColorMode == DMA2D_RGB888)
|
|
{
|
|
tmp = (tmp3 | tmp2 | tmp4);
|
|
}
|
|
else if (hdma2d->Init.ColorMode == DMA2D_RGB565)
|
|
{
|
|
tmp2 = (tmp2 >> 19);
|
|
tmp3 = (tmp3 >> 10);
|
|
tmp4 = (tmp4 >> 3 );
|
|
tmp = ((tmp3 << 5) | (tmp2 << 11) | tmp4);
|
|
}
|
|
else if (hdma2d->Init.ColorMode == DMA2D_ARGB1555)
|
|
{
|
|
tmp1 = (tmp1 >> 31);
|
|
tmp2 = (tmp2 >> 19);
|
|
tmp3 = (tmp3 >> 11);
|
|
tmp4 = (tmp4 >> 3 );
|
|
tmp = ((tmp3 << 5) | (tmp2 << 10) | (tmp1 << 15) | tmp4);
|
|
}
|
|
else /* DMA2D_CMode = DMA2D_ARGB4444 */
|
|
{
|
|
tmp1 = (tmp1 >> 28);
|
|
tmp2 = (tmp2 >> 20);
|
|
tmp3 = (tmp3 >> 12);
|
|
tmp4 = (tmp4 >> 4 );
|
|
tmp = ((tmp3 << 4) | (tmp2 << 8) | (tmp1 << 12) | tmp4);
|
|
}
|
|
/* Write to DMA2D OCOLR register */
|
|
hdma2d->Instance->OCOLR = tmp;
|
|
}
|
|
else /* M2M, M2M_PFC or M2M_Blending DMA2D Mode */
|
|
{
|
|
/* Configure DMA2D source address */
|
|
hdma2d->Instance->FGMAR = pdata;
|
|
}
|
|
}
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
|
|
#endif /* HAL_DMA2D_MODULE_ENABLED */
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/**
|
|
* @}
|
|
*/
|
|
|
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|