.device 1k
.io_tile 1 0
000000000000000010
000111010000000000
000000000000000000
000000000000000001
000000111010000001
000000001001000000
001100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000010
000000000001000000
000000000000000000
000000000001000001
000000000000000001
000000000000000000
.io_tile 2 0
000000000000000010
000000000000000000
000001011000000000
000000000000000001
000000000000000001
000000000011000000
001100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
.io_tile 3 0
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
.io_tile 4 0
000000000000000000
000100000000000000
000000000000000000
010000000000000001
000000000000000000
000000000000000000
001000000000000000
000000000000000000
000000000000000000
010000000000000000
000000000000000000
000000000000000000
000000000001000000
000000000000000001
000000000000000000
000000000000000000
.io_tile 5 0
000000000000100000
000100000000000000
000000000000000000
010000000000000001
000000000000000000
000000000000000000
001000000000000000
000000000000000000
000000000000000000
010000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000001
000000000000000000
000000000000000000
.io_tile 6 0
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000100
000000000000001000
001000000000000000
000000000000000000
000010000000000000
000010110000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
.io_tile 7 0
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000100
000000000000001000
000000000000000000
000000000000000000
000010000000000000
000101110000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000001
000000000000000000
000000000000000000
.io_tile 8 0
000000000000001000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000001100000
000000000000000001
000000000000000000
000000000000000000
.io_tile 9 0
100000000000000000
000100000001000000
000000000000000000
000000000000000001
000000000000000000
000000000000000000
001000000000011000
000000000000000000
000000000000000000
010000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000001
000000000000000000
000000000000000000
.io_tile 10 0
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
.io_tile 11 0
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
.io_tile 12 0
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
.io_tile 0 1
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
.logic_tile 1 1
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
.logic_tile 2 1
000000000000000001100000010001100001000000001000000000
000000000000000000000010000000001001000000000000000000
101000000000000001000000000000001001001100111000000000
100000000000000000000011000000001111110011000000000000
000000000000000000000000000000001001001100111000000000
000000000000000000000000000000001010110011000000000000
000000000000000001100010100000001000111100000000000000
000000000000000000000111000000000000111100000000000000
010000000000000111100000001011111011100000000000000000
010000000000000000000000001101011101000000000010000000
000000000000000001100000010001000000000000000100000000
000000000000000000010010000011100000000001000000000000
000000000000000111100000000001000000000000000100000000
000000000000000000000000000111000000000001000000000000
000000000000000000000000010000000000000000000000000000
000000000000000000000010000000000000000000000000000000
.ramb_tile 3 1
000000000000000000000000000000000000000000
000000010000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
.logic_tile 4 1
000000000000000111100000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
101000000000000001100000000000000000000000000000000000
100000000000000001000000000000000000000000000000000000
000000000000000000000110000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
010100000000000000000000000001100001001100110000000000
010100000000000000000000000000001000110011000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000101000000000000000100100000
000000000000000000000000000001100000000001000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000100000000000000000000000000000000000000000000000
.logic_tile 5 1
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000001000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000010000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
.logic_tile 6 1
000000000000000000000010100001000000000000001000000000
000000000000000000000100000000100000000000000000001000
000000000000000000000010110001100001000000001000000000
000000000000000000000111110000101100000000000000000000
000000000000000000000000000000000000000000001000000000
000000000000011101000000000000001100000000000000000000
000000000000000101000000000000000001000000001000000000
000000000000000000100000000000001001000000000000000000
000000000000010000000000000000000001000000001000000000
000000000000100011000000000000001010000000000000000000
000000000000000101000000000000000000000000001000000000
000000000000000000000000000000001010000000000000000000
000000000000000000000000000000001000111100000001000010
000000000000000000000000000000000000111100000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
.logic_tile 7 1
000000000000001000000010100001100000000000001000000000
000000000000001111000100000000100000000000000000001000
000000000000000101000010100011100000000000001000000000
000000000000000000100100000000101001000000000000000000
000000000000000000000000000000000000000000001000000000
000000000000000000000000000000001111000000000000000000
000000000000000000000000000000000001000000001000000000
000000000000000000000000000000001000000000000000000000
000000000000000000000000000000000000000000001000000000
000000000000000000000000000000001000000000000000000000
000000000000000000000010100000000001000000001000000000
000000000000000000000111110000001101000000000000000000
000000000000000000000010100000000001000000001000000000
000000000000001101000100000000001110000000000000000000
000000000000000101000000000000000000000000001000000000
000000000000000000100000000000001110000000000000000000
.logic_tile 8 1
100000000000000001000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
101000000000000000000000000000000000000000000000000000
100000000000000000000000000000000000000000000000000000
000000000000000011100000000000000000000000000000000000
000000000000000000000010100000000000000000000000000000
000000000000000000000000000000000000000000000100000000
000000000000000000000000000001000000000010000000000101
000000000000000000000000000000000000000000000100000010
000000000000000000000000000101000000000010000000000001
000000000000000000000000000000000000000000000100000110
000000000000000000000000001101000000000010000000000000
000000000000000000000000010000000000000000000000000000
000000000000000000000010010000000000000000000000000000
000001000000000000000000000000000000000000000100000010
000000100000000000000000001111000000000010000000000000
.logic_tile 9 1
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000001000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000010000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000001000000000000000000000000000000000000000000000000
000010100000000000000000000000000000000000000000000000
.ramb_tile 10 1
000000000000000000000000000000000000000000
000000010000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
.logic_tile 11 1
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
.logic_tile 12 1
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
.io_tile 13 1
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
.io_tile 0 2
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
.logic_tile 1 2
000000000000001000000000000011000000001100110110000001
000001000000000001000000000000101000110011000000000000
101000000000000000000000000000000000000000000000000000
100000000000000000000000000000000000000000000000000000
110000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000011100000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
110000000000000000000000000000000000000000000000000000
100000000000000000000000000000000000000000000000000000
.logic_tile 2 2
000000000000000111100010110000000000000000000000000000
000000000000000000100010000000000000000000000000000000
101000000001000000000000000000000000000000000000000000
100000000000100000000000000000000000000000000000000000
000000000000000000000000000000001001001100110000000000
000000000000000000000000000000011011110011000000000000
000000000000000000000110000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000100000000000000000000000001000000000000000100000000
000100000000000000000000000001100000000001000000000000
.ramt_tile 3 2
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000010000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000010000000000000000000000000000000000000
000001000000000000000000000000000000000000
.logic_tile 4 2
000000001100000001000010010011100000000001000000000001
000000000000000000000010001111100000000000000000000100
101000000000000001100010010000011000001100110000000000
100000000000000000000111100000011110110011000000000000
000000000000001001100000000001100000000001000010000001
000000000000000001000000001111000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000100000000000000000000000000000000000000000
000000000000001000000000000000000000000000000000000000
000000000000000101000010010000000000000000000000000000
000000000000000000000110100011001000111101010101000010
000000000000000000000000000001111010101100100001000000
000000000000001000000010000001011000111001010101000000
000000000000000101000000000011111010111010100000000001
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
.logic_tile 5 2
000000000000001000000000001101100000000001000000000000
000000000000000101010000000111100000000000000000000001
101001000001010000000000000000000000000000000000000000
100010000000100000000000000000000000000000000000000000
000000000100001000000000000000000000000000000000000000
000000000000000101000000000000000000000000000000000000
000000000110000000000000010000000000000000000000000000
000000000000000000000010100000000000000000000000000000
000100001110000000000011110000000000000000000000000000
000100000000000000000011010000000000000000000000000000
000000000000010000000000000000000000000000000000000000
000000001000100000000000000000000000000000000000000000
000000000000000011100000000011000000001100110000000000
000000000000000000000000000000101000110011000000000000
000000000000000001000000000011001110111001010101001010
000000000000000000000000000101100000111010100000000001
.logic_tile 6 2
000000000000000111100000000000000000000010000000000000
000000000000000011100000000001000000000000000000000000
000000000000000000000111000000000000000000000000000000
000000000000000000000100000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000001000000000000010000000000000
000000000000000000000000000111000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000001000000000000010000000000000
000000000000000000000000001001000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000010000000000000
000000000000000001000000000001000000000000000000000000
.logic_tile 7 2
000000000000000011000011100000001000111100000000000000
000000000000000000000011000000000000111100000001010100
000000000000000000000000000001011100001100110000000000
000000000000000000000000000000100000110011000000100000
000000000000000000000000000000000000000000000000000000
000000000000000000000011000000000000000000000000000000
000000000000000000000000000000000000000010000000000000
000000000000000000000000000001000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000010000000000000
000000000000000111000000001001000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000010000000000000
000000000000000000000000001101000000000000000000000000
.logic_tile 8 2
000000000000000000000111100011100000001100110000000000
000000000000000000000000000000100000110011000000000000
101000000000000000010000000000000000000000000000000000
100000000000000000000000000000000000000000000000000000
110000000110000000000000000011100000001100110000000000
100000000000000000010000000000100000110011000000000000
000000000000000000000000000000000000000000000100100000
000000000000000000000000001001000000000010000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000010000000000000000000000000000000
000000000000001001000100000000000000000000000000000000
000000000000000000000010000000000000000000000100000000
000000000000000000000100001111000000000010000001000000
110000000000000000000000000000000000000000000000000000
010000000000000000000000000000000000000000000000000000
.logic_tile 9 2
100000000000000111100000010000000000000000000000000000
000000000000000001100011100000000000000000000000000000
101010101100000011100000001000000000000000000100000000
100000000000000000000000000001000000000010000000000100
000000000000001011100000000000000000000000000100100000
000000000000000011000000000101000000000010000001000001
000000000000000000000000000000000000000000000100000110
000000000000000000000000000101000000000010000000000000
000000000000000000000000000000000000000000000100000000
000000000000000000000000000001000000000010000000000001
000000000000000000000000000000000000000000000110000000
000000000000000000000000000001000000000010000000000000
000000000110000000000000000000000000000000000100000000
000000000000000000000000001001000000000010000000000010
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
.ramt_tile 10 2
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000001000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000100000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
.logic_tile 11 2
000001000000000000000000000000000000001100110000000000
000000000000000000000000000000000000110011000000100000
101000000000000000000111100000000000000000000000000000
100000000000100000000100000000000000000000000000000000
110000000000000000000000000000000000000000000000000000
100000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
010000000000000000000000001000000000000000000100000010
100000000000000000000000001001000000000010000000000000
.logic_tile 12 2
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
101000000000000000000000000000000000000000000000000000
100000000000000000000000000000000000000000000000000000
110000000000000000000000000000000000000000000000000000
100000000000000000000000000000000000000000000000000000
000000000000000111100000001000000000000000000101000000
000000000000000000000000001111000000000010000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
010000000000100000000000000000000000000000000000000000
110000000001000000000011000000000000000000000000000000
.io_tile 13 2
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
.io_tile 0 3
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
.logic_tile 1 3
000000000000000000000011110000000000000000000000000000
000000000000000000000011100000000000000000000000000000
101000000000000000000000000000000000000000000000000000
100000000000000000000000000000000000000000000000000000
010000000000000000000000000000000000000000000000000000
010000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000001000000000000000000000010000000000000
000000000000000000100000001001000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000001000000000000000000100000001
000000000000000000000000000011000000000010000000000000
.logic_tile 2 3
000000000000000111000000000101100000000000001000000000
000000000000000000000000000000000000000000000000001000
000010100000000111100110100000000001000000001000000000
000000000000000000100100000000001000000000000000000000
000000001100100011000000000000001000001100111000000000
000000000000000000000000000000001010110011000000000000
000000000000001000000000000000001000001100111000000000
000000000000001111000000000000001000110011000000000000
000000000000000000000000000000001001001100111000000001
000000000000000000000000000000001111110011000000000000
000000000000000000000000000000001001001100111000100000
000000001010000000000010000000001001110011000000000000
000000000000000000000000000000001001001100111000000000
000000000000000000000000000000001101110011000000000000
000000000000000000000010000000001000111100000000000000
000000000000000000000000000000000000111100000000000001
.ramb_tile 3 3
000000000000000000000000000000000000000000
000000010000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000010000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000001000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
.logic_tile 4 3
000001000000000111000011100001100000000000001000000000
000000000000000000000000000000100000000000000000001000
000000000000000000000110000101100001000000001000000000
000000000000000000000110010000001011000000000000000000
000000000000000000000111100001001001001100111000000000
000000000000000000000100000000101001110011000000000100
000000000000000101000000000101001001001100111000000000
000000000000000000000010010000101011110011000000000100
000000000000000000000000000001001001001100111000000000
000000000000000000000000000000001001110011000000000100
000000000000000111000000000011101001001100111000000000
000000000000000000100010100000101011110011000000000000
000000000000000000000000000011101001001100111000000010
000010000000000000000000000000001001110011000000000000
000000000000000000000000000000001000111100000000000000
000000000000000000000000000000000000111100000000000000
.logic_tile 5 3
000000000000000000000000000111011001001100110000000000
000000000000000000000000000000011101110011000000000000
101000000000000000000110100000000000000000000000000000
100000000000000000000000000000000000000000000000000000
110000000000001000000000000101100000000001000001000000
010000000000000001000000000011100000000000000000100000
000000000000000101100000001111000000000001000001000000
000000000000000001000010110101100000000000000000100000
000010000010000000000000010000000000000000000000000000
000000000000000001000011000000000000000000000000000000
000010100000100000000000010000000000000000000000000000
000001000000000000000011000000000000000000000000000000
000000000000001001000011100101000000000001000100000001
000000000000001011100100000111000000000000000000000000
110000001110000000000000001101100000000001000100000000
000110000000000000000010011111000000000000000010000000
.logic_tile 6 3
000000000001000000000000000000000000000000000000000000
000000000000100001000000000000000000000000000000000000
101000000000000000000000001101000000000000000000000000
100000000000000000000000000101000000000010000000100001
000000000000000101100000000000000000000010000000000100
000000000110000000100000000001000000000000000000000000
000000000000001000000000000000000000000000000000000000
000000000000000001000000000000000000000000000000000000
000001000000010000000000000000000000000000000100000001
000000000000000000000000000101000000000010000000000000
000000000000000000000000000000000000000000000000000000
000000001010000000000000000000000000000000000000000000
000000000100000000000000000000000000000000000000000000
000010000000000000000000000000000000000000000000000000
000100100000000000000000000000000000000000000000000000
000100000000000000000000000000000000000000000000000000
.logic_tile 7 3
000000000000001000000111101001000001000011000000000000
000000000000000001000111001111101100000010000000000000
101000000000001001100111111001001001011100000000000000
100000000000001111000111100001011111101000000000000000
110000000000000001100110000101100000000001000000000000
010000000000000000000000000011000000000000000001100001
000000000000000111100111010001100000000010000000000000
000000000000001101000010000111000000000000000000000000
000010000000000000000110110101101100000011100000000000
000001000000001111000011001101111010000001010000100000
000000000001001011100011101101100000000010000000000000
000000000000001111100100001001000000000000000000000000
000010100000001000000000001011100000000010000000000000
000001000000000101000000001001100000000000000000000000
110000000001000000000110111101100000000001000100000000
000000000000000000000010100011100000000000000000000001
.logic_tile 8 3
000010000000000001100111010101101111010100000000000000
000000000000000101000010000011111001110000000000000000
000000000000000011100111110001000000000010000000000000
000001001000001101000111011011101001000000000000000000
000010100000000101000111001101011000000001000000000000
000001000000001001100010111011101000000100000000000000
000000100001001111100010011101101111101000000000000000
000001000000001011000111100101001110001100000000000000
000000000000100000000010000101101000101000000010000000
000000000001010101000111000101111101001100000000000000
000000000001000000000000001101011000000100000000000000
000000000000000000000011111001101000001100000000000000
000000000000000111110000011101011111000000100000000000
000000000000000000000011110101011011000000110000000000
000000000000001000000000000101100001000001010000000000
000001000000001101000011111101001000000011000000000000
.logic_tile 9 3
000000000000000000000110010001101011000011100000000000
000000000000000011000011101001001011000001110000100000
101001100000000011100111001111000000000010000000000000
100010100000000011100000000101001011000011000000000000
010000000000001001100010000011000000001100110000100000
110000000000001111000011000000100000110011000000000000
000000000000001101100111000001000000000011000000000000
000000001110000011000100001111001100000010000000000000
000000000010000111000111000001011001000011100000000100
000000001100000000000000000101111010000001010000000000
000000000000000101100000000001001000000011010000000000
000000000000000000100000001101011100000010100000000000
000000000110001111000000011111101110110011110000001100
000000000000000001000010010001000000010010100000000000
110000000000001000000000001000000000000000000101000000
000000000000001111000000000011000000000010001100000000
.ramb_tile 10 3
000000000110000111100111110101100000000000
000000000000000001100111110001000000000000
101000000001001000000000001000000000000000
100000000000001011000000000011000000000000
000010100000000000000000001001000000000000
000000000001010000000000001111000000000000
000010100000000000000000001000000000000000
001011100000000111000011101111000000000000
000001000000000000000000000101100000000000
000010100000000000000000001111100000000010
000000000000000101000010101000000000000000
000000000000000000000000000111000000000000
000000000000000000000010100001000000000000
000000000000000000000000001001100000000000
010000000000000000000111001000000000000000
010000000000000101000110101011000000000000
.logic_tile 11 3
000000000000001101000111100011000000000001010000000000
000000000000001111100110110101001011000011000000000000
101000000000001011100000000111001101101000000010000000
100000000000000111100000001101001101001100000000000000
110000000000001101000111101001000000000001000001000000
000000000000000001100110110001001011000000100000000000
000000000000001000000000000001000001000000010001000001
000010100000000111000000000111101101000010000000000000
001000000000000101100000000001100001000000010000100000
000000000000000111000000000001001110000010000001000000
000000000000000000000111000001100000000011000000100000
000000000000000000000100000101001110000010000000000000
000000000000000101100000001101000000000001010110000100
000000000000000111000000001111101100000001100000000000
000000000010000111100111000101000001000001010110000000
000000000000000000100100001001001010000001100000000001
.logic_tile 12 3
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
101000000000000001000000001000000000000010000111000000
100000000000000000000000000001000000000000000000000000
110000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
010000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
.io_tile 13 3
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000011000010
000000000001000000
000000011000000000
000000000000000001
000000000000000001
000000000000000000
.io_tile 0 4
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000011000
000000000000000000
000000000000000000
.logic_tile 1 4
000000000000000000000011000111000000000000001000000000
000000000000000000000000000000000000000000000000001000
000000000000000101000000000000000000000000001000000000
000000000000000000000000000000001100000000000000000000
000000000000000011000000000000000000000000001000000000
000000000000000000000000000000001010000000000000000000
000000000000000101100000000000000000000000001000000000
001000000000000000100000000000001001000000000000000000
000000000000000101100000010000000000000000001000000000
000000000000000000000010100000001101000000000000000000
000000000000000000000000000000000001000000001000000000
001000000000000000000000000000001000000000000000000000
000000000000001000000000000000000001000000001000000000
001000000000000101000000000000001010000000000000000000
000000000000000000000000000000001000111100000000000000
000000000000000000000000000000000000111100000010000000
.logic_tile 2 4
000000000000000111100010100000000000000010000000000000
000000000000000000100010011001000000000000000000000000
101000000000001011000000000000000000000010000000000000
100000000000000111000010100001000000000000000000000000
000000000000001011100010001000000000000010000000000000
000000001000001101100010101101000000000000000000000000
000000000000001011000111100001001010000010000001000000
001000000000001111000000000011101000000000000000000000
000000000000000111000000000001101011111001010100100100
001000000000000000100010001101001001111010100000000000
000000000000000000000000001101111000111001010100000000
000000000000000001010000000101001001111010100010000001
000000100000000000000000000001101011111001010110000000
000000000000000000010000001011001100111010100000000010
000000000000000000000000000101111000111001010110000000
000000000000000000000000000001001011111010100000000101
.ramt_tile 3 4
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000100000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000010100000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000010000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
.logic_tile 4 4
000000000000001000000000010101100000000001000010000000
000000000000000001000011011111000000000000000000000000
101000000010000001000000000000000000000010000001000000
100000000000000001000000000011000000000000000000000000
010100000000000000000000000000000000000000000000000000
010000001100000000000000000000000000000000000000000000
110000000000001000000000011000000000000010000001000000
011000000000000011000010001101000000000000000000000000
010011000000000111100011100000000000000010000000100000
111011000000000000000100000001000000000000000000000000
000000000000000000000000000001100001000000010000000000
001000000000000000000000001111001000000000110000100000
000000000000000000000010010011000000000001000010000000
001000000000000000000111001111100000000000000001000000
000000000000000000000000000000000000000000000101000000
000000000000000000000000001111000000000010000000000000
.logic_tile 5 4
000000000000001000000010110011011001100000000000000000
000000001100000101000110000001011000000000000000000000
101000000000000011000011000101100000000001000000000000
100000000000011011100110011111100000000000000001000000
000010000000001011100010100101001100000010000000001000
000001000000000001100010100001100000000000000000000000
000000000010001000000011001001000000000010000001000000
001010000000000001000100000001100000000011000000000000
000000000000000001000011001011100000000000000010000010
001000001110000000000100000111100000000010000000000000
000000000000000001100110000101011110100000000000100000
000000000000000000000011010101111001000000000000100000
000000000000001000000000000011101111111001010100100100
000000000000000101000010010101001101111010100000000100
000000000000000001000111101001100000000011000100000000
000000000000000000100100000101101101000001000000000000
.logic_tile 6 4
000000000000000101010000000101101100101000000001000000
000000000000001101000010010101001111011000000000000000
101000000000001001100010010001100001000010000000000000
100000000010000001000110000011101001000011000000000001
000000000000000111000000001011100000000001000001000000
000000000000000000000010000001100000000000000000000001
000001100000000001100111001011111011101100000000000100
001000100000000011000000001011001111111100000000000000
000000000000000001000010010001000000000000000000000000
000000000000000000100110101011000000000001000000000100
000000000000100000000111000101101111000011100000000000
000000000001010001000111111111111101000011110000000000
000000000000000000000010011101000000000000110000000000
000000000000000000000110101011101010000000010000000000
000001000000000000000000000001001001010010100100000010
000000001010000000000011011011011000101001010000000001
.logic_tile 7 4
000010100001001001100111101011100000000000000010000000
000000000000100011000011010101100000000010000000000000
101000000000000011000011011111000000000000010000000000
100000000000000000000010001001001001000000000000000000
000001000000000011100000001101100000000001000000000000
000010000000000000100010111101100000000000000000000100
000000000000000011000111110001000000000001110100000010
001000000000000000000110001011101000000010100000000001
000000000000000000000011100111000000000001110100000000
001000000000000000000000000001101010000010100000000000
000000000000010000000110000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000011100000001101000000000001100100000000
000000000000000000100011101001101110000010100000000000
000000000000000000000000001000000000000000000100000000
000000000000000000000000000001000000000010000000000000
.logic_tile 8 4
001000000000000000000110001001000001000001000000000000
000000001000000011000010000101101000000011000000000000
101010000000000001100111001101000000000001010000000000
100001000000001001000010011011101010000010010000000000
110000000000000001100111101101100000000001010000000000
000000000000000011000110011011001000000010010000000000
000000000000001001100111000011011101000010110000000000
001000000000000111000000001101101001000011010000000000
000000000000000011000000011001100000000010000000000000
000000000000000000000010001001000000000000000000000000
000000000000000000000110011101000000000000010000000000
001000000000000111000010000111001100000010000000000000
000000000000000000000000011111000000000001010101000000
000000000000000000000010001101101001000001100000000000
000000000000000000000000000101000001000001010101000000
001000000000000111000000000011001110000001100000000000
.logic_tile 9 4
000001000000001001100011011011100001000001010000100000
000000000000000001000011100101001011000010010000000000
101000000000010011100000011011100000000001010000000000
100000001110001001000011101111001001000010010000000000
110000000000001001000110110011011010101100000010000000
000000000000000101100011001101111111001100000000000000
000000000000001001100011101001100001000000000000000000
001000000000000101000110100101101000000000100000000000
000010000000001111000110100111000001000001010100000000
001000000000001011000100001001001000000001100000000010
000010100000000001000010000001000000000001010100000000
001000001100000001100110011101001100000001100000000010
000000001110000000000110000001000000000001010110000100
000000000000001111000000000101001100000001100000000000
000000100000000000000000011001111100111100100100000000
000001000000000000000010001011111010111101010001000000
.ramt_tile 10 4
000010000000000000000011100101000000000000
000000010110000000000000000111100000000001
101000000000000000000000001000000000000000
100000010000000000000000000011000000000000
001001000000000000000000001101000000100000
000010100000000011000011001111000000000000
000000000000000000000000011000000000000000
000000000000100000000010101111000000000000
000000000000000000000000000001000000001000
000000000000000000000000001111100000010000
000000000000000101100110101000000000000000
000000000000000111000000000111000000000000
000000000000000001000110101101100000000000
000000000000000000000000000111100000000100
110000001100001101000010111000000000000000
010000000000100101100110101011000000000000
.logic_tile 11 4
000000000000000001000000001111000001000001010000100000
000000000000000000100000001001001011000010010000000010
101001000000000000000011010011100001000001010000000000
100000000000000001000011100001101001000010010000000000
110000000000000000000000000111000001000001010000000000
101000000000000001000000000111101011000010010000000000
110000000000000000000011000000000000000000000100000000
001000000000100000000000000000000000000010000000000000
000000000000000000000000000000000000000000000100000000
000000000000000000000000000000000000000010000000000000
000000000001000000000000010000000000000000000100000000
001010000000000000000010010101000000000010000000000000
000000000000001011100000011000000000000000000100000000
000000000000001001100010010001000000000010000000000000
000000100000100000000000000000000000000000000100000000
001000000001000000000000000000000000000010000000000000
.logic_tile 12 4
010010100000000000000000000000000000000000000100000000
000000000000000000000010110101000000000010000000000000
101000000100000000000000000000000000000000000000000000
100000000110000000000000000000000000000000000000000000
110000000001010101000000000000000000000000000100000000
100000000000000000100000001001000000000010000000000000
000000000000000000010000000000000000000000000000000000
001010000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000100000000
001000000000000000000000000111000000000010000000000000
000000000000001000000000000000000000000000000000000000
000000000000001011000000000000000000000000000000000000
110000000000000111100000000000000000000000000000000000
111001000000000000000000000000000000000000000000000000
.io_tile 13 4
000000000000000010
000100000000000000
000010000000000000
000010010000000001
000000000001000001
000000000001000000
001100000000000000
000000000000001000
000010000000000000
000110010000000000
000000000000000010
000000000011000000
000000000000000000
000000000000000001
000000000000000001
000000000000000000
.io_tile 0 5
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
.logic_tile 1 5
000000000000000000000000000000000000000000000000000000
001000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
001000000000000000000000000000000000000000000000000000
000010000000000000000000000000000000000000000000000000
001000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
.logic_tile 2 5
000000000000000000000000000000000000001100110000000000
000000000000000001000011100000001011110011000000000000
101000000000001101000000000000001101001100110000000000
100000000000000111000000000000011010110011000000000000
010000000000000000000111000000000000001100110001000000
010000000000001001000100000000000000110011000000000000
001000000000001000000000001000000000000000000100000000
001000000000000111000010101101000000000010000000000000
000000001100001001100000001101001101101100000100000000
001000000000000001000010110001001101111100100000000000
000000000000000000000000010001001101101100000100000000
001000000000000000000011011111001111111100100000000000
000000000000000000000000000000000000000000000000000000
001000000000000000000011010000000000000000000000000000
110000000000000000000000011000000000000000000100000000
000000000000000000000011010001000000000010000000000010
.ramb_tile 3 5
000001000000000000000000000000000000000000
000000100000000000000000000000000000000001
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
010000000000000000000011100000000000000010
110000000000000000000000000000000000000000
000000000000000000000000000000000000100000
001000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000010
000000000000000000000000000000000000001000
000000000000000000000000000000000000000000
000001000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000100000
000000000000000000000000000000000000000000
.logic_tile 4 5
010000000000001111100000000000000000000000000000000000
001000000000000011100011010000000000000000000000000000
101000000000000000000000010001000000000001000101000000
100000000000000000000011010001000000000000000000000000
010000000000000111100000000000000000000000000000000000
010000000000000000100000000000000000000000000000000000
000000000000001000000000000000000000000000000000000000
001000000000001011000000000000000000000000000000000000
000000000000000000000000000101100000000001000100000000
001000000000000000000000000101000000000000000001000100
001000000001000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000111000000000001000100000000
000000000000000011000000000101000000000000000001000000
110010100000000000000000000001100000000001000101000000
000000000000100000000000000001100000000000000000000000
.logic_tile 5 5
000001001010000000000010000000000000000000000000000000
001010000001111001000011100000000000000000000000000000
101000000010000000000111010001111000100000000001000000
100000000000000111000011010111011100000000000000000000
110000000000000000000010100101111000000010000000000101
010000000000000111010011100011111000000000000001000000
000000000000000000000000000001000000000001000000000000
001000000000000000000010100101100000000000000000000001
000010000000000011100111000001000000000010000000000000
001000001110001111000010101101100000000000000010000010
000000000000000000000000000001111000100000000000000000
000000000000000000000000000111011100000000000010000000
000000000000000011000010000101000000000000000001100001
000000100000000001000100000111100000000011000010000000
110000000000000000000000000111000001000011000100000000
000000000000000000000000001011101011000010010000000010
.logic_tile 6 5
000000000000000011100110010101100000000000000000000000
000000000000000001100010001101000000000001000000000000
101000100000000000000111001001000001000011000000000100
110000001010001101000010010101101100000001000000000000
000000000000000001000110010111011111001000000000100000
000000000000000000100010000101101100000000000000000000
000000000000001111100000000111000001000000000000000000
001000000000000001110010011101101001000000100000000000
000000000000000000000010010011000001000000110000000000
001000000110000000000011001011101001000000100000000000
000000100000001101100000000001000000000000000000000000
001000000000000111100000000001000000000001000010000000
000000000000100000000010110001000001000001010000000000
000010000001010000000011000001101001000010010000000000
110000000000000000000000011101111001010100000110000000
000000000000000111000010001111001011101100000100000010
.logic_tile 7 5
000010000001010011000111001101011000000011010000000010
001001000000100011100110100101011011000011000000000000
101010100100000011100111110011011000000010000000000000
100001000000000000100111110001011100000000000000000000
110000000000100000000010101011011111101010000000000000
010000000001011111000110100111111011010110000000000000
000000001100000111000111100101100000000000100000000000
001100000000000000100100000101001011000000110000000000
000000000000000111100110000000000000000000000000000000
001000000000001001000011110000000000000000000000000000
000100100000000000000000000001000000000010100000000000
001000000000000000000000000101101001000010010000000000
000010000000000000000000000000000000000010000000000000
000001000000000000000000000011000000000000000000000001
110000000000000001100000011001000000000000000101000000
000000000000000000000011000001000000000010000000000001
.logic_tile 8 5
010000000000000011000000010000000000001100110000000000
000000000000000000100010000000000000110011000000000000
101000000000001000000110001111101110000001010001000000
100000001000000001000000001001011111000010010000000000
110000000000001011000110101011100001000001010000000000
000100000000000001100111001101001100000010010000000000
001000000000000000000110000111101010000110100000000000
001000000000000001000000001101111100001111110000000010
000000000000000111100000000101100000001100110000000000
000000000110000000000000000000000000110011000000000000
000000000000000011100000000001101010000110000000000000
001000000100001001100000000101001110001010000000000010
000000100000001000000010000000000000000000000000000000
000001000000000101000110010000000000000000000000000000
000000000001000011100111101001000000000001010110000000
000000000000001001100100000111101000000001100000000000
.logic_tile 9 5
000000000000000001100111100001011011111111000000100100
000000000110000000000111011001001100101001000000000000
101000000000000011100000011101101110101010100000000000
100001000000000000100010010011111111011010010000000000
110000100000000000000110100101011100010111100000000000
101000000000000101000100000011011011101101010000000000
000000000000001111000110111101100000000000000000100001
001000001000000001100011101101001001000000010000000000
000000000000001011100000001011011000101010100000000000
000000000000000011100011101001001101011010010000000000
000000100000001001000111000000000000000000000100000000
001000000000001111000100000000000000000010000000000100
000000001110000000000011100000000000000000000000000000
001000000000000000000011100000000000000000000000000000
000000100001010000000000000000000000000000000100000000
001000000000100000000000001001000000000010000000000010
.ramb_tile 10 5
000000000000000000000000000000000000000000
000000010000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
001000000100000000000000000000000000000000
000011001010000000000000000000000000000000
000011100000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
.logic_tile 11 5
000010100000000101100111111111101000000001010001000000
000000000000000000100111110011111100000010010000000000
000001000000000011000000000000000000000010000000000000
000000100000000000100000000001000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000100000000000000000000000000000000000000000000
000000000000000000000000001000000000000010000000000000
001000000000000000000011001101000000000000000000000000
000000000000000000000000000000000000000010000000000000
000000000000000111000000001001000000000000000000000000
000000000000000000000000000000000000000000000000000000
001000000000000111000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000100000000000000000000000000000000000000000000000000
000000000000000000000000011000000000000010000000000000
001000000000000000000010010001000000000000000000000000
.logic_tile 12 5
000000000000000000000000000000000000000000000000000000
000000000000001101000000000000000000000000000000000000
101000000000001000000000010001100001000000000000000010
100000000000000001000010000011001110000001000000000000
110000000000000000000000000101100001000000000000000100
001000000000000000000000000111001100000010000000000000
000001000000001000000000000001100001000000010000000010
001010100000000001000000000011001110000000000000100000
000000000000000111000000000011100001001100110000000000
000000000000000000000000000000101001110011000001000100
000001000000000000000111100000000000000000000000000000
001000000000000011000100000000000000000000000000000000
000000000000000111000000000000000000000000000100000000
001000000000000000000000000001000000000010000000000100
000000000000000000000000000000000000000000000000000000
001000000000000011000000000000000000000000000000000000
.io_tile 13 5
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
.io_tile 0 6
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000001100000
000000000000000000
000000000000000000
000000000000000000
.logic_tile 1 6
000000000000000000000000000101100000000000001000000000
000000000000000000000000000000000000000000000000001000
101000000000000000000000000000000000000000001000000000
100000000000000000000000000000001110000000000000000000
010000000000000000000000000000001000111100000000000000
000000000000000000000000000000000000111100000000000000
000000000000000000000000000000000000000000000000000000
000000000000001111000000000000000000000000000000000000
000000000000000000000000001000000000000000000100000000
000000000000000000000000000011000000000010000000000000
000000000000001000000000001000000000000000000101000000
000000000000001101000000000111000000000010000000000000
000000000000000000000000000000000000000000000000000000
000000000000000001000000000000000000000000000000000000
110000000000001000000000001000000000000000000100000000
000000000000001101000000000111000000000010000000000000
.logic_tile 2 6
000000000000000001100000001001000001000001010000000001
000001000000000000100011100001001011000010010001000000
101000000000000011100110010001100001000001010000000000
100000000000001111100010011101101010000010010001000000
110000000000000000000000010000000000000000000000000000
000000000000000000000011110000000000000000000000000000
000000000000001000000110100000000000000000000000000000
000000000010000101000000000000000000000000000000000000
001001000000100000000000000001100000000010000000100000
000000101001010000000011001001100000000000000000000000
000000000000000000000000000011000000000000000001000000
000000000100000000000000000111100000000010000000000000
000000000000000000000000000000000000000000000000000000
000000000000010011000000000000000000000000000000000000
110000000000100000010110001111100000000000000101000000
100000000001000000000000000001100000000011000000000100
.ramt_tile 3 6
000000000100000000000000001000000000000000
000000010000000000000011010111000000000000
101000000000000000000111101000000000000000
100000010000000000000000001011000000000000
000000000000000000000000010000000000000000
000000000000000000000011001001000000000000
000000000000000000000000000000000000000000
000000000000000000000000001101000000000000
000000000000000000000000000000000000000000
000001000000000000000000001111000000000000
000001000000000000000010101000000000000000
000000100000000111000110111001000000000000
000000000000000000000110001000000000000000
000000000000000000000100001011000000000000
110000000000001001100000001000000000000000
010000000000001001100000000111000000000000
.logic_tile 4 6
000000000000000001000110010000000000000000000000000000
000000000000001001000011110000000000000000000000000000
101000000000000011100010010101000000000000010000100000
100000000000000111000111111011101001000000000000000000
110000000000000011000010101101001001100000000000000010
110000000000001001000110001011011010000000000000000000
000000000000011111000110001011111001000000010000000000
000000000000100111000000000001001001000000000000000000
000000000000000111000111101011100000000001010000000000
000010000000000001000011101101001010000010010000000100
000000000000001111000111011001101001101100000100000000
000000000000100111000010110101111101010100000001000000
000000000000100000000011100001001100101000000110000000
000000000001010000000011101011001100011100000000000000
110000000001000011100011000001011110101000000100000000
110000001000100000000000001111011011011100000000000000
.logic_tile 5 6
000000000000000000000111101001001010100000000001000001
000000000000000111000100001001101100000000000000000000
101000001110001011100000011001011111000001000000000001
100000000000001011100010000001001010000000000010000000
110010100000000011000000010101100001000000000000000000
010001000000000111000010000101101010000000100000000000
000000000100000011000011011011111111100000000000000001
000000000000001001000111110001001010000000000010000000
000000000000001000000111111101000000000000010000000000
000000000000000011000110101011101111000000000010000001
000000100000000000000000011001111111001000000010000000
000001000010001101000011110001001010000000000010000000
000000100000000000000010101101100001000000000000000000
000000000000000000000100001101001110000000100000000000
110100000000000111100000000000000000000000000100100000
000100001010000000100000001011000000000010000000000000
.logic_tile 6 6
000000000000001000000010000011011000111100110000000000
000000000000000011010100000001111010010100110000000000
101000000000101011100111000011001101111010100000000000
110000100000001111100110001011011000111001010000000000
000000000001010001100000001011100001000011000000000000
000000000110100000000010001111101001000011100010000000
000000000000001001000000000011111111110100000000000000
000000000110001111100000001111111010101100000000000010
000000100100001011000110110111101011110100000000100000
000001000000001011100011010111111000111100100000000010
010000000110000011100110000101101110000000000001000100
110000000000000000000011100011011001001000000001000000
000000000001000011100110100000000000000000000000000000
000000000000100000100111010000000000000000000000000000
110000000001000000000010001000000000000000000100000000
000000001010000000000011100011000000000010000000000000
.logic_tile 7 6
000000100000001001100011000011101000010100000000000000
000001000000000101000100000001111111100100000000000000
101000000000000001100010111011101111111100000000000000
100000000000000111000010000101101001111000000000000000
000000000000101101000011011001011001000010000000000000
000000000000010001000011110011001001000000000000000000
000000000000001000000110000001111010110100000000000000
000000000000000001000000001101011100101100000000000000
000001000000000111100110000011100001000001000000000000
000010100000000101000010100101001110000000000000000000
000000000000001001000011011011101101111100000000000000
000010100000000101000011100101101001101100000000000000
000000000000000101000111000101100000000000100000000000
000000000000000000000100001101001101000000110000000000
000000000000100011100110000111100000000000110100000001
000000000001000000100100001011101010000010110000000000
.logic_tile 8 6
000000000000011001100111111111101111000100000000000000
000000000000000001000111001001011000000000000000000000
101000000000000001100011110011001110001000000000000000
100000000000001111000011010011101010000000000000000000
010000001110000111000111111111000000000000000001000000
010000000000000111000110100001100000000010000000000000
000000000000000001000110001101100000000001000000000000
000010000000010000100000000001100000000000000000000100
000000000000000001100000010011001110000100000000000000
000000000000001111100010000001001010001100000000000000
000000000000000101100010000101100000000000110000000001
000000000000000000000100000001001011000000100000000110
000000000000000001000110011011101000010101000101000100
000010000000000001100011010111011100101001000000000100
000000000000000011000000001111001011010101000100000000
000000000000001001000000001001111101101001000000000001
.logic_tile 9 6
000000000000010000000111000111100001000001000001000010
000000001010100000000110101101101001000000000000000000
101000000000000011100000010000000000000000000000000100
100000000000000001000011100000000000000000000001000000
110000000000000011100011001000000000000010000001000000
000000001110001011100100000111000000000000000000000000
110000000000010000000110100000000000000010000001000000
000000000000100000000100001011000000000000000000000000
000010000000010000000011101000000000000010000010000100
000001000000100000000000000001000000000000000010000100
000000000000000000000000000101100000000001000000000110
000000000000000000000010001001100000000000000000000000
000000000000000000000000000000000000000000000100000000
000000000000000000000000000101000000000010000000000001
000001000000000011100000000001011101111110100100000001
000000100000000000100011100101111000111100010000000000
.ramt_tile 10 6
000000000000000000010000000000000000000000
000000000000000000000000000000000000000000
000001100000000000000000000000000000000000
000010100000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000010000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
.logic_tile 11 6
000010000000000101000010100001000000000000001000000000
000001000000000000000010000000100000000000000000001000
000000000000000000000000000000000000000000001000000000
000000000000000101000000000000001011000000000000000000
000000000000010000000000000000000001000000001000000000
000000000000101011000011010000001011000000000000000000
000000000000000000000010100000000000000000001000000000
000000000000000000000000000000001000000000000000000000
000000000000000000000000000000000000000000001000000000
000000000000000000000000000000001001000000000000000000
000000000000000000000000000000000000000000001000000000
000000000000000000000000000000001010000000000000000000
001000000000000000000000000000000001000000001000000000
000000000000000000000000000000001000000000000000000000
000000000000000000000000000000001000111100000000000000
000000000000000000000000000000000000111100000000000100
.logic_tile 12 6
000000000000000001100000001101100001000001010000100000
000000000000000000000000001001001000000010010000000000
101100000001000000000011001101100000000000100000000010
100000000000000001000010100111001101000000000000000000
110000000000000000000000000000000000000000000000000000
100000000000000000000000000000000000000000000000000000
110001100000000011100000001101100000000000000000000110
010011100000000101100000000111001101000000100000000000
000000000000000000000011001101100000000010000000000000
000000000000000000000000000011001111000000000001100000
000000000000001000000000001000000000000000000100000000
000000000000000011000000001001000000000010000000000000
000000000000000000000011000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
110000000000001111100000000000000000000000000100000000
110000000000000011100000000001000000000010000000000000
.io_tile 13 6
000000000000000010
000100000000000000
000000000000000000
000000000000000001
000000011010000001
000000001001000000
001100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000011000010
000000000011000000
000000000000000000
000000000000000001
000000011000000001
000000001000000000
.io_tile 0 7
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000010000
000000000000000000
000000000000000000
000000000000000000
.logic_tile 1 7
000000000000000000000000000000000000000000000000000000
000000000000001001000010000000000000000000000000000000
101000000000000000000000000101011100001100110000000000
100000000000000000000000000000010000110011000000000110
010000000000000101100000000000000000000000000000000000
000000000000001101100000000000000000000000000000000000
000000000000000101000000000000000000000000000000000000
000000000000000000100000000000000000000000000000000000
000000000000000000000010000101000000000001000001100000
000000000000000000000100000001000000000000000000000000
000001000000000000000000010101101000000001000000000000
000010000000000000000011001011011110000000000000000001
000000000000000000000110100000000000000000000100000000
000000000000001001000100001111000000000010000000000010
110000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
.logic_tile 2 7
000000000000000001100111110001101110100000000010000000
000000000000000000000010001111111110000000000001000000
101000000000001011000011111111100000000000000001000000
100000000000001111100011100101101100000010000000000000
110000000000000011100110000111101110000000000000000000
010000000000000000100010000011111110100000000000000000
000010000000100011100000011111000001000000000000000000
000000000001010101100011010011101001000000100000000000
000000000000100011000111000101000001000001010000100000
000000000000010111000111100101101010000010010000000000
000000000001010101000000000101001000100000000000000000
000000000000000000100000000001111101000000000000000001
000100100000100011100011001101101001001100110100000000
000000000001010000000010011001111000101100100000000000
110000000000000000000110111000000000000000000100000000
000000000000000000000110110001000000000010000000000000
.ramb_tile 3 7
000010100010000000000000000000000000000000
000001010000000000000000000000000000000000
000000000000100000000000000000000000000000
000000000001010000000000000000000000000000
000000001100100000000000000000000000000000
000000000000010000000000000000000000000000
000000000000000000000000000000000000000000
000000001110000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
001000000000000000000000000000000000000000
000000001100000000000000000000000000000000
.logic_tile 4 7
000000000000000111000011100001011111000000000000000000
000000000000000000010000001101001000000001000000000010
101000000000001001000110011101000001000010100000000000
100000000000000111100010000101001000000010010000000000
010000000000001111100011101101100001000000010000100000
000000000000001111100000001101101001000000000000000000
000000000000000111000011000101101100000000000000000000
000000000000001011000111001001001010000000100000000000
000000000000011000000000000001011111000100000000000000
000000000000100111000000001101001000000000000000000000
000000000000000000000110101111000001000001010000000100
000100000000000000000000001011101001000010010000000000
000000000000000000000111000001011111010000000000000000
000001000000001001000100001101001000000000000000000000
111000000000000000000000000000000000000000000100000000
000000000000000001000000000111000000000010000000000000
.logic_tile 5 7
000000000000000111100110100011000000000000000000100000
000000000000000011000010010001001101000000100000000000
101000000000000001100000010101000000000000010000100000
100000000000000011000011010101101001000000000000000000
011110000000110101100110010111011110010100000000000001
010101000110100011000011110101001110100100000000000000
000000000000001111000011010001100001000000010000000000
000010100000001001000010111011101011000000000000000000
000001000000000001000011101111100001000000000000100000
000000000000000000000011101101001000000001000000000000
000100000000000101000000000111100000000000110000000000
000000000000000111000011011111001000000000010000000000
000000000000001011100000011101101011000000000000000010
000000000000001011100011001101011111000001000000000000
010101000000001101000111001011111101101100000100000000
110100000000000011000000000001011100010100000000000000
.logic_tile 6 7
000010000001001011100011000111111001000000100000000001
000000000000001111000110010001011000000000000000000000
101000000000000000000011000111100000000001000001000000
100000000000000101000010010101100000000000000000000001
000010100000001011100000001101100001000001000000000000
000000000000001011010000000101001011000000000010000100
000000001100000001100011000001100000000001000001000000
000100000000000101000010010001000000000000000000000110
000000000001000001100110100101100000000010010000100000
000010100000000000010000001111101110000011110000000000
000000000001001000000000000001100000000000100000000000
000000000000100001000000001011101111000000000000000000
000000000000010011000110101101111000000000000001000000
000000000000100000100011100011011001000000010000000000
000000000000001000000110000101011000111000110100000000
000000001110000001000000001001001100010100110000000000
.logic_tile 7 7
000000000000001000000111111101001000010000000000000000
000000000000010001000110001111011011000000000000000000
000000000001000001100110011101100000000001000000000000
000000000000100001000011101001101011000000000000000000
000000001110001001100111000001001110000110100000000000
000000000000001011000110000011111000001111110000000000
010000000000000001000111110001111010101001000000100000
110000000000000111100110001101101101010110100000100000
001000000000000000000010011001111010001100000000000010
000000000000001101000110100011011001001000000000000001
000000000000010000000111001011001010111110010000000000
000000000000000001000000001011111010111101010000000000
000010000000000000000000000101111111000000000000000000
000000000000001101000010100101001000010000000000000000
000000000001000000000111001011100000000011000000000000
000000000000100111000000001011001110000011010000000000
.logic_tile 8 7
000000000000000111000110000001000001000001000000000000
000000000000000000000000001101001011000000000000100000
101000000000000001000110000101000000000000000000000000
100000000000000001000011001001001100000000100010000000
110000000000000111000110000001000001000000000000100000
110000000000000000000000001101001011000010000000000000
010100000001000000000010101011000000000000000000000000
000100000010101101000110111101100000000001000000000100
010000001110000011000000001000000000000010000000100000
000000000000001011100010011001000000000000000000000000
000000000001010000000000011000000000000010000001000000
000000000000100000000010001101000000000000000000000000
000001000000000000000111101001100000000001100100000000
000000000100000000000100001011001100000010100001000000
000001000000110000000000001001100001000001100100000010
000010000001100000000000001001001010000010100000000000
.logic_tile 9 7
000000000000000000000011011000000000000010000000000000
000000000000000000000011111111000000000000000010000000
101001000000000000000110001000000000000010000001000000
100010000000000000000000001111000000000000000000000000
000000000000000000000110010001100000000001000001000100
000000000000100000000010001101100000000000000000000000
001000000001000011000000011011000001000011110010100001
000000000000000000100010000011101011000011010001000000
000000000010000000000000000000000000000010000001000000
000000000000000000000011111001000000000000000000000000
000000001110000001000000000000000000000000000000000000
000000000000000000100000000000000000000000000000000000
000100000100000000000000000000000000000000000100000100
000100000000000000000000001011000000000010000000000000
000010000000010000000110010101100000000001110100000000
000001000000100000000110011001001011000010100000000000
.ramb_tile 10 7
000000000000000000000000010000000000000011
000000000000000000000010110000000000000010
000010100000000000000000000000000000010000
000001000000000000000000000000000000000000
010000000000000000000000000000000000001000
010000000000000000000000000000000000010000
000000000000000000000000000000000000000000
000000000000000000000000000000000000100000
000000000000000000000000000000000000001001
000000000100000000000000000000000000000000
000010000000000000000000000000000000000100
000001000000000000000000000000000000000000
000011000000000000000000000000000000010000
000000000000000000000000000000000000000010
000000000110000000000000000000000000001000
000000000000000000000000000000000000000010
.logic_tile 11 7
000000000000000000000000000001100000000000001000000000
000000000000000000000000000000100000000000000000001000
101100000000000111000011000000000001000000001000000000
100100000000000000000100000000001010000000000000000000
111000000000000000000000000000000001000000001000000000
100000000000001011000000000000001010000000000000000000
000000000000001001100000000000000001000000001000000000
000000000000001101000000000000001000000000000000000000
000000000000000000000000000000001000111100000001000000
000000000000000000000000000000000000111100000000000100
000000000000000000000000000000000000000010000000000000
000000000000000000000000000101000000000000000000000000
000000000000000000000000001000000000000000000100000000
000000000000000000000000000111000000000010000000000100
000000100000000111100000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
.logic_tile 12 7
000000000000000011000000000001100000000000001000000000
000000000000000000100000000000000000000000000000001000
101001000001000001100000000000000000000000001000000000
100000000000000000000000000000001000000000000000000000
110000000000000000000000000011000001000000001000000000
100000000000000000000011000000001110000000000000000000
000100000000000000000000000000000000000000001000000000
000000000000000000000000000000001011000000000000000000
000000000000000111100000000000001000111100000000000000
000000000000000000000000000000000000111100000001000000
000000000000000000000111101000000000000010000000000000
000000001010000000000100001011000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
010000000000000111100000001000000000000000000100000000
100000000000000000000011001111000000000010000001000000
.io_tile 13 7
000000000000000010
000100000000000000
000010000000000000
000011110000000001
000000000000000010
000000000000110000
001000000000000000
000000000000000000
000000000000000000
000100000000000000
100000000000000000
000000000000000000
000000000000000000
000000000000000001
000000000000000000
000000000000000000
.io_tile 0 8
000000000000000000
000000000000000000
000001011000000000
000000000000000000
000000000000001100
000000000000000000
001100000000000000
000000000000000000
000000000000000000
000000000000000000
100000000000000000
000000000000000000
000000000000000000
000000000000000001
000000000000000000
000000000000000000
.logic_tile 1 8
000100000000000000000000000011001100001000000000000000
000100000000001001000011100011011101000000000000000000
101000000000000000000000000000000000000000000000000000
100000000000001001000000000000000000000000000000000000
010000000000000000000000000000000000000000000000000000
010000000000000000000000000000000000000000000000000000
000000000000000000000000000111011000000000000000000000
000000000000000000000000000111001111001000000010000000
000000000000000101000010100000000000000000000000000000
000000000000000101000010100000000000000000000000000000
000000000000000000000000000001000000000001000000000000
000000000000000000000000001111000000000000000000000000
000000000010000101000011000000000000000000000100000100
000000000000000101000010101111000000000010000010000100
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
.logic_tile 2 8
000000000000000000000110010011100000000000001000000000
000000000000000000000010000000000000000000000000001000
101000000000001001100110010000000001000000001000000000
100000000000000001000010000000001011000000000000000000
110000000000000000000000000000001000001100111110000100
000001000000000000000000000000001001110011000010000000
000000000000000000000000010000001000001100111100000110
000000000000000000000011000000001001110011000000000000
000000000000000000000000000000001001001100111110000010
000000000000000000000000000000001000110011000000000000
000000000000000111000000000000001001001100111110000000
000000000000000000000000000000001000110011000000100000
000000000000000000000000000000001001001100111100000000
000000000000000000000000000000001001110011000000100001
110000000000000000000000000000001001001100111100000101
100000000000000000000000000000001001110011000010000000
.ramt_tile 3 8
000000000000000000010000000000000000000000
000000000000010000000000000000000000000000
000000000000000000000000000000000000000000
000000001110000000000000000000000000000000
000000000010000000000000000000000000000000
000000000000000000000000000000000000000000
000010100000000000000000000000000000000000
000001000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000010000000000000000000000000000000000000
000001000000000000000000000000000000000000
.logic_tile 4 8
000000001100000001100110011101111010101100000000000000
000000000000000001000011110011011001010100000000000010
101000000000000001000111110001000001000000110000000000
100000000000000001000011110011101111000000010000000000
110000000110001111110000011101000000000010100000000001
110000000100100011100011110101001100000010010000000000
010000100000000101000000011111100001000000000000000000
000001000110000001000011111011101001000000010000000000
010010100001010101000000000101000001000000110000000000
000001000010101001000000000111101101000000010000000000
000000000000001000000010010001011000101100000000000000
000000000000000001000110000001011011010100000000000010
000000000000000101000010001001100000000001100100000000
000000000000000000000100001011001010000010100000000000
000000000000000000000111111001100000000001100100000000
000000000000000000000111111111001001000010100001000000
.logic_tile 5 8
000010100110000000000011110111000000000000001000000000
000001000000001001000010000000100000000000000000001000
101010000000000000000000000011000000000000001000000000
100001000000000000000000000000101001000000000000000000
010010100000000000000010000000001000111100000000000000
000001000100000011000000000000000000111100000000000000
000000000000000000000000000001001000001100110010000001
000000000000000000000000000000010000110011000000000100
000000000001011000000010010000000000000010000000000000
000000000110001101000111010011000000000000000000000000
000000000000000000000000000101000000000010000000000000
000000000000000000000000001011100000000000000000000000
000010100000000000000000010000000000000000000000000000
000001000000000000000010110000000000000000000000000000
110000000001010000000000000000000000000000000100000000
000000000000000000000000000101000000000010000000000010
.logic_tile 6 8
000000001100001011100011111011100000000000000000000000
000000000000000001000011000111100000000010000000000000
000000000000001101100000000111000001000010000000000000
000000000000001011000011001011101011000011000000000000
000000000000001111100011110001001101000000010001000000
000000001100000001000010000001101000000000000000000000
000000000000001101100000011101000000000000010001000000
000000101110001011000010000001101000000000000000000000
000010000000000111000110001101100000000000000000000000
000001000000000000100000000101001110000000100000000010
000001000000000000000010000101001111000001000010000000
000010000000000000000100000101101010000000000011000000
000001000000000111000010000111100000000011010000000000
000010100000000000100100000101101001000010100000000000
000000000000000001000000000001100000000010000000000000
000000000000000000100010011101100000000000000001000000
.logic_tile 7 8
000000000000001001100000001011011001001100000000000000
000000000000000101000011100001011010101100000000000000
101000100000000001100011011001000001000000100000000000
100000000000001111000011100001101110000000000000000000
010000000001011000000111110001000000000000010000000000
000000000000100001000110011111001000000000110000000000
000000000000001001000110011111100001000000110000000000
000000000000000111000010110011001010000000010000000000
000000000000000111100000011111000001000011110010000000
000010000000000000100010101101101001000011100001000000
000000000000000101000000001111000000000001000000000000
000000001000000000000000001001001011000011000000000000
000000000000000011000110011011001010101100000000000000
000000000000000000000011100001001101001100000000000000
110000000000001011000000001101000000000001000110000000
000000100000000111000000001101100000000000000000000000
.logic_tile 8 8
000000001110101001100111110011100000000001000000000000
000000001101010001000111001001100000000000000000000000
101000000000001111000110110011100000000001000000000000
100000000000001111000011111101100000000000000000000000
110000000000000001100111111011100000000001000000000000
010000000000000000000111000101100000000000000000000010
000000000001000101000010011011111000000010000000000000
000000000010100000100111011001011101000000010000000100
000000000000000101000011111111100001000000000000000000
000000000000000000000111000111001000000010000000000000
000000000000000000000110011101000000000010000000000000
000000000010001001000010001101000000000000000000000000
000000000000000101000000001001001000101001000100000000
000000000000000000000000001101011110010101000000000000
000000000000001001000000001001001010010101000100000010
000000000000000111100000000001011100101001000000000001
.logic_tile 9 8
000000000000001111100111001001100000000001000000000000
000000000000000101000011100001100000000000000010000000
000000000000000101100010011001011011011100000001000000
000000001000000001000010001111011000001100000000000000
000000000000001001100111000001000001000010000000000000
000000000000000101000010110011101100000011000000000000
110000000000000101100110001101111000011101000000000000
010000000000000000000000001111011010011100000000000100
000000000000001000000000010011101010000000000000100000
000000000000001001000010001111011010001100000000000100
000000000000001001100000000001001101011100000000000001
000000000000001011000011000101111000011100100000000000
010001000000001000000110000001000001000010000000000000
110010000000001001000000000011101101000011000000000000
000000001110000000000000010101000000000000100000000000
000000000000000000000010110111101000000000110000000000
.ramt_tile 10 8
000000000000000000000111001000000000000000
000001010000000000000100001101000000000000
101000000000000000000000000000000000000000
100000010000000000000000001001000000000000
000000000000000000000000001000000000000000
000000000000000000000000000101000000000000
000001000000000111000111000000000000000000
000000100000000000000000001111000000000000
000000000010000000000110100000000000000000
000000000000000000000000000111000000000000
000001000000000000000000000000000000000000
000010100000000111000000001011000000000000
000000000000000101100000011000000000000000
000000000000000000000010100111000000000000
110000000000000101100000011000000000000000
010000000000000000000010101111000000000000
.logic_tile 11 8
000000000000000000000010010000000000000000000000000000
000000000000000000000011110000000000000000000000000000
101000000000000000000000000011100000000001000100000000
100000000000000000000000000011000000000011000000000000
110000000000000001000000000001000000000001000100000000
000000000000000000000000000101100000000011000000000000
000000000010000000000000000111100000000001000100000000
000000000000000000000000000011000000000011000000000000
000000000000000001000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000001000000000000001000000000001000100000000
000000000000000101000000000011100000000011000000000000
000000000000010000000000000000000000000000000100000000
000000000000000000000000000101000000000010000000000000
000000000000000001000000000000000000000000000000000000
000010000000010000000000000000000000000000000000000000
.logic_tile 12 8
000000001000010000000000000000000000000000000000000000
000000000000100000000000000000000000000000000000000000
101000000000000001100000000000000000000000000000000000
100000000000000001000000000000000000000000000000000000
110000000000000000000000000001100000000000000000100010
000000000000000000000000001011000000000011000000100000
110000000000001001100000000000000000000000000000000000
010000000000000001000000000000000000000000000000000000
000000000000000000000000001111000001000001100000000000
000000000000000000000011100001101010000000110000000000
000000000000000000000000001000000000000000000100000000
000000000000000000000000000101000000000010000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000011100000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
.io_tile 13 8
010000111000000010
000000000000000000
000000000000000000
000000000000000001
000001111000000101
000000000001000100
001100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
.io_tile 0 9
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000001100
000000000000001000
000100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000011010000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
.logic_tile 1 9
000000000000000011000011000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
101010100000001000000000000101000000000000010000000000
100001001010000001000011110101001011000000000010000000
110000001110001111100000010000000000000000000000000000
000000000000001101000011010000000000000000000000000000
000100000000000001000000010001100000000000100001000000
000100000000000000100010000001001001000000000000000000
000000000000000000000000000000001001001100110000000000
000001000010000000000000000000011001110011000000000000
000000000000000000000110111011111111000100000000100000
000000000000000000000010100111101011000000000000000010
000000000000000000000000000000011101001100110100000001
000000000000000000000000000000011010110011000000000000
110010000000001101100000000000000000000000000000000000
100001000000000101000000000000000000000000000000000000
.logic_tile 2 9
000000000000001001100110010000001000001100111100000000
000000000000000001000010000000001000110011000000110000
101000000000001001100000010000001000001100111100100100
100000000000000001000010000000001000110011000000000000
110000000100000000000000000000001000001100111100000000
000000000001010000000000000000001001110011000000000000
000000000000000000000000000000001000001100111100000000
000000000000000000000000000000001001110011000000100000
000000000000000000000000000000001001001100111100000000
000000000000000000000000000000001000110011000000000000
000000000000000000000000000000001001001100111100000000
000000000000000000000000000000001000110011000000000000
000000000000000000000000000000001001001100111100000000
000000000000000000000000000000001001110011000000000000
110011100000000000000000000000001000111100000000000000
100011100000000000000000000000000000111100000000000000
.ramb_tile 3 9
000001000000000000000000000000000000000000
000000110000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000010000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
.logic_tile 4 9
000000000000000111100000000001000000000000001000000000
000000000000000111110011010000000000000000000000001000
101000000000001000000011010001000000000000001000000000
100000000000001001000010000000001101000000000000000000
010000000000000000000000000001101000001100111010000001
010000000000000000000000000000101111110011000010000010
000000000000000000000000000001101000001100111001000000
000000000000000000000000000000001101110011000000000010
000001100000000111100111100000001000111100000000100000
000100100010000000100100000000000000111100000000000000
000000000000000111000000000001100000000000000000100000
000000000000000000100000000111101100000010000000000000
000001000000001000000111100001000000000000000000000001
000000100000000101000100000001000000000011000001000000
000000000000000000000000001000000000000000000100000001
000000000000000000000000000011000000000010000000100100
.logic_tile 5 9
000000000000000001000010001101100000000001000001000000
000000000000000000100110000011101010000000000000000000
101010100000000001100111000001000000000011110000100100
100000000000000001100111011001101101000001100000000000
010000000000000111100111111101100000000001010000000000
110000001100000000100110101011001101000010010000000001
010000000000001001100010000001100000000000010000000000
110000001000001111100011010001101011000000000001000100
000000000000001000000111011111100000000000010001000000
000001000000000101000011110001001110000000000000000010
000000000000000111100000010000000000000000000000000000
000000100000000001000010000000000000000000000000000000
000110000000000111100011000111011101101100000100000000
000101000000000000110111000011101010010100000000000000
110000000001000011100000001111011011101100000100000000
110000000000000101100000001001111000010100000000100000
.logic_tile 6 9
000000000000000101100111110001100000000000110000000000
000000000000001011000110000101001000000000010000000000
101000001110001101000111010101100000000000110000000000
100010000000001001000011000001001101000000010000000000
010000000000001101100110110001100000000000110000000000
110000000000000011000110110101001100000000010000000000
000000000000000101000111000111100000000000000000000001
000000000000000101010000000111101010000000010000000100
000000000000000001100011100101001000001100110010000110
000000000000000001000100000000110000110011000000000001
000001100010000000000010001001100000000001000010000010
000010100000000000000000000101100000000000000000000001
000000000001011000000011000011111001101100000100000000
000000000000100111000000001001111010010100000000000100
010000000001000000000011100111011011101100000100000000
010000000100000000000100000011111000010100000000000000
.logic_tile 7 9
000000000000000101000010001001100001000011000000000000
000000000000001101100110101101101000000011100010000000
101000000000000000000110001101101001010110000000000000
100001000000001001000000000111011010101001010000100000
010010000000000000000111010111011011101100000000000000
110001000100000000000010001111011110001100000000000000
000001000010001001100010000111000001000000100000000100
000010000000000001000010100001101100000000110000000000
000000000001000000000010000001000000000000110000000000
000000000010000000000111101011101110000000010000000000
000000000000000101100000000001000000000000110000000000
000000000000000000000000001001001011000000010000000000
000010000000001001100111001001100000000001000000000000
000001000000000011100000001101100000000000000010000000
000000000000001101100000000000000000000000000100000000
000000000000001001000000001011000000000010000001000000
.logic_tile 8 9
000000000000001001100000011111100001000010000000000000
000000000000000001000010000101001001000000000000000000
101000000000000011100010010011100001000000000000000000
100001000100000001100011110011001010000000100000000000
110000000001010011100000000101100000000001000000000000
010000000000100101100000000011100000000000000000000000
010001000000001001000010010001001011000000010000100001
000000100000001111100011010101101000000000000000000000
000000000011000001000000010101011001011100000000000000
000000000000100111100011001001001011111000000000000100
000000001010000000000110011101000000000001000000000000
000000000011011001000010001101000000000000000000000000
010000000000000000000000001001100000000001100100100000
000000000000000000000000001011101000000010100000000000
000000000000000000010000001001100000000001100100000000
000000000000001001000000001011001000000010100010000000
.logic_tile 9 9
000000000000001000000110010101101010000000000000000000
000000000000000101000011110001101001000010000000000000
101000000000000001000110011001100000000000000000100001
100100000000000001000011100111100000000010000000000000
110000000000000111100000001101000000000000000000000001
000000000000001001100011000011100000000001000000000001
110000000000000000000000001001100001000001010000000000
000000000000000000000010001001001000000010010000000001
110000000000000000000000000000000000000000000100000100
010000000000000000000000000101000000000010000000000000
000001000000001000000000000000000000000000000000000000
000010100000000111000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000001000000000000000000000000000000101000000
000000000000000111000000001001000000000010000000000000
.ramb_tile 10 9
000000000000000000000000000000000000000000
000000010000000000000000000000000000000000
000010000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000110000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000010000000000000000000000000000000000000
000000001010000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
.logic_tile 11 9
000000000000000111100000000000000000000000000000000000
000000000000000000100000000000000000000000000000000000
101000000000000000000000000000000000000000000000000000
100000000000000000000000000000000000000000000000000000
110000000000000000000000000000000000000000000000000000
000000000000000000000010110000000000000000000000000000
000000000001010000000000000000000000000000000101000000
000000000000000000000000000001000000000010000001000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000101000000100000000000000000000000000000000100000000
000000000001010000000000001101000000000010000001000000
.logic_tile 12 9
000000000000000000000110000011100000000000001000000000
000000000000000000000000000000100000000000000000001000
101001000000000101000000000000000001000000001000000000
100000100000000001000000000000001000000000000000000000
110000000000000000000000010000001001001100111000000100
000000000000000000000010000000001011110011000000100000
110000001100001011000110000000001000111100000000000000
010000000000000001000000000000000000111100000000000000
000000000000000000000000001101000001000001010000000000
000000000000000000000000001101101000000010010000100000
000000000000000000000111000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000001001001100110000000000
000000000000000000000000000000011010110011000000000000
000000000000000000000000001000000000000000000100000000
000000000000000000000000000101000000000010000000000000
.io_tile 13 9
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000001100
000000000000001100
000100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000110010
000000000000010000
000000000000000000
000011110000000001
000010000000000010
000010010000000000
.io_tile 0 10
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
.logic_tile 1 10
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
101000000000000000000000000000000000000000000000000000
100000000000000000000000000000000000000000000000000000
010000001100000000000010000000000000000000000000000000
110000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000001000000110100000000000000000000000000000
000000000000001011000100000000000000000000000000000000
000000000000000000000000001111100001000000000000000000
000000000000000000000000001111001100000000100001000000
000000000000000000000011001000000000000000000110000000
000000000000000111000100001011000000000010000000000010
.logic_tile 2 10
000000000000000001000010000001000001000000110000000000
000000000000000000000011011001001011000000010000000010
101000000000001000000000000001100000000000100000000000
100000000000000111000000001101001001000000000000000001
111010100000000000000000001000000000000000000110000000
010001000000000000000011111011000000000010000000100000
000000000000000000000010100000000000000000000000000000
000000000000000000000100000000000000000000000000000000
000000000000000000000000010000000000000000000000000000
000000000000000000000011110000000000000000000000000000
000000000000000000000000010000000000000000000000000000
000000000000000000000011010000000000000000000000000000
000001000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
.ramt_tile 3 10
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000001100000000000000000000000000000
000000100001000000000000000000000000000000
000000001010000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
.logic_tile 4 10
000000000000001000000110000000000000000000000000000000
000000000000001011000111100000000000000000000000000000
101000000000000111100011100011000000000010100000000000
100000000000000001000010101111001110000010010000000000
110001001110000000000111111101100000000000110000000001
010000100000000000000111010001101101000000010000000000
010000000000000111100111010001100001000000000010000000
110000000000000000100011101001101100000010000000000000
000000000000001111100111010011000000000001010100000000
000000000000001111100011111101101001000010011001000000
000000000000001001000000001101100001000001010100000000
000000001110001111100000000001101001000010011000000100
000000000000100000000000011101000000000001010100000000
000000000001000011000011000011101001000010011000100000
010100000000000000000000000001000001000001010100000000
110100000000000000000000000011001001000010011000000000
.logic_tile 5 10
000010000000001101000111000011100000000010100000000000
000000000000000001000000000101001101000010010000000000
101000001110000111000110010001100001000000110000100000
100000000000001001100011110001001110000000010000000000
010000000000000111100000000000000000000000000000000000
000000000000100101100010100000000000000000000000000000
000000000000001000000000000011100000000001000000000000
000000000000000001000000000101101100000000000000100000
000000000110001111000000010101000000000010100000000000
000000000000000101000010010011101101000010010000000000
000000000000000001100000010001100001000001010000000000
000100000000000000000010011001101001000010010000000000
000000100000000000000000000101101101000010100000000000
000001000000000000000000000001001101000001100000000010
110000100000001000000000001000000000000000000100000000
000000000000001111000000000001000000000010000000000000
.logic_tile 6 10
000000000000000111000111101011100000000001010000000000
000000000000001111100011011101001000000010010000000000
101000000000000001110000000001111010000000000000000000
100000000001110001000000001001001100100001000000000010
010000001110000001100010110001000000000000000001000000
010000000000000000000010000101000000000010000000000000
010000000000001011000010100101100000000011000000000100
110000000000000001000000000011000000000010000001000000
000000000000000011100111010111000000000000000000100001
000000000000000000000010111011000000000010000000100011
000000000000000001000000001001100000000010000000100000
000000001100000000100000000101001111000011000000000000
000000001110001000000110010101011001110000000000100010
000000000000000111000010101101101000010000000000000000
110000000000000000000000000111000000000011110101000000
000000000000000000000000001001101101000010110000000000
.logic_tile 7 10
000000000000011011100111000101011100000000010000000000
000000000001011011100011110111011000000000000000000100
000001000000001001000111110001011101010000000000000000
000010100000000111000111100011111101000000000000000000
000000000000000101100110100101100000000001000000000100
000000000000001101000000000101000000000000000010000000
000000000000001001100111000011100001000000100000000100
000000000001110111000000000111001111000000110000000000
010001100001000011100000001111000000000011000000000000
110001100000000000100011000001001010000011100000000010
000000000000001000000011110101101101101001010000000000
000000000000001101000111100001111001010110000000000000
000000001101000101010110001111111000000000000000000000
000000000000100001100100000101001011100000000001000000
000000000001001000000000011111011000001100000000000010
000000000000000001000010100101111001101100000000000000
.logic_tile 8 10
000000000000010111100111110001000000000000000000100000
000000000000001011100110101001100000000010000000000000
101000001001000001010111111101011000101100000000000001
100000000000000001000010001101111000001100000000000000
110000000000001011100111111011100000000000000000000000
110000000000000111100110010101001010000000010000100000
010000000000000011100111110011000001000000010000000000
110000000000001011100111010011101001000000000000000010
010001000000000011100011100001101011000000000000000010
110010000000000000100111100001001100100001000000000000
000000000000000001100000001001100000000000100000000000
000000000001001111000000000101001101000000110000000000
000000000000001000000010001111011100001100000000000000
000000000000000101000000001101001000101100000000000000
110000000000000000000000000000000000000000000100000001
000000000000000000000000001101000000000010000000000110
.logic_tile 9 10
000000000110000111000000001101111101000000000000000000
000000000000000101100010100101001011000000010000000000
101010000000001001000000000101111001111111000001000000
110001000000000111000000000001001000111111010000000000
010000000000001000000010000011000000000011110000000000
000000000000000011000010100001001101000001110010000000
000000000000010011000110110000000000000000000000000000
000000000000010011000011010000000000000000000000000000
010000001000000111100000010000000000000000000000000000
110000000000000000000011110000000000000000000000000000
001010100000000011100000001001000000000010000100000011
000001000000000000000000001101100000000011000000000000
000000000000000000000000000101000000000010000100000000
000000000000000000000000001101100000000011000000100100
110000001010000000000000000000000000000000000101000000
000000001110000000000000000101000000000010000000000000
.ramt_tile 10 10
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000010000010000000010000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000010100000000000000000000000000000000000
000010100000000000000000000000000000000000
000001000000000000000000000000000000000000
000000100000000000000000000000000000000000
000000000100000000000000000000000000000000
000010000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000010000000000000000000000000000
.logic_tile 11 10
000001000000000011000111100000000000000000000000000000
000010000000000001100100000000000000000000000000000000
101000000000000001100110000001111001001111110010000000
100000000000000111000010001001011001101011110000000000
110000000000000011000000010001101010001100000100000000
000000000000000000100010000101011000001110100001000101
000001000000000000000000000000000000000000000000000000
000000100000000111000000000000000000000000000000000000
000000000000000000000000001000000000000000000100100000
000000000000000000000000000011000000000010000000000001
010000000000000000000000000000000000000000000110000000
110000000000001111000000000001000000000010000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000001000000000000000000100100000
000010000000000000000000000101000000000010000000000000
.logic_tile 12 10
000010100000001000000000010000000000000000000000000000
000001000000000011000011000000000000000000000000000000
101000000001000000000000000000000000000000000000000000
100000000000000000000000000000000000000000000000000000
010000000000000000000000000000000000000000000000000000
010000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000010000000000000000000100000000
000000000000000000000011110001000000000010000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000100000000
000000000000000000000000001011000000000010000000100000
000001100000000000000000000000000000000000000000000000
000000100000000000000000000000000000000000000000000000
.io_tile 13 10
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
001100000000000000
000000000001100000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
.io_tile 0 11
000000000001100000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
001100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000001
000000000000000000
000000000000000000
.logic_tile 1 11
000000000000000011100000001000000000000010000000000000
000000000000000111100000001101000000000000000000000100
101000000000000000000000000000000000000010000000000000
100000000000000000000000000001000000000000000000000100
110000000000000000000000010000000000000000000000000000
010000000000000001000010010000000000000000000000000000
000000000000000000000010100000000000000010000000000000
000000000000000000000000001101000000000000000000000001
000000000000000000000000010000000000000000000100100000
000000000000000000000011100001000000000010000000000000
000000000000000000000000000000000000000000000100000000
000000000000000000000000000101000000000010000001000000
000001000000000000000000000000000000000000000000000000
000000100000000000000000000000000000000000000000000000
010000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
.logic_tile 2 11
000000000000001000000111011101100001000000000000000000
000001000000001111000011111101001101000001000000000000
101000000000000001100010010000000000000000000000000000
100000000000000001000010000000000000000000000000000000
010000000000000000000000000000000000000000000000000000
010010100000000000000000000000000000000000000000000000
011000000000000000000111110001000000000001000001000000
000000000000000001000111110011001001000000000000000000
000000000000101011100000000000000000000000000000000000
000000000001010001100010000000000000000000000000000000
000000000000000000000110001011000001000001000000000000
000000000000000000000010001101101110000000000000000000
010001000000000000000000001001100000000001100100000100
000000100000000000000000001001101100000010100000000000
000000000000000000000000001001100001000001100100000000
000000000000000001000000001011001000000010100000000000
.ramb_tile 3 11
000000000000000000000000000000000000000000
000010110000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000100000000000000000000000000000000
000000000100000000000000000000000000000000
000000000000000000000000000000000000000000
000010000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000001000000000000000000000000000000000
000000000000000000000000000000000000000000
.logic_tile 4 11
000100000000001101000111111000000000000010000000000000
000100000000001111000110001001000000000000000000100001
101000000110000001000000010000000000000010000000000100
100000000000000000100011000101000000000000000000000000
110000000000001011100111110111000001000010100000000000
110000000000000111000111110101001111000010010000000000
000000000000001001100010110101100000000010100000000000
000000000000000001000011100001001001000010010000000001
000001000000000000000000000101000001000010100000000000
000000101110000000000000000001101111000010010000000000
000000000000000000000110101101100001000010100000000000
000000000000000000000100001101101101000010010000000000
000000000000001000000111100101100000000010100000000000
000000001000001101000100001001001011000010010000000000
000000000000000000000110101000000000000000000110000100
000000000000000000000100000001000000000010000000000000
.logic_tile 5 11
000000000000001111100010001001100000000000000000000000
000000000000100111100111011001001100000000100000100000
101000000000000011100110111001011100100010000000000000
100000000000000000000011010011011101000100010000000000
111001000000000000000111101001100000000000010001000000
010000100001010000000111111001001100000000000000000000
000010000001101000000000001101011100000000000000000000
000100000000100001000000000101101000000100000000000010
000000101100101000000010011001111110000000000000000000
000000000001010011000011100111101001000000100000000000
001000101100001111100000010000000000000000000100000000
000001001110001111000011101101000000000010000000000010
000001000000100000000000000000000000000000000000000000
000010100001000000000000000000000000000000000000000000
010000001010100111100000000000000000000000000100000000
000000000001110111100000001001000000000010000000000110
.logic_tile 6 11
000000000000000011100000010000000000000000000000000000
000000000001010000110011110000000000000000000000000000
101011100000000101100000010001100001000000000000000000
100011100110000000100011001101101101000010000000000010
110000000001010000000000011001000000000010000000000000
110000100000000101000010001111000000000000000000000000
000000000001000011100000001011000000000001010100000000
000000000110100000100000001011001111000010011001000000
000010000000000000000000011101000000000001010100000000
000001000000001011000011101001001101000010011001000000
000000000000000001100110101101100000000001010100000000
000000000000000000100000000001001111000010011001000000
000010000000000000000011010011100000000001010101000000
000001000000000000000011101001001101000010011000000000
110010100001000101100010100000000000000000000000000000
110001000000100000100000000000000000000000000000000000
.logic_tile 7 11
000000000000000101100011111011000000000010000000100000
000000000000000000000010101011100000000000000000000000
101000000000000011100111110101011011100000000000000000
100001000000001101100010111111001000110000000000000000
110100000000001101100000010001100001000000000000000000
010100000000000001000010101001101111000000100000000000
000000000000000001100111110101100000000001000000100100
000000001100001111000010110001000000000000000000000000
000000000000000000000111111101011101110111100000000000
000000000000000000000111110101111011111111110010000000
000000000000000111000110000001100001000000000000000000
000000000000000000100011100101101100000010000000000000
000000100000000001100000010001011011010110100000000001
000000000000000000000010000111111000001001010000000000
000000001100000000000110001000000000000000000100100000
000000000000000000000000000101000000000010000000000000
.logic_tile 8 11
000000000000000011000110101001000000000000110000000000
000000000000000000000011100101101001000000010000000000
101000000000000101010000010101100001000011000000000100
100000000000000001100011001101001011000001000000000000
010000000000001001000110101011000001000000010000000100
110000000000000001100111101111101000000000000001000000
010000001110001111100000011111001011000100000000000000
110000000000000001100010000101001000001100000000000000
000010000000001000000110001111100001000000010000000010
000001000000001111000000000111001101000000000000000000
000000000000000000000111000011111001010110100000000000
000000000000001101000011110101011101001001010000100000
000000000000000101100000001011100000000000010000000000
000000000000000000000000000011101100000000000000000000
000000000010000111100010000000000000000000000101000000
000000000000000001100100000001000000000010000000000000
.logic_tile 9 11
000000000000100000000000010101100001000001000000000000
000000000000010001000010000001101101000000000000000000
101000000001000011100010100001100000000000010000000000
100000000010010000110110010101101011000000000000000000
110000000000001101000000000001101110001100110000000000
100000000000000001100010000000100000110011000000000000
000000000000000000000000001101000000000000000000000000
000001000000000000000010000011000000000001000000000010
000000000001010000000000000000000000000000000000000000
000000000000100111000000000000000000000000000000000000
000000000000000001100110101001000000000001000000000000
000000000000000000000110010001100000000011000000000100
000000000000001000000000000000000000000000000100000010
000000000000000011000000000011000000000010000000000000
010000000000010000000000001000000000000000000100000000
100000000000000000000000001011000000000010000000000001
.ramb_tile 10 11
000000000000000000000000000000000000000000
000000010000000000000000000000000000000000
000000000000010000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000100000000000000000000000000000000000
000001000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000001000000000000000000000000000000000000
000010100000000000000000000000000000000000
000010000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000110000000000000000000000000000000
.logic_tile 11 11
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
101000000000000000000000000000000000000000000000000000
100000000000000000000000000000000000000000000000000000
110000000000000000000000000000000000000000000000000000
010000000000000000000000000000000000000000000000000000
000000001100000000000000001000000000000000000101000000
000000000000000000000000000011000000000010000000100100
000000000000000000000000000000000000000000000000000000
000000000000000000000011110000000000000000000000000000
000000000000000001000000000000000000000000000000000000
000000000000000000100000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
.logic_tile 12 11
000000000000000011100000010000000000000000000000000000
000000000000000000000011000000000000000000000000000000
101000000000000000000000001000000000000000000100000000
100000000000000101000000001101000000000010001000000000
010000000000000000000000000000000000000000000000000000
010000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000100000000
000000000000000000000011000001000000000010001000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000001000000000000000000100000000
000000000000000000000000000001000000000010001000000000
110000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
.io_tile 13 11
000000000000000010
000100000000000000
000000011000000000
000000001000000001
000000000000010010
000000000000110000
001110000000000000
000010010000000000
000000000000000000
000100000000000000
000000000000000010
000000000000110000
000000000000000000
000000000000000001
000000000000000010
000000000000000000
.io_tile 0 12
000000000000000010
000100000000000000
000000000001100000
000000000000000001
000000000000010010
000000000000110000
000100000000000000
000000110000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
.logic_tile 1 12
010000000000000101000011000001000000000000001000000000
000000000000000101000011010000000000000000000000001000
000000000000000000000111100101100001000000001000000000
000000000000000000000100000000001001000000000000000000
000000000000000000000110100000000000000000001000000000
000000000000100000000110010000001000000000000000000000
000000000000000011100000000000000000000000001000000000
001000000000000000100000000000001001000000000000000000
000000000000000000000000000000000000000000001000000000
000000000000000000000000000000001001000000000000000000
000000000000000000000000000000000000000000001000000000
001000000000000000000000000000001011000000000000000000
000000000000000000000000000000000000000000001000000000
001000000000000000000000000000001011000000000000000000
000000000000000000000000000000001000111100000001000000
000000000000000000000000000000000000111100000000000000
.logic_tile 2 12
010000000000000000000000010101100000000000001000000000
000000000000000000000011010000100000000000000000001000
101010001110000000000010100101100001000000001000000000
100001000000000000000110110000101110000000000000000000
010000000000000000000110010011101000001100111000000000
010000000000000000000010000000101110110011000000000001
000000001000000001100010100000001000111100000000000000
001000000000000000000110110000000000111100000000000000
000000000000000000000000001001100000000010000000100000
000000000000000000000000001001100000000000000000000000
000010100000000000000110010011101011001100110000000000
001000000000000000000010000000111110110011000000000000
000000001100000001000000001000000000000000000110100000
001010101110000000000000000101000000000010001000000000
110000000000000111000000000000000000000000000101000000
110000000000000001100000001101000000000010000010000000
.ramt_tile 3 12
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000100000000000000000000000000000000000
000001000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000010000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000010000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
.logic_tile 4 12
000000000000000000000110000000000000000010000001000000
000100000000000000010010000101000000000000000000100000
101000000000000111000011101000000000000010000000000100
100000000000001011000110001011000000000000000010000000
110000000000000011000110100000011111001100110000000000
010000000001000000100111000000011011110011000001000000
000000000000100111000111001011101011111100000000000000
001000000000011011100110100101111001111000000000000000
000000000110001111000000010000000000000010000010100000
000000000000001101100011101111000000000000000000000000
010000001010001011000111010001101100000001000000000000
111100000000000111100011100011001011000000000010000000
000000000000000000000111001001011101110000000010000000
000000000000000000000100001111101001100000000000000000
010000000010000000000111001001011101111001110100100000
110000000000000000000010001101101000111010110000000000
.logic_tile 5 12
010000000000000000000010101011111111000010000001000000
001000000000001001000100001101101010000000000000000000
101000000000000101000110000101000000000001000000000010
100000000000000000100000001011100000000000000000000000
110000000000000000000011101011011000010000000000100000
110000000000001101000000001111101000110000000000000000
000000000000100101000110001111111111100010000000000000
001000000001000000000000001111011001000100010000000000
000000000000000000000010101011001010010000000000000000
001000000000001011000000000011101110110000000000000100
000000000000000111000011000101100000000001000000000000
001000000000001001100100001011100000000000000000000000
000000000000100011000010001011001000010000000000000010
000000000001010000100000000101111100110000000000000000
010000000000000111000011001000000000000000000100000000
000000000010001001100111000011000000000010000000000000
.logic_tile 6 12
010000000000000000000010101011111001100010000000000000
000000000000000111000111100101101001001000100000000000
101000000000001001100110011111111111000010000000000000
100000000000000001000010001101011001000000000000000000
010000000000001000000110111001001111010000000000000100
010000000000000001000011001001101101110000000000000000
000000000000010001000110010001101010100000000000000000
001000000000000000100010000101011100000000000000000000
000000000000000001100000000111101011100010000000000000
001000000000000000100000000001111011000100010000000000
000000000000000000000111011000000000000000000100000000
001000000000000000000011001011000000000010000000000000
000000000000001000000000001000000000000000000100000000
000000000000010011000000000101000000000010000000000000
010000000000000001100110011000000000000000000100000010
000001000000000000000111011111000000000010000000000000
.logic_tile 7 12
010000000000000000000000001001111000100011110000000010
000000000000000000000011011011011011010111110000000000
101010100000000001000010000101100000000001000000000010
100000000000000111000000001011000000000000000000000000
110010100000001101100110100000000000000000000000000000
110000000000001011000000000000000000000000000000000000
000010000000000101100000000000000000000000000000000000
001000000000100011000000000000000000000000000000000000
010000000000000111000010101101000000000000110000000000
000000000000000000000100000001001001000000010000000010
000000000000000000000000011101000001000010000000000000
001000000000000000000010100101001111000011000000000000
010000100000000000000111100000000000000000000000000000
110000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000100100000
000000000000000000000010100011000000000010000000000101
.logic_tile 8 12
010000000000000000000010110011000000000000001000000000
000000000000000001000011000000000000000000000000001000
101000000000000000000000000001000000000000001000000000
100000000000000000010000000000001110000000000000000000
010000000000000000000000000011000000000000001000000000
010000000000000000000000000000100000000000000000000000
000000000000000000000000000111100000000000001000000000
001000000000000000000000000000100000000000000000000000
000000000000000111000111100111000000000000001000000000
001010100000000000000010010000100000000000000000000000
000000000000000000000000000000001000111100000000000000
001000001010000000000000000000000000111100000000000000
000000000010000000000000010001000000000000000000000100
000000000000000101000011011011100000000010000000000000
000000000000000000000011000000000000000000000100000000
000000000000010000000000000000000000000010000000000100
.logic_tile 9 12
000000001110101000000110001011100001000010000000100000
001000000001010001000011111101001001000000000000000000
101000100000000111100111010011001010000100100000000000
100001000100000000000110001001111010000000000000000000
010000000000000000000111010101111001001100110000000000
011000000000001001000010000000101010110011000000000000
000000000000000011100110011111100000000011000000000000
001000000000000000100010001011000000000000000000000000
000000000000000000000000010101000000000011100000000000
001000000000000000000010000001001011000001110000100000
000000000000000001100110000000000000000000000110000000
001000000000000000000000001001000000000010000100000000
000010100000000000000000000101000000000001000100000000
001000000000000000000000000001100000000011000100000000
110000000000000001100000001000000000000000000100000000
001000000000000000000000001001000000000010000100000010
.ramt_tile 10 12
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
.logic_tile 11 12
000000000000000000000000000011100000000000001000000000
000000000000000000000010010000100000000000000000001000
101000000000001111000110000101100001000000001000000000
100000000000000001000000000000101000000000000000000000
010000000000000000000000000101101001001100111000000000
010000000000000000000000000000101010110011000000000000
000000000010001111000110010000001000111100000000000000
001000000000001011000010000000000000111100000000000000
000000000000000000000000010011100001000001000000100000
001000000000000000000010001111101011000000100000000000
000000000000000000000110100000000000000000000000000000
001000000010000000000000000000000000000000000000000000
000000000000000000000110101101100000000011110100000000
000000000000000000000000000001001101000010110000000000
110000000000000000000110101111100001000000010100000000
000000000000000000000000000101101001000010000000000000
.logic_tile 12 12
000010100000000001100000010001111010001100110000000000
000001000000000000000010100000110000110011000000000000
101001000000000000000110000111101011001100110000000000
100000100000000000000000000000011011110011000000000000
110000000000001000000110101000000000000010000000000000
010000000000000001000000000011000000000000000000000000
000000100000001011100000000001000000000010000000000000
001000000000000101100011100101101000000000000000000000
000000000000000000000000010000000000000000000000000000
001000000000000000000011000000000000000000000000000000
000000000000001000000000001101100000000011110100000000
001000000000000111000000000101001000000010110000000000
000000000000000000000000000000000000000000000000000000
001000000000000000000000000000000000000000000000000000
110000000000000001100000001101100000000011110100000000
000000000000000000000000000101001010000010110000000000
.io_tile 13 12
000000000000000010
000000000000000000
000000000000000000
000000000000000001
000000000000100010
000000000000010000
000100000000000000
000000000000000000
000001010000000000
000100000000000000
000010000000100010
000010010000110000
000000000000000000
000000000000000001
000000000000000010
000000000000000000
.io_tile 0 13
000010000000000010
000101010000000000
000000000000000000
000000000000000001
000000000000000010
000000000000010000
000100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
.logic_tile 1 13
000100000000001111100000000101000000000000001000000000
000100000000001011000000000000100000000000000000001000
000000000000001000000000000000000000000000001000000000
000000000000000111000000000000001000000000000000000000
000000000000000000000000010000000000000000001000000000
000000000000000000000011010000001000000000000000000000
000000000000000000000111100000000001000000001000000000
000000000000000000000100000000001100000000000000000000
000001000000000000000000000000000001000000001000000000
000010100000000000000000000000001000000000000000000000
000000000000000001000010000000000001000000001000000000
000000000000000000100000000000001101000000000000000000
000000000000000000000000000000000001000000001000000000
000000000000000000000000000000001011000000000000000000
000000000000000000000000000000001000111100000010000000
000000000000000000000000000000000000111100000000000000
.logic_tile 2 13
010000000000000000000111110000000000000010000001000000
000000000000000000000110001001000000000000000001000000
101000000000000101000000001000000000000010000010000000
100000000000000000000000000001000000000000000000000000
110000000000000000000000010101101000001100110000000000
110001001010001001000010000000110000110011000000000000
000000000000000011000110010000000000000010000010000000
001000000000000000100010000101000000000000000000000000
000000000000000000000000001101000000000011000000000001
000000000000000000000000000111100000000000000000000000
000000000000000001100000001101100000000000000000100000
000000000000000000000000001101100000000011000000000000
000000000000000000000011100000000000000000000100000000
000000000000000000000000001001000000000010001000000000
010000000000000001100000001000000000000010000100000000
110000000000000000000000000011000000000000000000000000
.ramb_tile 3 13
000000000000000000000000000000000000000000
000000010000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000001000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000001100000000000000000000000000000000000
000010000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000010000000000000000000000
.logic_tile 4 13
010000000001010000000000010101100000000000001000000000
000000000000100000000011110000000000000000000000001000
101000000100000000000000000000000001000000001000000000
100000000000000000000000000000001011000000000000000000
010000000000000000000000000000000001000000001000000000
010000000000000000000000000000001101000000000000000000
000000000000000000000000000000000000000000001000000000
001000000000000011000011010000001111000000000000000000
000000000000000011100000000000001000111100000000000000
000000000000000000000000000000000000111100000000100000
000000000000000000000000010000000000000000000000000000
000100000000000000000011110000000000000000000000000000
000000000000000000000000010000000000000000000000000000
000000000000000000000011110000000000000000000000000000
010000000010000000000000000000000000000000000110000000
000000000000000000000000000011000000000010000000000000
.logic_tile 5 13
010000000000000111000111010011001010000110100000000000
000000000000001001000010000101111100001111110000000000
101000000000000001000010011101101011000000000000000100
100000000001000000100110001001011010000000100000000000
110010000001000111000010010001100001000000010000000000
010000000000000000000010000001001101000000000000000000
000000000000001101000110000101101001000110100000000000
001000000000000001010011110001111011001111110000000000
000000000000001000000111110011101011000110100000000000
000010000000001011000111100101111100001111110000000000
000000000000000011100110110001101000000110100000000000
000000000010001001000011000001111001001111110000000000
000000000000000000000000001000000000000000000100000000
000000000000000000000000000111000000000010000010000000
010001000000000011010000001000000000000000000101000000
000000000000000000000000000011000000000010000000000000
.logic_tile 6 13
010010100000000101000110001001000001000000100000000000
000001000000000001100010110101001000000000110000000010
101000000001010101000111011001011001100000000000000000
100000000000100001100110000001111010000000000000000010
111000101111001011000111011001001100010000000000000001
010000000000100011000111010111101111110000000000000000
010000000000001001100110010011000000000000000000000000
111000000000000001000010101011001011000001000000000000
000000000000001011000111001001101010100010000000000000
000000001000101101000110001011101010000100010000000000
000000000000000000000110011111001010000010000000000000
001000000000000000000011001011011111000000000000000000
000000000000000111000010100111011011100010000000000000
000000000000001001100011110001011011000100010000000000
010000000001000011000000000000000000000000000100000000
000000000000100000000000000111000000000010000000000000
.logic_tile 7 13
010000000000001000000110001101000000000001000000000000
000000000000000101000000000101000000000000000000000100
000000000000000001000010011011111110000000000010000000
000000001010000001010010011011111001000100000000000100
000000000000001011100111001101101011000000000000000000
000000000000000101000000000001101010001000000010000101
010000001010000101000000011001100000000000000000000000
001000000000000000000010010001101110000000010000000000
010000001110000000000000000001111001110000000000000000
000000100000000000000000001101011001010000000000000000
000000001110001000000110011001111100111100000010000100
001010101000000001000010000001101010011100000000100000
010010000000001000000000001101111110000000000000000000
110001000000000001000000000001111000100000000000000000
000100000100000000000011011001101011111100010000000000
000000001110000000000010101001101000111110100000000100
.logic_tile 8 13
010000000000011011100111100011101110000010000000000000
000000000000000011000100000101111111000000000000000000
101010000000000001000010100001001011000100000000000000
100000000100000001000110000001001110000000000001000000
110000000000001111100000011001011100100010000000000000
010000000000000001000011110011111010000100010000000000
010000100000000000000110101001111001100011110000000000
001000000000000000000010101101011001010111110000000000
010000000000000000010010011011000000000000000000101100
000000000000000101000011111101100000000000100000000000
010000000000000001000110011111011100000000000000000000
111000000000001001100010000001011011000000010000000010
000000000000000011100110100101000000000001000000000000
000000000000000000100010010011000000000000000000000000
010000001110000000000000001000000000000000000100000000
000000000000001111000000000011000000000010000000000000
.logic_tile 9 13
010000000000000000000010000000000000000010000011100000
000000000110000000000000000000000000000000000001000001
101000000000000000000000000000000000000000000000000000
100010100000000000000000000000000000000000000000000000
010000000000000000000011000000000000000000000110000000
111000000000000000000100001011000000000010000000000000
000000000000000000000000000000000000000000000100000000
001000000000000000000000000011000000000010000000000001
000000000000000011100000010000000000000000000000000000
000000000000000000000011100000000000000000000000000000
000000000000000000000000000000000000000000000100000100
000000001000000000000000001001000000000010000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
010000000000000000000000000000000000000000000000000000
001000000000000000000000000000000000000000000000000000
.ramb_tile 10 13
000000001110000000000000000000000000000000
000000010000000000000000000000000000000000
000000000001010000000000000000000000000000
000010000000000000000000000000000000000000
000001000000000000000000000000000000000000
000010000000000000000000000000000000000000
000000100000000000000000000000000000000000
000001000000000000000000000000000000000000
000000000000100000000000000000000000000000
000000000001010000000000000000000000000000
000000000000100000000000000000000000000000
000000000001010000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
.logic_tile 11 13
010000000000000000000000000001100000000000001000000000
000000000000000000000010000000000000000000000000001000
101000000000001111100000000011000001000000001000000000
100000000000000111100000000000101010000000000000000000
010000000000000000000000000000001000111100000000000000
010000000000000000000000000000000000111100000000000001
000000000000000000000000000000000000000000000000000000
001000000110000011000000000000000000000000000000000000
000000000000010000000000000000000000000000000000000000
001000000000100000000011100000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000001000000000000000000110100000
000000000000000000000000000001000000000010001100000110
110000000010000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
.logic_tile 12 13
000000000000000001100000011001100000000011000000000000
000000000000000000000010001101000000000000000000000000
101000000001000001100011010001001110000100100000000000
100000000000100000000010100101101100000000000000000000
010000000000001111000110000011111000001100110000000000
111000000000000001000000000000110000110011000000000000
000000000000000000000110001001100000000011100000000000
001000000000000000000010111101101101000001110000000000
000000000000000111100011100001000000000000000000000010
001000000000000000100100000101000000000001000000000000
000000000000000000000110000000000000000000000100000010
000000000000000000000000000101000000000010000100000000
000000000001010111000000000000000000000000000100000000
000000000000100000100000000101000000000010000100100000
110000000000000000000000001001000000000001000100000000
001000000000000000000000001101100000000011000100000000
.io_tile 13 13
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
.io_tile 0 14
000001011000000010
000100000000000000
000010000000000000
000000110000000001
000000000000000010
000000000000110000
001100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000010
000000000000010000
000000000000000000
000000000000000001
000000000000000010
000000000000000000
.logic_tile 1 14
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
.logic_tile 2 14
000000000000000000000000000101000000000000001000000000
000000000000000000000000000000000000000000000000001000
000000000000000101000000000000000001000000001000000000
000000000000000000000000000000001000000000000000000000
000000000000000000000010110000001000111100000000000000
000000000000000101000010000000000000111100000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000001010001100110000100000
000000000000000000000000000000011011110011000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
.ramt_tile 3 14
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
.logic_tile 4 14
000000000000000000000000000101100000000001000000000000
000100000000000000000000000101100000000000000000000010
000000000000100000000000000000000000000000000000000000
000000000000010000000000000000000000000000000000000000
000000000000000111000000000000000000000000000000000000
000000000000000000100000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000001101000010110000000000000000000000000000
000000000000000000000000000101100000000001000000100000
000000000000000000000000000101000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000001110000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
.logic_tile 5 14
000000000000000101000011010001101011000110100000000000
000000000000001001100110001001111111001111110000000000
101000000000001011000110011101111011000100000000000000
100000000000000001000011011111011011000000000000000001
110000000000001011100110100111000001000001000000100000
010000000000000001000110100111001001000000000000000000
000000000000001001000010010011101010000000000000100000
000000000000000001100111010001111010000000100000000000
000000000000000001000000000111000001000000100010100000
000000000000000000100011100111001001000000000000000000
000000000000000000000010000001101011000010000000000000
000000000000000000000111000011001000000011000000000010
000000000000000001000000001101101000000010000000000010
000000000000000001000000000111011000000011000000000000
010000000000000001000010001000000000000000000111000000
000000000000000000000110001011000000000010000000000000
.logic_tile 6 14
000000000000000000000000010001101110000110100000100000
000000000000001001000010101001111100001111110000000000
101000000000000011000110011101101011000010000000000000
100000000000000000100011011001001111000000000000000000
010000000000000011000010011101101101100010000000000000
110000000000000000000110101111111101000100010000000000
000010100000000011000111010011101100000110100000000100
000000000000000000100011011101111100001111110000000000
000000100000000011000111110001101110000110100000000000
000000000000011011100110011001011000001111110000000010
000000000000000000000111111101111011100010000000000000
000000000000000000000110001011101001001000100000000000
000000000000000000000000011000000000000000000100000000
000000000000000000000010011001000000000010000000000000
010000000000000000000111011000000000000000000100000000
000000000000000000000110001011000000000010000000000000
.logic_tile 7 14
000000000110001011100010111111001011000100000000000000
000000000000000001100110001111001011000000000000000000
101000000000000111100000010011101010000000000000100000
100001000000001011100011011001101000000000100000000000
110000000000001111100000011111000001000000000000000101
010000000000001111100010001111001011000000100001000000
000000000000010001100010001001111010000010000000000000
000000000000001011000100001011001101000011000000000000
000000000000000011100110100011000000000001000000000000
000010100000000001100011101001000000000000000000000000
000000000000000000000010100001100000000001000000000000
000000000000000000000011001101100000000000000000000000
000000000000001000000000000101111110000010000000000000
000000000000000011000000000011001000000011000010000000
010000000010001000000110101000000000000000000100100000
000000000000000001000100000001000000000010000000000000
.logic_tile 8 14
000010000000000001100111101011111011000100000001000000
000001000000000000000110100011001101000000000000000000
000001000000001001100011000011001011100010000000000000
000010000000000001100000001001001001001000100000000000
000000000000001111100011001011111001000100000000000001
000000000010000011000100000011001101000000000000000000
000000000000001011000010101111101011000100000000000000
000000000000000011100000000111011101000000000000000000
000000000000001000000011001011011010100010000000000000
000000000000000111000000000101101011000100010000000000
000010100000001011100010001111111011000100000000100000
000000000000001011100010000111011101000000000000000000
000000000000000000000000011011101011000100000010000000
000000001000000000000010100011001101000000000000000000
000000000000001011100000000001101000100000000000000000
000000000000011011100000000001011111000000000000000000
.logic_tile 9 14
000000000000000000000110001101001001000010000000000000
000000000000000000000000000001011001000000000000000000
101010000001011101000000010000000000000000000000000000
100000000000000001000010000000000000000000000000000000
110000000000001000000010101101111000100010000000000000
010000000000001101000000001011001011000100010000000000
000000000000001000000000001000000000000000000110000000
000000000000001011000000001011000000000010000000000000
000000000000000000000000000000000000000000000100100000
000000000000000000000011100111000000000010000001000000
000000000000000000000010000000000000000000000000000000
000000000000000000000110000000000000000000000000000000
000000000000000111000000001000000000000000000100100000
000000000000000000100000001111000000000010000000000000
011000000000000000000010000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
.ramt_tile 10 14
000000000000000000010000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000001010000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000010000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000100000000000000000000000000000000000
000101000000000000000000000000000000000000
000001000000000000000000000000000000000000
000010100000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
.logic_tile 11 14
000000000000000000000000000001100000000000001000000000
000000000000000000000000000000100000000000000000001000
101000000000001000000110000101100000000000001000000000
100000000000001111000100000000001100000000000000000000
010000000000000000000010000000001000111100000000000000
110000000000000000000100000000000000111100000000000000
000000000000000001100000000000000000000000000000000000
000000000000000000100000000000000000000000000000000000
000000000000000111000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000001000000000000000000101000000
000000000000000000000000000001000000000010000001000000
010000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
.logic_tile 12 14
000000000000000000000000010000000000000000000000000000
000000000000000000000010100000000000000000000000000000
000000000000000001110000010000000000000000000000000000
000000000000000000000010000000000000000000000000000000
000000000000000011100000001001100000000001000000100000
000000000000000000000000001001000000000011000000000000
000000000000000000000010100000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000011000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000111000101001001001100110000000000
000000000000000000000100000000011101110011000000000000
000000000000000000000000001011000000000010000000000000
000000000000000000000000001101001010000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
.io_tile 13 14
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
.io_tile 0 15
000000000001000000
000000000000000000
000000000000010000
000000000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
.logic_tile 1 15
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
.logic_tile 2 15
000000000000001000000000000000000000000000000000000000
000000000000001111000000000000000000000000000000000000
101000000000000000000000001000000000000000000100000000
100000000000000000000000000101000000000010000010100000
010000000000000000000111100000000000000000000000000000
110000000000000000000100000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000001000000000000000000000000000000000000
000000000000000000000000000000000000000000000100000000
000000000000000000000000000001000000000010000010000000
000000001010000001000000001000000000000000000100100000
000000000000000000000000000011000000000010000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
010000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
.ramb_tile 3 15
000000000000000000000000000000000000000000
000000010000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
.logic_tile 4 15
000000000000000000000000000001100000000001000000000000
000000001110000000000000001011100000000000000000000010
101000000000001000000110000101111011100010000000000000
100000000000000001000010011011011010000100010001000000
010000000000000000000110101101111001000010000001000000
110000000000000000000100001001111000000000000000000000
000000000000001001000110010011011101100010000001000000
000000000000000001000010000111011101000100010000000000
000000000000000000000111101000000000000000000100000000
000000000000001111000011100101000000000010000000000000
000000000000000000000110110000000000000000000000000000
000000000000000000000010000000000000000000000000000000
000000000110000000000000001000000000000000000100000000
000000000000000001000000001111000000000010000000000000
011000000000000000000010000000000000000000000100000000
000000000000000000000000001011000000000010000000000000
.logic_tile 5 15
000000000000000111000111010011111001000010000010000000
000000000000001001100111111011111110000000000000000000
101000000000000111100111011001111000000110100000000000
100000000000000101100110000001101011001111110000000000
010000000000000011100000000101011100100010000000000000
010000000000000001010011010111011101000100010010000000
000000000000100000000110001101111000000110100000000000
000000000000000000000000000001101111001111110000000010
000000000001000000000000011001011001100010000000100000
000000000000100000000011101011111110000100010000000000
000000000001000000000111111001101010000010000000000010
000010100000100000000011111001001000000011000000000000
000000000000000011000000010000000000000000000100000000
000000000000000000000011100001000000000010000001000000
010000000000000111100000000000000000000000000100000000
000000000000000000100000000101000000000010000000000100
.logic_tile 6 15
000000000000000001100111010101000000000001000000000000
000000000000000000000011011101000000000000000000000010
101001000000000001000010010101101011100010000000000000
100000000000000000000010001111101100000100010000000000
110010100000000111100110000001111001100011110000000000
110000000000001011000011011011011001010111110000000000
000010000000000101000011100111001011000010000000000000
000001000000000000100100000011001100000000000000000000
010000100000010001000000000001111001100011110001000000
000001000000100000100011111011011010010111110000000000
000000000000000101000000010011101110100010000000000000
000000001100000000000011010111101100001000100000000000
010000000000000101000011111001001010100000000000000000
110000101100001001000111000111011001000000000000000000
010000000000000001100000000000000000000000000100000010
000000000001010000000000001001000000000010000000000000
.logic_tile 7 15
000000000000001011100010001101101011000000000001000010
000000000000001011000000001001011010000100000000000000
000000000000000001000110011011001010000000000000000001
000000000000000001000011001101111110000100000000000010
000010100000001011100110111011011000000000000000000000
000000000000001011000110100001011000000000010000000000
010000000000001001100111010101111110000110100000000000
000000000000001011000111001011101001001111110000000000
010001000000001001000110111011011110000000000010000000
000000100000001111000111010001011000000000010000000000
000000000000000111000000001111101010000000000000000000
000000000000001101100000000001101010000000010000000000
000000000000000000000000000111100000000000000000000000
000000000000001111000000000101000000000001000000000000
001000000000000011100111110011101101010000000000000000
000000000000001101100010000001001100000000000000000000
.logic_tile 8 15
000000000000000011100110010001001101100000000000000000
000000000000000001100010100101101011000000000000000000
101000000000000011100110001011111101100010000000000000
100000000000010001100010001011011011001000100000000000
110000000000001001100111100001111100000000000000000000
010000001110000001000100001101001001000100000000000010
010001000000000000000011000011001111100010000000000000
000000000100000000000110111011001001000100010000000000
000000000000000111100011110111101111000010000000000000
000000000000000011100010000001111111000000000001000000
010100001000101001100010010001111000100011110000000000
110000000000001111000110000001011010010111110000000000
000000000000000011000000011000000000000000000100000000
000000000000000011000011100011000000000010000000000100
010000000000000000000110010000000000000000000100000000
000000000000000000000010000111000000000010000000000000
.logic_tile 9 15
000000000000000011100010000101000000000000001000000000
000000000000000000000010000000000000000000000000001000
000000000011001000000000000001100000000000001000000000
000000000000101011000000000000000000000000000000000000
001000000000000000000010000001000000000000001000000000
000000000000000001000010000000000000000000000000000000
000000000000000000000000000101000000000000001000000000
000000000000000000000000000000100000000000000000000000
000000000000000001000000000001000000000000001000000000
000000000000000000000000000000100000000000000000000000
000000000000000000000000000011100000000000001000000000
000000000000000000000010010000101100000000000000000000
000000000000000000000000000101000000000000001000000000
000000000000000000000000000000100000000000000000000000
000001000010000000000000000001000000000000001000000000
000010000000000000000000000000100000000000000000000000
.ramb_tile 10 15
000000000000000000000000000000000000000000
000000010000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000001000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000010000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
.logic_tile 11 15
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
.logic_tile 12 15
000000000000000000000000000000000000000000000000000000
000000000000000000010000000000000000000000000000000000
101000000000000000000000000000000000000000000000000000
100000000000000000000000000000000000000000000000000000
110000000000000000000000000000000000000000000000000000
100000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000010000000000000000000000000000
000000000000000000000010110000000000000000000000000000
010000000000000000000000000000000000000000000100000010
100000000000000000000000001111000000000010000000000000
.io_tile 13 15
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000001000000
000000000000000000
000000000000000000
.io_tile 0 16
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
.logic_tile 1 16
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
.logic_tile 2 16
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
.ramt_tile 3 16
000001000000000000000000000000000000000000
000000100000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
.logic_tile 4 16
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
.logic_tile 5 16
000000000000000000000000001011111011100010000000000000
000000000000100000000000001011001001000100010000000000
101000000000000001100110011011011011100010000000000000
100000000000000000000010001111011000000100010000000000
010000000000000000000111101001111011000010000000000000
110000000000000000000100000101101001000000000000000000
000000000000001001100110001000000000000000000100000001
000000000000000001000000001011000000000010000000000001
000000000000000000000000001000000000000000000100000100
000000000000001111000000001011000000000010000000000000
000000000000000111000010000000000000000000000100000000
000000000000000000000010010111000000000010000001000000
000000000000000000000000001000000000000000000100000000
000000000000001111000000000111000000000010000000100000
010000000000000111000000011000000000000000000100000000
000000000000000000000010111111000000000010000000100000
.logic_tile 6 16
000000000000001000000110101011101001000010000000000000
000000001110000001000000001001111011000000000000000000
101000000000000001000111011000000000000010000000000000
100000000000000000000110000001000000000000000000000000
110000000000001101100110011011011101100010000000000000
110000000000000101000010100101111001001000100000000000
000000000000000001000010101011011111100010000000000000
000000000000000000100000001001111100000100010000000000
010000000000000000000111000101000000000001000000000000
110001000010000000000011100001100000000000000000000000
000000000000000011000110000101001010100000000000000000
000000000000000000000000001111101010000000000000000000
000000000000000000000111111000000000000000000100000010
000000000000000000000010000101000000000010000000000000
010000000000000000010111000000000000000000000100000000
000000000000000000000100001011000000000010000001000000
.logic_tile 7 16
000000000000000000000111100000000000000000000000000000
000000000000000000000100000000000000000000000000000000
101000000000000000000000000000000000000000000100100000
100000000000000000000000001001000000000010000000000000
010000000000000000000011101000000000000000000100000000
110000000000000000000000000111000000000010000010100000
000000000000000000010000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000010001000000000000000000100000100
000000000000000000000000001011000000000010000000000000
000000100000010000000000000000000000000000000000000000
000000000000100000000000000000000000000000000000000000
010000000000000011100000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
.logic_tile 8 16
000000000000000000000000000000000000000000000000000000
000000000000000001000010100000000000000000000000000000
101000000000000000010000000000000000000000000101000000
100000000000000000000000000011000000000010000000000000
010000000000000000000000000000000000000000000000000000
010000000000000000000000000000000000000000000000000000
000000000000000000000000001000000000000000000100000110
000000000000000000000000001111000000000010000000000000
000000000000000111000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000001000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000100000010
000000000000000000000000000001000000000010000000000010
010000000000000000000000010000000000000000000000000000
000000000000010000000011000000000000000000000000000000
.logic_tile 9 16
000000000000000000000000000000001000111100000000000000
000000000000000000000000000000000000111100000000110000
101000000000001000000000000000000000000000000000000000
100000000000000111000000000000000000000000000000000000
110000000000000000000000000000000000000000000000000000
100000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000001000000000000000000110000000
000000000000000000000000000001000000000010000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
010000000000000000000000000000000000000000000000000000
100000000000000000000000000000000000000000000000000000
.ramt_tile 10 16
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000100000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000001100000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000001000000000000000000000000000000000000
000000100000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
000000000000000000000000000000000000000000
.logic_tile 11 16
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000001000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
.logic_tile 12 16
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
101000000100000000000000000000000000000000000000000000
100000000000000000000000000000000000000000000000000000
110000000000000000000000000000000000000000000000000000
100000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000000000000000000000000000000000
000000000000000000000000011000000000000000000110000000
000000000000000000000010111111000000000010000000000000
010000000000000000000110100000000000000000000100000000
100000000000000000000100001111000000000010000000000000
.io_tile 13 16
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
.io_tile 1 17
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
.io_tile 2 17
000000000000001000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
.io_tile 3 17
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
.io_tile 4 17
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
.io_tile 5 17
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
.io_tile 6 17
000000011000000000
000000001000000000
000000000000000000
000000000000000000
000000000000000100
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
.io_tile 7 17
000000110000000000
000000001000000000
000000000000000000
000000000000000000
000000000000000100
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
.io_tile 8 17
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
000000000000000000
.io_tile 9 17
000000000000000010
000100000000000000
000000000000000000
000011110000000001
000000000001000001
000000000001000000
001100000000000000
000000000000000000
000010000000000000
000111010000000000
000000000000000010
000000000011000000
000000000000000000
000000000000000001
000000000000000001
000000000000000000
.io_tile 10 17
000001111000000010
000100001000000000
000000000000000000
000000000000000001
000010000000000001
000010110001000000
001100000000000000
000000000000000000
000000000000000000
000100000000000000
000000000010000010
000000000001000000
000000000000000000
000000000001110001
000000000000000001
000000000000000000
.io_tile 11 17
000000000000000010
000100000000000000
000000000000000000
000000000000000001
000001111010000001
000000000001000000
001100000000000000
000000000000000000
000000110000000000
000100000000000000
000000000001000010
000000000001000000
000000000000000000
000000000000000001
000000000000000001
000000000000000000
.io_tile 12 17
000000000000000010
000100000000000000
000000000000000000
000000110000000001
000000000010000001
000000000011000000
001100011000000000
000000001000000000
000000000000000000
000100000000000000
000000000000000010
000000000011000000
000000000000000000
000000000000000001
000000000000000001
000000000000000000
.ram_data 3 5
000000040000000a00000003000000020000003f000100000000001e00000000
000000000000000000010000000100010004009f000000060000000500000003
0000001500e7002900e0001900070005000100a1000600090001000500000000
0005009500010081000800750001009500020081000800950001007500010025
0003009100030075000100950002009100050029000100190008000500010075
0000008100650029000000190007000500650025000000150008007500060095
00000000000000000000000000000000000000000000000000000000000000c0
0000000000000000000000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000000000000000000000
.ram_data 10 3
0000000000000000000000000000000000000000000000000000000000005555
0000000000000000000000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000000000000000000000
.ram_data 10 7
000000010001000100e70058004c0053000100010001000100e0003900e10029
0001000100010001002c002a0019003b000100010001000100e200150006003a
0001000100010001002c002a0019003b000100010001000100e200150006003a
0001000100010001002c002a0019003b000100010001000100e200150006003a
0001000100010001002c002a0019003b000100010001000100e200150006003a
0001000100010001002c002a0019003b000100010001000100e200150006003a
0001000100010001002c002a0019003b000100010001000100e200150006003a
0001000100010001002c002a0019003b000100010001000100e200150006003a
0001000100010001002c002a0019003b000100010001000100e200150006003a
0001000100010001002c002a0019003b000100010001000100e200150006003a
0000000000000000000000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000000000000000000000
0000000000000000000000000000000000000000000000000000000000000000
.sym 1 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 2 $auto$dff2dffe.cc:175:make_patterns_logic$51864$2
.sym 3 $auto$wreduce.cc:310:run$36598[3]$2
.sym 4 CLK$2$2
.sym 5 $logic_not$top.v:60$10_Y$2
.sym 6 RESET$2
.sym 7 $auto$rtlil.cc:1692:NotGate$61364$2
.sym 8 $auto$dff2dffe.cc:175:make_patterns_logic$59992$2
.sym 47 KEYBOARD.row_time[0]
.sym 182 $auto$alumacc.cc:483:replace_alu$36708[6]
.sym 184 uart_double_ff
.sym 298 $auto$alumacc.cc:484:replace_alu$36709[7]
.sym 521 $auto$alumacc.cc:484:replace_alu$36726[6]
.sym 523 I2C_OUT_DESC_MASK[6]
.sym 524 I2C_OUT_DESC_MASK[3]
.sym 526 I2C_OUT_DESC_MASK[1]
.sym 634 $techmap\I2C.$sub$i2c_slave.v:143$204_Y[0]
.sym 637 $abc$61381$n517
.sym 638 $abc$61381$n500_1
.sym 639 I2C_OUT_DESC_MASK[5]
.sym 746 $abc$61381$n518
.sym 749 $abc$61381$n508
.sym 751 $abc$61381$n502
.sym 752 I2C.received_byte[1]
.sym 830 $auto$rtlil.cc:1692:NotGate$61364
.sym 836 CLK$2
.sym 861 $auto$dff2dffe.cc:175:make_patterns_logic$52858
.sym 863 $abc$61381$n647_1
.sym 864 $techmap\I2C.$sub$i2c_slave.v:143$204_Y[4]
.sym 865 $abc$61381$n501_1
.sym 866 KEYBOARD.row_time[15]
.sym 944 CLK$2
.sym 980 $auto$dff2dffe.cc:175:make_patterns_logic$52992
.sym 981 I2C.received_byte[3]
.sym 1088 $auto$alumacc.cc:483:replace_alu$36649[3]
.sym 1089 $auto$alumacc.cc:483:replace_alu$36649[1]
.sym 1091 $auto$alumacc.cc:483:replace_alu$36649[6]
.sym 1092 kbd_report[3][1]
.sym 1093 kbd_report[3][3]
.sym 1209 $auto$alumacc.cc:484:replace_alu$36685[7]
.sym 1289 UART.tx_line
.sym 1323 $auto$alumacc.cc:484:replace_alu$36650[7]
.sym 1403 I2C.is_read
.sym 1517 KBD_FREEZE
.sym 1522 INT
.sym 1851 $false
.sym 1853 KEYBOARD.ROWS_EN[13]
.sym 1856 $false
.sym 1858 KEYBOARD.ROWS_EN[14]
.sym 1880 $add$top.v:60$11_Y[1]
.sym 1881 $add$top.v:60$11_Y[2]
.sym 1882 $auto$alumacc.cc:484:replace_alu$36700[2]
.sym 1883 RESET
.sym 1884 rststate[2]
.sym 1885 rststate[1]
.sym 2058 $add$top.v:60$11_Y[3]
.sym 2063 rststate[3]
.sym 2178 $false
.sym 2179 $true$2
.sym 2180 KEYBOARD.row_time[0]
.sym 2181 $false
.sym 2217 RESET$2
.sym 2218 CLK$2$2
.sym 2219 $auto$rtlil.cc:1692:NotGate$61364$2
.sym 2222 $auto$wreduce.cc:310:run$36586[2]
.sym 2223 $auto$wreduce.cc:310:run$36586[3]
.sym 2224 $auto$wreduce.cc:310:run$36586[4]
.sym 2225 $auto$wreduce.cc:310:run$36586[5]
.sym 2226 $auto$wreduce.cc:310:run$36586[6]
.sym 2227 $auto$alumacc.cc:484:replace_alu$36714[6]
.sym 2331 $auto$alumacc.cc:483:replace_alu$36713[6]
.sym 2332 $false
.sym 2333 $false
.sym 2334 $false
.sym 2341 $0\uart_double_ff[0:0]
.sym 2342 $false
.sym 2343 $false
.sym 2344 $false
.sym 2345 $auto$dff2dffe.cc:175:make_patterns_logic$52724
.sym 2346 CLK$2$2
.sym 2347 $false
.sym 2348 $auto$alumacc.cc:483:replace_alu$36708[1]
.sym 2349 $auto$alumacc.cc:483:replace_alu$36708[2]
.sym 2350 $auto$alumacc.cc:483:replace_alu$36708[5]
.sym 2351 $abc$61381$n911
.sym 2352 I2C.byte_counter[6]
.sym 2353 I2C.byte_counter[3]
.sym 2354 I2C.byte_counter[4]
.sym 2355 I2C.byte_counter[2]
.sym 2396 $true
.sym 2433 $auto$alumacc.cc:483:replace_alu$36708[1]$2
.sym 2434 $false
.sym 2435 $auto$alumacc.cc:483:replace_alu$36708[1]
.sym 2436 $false
.sym 2437 $false
.sym 2438 $auto$alumacc.cc:484:replace_alu$36709[2]
.sym 2440 $false
.sym 2441 $auto$alumacc.cc:483:replace_alu$36708[2]
.sym 2443 $auto$alumacc.cc:484:replace_alu$36709[3]
.sym 2445 $false
.sym 2446 $auto$alumacc.cc:483:replace_alu$36708[3]
.sym 2448 $auto$alumacc.cc:484:replace_alu$36709[4]
.sym 2450 $false
.sym 2451 $auto$alumacc.cc:483:replace_alu$36708[4]
.sym 2453 $auto$alumacc.cc:484:replace_alu$36709[5]
.sym 2455 $false
.sym 2456 $auto$alumacc.cc:483:replace_alu$36708[5]
.sym 2458 $auto$alumacc.cc:484:replace_alu$36709[6]
.sym 2460 $false
.sym 2461 $auto$alumacc.cc:483:replace_alu$36708[6]
.sym 2463 $auto$alumacc.cc:484:replace_alu$36709[7]$2
.sym 2465 $false
.sym 2466 $auto$alumacc.cc:483:replace_alu$36708[7]
.sym 2472 $auto$alumacc.cc:484:replace_alu$36709[7]$2
.sym 2476 $techmap\I2C_HID_DESC.$add$descriptors.v:36$527_Y[0]
.sym 2477 $techmap\I2C_HID_DESC.$add$descriptors.v:36$527_Y[7]
.sym 2478 $auto$wreduce.cc:310:run$36592[0]
.sym 2479 I2C_HID_DESC.real_adress[4]
.sym 2480 I2C_HID_DESC.real_adress[7]
.sym 2481 I2C_HID_DESC.real_adress[0]
.sym 2483 I2C_HID_DESC.real_adress[3]
.sym 2604 $abc$61381$n867
.sym 2605 $abc$61381$n877
.sym 2608 $abc$61381$n513
.sym 2609 $abc$61381$n504
.sym 2611 KEYBOARD.row_time[1]
.sym 2652 $true
.sym 2689 I2C.byte_counter[5]$2
.sym 2690 $false
.sym 2691 I2C.byte_counter[5]
.sym 2692 $false
.sym 2693 $false
.sym 2694 $auto$alumacc.cc:484:replace_alu$36726[6]$2
.sym 2696 $false
.sym 2697 I2C.byte_counter[6]
.sym 2703 $auto$alumacc.cc:484:replace_alu$36726[6]$2
.sym 2710 $2\I2C_OUT_DESC_MASK[7:0][7]
.sym 2711 $false
.sym 2712 $false
.sym 2713 $false
.sym 2715 $2\I2C_OUT_DESC_MASK[7:0][7]
.sym 2716 $false
.sym 2717 $false
.sym 2718 $false
.sym 2725 $2\I2C_OUT_DESC_MASK[7:0][7]
.sym 2726 $false
.sym 2727 $false
.sym 2728 $false
.sym 2729 $auto$dff2dffe.cc:175:make_patterns_logic$51864$2
.sym 2730 CLK$2$2
.sym 2731 $logic_not$top.v:60$10_Y$2
.sym 2732 $abc$61381$n509
.sym 2733 $abc$61381$n527
.sym 2734 $abc$61381$n552
.sym 2735 $abc$61381$n551
.sym 2736 $abc$61381$n875
.sym 2737 $auto$rtlil.cc:1692:NotGate$61364
.sym 2738 I2C_HID_DESC.real_adress[6]
.sym 2739 I2C_HID_DESC.real_adress[1]
.sym 2823 $false
.sym 2824 $auto$alumacc.cc:470:replace_alu$36715.A_buf[0]
.sym 2825 $false
.sym 2826 $true$2
.sym 2838 $abc$61381$n501_1
.sym 2839 $abc$61381$n518
.sym 2840 $false
.sym 2841 $false
.sym 2843 $abc$61381$n501_1
.sym 2844 $abc$61381$n502
.sym 2845 KEYBOARD.row_time[8]
.sym 2846 KEYBOARD.row_time[9]
.sym 2848 $2\I2C_OUT_DESC_MASK[7:0][7]
.sym 2849 $false
.sym 2850 $false
.sym 2851 $false
.sym 2857 $auto$dff2dffe.cc:175:make_patterns_logic$51864$2
.sym 2858 CLK$2$2
.sym 2859 $logic_not$top.v:60$10_Y$2
.sym 2862 KEYBOARD.row_time[2]
.sym 2863 KEYBOARD.row_time[3]
.sym 2864 KEYBOARD.row_time[4]
.sym 2865 KEYBOARD.row_time[5]
.sym 2866 KEYBOARD.row_time[6]
.sym 2867 KEYBOARD.row_time[7]
.sym 2946 KEYBOARD.row_time[8]
.sym 2947 KEYBOARD.row_time[9]
.sym 2948 KEYBOARD.row_time[10]
.sym 2949 KEYBOARD.row_time[11]
.sym 2961 KEYBOARD.row_time[8]
.sym 2962 KEYBOARD.row_time[9]
.sym 2963 KEYBOARD.row_time[10]
.sym 2964 KEYBOARD.row_time[11]
.sym 2971 KEYBOARD.row_time[10]
.sym 2972 KEYBOARD.row_time[11]
.sym 2973 $false
.sym 2974 $false
.sym 2976 I2C.FLT_SDA.out
.sym 2977 $false
.sym 2978 $false
.sym 2979 $false
.sym 2985 $auto$dff2dffe.cc:175:make_patterns_logic$52858
.sym 2986 CLK$2$2
.sym 2987 $false
.sym 2988 KEYBOARD.row_time[8]
.sym 2989 KEYBOARD.row_time[9]
.sym 2990 KEYBOARD.row_time[10]
.sym 2991 KEYBOARD.row_time[11]
.sym 2992 KEYBOARD.row_time[12]
.sym 2993 KEYBOARD.row_time[13]
.sym 2994 KEYBOARD.row_time[14]
.sym 2995 $auto$alumacc.cc:484:replace_alu$36753[14]
.sym 3079 $abc$61381$n641
.sym 3080 $abc$61381$n648
.sym 3081 $techmap\I2C.$sub$i2c_slave.v:143$204_Y[0]
.sym 3082 $false
.sym 3089 $techmap\I2C.$sub$i2c_slave.v:143$204_Y[3]
.sym 3090 $techmap\I2C.$sub$i2c_slave.v:143$204_Y[4]
.sym 3091 $auto$simplemap.cc:309:simplemap_lut$46032[1]
.sym 3092 $false
.sym 3094 $false
.sym 3095 $false
.sym 3096 $true$2
.sym 3097 $auto$simplemap.cc:309:simplemap_lut$46032[1]
.sym 3099 KEYBOARD.row_time[12]
.sym 3100 KEYBOARD.row_time[14]
.sym 3101 KEYBOARD.row_time[15]
.sym 3102 KEYBOARD.row_time[13]
.sym 3104 $false
.sym 3105 $false
.sym 3106 KEYBOARD.row_time[15]
.sym 3107 $auto$alumacc.cc:484:replace_alu$36753[14]
.sym 3113 RESET$2
.sym 3114 CLK$2$2
.sym 3115 $auto$rtlil.cc:1692:NotGate$61364$2
.sym 3116 $abc$61381$n827_1
.sym 3117 $abc$61381$n974
.sym 3118 I2C.received_byte[6]
.sym 3232 $abc$61381$n641
.sym 3233 $abc$61381$n648
.sym 3234 $techmap\I2C.$sub$i2c_slave.v:143$204_Y[0]
.sym 3235 $false
.sym 3237 I2C.FLT_SDA.out
.sym 3238 $false
.sym 3239 $false
.sym 3240 $false
.sym 3241 $auto$dff2dffe.cc:175:make_patterns_logic$52992
.sym 3242 CLK$2$2
.sym 3243 $false
.sym 3244 $abc$61381$n976
.sym 3247 $auto$dff2dffe.cc:175:make_patterns_logic$53059
.sym 3249 $abc$61381$n984
.sym 3250 KEYBOARD.report[0][2]
.sym 3251 KEYBOARD.report[0][6]
.sym 3330 I2C.received_byte[3]
.sym 3331 $false
.sym 3332 $false
.sym 3333 $false
.sym 3335 I2C.received_byte[1]
.sym 3336 $false
.sym 3337 $false
.sym 3338 $false
.sym 3345 I2C.received_byte[6]
.sym 3346 $false
.sym 3347 $false
.sym 3348 $false
.sym 3350 KEYBOARD.kbd_code_hid[1]
.sym 3351 $false
.sym 3352 $false
.sym 3353 $false
.sym 3355 KEYBOARD.kbd_code_hid[3]
.sym 3356 $false
.sym 3357 $false
.sym 3358 $false
.sym 3369 $auto$dff2dffe.cc:175:make_patterns_logic$57638
.sym 3370 CLK$2$2
.sym 3371 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 3374 $auto$alumacc.cc:470:replace_alu$36760.B_buf[2]
.sym 3375 $auto$alumacc.cc:484:replace_alu$36759[2]
.sym 3376 $abc$61381$n665
.sym 3377 $auto$alumacc.cc:470:replace_alu$36760.B_buf[3]
.sym 3378 UART.tx_bit_counter[3]
.sym 3379 UART.tx_bit_counter[2]
.sym 3420 $true
.sym 3457 $auto$alumacc.cc:483:replace_alu$36649[1]$3
.sym 3458 $false
.sym 3459 $auto$alumacc.cc:483:replace_alu$36649[1]
.sym 3460 $false
.sym 3461 $false
.sym 3462 $auto$alumacc.cc:484:replace_alu$36685[2]
.sym 3464 $true$2
.sym 3465 $auto$alumacc.cc:483:replace_alu$36649[2]
.sym 3467 $auto$alumacc.cc:484:replace_alu$36685[3]
.sym 3469 $false
.sym 3470 $auto$alumacc.cc:483:replace_alu$36649[3]
.sym 3472 $auto$alumacc.cc:484:replace_alu$36685[4]
.sym 3474 $false
.sym 3475 $auto$alumacc.cc:483:replace_alu$36649[4]
.sym 3477 $auto$alumacc.cc:484:replace_alu$36685[5]
.sym 3479 $false
.sym 3480 $auto$alumacc.cc:483:replace_alu$36649[5]
.sym 3482 $auto$alumacc.cc:484:replace_alu$36685[6]
.sym 3484 $false
.sym 3485 $auto$alumacc.cc:483:replace_alu$36649[6]
.sym 3487 $auto$alumacc.cc:484:replace_alu$36685[7]$2
.sym 3489 $false
.sym 3490 $auto$alumacc.cc:483:replace_alu$36649[7]
.sym 3496 $auto$alumacc.cc:484:replace_alu$36685[7]$2
.sym 3500 $techmap$auto$alumacc.cc:470:replace_alu$36760.$not$/usr/bin/../share/yosys/ice40/arith_map.v:42$37927_Y[0]
.sym 3501 $techmap$auto$alumacc.cc:470:replace_alu$36760.$not$/usr/bin/../share/yosys/ice40/arith_map.v:42$37927_Y[3]
.sym 3502 $auto$alumacc.cc:470:replace_alu$36760.B_buf[0]
.sym 3503 $techmap$auto$alumacc.cc:470:replace_alu$36760.$not$/usr/bin/../share/yosys/ice40/arith_map.v:42$37927_Y[2]
.sym 3504 $abc$61381$n959
.sym 3505 $techmap$auto$alumacc.cc:470:replace_alu$36760.$not$/usr/bin/../share/yosys/ice40/arith_map.v:42$37927_Y[1]
.sym 3506 UART.tx_bit_counter[0]
.sym 3507 UART.tx_bit_counter[1]
.sym 3548 $true
.sym 3585 $auto$alumacc.cc:483:replace_alu$36649[1]$2
.sym 3586 $false
.sym 3587 $auto$alumacc.cc:483:replace_alu$36649[1]
.sym 3588 $false
.sym 3589 $false
.sym 3590 $auto$alumacc.cc:484:replace_alu$36650[2]
.sym 3592 $false
.sym 3593 $auto$alumacc.cc:483:replace_alu$36649[2]
.sym 3595 $auto$alumacc.cc:484:replace_alu$36650[3]
.sym 3597 $false
.sym 3598 $auto$alumacc.cc:483:replace_alu$36649[3]
.sym 3600 $auto$alumacc.cc:484:replace_alu$36650[4]
.sym 3602 $false
.sym 3603 $auto$alumacc.cc:483:replace_alu$36649[4]
.sym 3605 $auto$alumacc.cc:484:replace_alu$36650[5]
.sym 3607 $false
.sym 3608 $auto$alumacc.cc:483:replace_alu$36649[5]
.sym 3610 $auto$alumacc.cc:484:replace_alu$36650[6]
.sym 3612 $false
.sym 3613 $auto$alumacc.cc:483:replace_alu$36649[6]
.sym 3615 $auto$alumacc.cc:484:replace_alu$36650[7]$2
.sym 3617 $false
.sym 3618 $auto$alumacc.cc:483:replace_alu$36649[7]
.sym 3624 $auto$alumacc.cc:484:replace_alu$36650[7]$2
.sym 3630 $auto$alumacc.cc:470:replace_alu$36760.C[2]
.sym 3634 $auto$wreduce.cc:310:run$36605[2]
.sym 3757 kbd_report[6][1]
.sym 3760 kbd_report[6][2]
.sym 3761 kbd_report[6][0]
.sym 4100 $false
.sym 4102 KEYBOARD.ROWS_EN[15]
.sym 4162 $false
.sym 4199 $auto$alumacc.cc:484:replace_alu$36700[0]
.sym 4201 $logic_not$top.v:60$10_Y$2
.sym 4202 rststate[0]
.sym 4204 $auto$alumacc.cc:484:replace_alu$36700[1]
.sym 4205 $false
.sym 4206 $false
.sym 4207 rststate[1]
.sym 4208 $auto$alumacc.cc:484:replace_alu$36700[0]
.sym 4209 $auto$alumacc.cc:484:replace_alu$36700[2]$2
.sym 4210 $false
.sym 4211 $false
.sym 4212 rststate[2]
.sym 4213 $auto$alumacc.cc:484:replace_alu$36700[1]
.sym 4218 $auto$alumacc.cc:484:replace_alu$36700[2]$2
.sym 4220 rststate[3]
.sym 4221 rststate[2]
.sym 4222 rststate[1]
.sym 4223 rststate[0]
.sym 4225 $abc$61381$n836
.sym 4226 $add$top.v:60$11_Y[2]
.sym 4227 $false
.sym 4228 $false
.sym 4230 $abc$61381$n836
.sym 4231 $add$top.v:60$11_Y[1]
.sym 4232 $false
.sym 4233 $false
.sym 4239 $true
.sym 4240 CLK$2$2
.sym 4241 $false
.sym 4366 $false
.sym 4367 $false
.sym 4368 rststate[3]
.sym 4369 $auto$alumacc.cc:484:replace_alu$36700[2]
.sym 4391 $abc$61381$n836
.sym 4392 $add$top.v:60$11_Y[3]
.sym 4393 $false
.sym 4394 $false
.sym 4395 $true
.sym 4396 CLK$2$2
.sym 4397 $false
.sym 4434 $true
.sym 4471 $auto$alumacc.cc:484:replace_alu$36714[0]$2
.sym 4472 $false
.sym 4473 $auto$alumacc.cc:484:replace_alu$36714[0]
.sym 4474 $false
.sym 4475 $false
.sym 4476 $auto$alumacc.cc:484:replace_alu$36714[1]
.sym 4478 $false
.sym 4479 $auto$alumacc.cc:483:replace_alu$36713[1]
.sym 4481 $auto$alumacc.cc:484:replace_alu$36714[2]
.sym 4482 $false
.sym 4483 $false
.sym 4484 $auto$alumacc.cc:483:replace_alu$36713[2]
.sym 4485 $auto$alumacc.cc:484:replace_alu$36714[1]
.sym 4486 $auto$alumacc.cc:484:replace_alu$36714[3]
.sym 4487 $false
.sym 4488 $false
.sym 4489 $auto$alumacc.cc:483:replace_alu$36713[3]
.sym 4490 $auto$alumacc.cc:484:replace_alu$36714[2]
.sym 4491 $auto$alumacc.cc:484:replace_alu$36714[4]
.sym 4492 $false
.sym 4493 $false
.sym 4494 $auto$alumacc.cc:483:replace_alu$36713[4]
.sym 4495 $auto$alumacc.cc:484:replace_alu$36714[3]
.sym 4496 $auto$alumacc.cc:484:replace_alu$36714[5]
.sym 4497 $false
.sym 4498 $false
.sym 4499 $auto$alumacc.cc:483:replace_alu$36713[5]
.sym 4500 $auto$alumacc.cc:484:replace_alu$36714[4]
.sym 4501 $auto$alumacc.cc:484:replace_alu$36714[6]$2
.sym 4502 $false
.sym 4503 $false
.sym 4504 $auto$alumacc.cc:483:replace_alu$36713[6]
.sym 4505 $auto$alumacc.cc:484:replace_alu$36714[5]
.sym 4510 $auto$alumacc.cc:484:replace_alu$36714[6]$2
.sym 4588 $auto$alumacc.cc:483:replace_alu$36713[1]
.sym 4589 $false
.sym 4590 $false
.sym 4591 $false
.sym 4593 $auto$alumacc.cc:483:replace_alu$36713[2]
.sym 4594 $false
.sym 4595 $false
.sym 4596 $false
.sym 4598 $auto$alumacc.cc:483:replace_alu$36713[5]
.sym 4599 $false
.sym 4600 $false
.sym 4601 $false
.sym 4603 $auto$alumacc.cc:484:replace_alu$36714[0]
.sym 4604 $auto$alumacc.cc:483:replace_alu$36713[1]
.sym 4605 $auto$alumacc.cc:483:replace_alu$36713[2]
.sym 4606 $auto$alumacc.cc:483:replace_alu$36713[3]
.sym 4608 $auto$alumacc.cc:483:replace_alu$36713[6]
.sym 4609 $abc$61381$n921
.sym 4610 $auto$wreduce.cc:310:run$36586[6]
.sym 4611 $abc$61381$n920
.sym 4613 $auto$alumacc.cc:483:replace_alu$36713[3]
.sym 4614 $abc$61381$n921
.sym 4615 $auto$wreduce.cc:310:run$36586[3]
.sym 4616 $abc$61381$n920
.sym 4618 $auto$alumacc.cc:483:replace_alu$36713[4]
.sym 4619 $abc$61381$n921
.sym 4620 $auto$wreduce.cc:310:run$36586[4]
.sym 4621 $abc$61381$n920
.sym 4623 $auto$alumacc.cc:483:replace_alu$36713[2]
.sym 4624 $abc$61381$n921
.sym 4625 $auto$wreduce.cc:310:run$36586[2]
.sym 4626 $abc$61381$n920
.sym 4627 $true
.sym 4628 CLK$2$2
.sym 4629 $false
.sym 4630 I2C_TX_DESC[0]
.sym 4631 I2C_TX_DESC[1]
.sym 4632 I2C_TX_DESC[2]
.sym 4633 I2C_TX_DESC[3]
.sym 4634 I2C_TX_DESC[4]
.sym 4635 I2C_TX_DESC[5]
.sym 4636 I2C_TX_DESC[6]
.sym 4637 I2C_TX_DESC[7]
.sym 4704 $false
.sym 4705 $false
.sym 4706 I2C.byte_counter[0]
.sym 4707 $false
.sym 4709 $false
.sym 4710 $false
.sym 4711 I2C.byte_counter[7]
.sym 4712 $auto$alumacc.cc:484:replace_alu$36726[6]
.sym 4714 $false
.sym 4715 $false
.sym 4716 $false
.sym 4717 $false
.sym 4719 I2C.byte_counter[4]
.sym 4720 $false
.sym 4721 $false
.sym 4722 $false
.sym 4724 I2C.byte_counter[7]
.sym 4725 I2C_OUTPUT_TYPE[1]
.sym 4726 I2C_OUTPUT_TYPE[0]
.sym 4727 $techmap\I2C_HID_DESC.$add$descriptors.v:36$527_Y[7]
.sym 4729 I2C.byte_counter[0]
.sym 4730 I2C_OUTPUT_TYPE[1]
.sym 4731 I2C_OUTPUT_TYPE[0]
.sym 4732 $techmap\I2C_HID_DESC.$add$descriptors.v:36$527_Y[0]
.sym 4739 I2C.byte_counter[3]
.sym 4740 $false
.sym 4741 $false
.sym 4742 $false
.sym 4743 $auto$dff2dffe.cc:158:make_patterns_logic$60701
.sym 4744 CLK$2$2
.sym 4745 $logic_not$top.v:60$10_Y$2
.sym 4820 I2C_TX_REPORT[1]
.sym 4821 I2C_TX_DESC[1]
.sym 4822 I2C_OUT_DESC_MASK[1]
.sym 4823 $false
.sym 4825 I2C_TX_REPORT[6]
.sym 4826 I2C_TX_DESC[6]
.sym 4827 I2C_OUT_DESC_MASK[6]
.sym 4828 $false
.sym 4840 KEYBOARD.row_time[0]
.sym 4841 KEYBOARD.row_time[1]
.sym 4842 $false
.sym 4843 $false
.sym 4845 KEYBOARD.row_time[2]
.sym 4846 KEYBOARD.row_time[3]
.sym 4847 $false
.sym 4848 $false
.sym 4855 KEYBOARD.row_time[0]
.sym 4856 KEYBOARD.row_time[1]
.sym 4857 $false
.sym 4858 $false
.sym 4859 RESET$2
.sym 4860 CLK$2$2
.sym 4861 $auto$rtlil.cc:1692:NotGate$61364$2
.sym 4936 KEYBOARD.row_time[4]
.sym 4937 KEYBOARD.row_time[5]
.sym 4938 KEYBOARD.row_time[6]
.sym 4939 KEYBOARD.row_time[7]
.sym 4941 $abc$61381$n513
.sym 4942 KEYBOARD.row_time[2]
.sym 4943 KEYBOARD.row_time[3]
.sym 4944 $false
.sym 4946 KEYBOARD.row_time[8]
.sym 4947 KEYBOARD.row_time[9]
.sym 4948 KEYBOARD.row_time[6]
.sym 4949 KEYBOARD.row_time[7]
.sym 4951 $abc$61381$n502
.sym 4952 KEYBOARD.row_time[4]
.sym 4953 KEYBOARD.row_time[5]
.sym 4954 $false
.sym 4956 I2C_TX_REPORT[5]
.sym 4957 I2C_TX_DESC[5]
.sym 4958 I2C_OUT_DESC_MASK[5]
.sym 4959 $false
.sym 4961 $abc$61381$n527
.sym 4962 $abc$61381$n551
.sym 4963 $abc$61381$n501_1
.sym 4964 $abc$61381$n552
.sym 4966 I2C_OUTPUT_TYPE[1]
.sym 4967 I2C_OUTPUT_TYPE[0]
.sym 4968 I2C.byte_counter[5]
.sym 4969 I2C.byte_counter[6]
.sym 4971 I2C.byte_counter[1]
.sym 4972 $false
.sym 4973 $false
.sym 4974 $false
.sym 4975 $auto$dff2dffe.cc:158:make_patterns_logic$60701
.sym 4976 CLK$2$2
.sym 4977 $logic_not$top.v:60$10_Y$2
.sym 5014 $true
.sym 5051 KEYBOARD.row_time[0]$2
.sym 5052 $false
.sym 5053 KEYBOARD.row_time[0]
.sym 5054 $false
.sym 5055 $false
.sym 5056 $auto$alumacc.cc:484:replace_alu$36753[1]
.sym 5058 $false
.sym 5059 KEYBOARD.row_time[1]
.sym 5061 $auto$alumacc.cc:484:replace_alu$36753[2]
.sym 5062 $false
.sym 5063 $false
.sym 5064 KEYBOARD.row_time[2]
.sym 5065 $auto$alumacc.cc:484:replace_alu$36753[1]
.sym 5066 $auto$alumacc.cc:484:replace_alu$36753[3]
.sym 5067 $false
.sym 5068 $false
.sym 5069 KEYBOARD.row_time[3]
.sym 5070 $auto$alumacc.cc:484:replace_alu$36753[2]
.sym 5071 $auto$alumacc.cc:484:replace_alu$36753[4]
.sym 5072 $false
.sym 5073 $false
.sym 5074 KEYBOARD.row_time[4]
.sym 5075 $auto$alumacc.cc:484:replace_alu$36753[3]
.sym 5076 $auto$alumacc.cc:484:replace_alu$36753[5]
.sym 5077 $false
.sym 5078 $false
.sym 5079 KEYBOARD.row_time[5]
.sym 5080 $auto$alumacc.cc:484:replace_alu$36753[4]
.sym 5081 $auto$alumacc.cc:484:replace_alu$36753[6]
.sym 5082 $false
.sym 5083 $false
.sym 5084 KEYBOARD.row_time[6]
.sym 5085 $auto$alumacc.cc:484:replace_alu$36753[5]
.sym 5086 $auto$alumacc.cc:484:replace_alu$36753[7]
.sym 5087 $false
.sym 5088 $false
.sym 5089 KEYBOARD.row_time[7]
.sym 5090 $auto$alumacc.cc:484:replace_alu$36753[6]
.sym 5091 RESET$2
.sym 5092 CLK$2$2
.sym 5093 $auto$rtlil.cc:1692:NotGate$61364$2
.sym 5130 $auto$alumacc.cc:484:replace_alu$36753[7]
.sym 5167 $auto$alumacc.cc:484:replace_alu$36753[8]
.sym 5168 $false
.sym 5169 $false
.sym 5170 KEYBOARD.row_time[8]
.sym 5171 $auto$alumacc.cc:484:replace_alu$36753[7]
.sym 5172 $auto$alumacc.cc:484:replace_alu$36753[9]
.sym 5173 $false
.sym 5174 $false
.sym 5175 KEYBOARD.row_time[9]
.sym 5176 $auto$alumacc.cc:484:replace_alu$36753[8]
.sym 5177 $auto$alumacc.cc:484:replace_alu$36753[10]
.sym 5178 $false
.sym 5179 $false
.sym 5180 KEYBOARD.row_time[10]
.sym 5181 $auto$alumacc.cc:484:replace_alu$36753[9]
.sym 5182 $auto$alumacc.cc:484:replace_alu$36753[11]
.sym 5183 $false
.sym 5184 $false
.sym 5185 KEYBOARD.row_time[11]
.sym 5186 $auto$alumacc.cc:484:replace_alu$36753[10]
.sym 5187 $auto$alumacc.cc:484:replace_alu$36753[12]
.sym 5188 $false
.sym 5189 $false
.sym 5190 KEYBOARD.row_time[12]
.sym 5191 $auto$alumacc.cc:484:replace_alu$36753[11]
.sym 5192 $auto$alumacc.cc:484:replace_alu$36753[13]
.sym 5193 $false
.sym 5194 $false
.sym 5195 KEYBOARD.row_time[13]
.sym 5196 $auto$alumacc.cc:484:replace_alu$36753[12]
.sym 5197 $auto$alumacc.cc:484:replace_alu$36753[14]$2
.sym 5198 $false
.sym 5199 $false
.sym 5200 KEYBOARD.row_time[14]
.sym 5201 $auto$alumacc.cc:484:replace_alu$36753[13]
.sym 5206 $auto$alumacc.cc:484:replace_alu$36753[14]$2
.sym 5207 RESET$2
.sym 5208 CLK$2$2
.sym 5209 $auto$rtlil.cc:1692:NotGate$61364$2
.sym 5284 $abc$61381$n783
.sym 5285 $abc$61381$n618_1
.sym 5286 KEYBOARD.report[0][6]
.sym 5287 $false
.sym 5289 KEYBOARD.kbd_code_hid[2]
.sym 5290 KEYBOARD.kbd_code_hid[1]
.sym 5291 KEYBOARD.kbd_code_hid[0]
.sym 5292 $false
.sym 5294 I2C.FLT_SDA.out
.sym 5295 $false
.sym 5296 $false
.sym 5297 $false
.sym 5323 $auto$dff2dffe.cc:175:make_patterns_logic$53193
.sym 5324 CLK$2$2
.sym 5325 $false
.sym 5400 KEYBOARD.kbd_code_hid[2]
.sym 5401 KEYBOARD.kbd_code_hid[1]
.sym 5402 KEYBOARD.kbd_code_hid[0]
.sym 5403 $false
.sym 5415 $abc$61381$n655
.sym 5416 $abc$61381$n648
.sym 5417 $techmap\I2C.$sub$i2c_slave.v:143$204_Y[0]
.sym 5418 $false
.sym 5425 KEYBOARD.kbd_code_hid[2]
.sym 5426 KEYBOARD.kbd_code_hid[1]
.sym 5427 KEYBOARD.kbd_code_hid[0]
.sym 5428 $false
.sym 5430 KEYBOARD.report[0][2]
.sym 5431 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 5432 $abc$61381$n976
.sym 5433 $false
.sym 5435 KEYBOARD.report[0][6]
.sym 5436 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 5437 $abc$61381$n984
.sym 5438 $false
.sym 5439 $auto$dff2dffe.cc:175:make_patterns_logic$59740
.sym 5440 CLK$2$2
.sym 5441 $false
.sym 5478 $true
.sym 5515 UART.tx_bit_counter[0]$2
.sym 5516 $false
.sym 5517 UART.tx_bit_counter[0]
.sym 5518 $false
.sym 5519 $false
.sym 5520 $auto$alumacc.cc:484:replace_alu$36759[1]
.sym 5522 UART.tx_bit_counter[1]
.sym 5523 $true$2
.sym 5525 $auto$alumacc.cc:484:replace_alu$36759[2]$2
.sym 5526 $false
.sym 5527 UART.tx_bit_counter[2]
.sym 5528 $true$2
.sym 5529 $auto$alumacc.cc:484:replace_alu$36759[1]
.sym 5534 $auto$alumacc.cc:484:replace_alu$36759[2]$2
.sym 5536 UART.tx_bit_counter[0]
.sym 5537 UART.tx_bit_counter[1]
.sym 5538 $false
.sym 5539 $false
.sym 5541 $false
.sym 5542 UART.tx_bit_counter[3]
.sym 5543 $true$2
.sym 5544 $auto$alumacc.cc:484:replace_alu$36759[2]
.sym 5546 $auto$alumacc.cc:470:replace_alu$36760.B_buf[3]
.sym 5547 $false
.sym 5548 $false
.sym 5549 $false
.sym 5551 $auto$alumacc.cc:470:replace_alu$36760.B_buf[2]
.sym 5552 $false
.sym 5553 $false
.sym 5554 $false
.sym 5555 $auto$dff2dffe.cc:175:make_patterns_logic$53580
.sym 5556 CLK$2$2
.sym 5557 $eq$top.v:225$129_Y
.sym 5632 $auto$alumacc.cc:470:replace_alu$36760.B_buf[0]
.sym 5633 $false
.sym 5634 $false
.sym 5635 $false
.sym 5637 $auto$alumacc.cc:470:replace_alu$36760.B_buf[3]
.sym 5638 $false
.sym 5639 $false
.sym 5640 $false
.sym 5642 $false
.sym 5643 UART.tx_bit_counter[0]
.sym 5644 $false
.sym 5645 $true$2
.sym 5647 $auto$alumacc.cc:470:replace_alu$36760.B_buf[2]
.sym 5648 $false
.sym 5649 $false
.sym 5650 $false
.sym 5652 $techmap$auto$alumacc.cc:470:replace_alu$36760.$not$/usr/bin/../share/yosys/ice40/arith_map.v:42$37927_Y[1]
.sym 5653 $auto$alumacc.cc:470:replace_alu$36760.B_buf[0]
.sym 5654 $false
.sym 5655 $false
.sym 5657 UART.tx_bit_counter[0]
.sym 5658 UART.tx_bit_counter[1]
.sym 5659 $false
.sym 5660 $false
.sym 5662 $auto$alumacc.cc:470:replace_alu$36760.B_buf[0]
.sym 5663 $false
.sym 5664 $false
.sym 5665 $false
.sym 5667 $techmap$auto$alumacc.cc:470:replace_alu$36760.$not$/usr/bin/../share/yosys/ice40/arith_map.v:42$37927_Y[1]
.sym 5668 $false
.sym 5669 $false
.sym 5670 $false
.sym 5671 $auto$dff2dffe.cc:175:make_patterns_logic$53580
.sym 5672 CLK$2$2
.sym 5673 $eq$top.v:225$129_Y
.sym 5710 $true
.sym 5747 $techmap$auto$alumacc.cc:470:replace_alu$36760.$not$/usr/bin/../share/yosys/ice40/arith_map.v:42$37927_Y[0]$3
.sym 5748 $false
.sym 5749 $techmap$auto$alumacc.cc:470:replace_alu$36760.$not$/usr/bin/../share/yosys/ice40/arith_map.v:42$37927_Y[0]
.sym 5750 $false
.sym 5751 $false
.sym 5752 $auto$alumacc.cc:470:replace_alu$36760.C[2]$2
.sym 5754 $false
.sym 5755 $techmap$auto$alumacc.cc:470:replace_alu$36760.$not$/usr/bin/../share/yosys/ice40/arith_map.v:42$37927_Y[1]
.sym 5761 $auto$alumacc.cc:470:replace_alu$36760.C[2]$2
.sym 5778 $false
.sym 5779 $false
.sym 5780 $techmap$auto$alumacc.cc:470:replace_alu$36760.$not$/usr/bin/../share/yosys/ice40/arith_map.v:42$37927_Y[2]
.sym 5781 $auto$alumacc.cc:470:replace_alu$36760.C[2]
.sym 5869 KEYBOARD.kbd_code_hid[1]
.sym 5870 $false
.sym 5871 $false
.sym 5872 $false
.sym 5884 KEYBOARD.kbd_code_hid[2]
.sym 5885 $false
.sym 5886 $false
.sym 5887 $false
.sym 5889 KEYBOARD.kbd_code_hid[0]
.sym 5890 $false
.sym 5891 $false
.sym 5892 $false
.sym 5903 $auto$dff2dffe.cc:175:make_patterns_logic$55122
.sym 5904 CLK$2$2
.sym 5905 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 6125 $add$top.v:60$11_Y[0]
.sym 6127 rststate[0]
.sym 6194 KBD_COLUMNS[0]$2
.sym 6196 KBD_COLUMNS[1]$2
.sym 6198 $auto$alumacc.cc:484:replace_alu$36714[0]
.sym 6199 $auto$wreduce.cc:310:run$36586[7]
.sym 6200 $auto$alumacc.cc:483:replace_alu$36713[1]
.sym 6203 I2C.byte_counter[1]
.sym 6204 I2C.byte_counter[7]
.sym 6338 $sub$top.v:78$20_Y[2]
.sym 6339 $sub$top.v:78$20_Y[3]
.sym 6340 $sub$top.v:78$20_Y[4]
.sym 6341 $sub$top.v:78$20_Y[5]
.sym 6342 $sub$top.v:78$20_Y[6]
.sym 6343 $auto$alumacc.cc:470:replace_alu$36704.C[7]
.sym 6438 $auto$alumacc.cc:483:replace_alu$36713[4]
.sym 6439 $auto$alumacc.cc:483:replace_alu$36708[7]
.sym 6441 $auto$alumacc.cc:483:replace_alu$36708[3]
.sym 6442 $auto$alumacc.cc:483:replace_alu$36708[4]
.sym 6443 $auto$dff2dffe.cc:175:make_patterns_logic$60147
.sym 6444 $auto$alumacc.cc:483:replace_alu$36713[3]
.sym 6445 KEYBOARD.ram_wr
.sym 6541 I2C_INPUT_LEN[4]
.sym 6544 I2C_INPUT_LEN[2]
.sym 6546 I2C_INPUT_LEN[6]
.sym 6547 I2C_INPUT_LEN[3]
.sym 6643 $techmap\KEYBOARD.$procmux$7457_Y
.sym 6644 $abc$61381$n507
.sym 6645 $abc$61381$n510
.sym 6646 $abc$61381$n871
.sym 6647 I2C_TX_REPORT[6]
.sym 6648 I2C_TX_REPORT[1]
.sym 6649 I2C_TX_REPORT[3]
.sym 6658 $false
.sym 6659 $false
.sym 6661 $false
.sym 6662 $false
.sym 6663 $false
.sym 6664 $false
.sym 6665 $false
.sym 6666 $false
.sym 6669 $false
.sym 6670 $false$2
.sym 6671 $false
.sym 6672 $false
.sym 6673 $false
.sym 6674 $false
.sym 6675 $false
.sym 6676 $false
.sym 6677 $false
.sym 6678 $false
.sym 6679 $false
.sym 6744 $abc$61381$n512
.sym 6745 $abc$61381$n956_1
.sym 6746 $abc$61381$n526
.sym 6747 $abc$61381$n505
.sym 6748 $abc$61381$n531
.sym 6749 $abc$61381$n879
.sym 6750 $abc$61381$n528
.sym 6751 I2C_OUT_DESC_MASK[7]
.sym 6760 I2C_HID_DESC.real_adress[0]
.sym 6761 I2C_HID_DESC.real_adress[1]
.sym 6763 I2C_HID_DESC.real_adress[2]
.sym 6764 I2C_HID_DESC.real_adress[3]
.sym 6765 I2C_HID_DESC.real_adress[4]
.sym 6766 I2C_HID_DESC.real_adress[5]
.sym 6767 I2C_HID_DESC.real_adress[6]
.sym 6768 I2C_HID_DESC.real_adress[7]
.sym 6771 CLK$2$2
.sym 6772 $true
.sym 6773 $true$2
.sym 6846 $abc$61381$n785
.sym 6847 $abc$61381$n806
.sym 6848 $abc$61381$n955
.sym 6849 $abc$61381$n978
.sym 6850 $abc$61381$n791
.sym 6851 $abc$61381$n800
.sym 6852 KEYBOARD.report[0][1]
.sym 6853 KEYBOARD.report[0][3]
.sym 6950 $techmap\I2C.$sub$i2c_slave.v:143$204_Y[2]
.sym 6951 $techmap\I2C.$sub$i2c_slave.v:143$204_Y[3]
.sym 6952 $auto$simplemap.cc:309:simplemap_lut$46032[1]
.sym 6953 $auto$dff2dffe.cc:175:make_patterns_logic$52925
.sym 6954 $abc$61381$n648
.sym 6955 I2C.received_byte[2]
.sym 7051 $abc$61381$n962
.sym 7052 $auto$dff2dffe.cc:175:make_patterns_logic$52724
.sym 7053 $auto$dff2dffe.cc:175:make_patterns_logic$53193
.sym 7054 UART_TX_DATA[3]
.sym 7055 UART_TX_DATA[7]
.sym 7056 UART_TX_DATA[6]
.sym 7057 UART_TX_DATA[1]
.sym 7152 $auto$alumacc.cc:483:replace_alu$36649[2]
.sym 7153 $auto$alumacc.cc:483:replace_alu$36649[5]
.sym 7154 $abc$61381$n965
.sym 7155 $abc$61381$n958
.sym 7156 $abc$61381$n964_1
.sym 7157 $abc$61381$n961
.sym 7158 $abc$61381$n963
.sym 7159 I2C.received_byte[4]
.sym 7254 $auto$alumacc.cc:483:replace_alu$36649[7]
.sym 7255 $eq$top.v:225$129_Y
.sym 7256 $auto$wreduce.cc:310:run$36605[0]
.sym 7257 $abc$61381$n662
.sym 7258 $auto$alumacc.cc:483:replace_alu$36649[4]
.sym 7259 $abc$61381$n967
.sym 7260 $auto$dff2dffe.cc:175:make_patterns_logic$53580
.sym 7261 UART.tx_line
.sym 7360 $auto$alumacc.cc:484:replace_alu$36624[3]
.sym 7363 KEYBOARD.report[1][3]
.sym 7458 $abc$61381$n788
.sym 7462 $abc$61381$n795
.sym 7560 $abc$61381$n803
.sym 7561 $abc$61381$n715
.sym 7562 $abc$61381$n688
.sym 7563 $abc$61381$n716
.sym 7564 kbd_report[4][2]
.sym 7566 kbd_report[4][1]
.sym 7567 kbd_report[4][3]
.sym 7984 $false
.sym 7985 $logic_not$top.v:60$10_Y$2
.sym 7986 rststate[0]
.sym 7987 $false
.sym 7994 $abc$61381$n836
.sym 7995 $add$top.v:60$11_Y[0]
.sym 7996 $false
.sym 7997 $false
.sym 8008 $true
.sym 8009 CLK$2$2
.sym 8010 $false
.sym 8011 KBD_COLUMNS[2]$2
.sym 8013 KBD_COLUMNS[3]$2
.sym 8015 $auto$alumacc.cc:483:replace_alu$36713[7]
.sym 8021 $auto$wreduce.cc:310:run$36586[0]
.sym 8022 I2C.byte_counter[0]
.sym 8125 $techmap\I2C.$procmux$19301_Y
.sym 8126 I2C.byte_counter[0]
.sym 8127 $false
.sym 8128 $false
.sym 8130 $false
.sym 8131 $false
.sym 8132 $auto$alumacc.cc:483:replace_alu$36713[7]
.sym 8133 $auto$alumacc.cc:484:replace_alu$36714[6]
.sym 8135 $techmap\I2C.$procmux$19301_Y
.sym 8136 I2C.byte_counter[1]
.sym 8137 $false
.sym 8138 $false
.sym 8150 $abc$61381$n920
.sym 8151 $abc$61381$n921
.sym 8152 $auto$alumacc.cc:484:replace_alu$36714[0]
.sym 8153 $auto$alumacc.cc:483:replace_alu$36713[1]
.sym 8155 $auto$alumacc.cc:483:replace_alu$36713[7]
.sym 8156 $abc$61381$n921
.sym 8157 $auto$wreduce.cc:310:run$36586[7]
.sym 8158 $abc$61381$n920
.sym 8164 $true
.sym 8165 CLK$2$2
.sym 8166 $false
.sym 8167 $sub$top.v:78$20_Y[7]
.sym 8169 $auto$alumacc.cc:483:replace_alu$36713[5]
.sym 8170 $auto$alumacc.cc:483:replace_alu$36713[2]
.sym 8173 I2C_INPUT_LEN[7]
.sym 8174 I2C_INPUT_LEN[5]
.sym 8203 $true
.sym 8240 I2C.byte_counter[0]$3
.sym 8241 $false
.sym 8242 I2C.byte_counter[0]
.sym 8243 $false
.sym 8244 $false
.sym 8245 $auto$alumacc.cc:470:replace_alu$36704.C[2]
.sym 8247 I2C.byte_counter[1]
.sym 8248 $true$2
.sym 8250 $auto$alumacc.cc:470:replace_alu$36704.C[3]
.sym 8251 $false
.sym 8252 I2C.byte_counter[2]
.sym 8253 $true$2
.sym 8254 $auto$alumacc.cc:470:replace_alu$36704.C[2]
.sym 8255 $auto$alumacc.cc:470:replace_alu$36704.C[4]
.sym 8256 $false
.sym 8257 I2C.byte_counter[3]
.sym 8258 $true$2
.sym 8259 $auto$alumacc.cc:470:replace_alu$36704.C[3]
.sym 8260 $auto$alumacc.cc:470:replace_alu$36704.C[5]
.sym 8261 $false
.sym 8262 I2C.byte_counter[4]
.sym 8263 $true$2
.sym 8264 $auto$alumacc.cc:470:replace_alu$36704.C[4]
.sym 8265 $auto$alumacc.cc:470:replace_alu$36704.C[6]
.sym 8266 $false
.sym 8267 I2C.byte_counter[5]
.sym 8268 $true$2
.sym 8269 $auto$alumacc.cc:470:replace_alu$36704.C[5]
.sym 8270 $auto$alumacc.cc:470:replace_alu$36704.C[7]$2
.sym 8271 $false
.sym 8272 I2C.byte_counter[6]
.sym 8273 $true$2
.sym 8274 $auto$alumacc.cc:470:replace_alu$36704.C[6]
.sym 8279 $auto$alumacc.cc:470:replace_alu$36704.C[7]$2
.sym 8283 $abc$61381$n922
.sym 8284 $auto$alumacc.cc:483:replace_alu$36713[6]
.sym 8285 $abc$61381$n912
.sym 8286 $abc$61381$n910
.sym 8287 $auto$alumacc.cc:483:replace_alu$36644[3]
.sym 8288 $abc$61381$n921
.sym 8289 I2C.byte_counter[5]
.sym 8290 I2C.i2c_bit_counter[3]
.sym 8357 $techmap\I2C.$procmux$19301_Y
.sym 8358 I2C.byte_counter[4]
.sym 8359 $false
.sym 8360 $false
.sym 8362 $auto$alumacc.cc:483:replace_alu$36713[7]
.sym 8363 $false
.sym 8364 $false
.sym 8365 $false
.sym 8372 $auto$alumacc.cc:483:replace_alu$36713[3]
.sym 8373 $false
.sym 8374 $false
.sym 8375 $false
.sym 8377 $auto$alumacc.cc:483:replace_alu$36713[4]
.sym 8378 $false
.sym 8379 $false
.sym 8380 $false
.sym 8382 $techmap\KEYBOARD.$procmux$7457_Y
.sym 8383 $auto$rtlil.cc:1692:NotGate$61364$2
.sym 8384 RESET$2
.sym 8385 $false
.sym 8387 $techmap\I2C.$procmux$19301_Y
.sym 8388 I2C.byte_counter[3]
.sym 8389 $false
.sym 8390 $false
.sym 8392 $techmap\KEYBOARD.$procmux$7457_Y
.sym 8393 $false
.sym 8394 $false
.sym 8395 $false
.sym 8396 $auto$dff2dffe.cc:175:make_patterns_logic$60147
.sym 8397 CLK$2$2
.sym 8398 $false
.sym 8400 $abc$61381$n511
.sym 8401 $abc$61381$n586
.sym 8402 $abc$61381$n606
.sym 8403 $abc$61381$n909
.sym 8404 $abc$61381$n522
.sym 8405 $abc$61381$n771
.sym 8406 I2C_HID_DESC.real_adress[5]
.sym 8478 $abc$61381$n559
.sym 8479 $sub$top.v:78$20_Y[4]
.sym 8480 $false
.sym 8481 $false
.sym 8493 $abc$61381$n559
.sym 8494 $sub$top.v:78$20_Y[2]
.sym 8495 $false
.sym 8496 $false
.sym 8503 $abc$61381$n559
.sym 8504 $sub$top.v:78$20_Y[6]
.sym 8505 $false
.sym 8506 $false
.sym 8508 $abc$61381$n559
.sym 8509 $sub$top.v:78$20_Y[3]
.sym 8510 $false
.sym 8511 $false
.sym 8512 $auto$dff2dffe.cc:175:make_patterns_logic$50775
.sym 8513 CLK$2$2
.sym 8514 $logic_not$top.v:60$10_Y$2
.sym 8515 $abc$61381$n546
.sym 8516 $abc$61381$n515
.sym 8517 $abc$61381$n503_1
.sym 8518 $abc$61381$n530
.sym 8519 $abc$61381$n499
.sym 8520 $abc$61381$n535
.sym 8521 $abc$61381$n547
.sym 8522 I2C_HID_DESC.real_adress[2]
.sym 8594 $abc$61381$n500_1
.sym 8595 $abc$61381$n505
.sym 8596 $abc$61381$n510
.sym 8597 $false
.sym 8599 $abc$61381$n501_1
.sym 8600 $abc$61381$n508
.sym 8601 $abc$61381$n509
.sym 8602 $abc$61381$n510
.sym 8604 KEYBOARD.row_time[0]
.sym 8605 KEYBOARD.row_time[1]
.sym 8606 KEYBOARD.row_time[2]
.sym 8607 KEYBOARD.row_time[3]
.sym 8609 I2C_TX_REPORT[3]
.sym 8610 I2C_TX_DESC[3]
.sym 8611 I2C_OUT_DESC_MASK[3]
.sym 8612 $false
.sym 8614 $abc$61381$n827_1
.sym 8615 $abc$61381$n822_1
.sym 8616 $abc$61381$n618_1
.sym 8617 $abc$61381$n779
.sym 8619 $abc$61381$n780_1
.sym 8620 $abc$61381$n785
.sym 8621 $auto$alumacc.cc:484:replace_alu$36674[7]
.sym 8622 $auto$alumacc.cc:484:replace_alu$36695[7]
.sym 8624 $abc$61381$n780_1
.sym 8625 $abc$61381$n800
.sym 8626 $auto$alumacc.cc:484:replace_alu$36674[7]
.sym 8627 $auto$alumacc.cc:484:replace_alu$36695[7]
.sym 8628 $auto$dff2dffe.cc:175:make_patterns_logic$47877
.sym 8629 CLK$2$2
.sym 8630 $auto$simplemap.cc:256:simplemap_eqne$37067
.sym 8631 $abc$61381$n516
.sym 8632 $abc$61381$n541
.sym 8633 $abc$61381$n954
.sym 8634 $abc$61381$n542
.sym 8635 $abc$61381$n933
.sym 8636 $abc$61381$n834
.sym 8637 $abc$61381$n941
.sym 8638 I2C_TX_REPORT[7]
.sym 8705 KEYBOARD.row_time[4]
.sym 8706 KEYBOARD.row_time[5]
.sym 8707 KEYBOARD.row_time[6]
.sym 8708 KEYBOARD.row_time[7]
.sym 8710 $abc$61381$n875
.sym 8711 $abc$61381$n867
.sym 8712 $techmap\I2C.$sub$i2c_slave.v:143$204_Y[2]
.sym 8713 $false
.sym 8715 $abc$61381$n517
.sym 8716 $abc$61381$n527
.sym 8717 $abc$61381$n528
.sym 8718 $false
.sym 8720 KEYBOARD.row_time[4]
.sym 8721 KEYBOARD.row_time[5]
.sym 8722 KEYBOARD.row_time[6]
.sym 8723 KEYBOARD.row_time[7]
.sym 8725 KEYBOARD.row_time[4]
.sym 8726 KEYBOARD.row_time[5]
.sym 8727 KEYBOARD.row_time[6]
.sym 8728 KEYBOARD.row_time[7]
.sym 8730 I2C_TX_REPORT[7]
.sym 8731 I2C_TX_DESC[7]
.sym 8732 I2C_OUT_DESC_MASK[7]
.sym 8733 $false
.sym 8735 KEYBOARD.row_time[4]
.sym 8736 KEYBOARD.row_time[5]
.sym 8737 KEYBOARD.row_time[6]
.sym 8738 KEYBOARD.row_time[7]
.sym 8740 $2\I2C_OUT_DESC_MASK[7:0][7]
.sym 8741 $false
.sym 8742 $false
.sym 8743 $false
.sym 8744 $auto$dff2dffe.cc:175:make_patterns_logic$51864$2
.sym 8745 CLK$2$2
.sym 8746 $logic_not$top.v:60$10_Y$2
.sym 8749 $auto$alumacc.cc:484:replace_alu$36703[1]
.sym 8750 $auto$wreduce.cc:310:run$36584[2]
.sym 8751 $auto$alumacc.cc:470:replace_alu$36715.A_buf[3]
.sym 8752 $abc$61381$n588
.sym 8754 I2C_OUT_DESC_MASK[0]
.sym 8821 $abc$61381$n791
.sym 8822 $abc$61381$n786_1
.sym 8823 $abc$61381$n618_1
.sym 8824 $abc$61381$n781
.sym 8826 $abc$61381$n783
.sym 8827 $abc$61381$n618_1
.sym 8828 KEYBOARD.report[0][3]
.sym 8829 $false
.sym 8831 $abc$61381$n879
.sym 8832 $abc$61381$n871
.sym 8833 $techmap\I2C.$sub$i2c_slave.v:143$204_Y[2]
.sym 8834 $false
.sym 8836 KEYBOARD.kbd_code_hid[2]
.sym 8837 KEYBOARD.kbd_code_hid[1]
.sym 8838 KEYBOARD.kbd_code_hid[0]
.sym 8839 $false
.sym 8841 $abc$61381$n783
.sym 8842 $abc$61381$n618_1
.sym 8843 KEYBOARD.report[0][1]
.sym 8844 $false
.sym 8846 $abc$61381$n806
.sym 8847 $abc$61381$n801
.sym 8848 $abc$61381$n618_1
.sym 8849 $abc$61381$n781
.sym 8851 KEYBOARD.report[0][1]
.sym 8852 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 8853 $abc$61381$n974
.sym 8854 $false
.sym 8856 KEYBOARD.report[0][3]
.sym 8857 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 8858 $abc$61381$n978
.sym 8859 $false
.sym 8860 $auto$dff2dffe.cc:175:make_patterns_logic$59740
.sym 8861 CLK$2$2
.sym 8862 $false
.sym 8863 $abc$61381$n641
.sym 8864 $abc$61381$n783
.sym 8865 $abc$61381$n865
.sym 8866 $abc$61381$n655
.sym 8867 $auto$dff2dffe.cc:175:make_patterns_logic$47877
.sym 8869 I2C_TX_REPORT[0]
.sym 8870 I2C_TX_REPORT[2]
.sym 8899 $true
.sym 8936 $auto$alumacc.cc:470:replace_alu$36715.A_buf[0]$2
.sym 8937 $false
.sym 8938 $auto$alumacc.cc:470:replace_alu$36715.A_buf[0]
.sym 8939 $false
.sym 8940 $false
.sym 8941 $auto$alumacc.cc:484:replace_alu$36717[1]
.sym 8943 $auto$alumacc.cc:470:replace_alu$36715.A_buf[1]
.sym 8944 $true$2
.sym 8946 $auto$alumacc.cc:484:replace_alu$36717[2]
.sym 8947 $false
.sym 8948 $auto$alumacc.cc:470:replace_alu$36715.A_buf[2]
.sym 8949 $true$2
.sym 8950 $auto$alumacc.cc:484:replace_alu$36717[1]
.sym 8951 $auto$simplemap.cc:309:simplemap_lut$46032[1]$2
.sym 8952 $false
.sym 8953 $auto$alumacc.cc:470:replace_alu$36715.A_buf[3]
.sym 8954 $true$2
.sym 8955 $auto$alumacc.cc:484:replace_alu$36717[2]
.sym 8960 $auto$simplemap.cc:309:simplemap_lut$46032[1]$2
.sym 8962 $abc$61381$n641
.sym 8963 $abc$61381$n648
.sym 8964 $techmap\I2C.$sub$i2c_slave.v:143$204_Y[0]
.sym 8965 $false
.sym 8967 $auto$alumacc.cc:470:replace_alu$36715.A_buf[1]
.sym 8968 $auto$alumacc.cc:470:replace_alu$36715.A_buf[0]
.sym 8969 $false
.sym 8970 $false
.sym 8972 I2C.FLT_SDA.out
.sym 8973 $false
.sym 8974 $false
.sym 8975 $false
.sym 8976 $auto$dff2dffe.cc:175:make_patterns_logic$52925
.sym 8977 CLK$2$2
.sym 8978 $false
.sym 8979 $abc$61381$n953
.sym 8980 $abc$61381$n798_1
.sym 8982 $auto$dff2dffe.cc:175:make_patterns_logic$52791
.sym 8983 $abc$61381$n952
.sym 8984 $abc$61381$n869
.sym 8985 $abc$61381$n951
.sym 8986 I2C_OUT_DESC_MASK[2]
.sym 9058 UART_TX_DATA[7]
.sym 9059 UART_TX_DATA[3]
.sym 9060 $auto$wreduce.cc:310:run$36605[2]
.sym 9061 $false
.sym 9063 RESET$2
.sym 9064 $auto$rtlil.cc:1692:NotGate$61156
.sym 9065 $auto$dff2dffe.cc:175:make_patterns_logic$47997
.sym 9066 $false
.sym 9068 $abc$61381$n655
.sym 9069 $abc$61381$n648
.sym 9070 $techmap\I2C.$sub$i2c_slave.v:143$204_Y[0]
.sym 9071 $false
.sym 9073 I2C.received_byte[3]
.sym 9074 $abc$61381$n871
.sym 9075 I2C.is_read
.sym 9076 $false
.sym 9078 I2C.received_byte[7]
.sym 9079 $abc$61381$n879
.sym 9080 I2C.is_read
.sym 9081 $false
.sym 9083 I2C.received_byte[6]
.sym 9084 $abc$61381$n877
.sym 9085 I2C.is_read
.sym 9086 $false
.sym 9088 I2C.received_byte[1]
.sym 9089 $abc$61381$n867
.sym 9090 I2C.is_read
.sym 9091 $false
.sym 9092 $auto$dff2dffe.cc:175:make_patterns_logic$47997
.sym 9093 CLK$2$2
.sym 9094 $auto$rtlil.cc:1692:NotGate$61156
.sym 9095 $auto$dff2dffe.cc:175:make_patterns_logic$53260
.sym 9096 $abc$61381$n724
.sym 9097 $auto$dff2dffe.cc:175:make_patterns_logic$53126
.sym 9098 $abc$61381$n913
.sym 9099 $abc$61381$n914_1
.sym 9100 kbd_report[3][2]
.sym 9102 kbd_report[3][7]
.sym 9169 I2C.received_byte[2]
.sym 9170 $false
.sym 9171 $false
.sym 9172 $false
.sym 9174 I2C.received_byte[5]
.sym 9175 $false
.sym 9176 $false
.sym 9177 $false
.sym 9179 UART_TX_DATA[6]
.sym 9180 UART_TX_DATA[2]
.sym 9181 $auto$wreduce.cc:310:run$36605[2]
.sym 9182 $false
.sym 9184 $abc$61381$n962
.sym 9185 $abc$61381$n961
.sym 9186 $abc$61381$n959
.sym 9187 $false
.sym 9189 UART_TX_DATA[4]
.sym 9190 UART_TX_DATA[0]
.sym 9191 $auto$wreduce.cc:310:run$36605[2]
.sym 9192 $false
.sym 9194 UART_TX_DATA[5]
.sym 9195 UART_TX_DATA[1]
.sym 9196 $auto$wreduce.cc:310:run$36605[2]
.sym 9197 $false
.sym 9199 $abc$61381$n965
.sym 9200 $abc$61381$n964_1
.sym 9201 $abc$61381$n959
.sym 9202 $false
.sym 9204 I2C.FLT_SDA.out
.sym 9205 $false
.sym 9206 $false
.sym 9207 $false
.sym 9208 $auto$dff2dffe.cc:175:make_patterns_logic$53059
.sym 9209 CLK$2$2
.sym 9210 $false
.sym 9211 $abc$61381$n682
.sym 9212 $abc$61381$n831
.sym 9213 $abc$61381$n786_1
.sym 9214 $abc$61381$n725_1
.sym 9215 $abc$61381$n801
.sym 9216 $abc$61381$n773
.sym 9217 $abc$61381$n793
.sym 9218 kbd_report[3][0]
.sym 9285 I2C.received_byte[7]
.sym 9286 $false
.sym 9287 $false
.sym 9288 $false
.sym 9290 UART.tx_activity
.sym 9291 $false
.sym 9292 $false
.sym 9293 $false
.sym 9295 $false
.sym 9296 $false
.sym 9297 $techmap$auto$alumacc.cc:470:replace_alu$36760.$not$/usr/bin/../share/yosys/ice40/arith_map.v:42$37927_Y[0]
.sym 9298 $true$2
.sym 9300 $abc$61381$n665
.sym 9301 UART.tx_bit_counter[2]
.sym 9302 UART.tx_bit_counter[3]
.sym 9303 $abc$61381$n663
.sym 9305 I2C.received_byte[4]
.sym 9306 $false
.sym 9307 $false
.sym 9308 $false
.sym 9310 $abc$61381$n663
.sym 9311 $abc$61381$n665
.sym 9312 UART.tx_bit_counter[2]
.sym 9313 UART.tx_bit_counter[3]
.sym 9315 UART.tx_activity
.sym 9316 $abc$61381$n662
.sym 9317 RESET$2
.sym 9318 $auto$dff2dffe.cc:158:make_patterns_logic$53542
.sym 9320 $abc$61381$n963
.sym 9321 $abc$61381$n958
.sym 9322 $auto$alumacc.cc:484:replace_alu$36624[3]
.sym 9323 $auto$wreduce.cc:310:run$36605[0]
.sym 9324 $auto$dff2dffe.cc:175:make_patterns_logic$53580
.sym 9325 CLK$2$2
.sym 9326 $eq$top.v:225$129_Y
.sym 9327 $abc$61381$n805
.sym 9328 $abc$61381$n768
.sym 9329 $abc$61381$n776
.sym 9330 $abc$61381$n797
.sym 9331 $abc$61381$n775_1
.sym 9332 $abc$61381$n790
.sym 9333 KEYBOARD.report[1][1]
.sym 9334 KEYBOARD.report[1][2]
.sym 9363 $true
.sym 9400 $techmap$auto$alumacc.cc:470:replace_alu$36760.$not$/usr/bin/../share/yosys/ice40/arith_map.v:42$37927_Y[0]$2
.sym 9401 $false
.sym 9402 $techmap$auto$alumacc.cc:470:replace_alu$36760.$not$/usr/bin/../share/yosys/ice40/arith_map.v:42$37927_Y[0]
.sym 9403 $false
.sym 9404 $false
.sym 9405 $auto$alumacc.cc:484:replace_alu$36624[1]
.sym 9407 $false
.sym 9408 $techmap$auto$alumacc.cc:470:replace_alu$36760.$not$/usr/bin/../share/yosys/ice40/arith_map.v:42$37927_Y[1]
.sym 9410 $auto$alumacc.cc:484:replace_alu$36624[2]
.sym 9412 $false
.sym 9413 $techmap$auto$alumacc.cc:470:replace_alu$36760.$not$/usr/bin/../share/yosys/ice40/arith_map.v:42$37927_Y[2]
.sym 9415 $auto$alumacc.cc:484:replace_alu$36624[3]$2
.sym 9417 $false
.sym 9418 $techmap$auto$alumacc.cc:470:replace_alu$36760.$not$/usr/bin/../share/yosys/ice40/arith_map.v:42$37927_Y[3]
.sym 9424 $auto$alumacc.cc:484:replace_alu$36624[3]$2
.sym 9436 KEYBOARD.kbd_code_hid[3]
.sym 9437 $false
.sym 9438 $false
.sym 9439 $false
.sym 9440 $auto$dff2dffe.cc:175:make_patterns_logic$59214
.sym 9441 CLK$2$2
.sym 9442 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 9443 $abc$61381$n832_1
.sym 9444 $abc$61381$n796
.sym 9445 $abc$61381$n777
.sym 9446 $abc$61381$n829
.sym 9447 $abc$61381$n770
.sym 9448 $abc$61381$n787
.sym 9449 $abc$61381$n794
.sym 9450 KEYBOARD.report[1][7]
.sym 9517 $abc$61381$n772
.sym 9518 kbd_report[4][1]
.sym 9519 $false
.sym 9520 $false
.sym 9537 $abc$61381$n772
.sym 9538 kbd_report[4][2]
.sym 9539 $false
.sym 9540 $false
.sym 9559 $abc$61381$n693
.sym 9560 $abc$61381$n830
.sym 9561 $abc$61381$n699
.sym 9562 $abc$61381$n769
.sym 9563 $abc$61381$n698
.sym 9564 $abc$61381$n802
.sym 9565 kbd_report[4][7]
.sym 9566 kbd_report[4][0]
.sym 9633 $abc$61381$n772
.sym 9634 kbd_report[4][3]
.sym 9635 $false
.sym 9636 $false
.sym 9638 KEYBOARD.kbd_code_hid[3]
.sym 9639 KEYBOARD.kbd_code_hid[2]
.sym 9640 kbd_report[4][2]
.sym 9641 kbd_report[4][3]
.sym 9643 kbd_report[4][0]
.sym 9644 kbd_report[4][1]
.sym 9645 kbd_report[4][2]
.sym 9646 kbd_report[4][3]
.sym 9648 KEYBOARD.kbd_code_hid[1]
.sym 9649 KEYBOARD.kbd_code_hid[0]
.sym 9650 kbd_report[4][0]
.sym 9651 kbd_report[4][1]
.sym 9653 KEYBOARD.kbd_code_hid[2]
.sym 9654 $false
.sym 9655 $false
.sym 9656 $false
.sym 9663 KEYBOARD.kbd_code_hid[1]
.sym 9664 $false
.sym 9665 $false
.sym 9666 $false
.sym 9668 KEYBOARD.kbd_code_hid[3]
.sym 9669 $false
.sym 9670 $false
.sym 9671 $false
.sym 9672 $auto$dff2dffe.cc:175:make_patterns_logic$56573
.sym 9673 CLK$2$2
.sym 9674 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 9675 $abc$61381$n707
.sym 9676 $abc$61381$n708
.sym 9677 $abc$61381$n691
.sym 9678 kbd_report[5][7]
.sym 9679 kbd_report[5][3]
.sym 9680 kbd_report[5][0]
.sym 9681 kbd_report[5][2]
.sym 9682 kbd_report[5][1]
.sym 9896 $auto$alumacc.cc:484:replace_alu$36695[7]
.sym 10011 $auto$alumacc.cc:483:replace_alu$36673[7]
.sym 10014 $auto$alumacc.cc:483:replace_alu$36673[2]
.sym 10016 $auto$alumacc.cc:483:replace_alu$36673[6]
.sym 10018 $auto$alumacc.cc:483:replace_alu$36673[5]
.sym 10121 $techmap\I2C.$procmux$19301_Y
.sym 10122 I2C.byte_counter[7]
.sym 10123 $false
.sym 10124 $false
.sym 10151 $false
.sym 10152 $true$2
.sym 10153 $auto$alumacc.cc:484:replace_alu$36714[0]
.sym 10154 $false
.sym 10156 $auto$alumacc.cc:484:replace_alu$36714[0]
.sym 10157 $abc$61381$n921
.sym 10158 $auto$wreduce.cc:310:run$36586[0]
.sym 10159 $abc$61381$n920
.sym 10160 $true
.sym 10161 CLK$2$2
.sym 10162 $false
.sym 10164 $abc$61381$n901
.sym 10165 $auto$simplemap.cc:309:simplemap_lut$47343[1]
.sym 10167 I2C.SCL_LAST
.sym 10237 $false
.sym 10238 I2C.byte_counter[7]
.sym 10239 $true$2
.sym 10240 $auto$alumacc.cc:470:replace_alu$36704.C[7]
.sym 10247 $techmap\I2C.$procmux$19301_Y
.sym 10248 I2C.byte_counter[5]
.sym 10249 $false
.sym 10250 $false
.sym 10252 $techmap\I2C.$procmux$19301_Y
.sym 10253 I2C.byte_counter[2]
.sym 10254 $false
.sym 10255 $false
.sym 10267 $abc$61381$n559
.sym 10268 $sub$top.v:78$20_Y[7]
.sym 10269 $false
.sym 10270 $false
.sym 10272 $abc$61381$n559
.sym 10273 $sub$top.v:78$20_Y[5]
.sym 10274 $false
.sym 10275 $false
.sym 10276 $auto$dff2dffe.cc:175:make_patterns_logic$50775
.sym 10277 CLK$2$2
.sym 10278 $logic_not$top.v:60$10_Y$2
.sym 10279 $abc$61381$n920
.sym 10280 $abc$61381$n902
.sym 10281 $abc$61381$n915
.sym 10282 $abc$61381$n932
.sym 10283 $abc$61381$n916
.sym 10284 $abc$61381$n905
.sym 10285 $abc$61381$n903
.sym 10286 I2C.wr
.sym 10353 $auto$alumacc.cc:483:replace_alu$36713[4]
.sym 10354 $auto$alumacc.cc:483:replace_alu$36713[7]
.sym 10355 I2C.byte_counter[5]
.sym 10356 I2C.byte_counter[6]
.sym 10358 $techmap\I2C.$procmux$19301_Y
.sym 10359 I2C.byte_counter[6]
.sym 10360 $false
.sym 10361 $false
.sym 10363 $auto$alumacc.cc:483:replace_alu$36713[4]
.sym 10364 $auto$alumacc.cc:483:replace_alu$36713[5]
.sym 10365 $auto$alumacc.cc:483:replace_alu$36713[6]
.sym 10366 $auto$alumacc.cc:483:replace_alu$36713[7]
.sym 10368 $abc$61381$n911
.sym 10369 $abc$61381$n912
.sym 10370 $false
.sym 10371 $false
.sym 10373 $techmap\I2C.$procmux$19301_Y
.sym 10374 I2C.i2c_bit_counter[3]
.sym 10375 $false
.sym 10376 $false
.sym 10378 $abc$61381$n922
.sym 10379 $auto$alumacc.cc:483:replace_alu$36713[2]
.sym 10380 $abc$61381$n606
.sym 10381 I2C.byte_counter[3]
.sym 10383 $auto$alumacc.cc:483:replace_alu$36713[5]
.sym 10384 $abc$61381$n921
.sym 10385 $auto$wreduce.cc:310:run$36586[5]
.sym 10386 $abc$61381$n920
.sym 10388 $auto$alumacc.cc:483:replace_alu$36644[3]
.sym 10389 $abc$61381$n936
.sym 10390 $abc$61381$n941
.sym 10391 $false
.sym 10392 $true
.sym 10393 CLK$2$2
.sym 10394 $false
.sym 10395 $abc$61381$n895
.sym 10396 $abc$61381$n931_1
.sym 10397 $abc$61381$n897
.sym 10398 $abc$61381$n896
.sym 10399 $abc$61381$n900
.sym 10400 $abc$61381$n908
.sym 10401 $abc$61381$n945
.sym 10402 I2C.i2c_state_machine
.sym 10474 $abc$61381$n500_1
.sym 10475 $abc$61381$n504
.sym 10476 $abc$61381$n512
.sym 10477 $abc$61381$n513
.sym 10479 I2C.byte_counter[4]
.sym 10480 I2C.byte_counter[5]
.sym 10481 I2C.byte_counter[6]
.sym 10482 I2C.byte_counter[7]
.sym 10484 I2C.byte_counter[0]
.sym 10485 I2C.byte_counter[1]
.sym 10486 $false
.sym 10487 $false
.sym 10489 $abc$61381$n910
.sym 10490 $abc$61381$n913
.sym 10491 $false
.sym 10492 $false
.sym 10494 $abc$61381$n500_1
.sym 10495 $abc$61381$n504
.sym 10496 $abc$61381$n512
.sym 10497 $abc$61381$n513
.sym 10499 I2C.byte_counter[0]
.sym 10500 I2C.byte_counter[1]
.sym 10501 $false
.sym 10502 $false
.sym 10504 I2C_OUTPUT_TYPE[1]
.sym 10505 I2C_OUTPUT_TYPE[0]
.sym 10506 I2C.byte_counter[5]
.sym 10507 $false
.sym 10508 $auto$dff2dffe.cc:158:make_patterns_logic$60701
.sym 10509 CLK$2$2
.sym 10510 $logic_not$top.v:60$10_Y$2
.sym 10511 $abc$61381$n949
.sym 10512 $abc$61381$n950
.sym 10513 $auto$dff2dffe.cc:158:make_patterns_logic$60701
.sym 10514 $abc$61381$n904
.sym 10515 $abc$61381$n646_1
.sym 10516 $abc$61381$n779
.sym 10518 I2C_HID_DESC.last_rd_request
.sym 10585 $abc$61381$n547
.sym 10586 $abc$61381$n501_1
.sym 10587 $abc$61381$n508
.sym 10588 $abc$61381$n509
.sym 10590 $abc$61381$n516
.sym 10591 $abc$61381$n509
.sym 10592 KEYBOARD.row_time[2]
.sym 10593 KEYBOARD.row_time[3]
.sym 10595 $abc$61381$n504
.sym 10596 KEYBOARD.row_time[0]
.sym 10597 KEYBOARD.row_time[1]
.sym 10598 $false
.sym 10600 $abc$61381$n516
.sym 10601 $abc$61381$n531
.sym 10602 KEYBOARD.row_time[2]
.sym 10603 KEYBOARD.row_time[3]
.sym 10605 $abc$61381$n500_1
.sym 10606 $abc$61381$n503_1
.sym 10607 $abc$61381$n505
.sym 10608 $false
.sym 10610 $abc$61381$n516
.sym 10611 $abc$61381$n512
.sym 10612 KEYBOARD.row_time[2]
.sym 10613 KEYBOARD.row_time[3]
.sym 10615 $abc$61381$n513
.sym 10616 KEYBOARD.row_time[2]
.sym 10617 KEYBOARD.row_time[3]
.sym 10618 $false
.sym 10620 I2C.byte_counter[2]
.sym 10621 $false
.sym 10622 $false
.sym 10623 $false
.sym 10624 $auto$dff2dffe.cc:158:make_patterns_logic$60701
.sym 10625 CLK$2$2
.sym 10626 $logic_not$top.v:60$10_Y$2
.sym 10627 $abc$61381$n937
.sym 10628 $auto$alumacc.cc:470:replace_alu$36715.A_buf[0]
.sym 10629 $abc$61381$n642
.sym 10630 $abc$61381$n936
.sym 10631 $abc$61381$n934
.sym 10632 $abc$61381$n643
.sym 10633 $abc$61381$n939
.sym 10634 I2C.i2c_bit_counter[0]
.sym 10701 $abc$61381$n517
.sym 10702 KEYBOARD.row_time[0]
.sym 10703 KEYBOARD.row_time[1]
.sym 10704 $false
.sym 10706 $abc$61381$n517
.sym 10707 $abc$61381$n542
.sym 10708 $abc$61381$n505
.sym 10709 $false
.sym 10711 $abc$61381$n956_1
.sym 10712 $abc$61381$n955
.sym 10713 $abc$61381$n648
.sym 10714 $techmap\I2C.$sub$i2c_slave.v:143$204_Y[0]
.sym 10716 $abc$61381$n513
.sym 10717 KEYBOARD.row_time[2]
.sym 10718 KEYBOARD.row_time[3]
.sym 10719 $false
.sym 10721 $abc$61381$n934
.sym 10722 $techmap\I2C.$sub$i2c_slave.v:143$204_Y[0]
.sym 10723 $auto$simplemap.cc:250:simplemap_eqne$52942[1]
.sym 10724 $false
.sym 10726 $abc$61381$n783
.sym 10727 $abc$61381$n618_1
.sym 10728 KEYBOARD.report[0][7]
.sym 10729 $false
.sym 10731 $abc$61381$n934
.sym 10732 $abc$61381$n646_1
.sym 10733 $techmap\I2C.$sub$i2c_slave.v:143$204_Y[3]
.sym 10734 $auto$simplemap.cc:250:simplemap_eqne$52942[1]
.sym 10736 $abc$61381$n834
.sym 10737 $abc$61381$n829
.sym 10738 $abc$61381$n618_1
.sym 10739 $abc$61381$n779
.sym 10740 $auto$dff2dffe.cc:175:make_patterns_logic$47877
.sym 10741 CLK$2$2
.sym 10742 $auto$simplemap.cc:256:simplemap_eqne$37067
.sym 10743 $abc$61381$n581
.sym 10744 $abc$61381$n615
.sym 10745 $abc$61381$n601
.sym 10746 $abc$61381$n616
.sym 10747 $abc$61381$n587
.sym 10748 $abc$61381$n618_1
.sym 10749 $abc$61381$n617
.sym 10750 $abc$61381$n781
.sym 10779 $true
.sym 10816 I2C.byte_counter[0]$2
.sym 10817 $false
.sym 10818 I2C.byte_counter[0]
.sym 10819 $false
.sym 10820 $false
.sym 10821 $auto$alumacc.cc:484:replace_alu$36703[1]$2
.sym 10823 I2C.byte_counter[1]
.sym 10824 $true$2
.sym 10830 $auto$alumacc.cc:484:replace_alu$36703[1]$2
.sym 10832 $false
.sym 10833 I2C.byte_counter[2]
.sym 10834 $false
.sym 10835 $auto$alumacc.cc:484:replace_alu$36703[1]
.sym 10837 $auto$alumacc.cc:483:replace_alu$36644[3]
.sym 10838 $false
.sym 10839 $false
.sym 10840 $false
.sym 10842 I2C.byte_counter[2]
.sym 10843 I2C.byte_counter[3]
.sym 10844 $false
.sym 10845 $false
.sym 10852 $2\I2C_OUT_DESC_MASK[7:0][7]
.sym 10853 $false
.sym 10854 $false
.sym 10855 $false
.sym 10856 $auto$dff2dffe.cc:175:make_patterns_logic$51864$2
.sym 10857 CLK$2$2
.sym 10858 $logic_not$top.v:60$10_Y$2
.sym 10859 $abc$61381$n782
.sym 10860 $abc$61381$n813
.sym 10861 $abc$61381$n820
.sym 10862 $abc$61381$n568
.sym 10863 $auto$wreduce.cc:310:run$36584[0]
.sym 10864 $abc$61381$n780_1
.sym 10865 I2C_TX_REPORT[5]
.sym 10866 I2C_TX_REPORT[4]
.sym 10933 $abc$61381$n642
.sym 10934 $abc$61381$n647_1
.sym 10935 $techmap\I2C.$sub$i2c_slave.v:143$204_Y[2]
.sym 10936 $false
.sym 10938 $abc$61381$n771
.sym 10939 $auto$wreduce.cc:310:run$36584[0]
.sym 10940 $auto$wreduce.cc:310:run$36584[2]
.sym 10941 $false
.sym 10943 I2C_TX_REPORT[0]
.sym 10944 I2C_TX_DESC[0]
.sym 10945 I2C_OUT_DESC_MASK[0]
.sym 10946 $false
.sym 10948 $abc$61381$n642
.sym 10949 $abc$61381$n647_1
.sym 10950 $techmap\I2C.$sub$i2c_slave.v:143$204_Y[2]
.sym 10951 $false
.sym 10953 RESET$2
.sym 10954 $abc$61381$n559
.sym 10955 I2C.is_read
.sym 10956 $false
.sym 10963 $abc$61381$n782
.sym 10964 $abc$61381$n768
.sym 10965 $abc$61381$n618_1
.sym 10966 $abc$61381$n779
.sym 10968 $abc$61381$n798_1
.sym 10969 $abc$61381$n793
.sym 10970 $abc$61381$n618_1
.sym 10971 $abc$61381$n779
.sym 10972 $auto$dff2dffe.cc:175:make_patterns_logic$47877
.sym 10973 CLK$2$2
.sym 10974 $auto$simplemap.cc:256:simplemap_eqne$37067
.sym 10975 $abc$61381$n873
.sym 10976 $abc$61381$n562
.sym 10977 $abc$61381$n567
.sym 10978 $auto$rtlil.cc:1692:NotGate$61156
.sym 10979 $abc$61381$n559
.sym 10980 $auto$simplemap.cc:127:simplemap_reduce$48347[1]
.sym 10981 $auto$dff2dffe.cc:175:make_patterns_logic$47997
.sym 10982 UART_WR
.sym 11049 $abc$61381$n877
.sym 11050 $abc$61381$n869
.sym 11051 $techmap\I2C.$sub$i2c_slave.v:143$204_Y[2]
.sym 11052 $false
.sym 11054 $abc$61381$n783
.sym 11055 $abc$61381$n618_1
.sym 11056 KEYBOARD.report[0][2]
.sym 11057 $false
.sym 11064 $abc$61381$n641
.sym 11065 $abc$61381$n648
.sym 11066 $techmap\I2C.$sub$i2c_slave.v:143$204_Y[0]
.sym 11067 $false
.sym 11069 $abc$61381$n873
.sym 11070 $abc$61381$n865
.sym 11071 $techmap\I2C.$sub$i2c_slave.v:143$204_Y[2]
.sym 11072 $false
.sym 11074 I2C_TX_REPORT[2]
.sym 11075 I2C_TX_DESC[2]
.sym 11076 I2C_OUT_DESC_MASK[2]
.sym 11077 $false
.sym 11079 $abc$61381$n953
.sym 11080 $abc$61381$n952
.sym 11081 $abc$61381$n648
.sym 11082 $techmap\I2C.$sub$i2c_slave.v:143$204_Y[0]
.sym 11084 $2\I2C_OUT_DESC_MASK[7:0][7]
.sym 11085 $false
.sym 11086 $false
.sym 11087 $false
.sym 11088 $auto$dff2dffe.cc:175:make_patterns_logic$51864$2
.sym 11089 CLK$2$2
.sym 11090 $logic_not$top.v:60$10_Y$2
.sym 11092 $abc$61381$n598
.sym 11093 $abc$61381$n599
.sym 11094 UART_TX_DATA[5]
.sym 11095 UART_TX_DATA[4]
.sym 11096 UART_TX_DATA[0]
.sym 11097 UART_TX_DATA[2]
.sym 11165 $abc$61381$n655
.sym 11166 $abc$61381$n648
.sym 11167 $techmap\I2C.$sub$i2c_slave.v:143$204_Y[0]
.sym 11168 $false
.sym 11170 KEYBOARD.kbd_code_hid[3]
.sym 11171 KEYBOARD.kbd_code_hid[2]
.sym 11172 kbd_report[3][2]
.sym 11173 kbd_report[3][3]
.sym 11175 $abc$61381$n655
.sym 11176 $abc$61381$n648
.sym 11177 $techmap\I2C.$sub$i2c_slave.v:143$204_Y[0]
.sym 11178 $false
.sym 11180 $abc$61381$n914_1
.sym 11181 I2C.received_byte[2]
.sym 11182 I2C.received_byte[7]
.sym 11183 I2C.received_byte[6]
.sym 11185 I2C.received_byte[3]
.sym 11186 I2C.received_byte[4]
.sym 11187 I2C.received_byte[5]
.sym 11188 I2C.received_byte[1]
.sym 11190 KEYBOARD.kbd_code_hid[2]
.sym 11191 $false
.sym 11192 $false
.sym 11193 $false
.sym 11200 KEYBOARD.kbd_code_hid[7]
.sym 11201 $false
.sym 11202 $false
.sym 11203 $false
.sym 11204 $auto$dff2dffe.cc:175:make_patterns_logic$57638
.sym 11205 CLK$2$2
.sym 11206 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 11207 $abc$61381$n722
.sym 11208 $abc$61381$n681
.sym 11209 $abc$61381$n808
.sym 11210 $abc$61381$n721
.sym 11211 $abc$61381$n723
.sym 11212 kbd_report[3][5]
.sym 11213 kbd_report[3][4]
.sym 11214 kbd_report[3][6]
.sym 11281 kbd_report[3][0]
.sym 11282 kbd_report[3][1]
.sym 11283 kbd_report[3][2]
.sym 11284 kbd_report[3][3]
.sym 11286 $abc$61381$n774
.sym 11287 kbd_report[3][7]
.sym 11288 $false
.sym 11289 $false
.sym 11291 kbd_report[3][1]
.sym 11292 $abc$61381$n774
.sym 11293 $abc$61381$n787
.sym 11294 $abc$61381$n790
.sym 11296 KEYBOARD.kbd_code_hid[1]
.sym 11297 KEYBOARD.kbd_code_hid[0]
.sym 11298 kbd_report[3][0]
.sym 11299 kbd_report[3][1]
.sym 11301 kbd_report[3][3]
.sym 11302 $abc$61381$n774
.sym 11303 $abc$61381$n802
.sym 11304 $abc$61381$n805
.sym 11306 $abc$61381$n774
.sym 11307 kbd_report[3][0]
.sym 11308 $false
.sym 11309 $false
.sym 11311 kbd_report[3][2]
.sym 11312 $abc$61381$n774
.sym 11313 $abc$61381$n794
.sym 11314 $abc$61381$n797
.sym 11316 KEYBOARD.kbd_code_hid[0]
.sym 11317 $false
.sym 11318 $false
.sym 11319 $false
.sym 11320 $auto$dff2dffe.cc:175:make_patterns_logic$57638
.sym 11321 CLK$2$2
.sym 11322 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 11323 $abc$61381$n673
.sym 11324 $abc$61381$n736
.sym 11325 $abc$61381$n822_1
.sym 11326 $abc$61381$n774
.sym 11327 $abc$61381$n739
.sym 11328 $abc$61381$n675
.sym 11329 $abc$61381$n740
.sym 11330 KEYBOARD.report[1][0]
.sym 11397 $abc$61381$n777
.sym 11398 KEYBOARD.report[1][3]
.sym 11399 kbd_report[5][3]
.sym 11400 $abc$61381$n776
.sym 11402 $abc$61381$n769
.sym 11403 $abc$61381$n773
.sym 11404 $abc$61381$n775_1
.sym 11405 $abc$61381$n778
.sym 11407 $abc$61381$n771
.sym 11408 $auto$wreduce.cc:310:run$36584[0]
.sym 11409 $auto$wreduce.cc:310:run$36584[2]
.sym 11410 $false
.sym 11412 $abc$61381$n777
.sym 11413 KEYBOARD.report[1][2]
.sym 11414 kbd_report[5][2]
.sym 11415 $abc$61381$n776
.sym 11417 $abc$61381$n777
.sym 11418 KEYBOARD.report[1][0]
.sym 11419 kbd_report[5][0]
.sym 11420 $abc$61381$n776
.sym 11422 $abc$61381$n777
.sym 11423 KEYBOARD.report[1][1]
.sym 11424 kbd_report[5][1]
.sym 11425 $abc$61381$n776
.sym 11427 KEYBOARD.kbd_code_hid[1]
.sym 11428 $false
.sym 11429 $false
.sym 11430 $false
.sym 11432 KEYBOARD.kbd_code_hid[2]
.sym 11433 $false
.sym 11434 $false
.sym 11435 $false
.sym 11436 $auto$dff2dffe.cc:175:make_patterns_logic$59214
.sym 11437 CLK$2$2
.sym 11438 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 11439 $abc$61381$n812_1
.sym 11440 $abc$61381$n674
.sym 11441 $abc$61381$n738
.sym 11442 $abc$61381$n826
.sym 11443 $abc$61381$n818
.sym 11444 $abc$61381$n737
.sym 11445 KEYBOARD.report[1][6]
.sym 11446 KEYBOARD.report[1][4]
.sym 11513 $abc$61381$n777
.sym 11514 KEYBOARD.report[1][7]
.sym 11515 kbd_report[5][7]
.sym 11516 $abc$61381$n776
.sym 11518 $abc$61381$n771
.sym 11519 $auto$wreduce.cc:310:run$36584[0]
.sym 11520 $auto$wreduce.cc:310:run$36584[2]
.sym 11521 KEYBOARD.report[2][2]
.sym 11523 $abc$61381$n771
.sym 11524 $auto$wreduce.cc:310:run$36584[0]
.sym 11525 $auto$wreduce.cc:310:run$36584[2]
.sym 11526 $false
.sym 11528 $abc$61381$n830
.sym 11529 $abc$61381$n831
.sym 11530 $abc$61381$n832_1
.sym 11531 $abc$61381$n833
.sym 11533 $abc$61381$n771
.sym 11534 $auto$wreduce.cc:310:run$36584[0]
.sym 11535 $auto$wreduce.cc:310:run$36584[2]
.sym 11536 $false
.sym 11538 kbd_report[6][1]
.sym 11539 $abc$61381$n770
.sym 11540 $abc$61381$n789
.sym 11541 $abc$61381$n788
.sym 11543 kbd_report[6][2]
.sym 11544 $abc$61381$n770
.sym 11545 $abc$61381$n796
.sym 11546 $abc$61381$n795
.sym 11548 KEYBOARD.kbd_code_hid[7]
.sym 11549 $false
.sym 11550 $false
.sym 11551 $false
.sym 11552 $auto$dff2dffe.cc:175:make_patterns_logic$59214
.sym 11553 CLK$2$2
.sym 11554 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 11555 $abc$61381$n686
.sym 11556 $abc$61381$n714
.sym 11557 $abc$61381$n711
.sym 11558 $abc$61381$n687
.sym 11559 $abc$61381$n703
.sym 11560 $abc$61381$n713
.sym 11561 $abc$61381$n712
.sym 11562 kbd_report[5][6]
.sym 11629 kbd_report[6][0]
.sym 11630 kbd_report[6][1]
.sym 11631 kbd_report[6][2]
.sym 11632 kbd_report[6][3]
.sym 11634 $abc$61381$n772
.sym 11635 kbd_report[4][7]
.sym 11636 kbd_report[6][7]
.sym 11637 $abc$61381$n770
.sym 11639 KEYBOARD.kbd_code_hid[1]
.sym 11640 KEYBOARD.kbd_code_hid[0]
.sym 11641 kbd_report[6][0]
.sym 11642 kbd_report[6][1]
.sym 11644 $abc$61381$n772
.sym 11645 kbd_report[4][0]
.sym 11646 kbd_report[6][0]
.sym 11647 $abc$61381$n770
.sym 11649 KEYBOARD.kbd_code_hid[3]
.sym 11650 KEYBOARD.kbd_code_hid[2]
.sym 11651 kbd_report[6][2]
.sym 11652 kbd_report[6][3]
.sym 11654 kbd_report[6][3]
.sym 11655 $abc$61381$n770
.sym 11656 $abc$61381$n804
.sym 11657 $abc$61381$n803
.sym 11659 KEYBOARD.kbd_code_hid[7]
.sym 11660 $false
.sym 11661 $false
.sym 11662 $false
.sym 11664 KEYBOARD.kbd_code_hid[0]
.sym 11665 $false
.sym 11666 $false
.sym 11667 $false
.sym 11668 $auto$dff2dffe.cc:175:make_patterns_logic$56573
.sym 11669 CLK$2$2
.sym 11670 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 11671 $abc$61381$n690
.sym 11672 $logic_not$top.v:60$10_Y
.sym 11673 $abc$61381$n705
.sym 11674 $abc$61381$n706
.sym 11675 $abc$61381$n689
.sym 11676 $abc$61381$n704_1
.sym 11677 kbd_report[5][4]
.sym 11678 kbd_report[5][5]
.sym 11745 KEYBOARD.kbd_code_hid[3]
.sym 11746 KEYBOARD.kbd_code_hid[2]
.sym 11747 kbd_report[5][2]
.sym 11748 kbd_report[5][3]
.sym 11750 KEYBOARD.kbd_code_hid[1]
.sym 11751 KEYBOARD.kbd_code_hid[0]
.sym 11752 kbd_report[5][0]
.sym 11753 kbd_report[5][1]
.sym 11755 kbd_report[5][0]
.sym 11756 kbd_report[5][1]
.sym 11757 kbd_report[5][2]
.sym 11758 kbd_report[5][3]
.sym 11760 KEYBOARD.kbd_code_hid[7]
.sym 11761 $false
.sym 11762 $false
.sym 11763 $false
.sym 11765 KEYBOARD.kbd_code_hid[3]
.sym 11766 $false
.sym 11767 $false
.sym 11768 $false
.sym 11770 KEYBOARD.kbd_code_hid[0]
.sym 11771 $false
.sym 11772 $false
.sym 11773 $false
.sym 11775 KEYBOARD.kbd_code_hid[2]
.sym 11776 $false
.sym 11777 $false
.sym 11778 $false
.sym 11780 KEYBOARD.kbd_code_hid[1]
.sym 11781 $false
.sym 11782 $false
.sym 11783 $false
.sym 11784 $auto$dff2dffe.cc:175:make_patterns_logic$55287
.sym 11785 CLK$2$2
.sym 11786 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 11861 RESET
.sym 11924 $true
.sym 11961 $auto$alumacc.cc:483:replace_alu$36673[2]$2
.sym 11962 $false
.sym 11963 $auto$alumacc.cc:483:replace_alu$36673[2]
.sym 11964 $false
.sym 11965 $false
.sym 11966 $auto$alumacc.cc:484:replace_alu$36695[3]
.sym 11968 $true$2
.sym 11969 $auto$alumacc.cc:483:replace_alu$36673[3]
.sym 11971 $auto$alumacc.cc:484:replace_alu$36695[4]
.sym 11973 $false
.sym 11974 $auto$simplemap.cc:309:simplemap_lut$47343[1]
.sym 11976 $auto$alumacc.cc:484:replace_alu$36695[5]
.sym 11978 $false
.sym 11979 $auto$alumacc.cc:483:replace_alu$36673[5]
.sym 11981 $auto$alumacc.cc:484:replace_alu$36695[6]
.sym 11983 $false
.sym 11984 $auto$alumacc.cc:483:replace_alu$36673[6]
.sym 11986 $auto$alumacc.cc:484:replace_alu$36695[7]$2
.sym 11988 $false
.sym 11989 $auto$alumacc.cc:483:replace_alu$36673[7]
.sym 11995 $auto$alumacc.cc:484:replace_alu$36695[7]$2
.sym 12006 KBD_COLUMNS[4]$2
.sym 12008 $auto$alumacc.cc:484:replace_alu$36674[7]
.sym 12009 $sub$top.v:78$20_Y[0]
.sym 12011 $techmap$auto$alumacc.cc:470:replace_alu$36724.$not$/usr/bin/../share/yosys/ice40/arith_map.v:42$37884_Y[1]
.sym 12013 $auto$alumacc.cc:483:replace_alu$36673[3]
.sym 12015 $auto$simplemap.cc:309:simplemap_lut$45894[3]
.sym 12118 I2C.byte_counter[7]
.sym 12119 $false
.sym 12120 $false
.sym 12121 $false
.sym 12133 I2C.byte_counter[2]
.sym 12134 $false
.sym 12135 $false
.sym 12136 $false
.sym 12143 I2C.byte_counter[6]
.sym 12144 $false
.sym 12145 $false
.sym 12146 $false
.sym 12153 I2C.byte_counter[5]
.sym 12154 $false
.sym 12155 $false
.sym 12156 $false
.sym 12160 $abc$61381$n523
.sym 12161 $abc$61381$n496_1
.sym 12162 $auto$alumacc.cc:470:replace_alu$36715.A_buf[1]
.sym 12163 $abc$61381$n543
.sym 12164 $auto$rtlil.cc:1692:NotGate$61316
.sym 12165 $abc$61381$n529
.sym 12166 $abc$61381$n538
.sym 12167 I2C_INPUT_LEN[0]
.sym 12239 I2C.SCL_LAST
.sym 12240 I2C.FLT_SCL.out
.sym 12241 $false
.sym 12242 $false
.sym 12244 I2C.byte_counter[4]
.sym 12245 $false
.sym 12246 $false
.sym 12247 $false
.sym 12254 I2C.FLT_SCL.out
.sym 12255 $false
.sym 12256 $false
.sym 12257 $false
.sym 12273 $true
.sym 12274 CLK$2$2
.sym 12275 $false
.sym 12276 $techmap$techmap36770\KEYBOARD.RAM.mem.0.0.0.$reduce_or$/usr/bin/../share/yosys/ice40/brams_map.v:308$36769_Y
.sym 12277 $abc$61381$n943
.sym 12278 $abc$61381$n898
.sym 12279 I2C.is_read
.sym 12280 I2C.i2c_bit_counter[1]
.sym 12282 I2C.is_ack
.sym 12283 KEYBOARD.RAM.last_we
.sym 12350 $abc$61381$n897
.sym 12351 $abc$61381$n915
.sym 12352 $abc$61381$n644
.sym 12353 $abc$61381$n646_1
.sym 12355 $abc$61381$n646_1
.sym 12356 $abc$61381$n903
.sym 12357 $abc$61381$n904
.sym 12358 $false
.sym 12360 $abc$61381$n916
.sym 12361 $auto$simplemap.cc:250:simplemap_eqne$52942[1]
.sym 12362 $false
.sym 12363 $false
.sym 12365 $auto$simplemap.cc:250:simplemap_eqne$52942[1]
.sym 12366 I2C.SCL_LAST
.sym 12367 I2C.FLT_SCL.out
.sym 12368 $abc$61381$n905
.sym 12370 $abc$61381$n898
.sym 12371 $abc$61381$n901
.sym 12372 $false
.sym 12373 $false
.sym 12375 $abc$61381$n898
.sym 12376 $abc$61381$n901
.sym 12377 $auto$simplemap.cc:250:simplemap_eqne$52942[1]
.sym 12378 $abc$61381$n644
.sym 12380 $auto$alumacc.cc:484:replace_alu$36709[7]
.sym 12381 $abc$61381$n644
.sym 12382 $abc$61381$n897
.sym 12383 $false
.sym 12385 $abc$61381$n902
.sym 12386 $abc$61381$n895
.sym 12387 $abc$61381$n905
.sym 12388 $abc$61381$n646_1
.sym 12389 $true
.sym 12390 CLK$2$2
.sym 12391 $false
.sym 12392 $abc$61381$n948
.sym 12393 $abc$61381$n628
.sym 12394 $abc$61381$n907
.sym 12395 $abc$61381$n917
.sym 12397 $abc$61381$n918
.sym 12398 $auto$alumacc.cc:483:replace_alu$36689[5]
.sym 12399 I2C_INPUT_LEN[1]
.sym 12466 $abc$61381$n896
.sym 12467 $abc$61381$n900
.sym 12468 $false
.sym 12469 $false
.sym 12471 $abc$61381$n900
.sym 12472 $abc$61381$n897
.sym 12473 $abc$61381$n932
.sym 12474 $false
.sym 12476 $abc$61381$n898
.sym 12477 $auto$simplemap.cc:250:simplemap_eqne$52942[1]
.sym 12478 I2C.SCL_LAST
.sym 12479 I2C.FLT_SCL.out
.sym 12481 $abc$61381$n897
.sym 12482 $abc$61381$n899
.sym 12483 I2C.FLT_SDA.out
.sym 12484 $false
.sym 12486 $auto$simplemap.cc:250:simplemap_eqne$52942[1]
.sym 12487 $abc$61381$n901
.sym 12488 $abc$61381$n644
.sym 12489 $false
.sym 12491 $abc$61381$n909
.sym 12492 $abc$61381$n915
.sym 12493 $false
.sym 12494 $false
.sym 12496 $abc$61381$n915
.sym 12497 $abc$61381$n896
.sym 12498 $abc$61381$n644
.sym 12499 $false
.sym 12501 $abc$61381$n945
.sym 12502 $abc$61381$n909
.sym 12503 $abc$61381$n644
.sym 12504 $abc$61381$n646_1
.sym 12505 $true
.sym 12506 CLK$2$2
.sym 12507 $logic_not$top.v:60$10_Y$2
.sym 12508 $abc$61381$n947
.sym 12509 $abc$61381$n630
.sym 12510 $abc$61381$n626
.sym 12511 $abc$61381$n899
.sym 12512 $abc$61381$n631
.sym 12513 $abc$61381$n634
.sym 12514 $abc$61381$n632
.sym 12515 I2C.SDA_DIR
.sym 12582 $abc$61381$n916
.sym 12583 $abc$61381$n899
.sym 12584 $abc$61381$n950
.sym 12585 $auto$simplemap.cc:250:simplemap_eqne$52942[1]
.sym 12587 $abc$61381$n899
.sym 12588 $abc$61381$n954
.sym 12589 $abc$61381$n951
.sym 12590 $abc$61381$n901
.sym 12592 I2C.wr
.sym 12593 I2C_HID_DESC.last_rd_request
.sym 12594 RESET$2
.sym 12595 $false
.sym 12597 I2C.FLT_SCL.out
.sym 12598 I2C.FLT_SDA.out
.sym 12599 I2C.SDA_LAST
.sym 12600 I2C.wr
.sym 12602 I2C.FLT_SCL.out
.sym 12603 I2C.FLT_SDA.out
.sym 12604 I2C.SDA_LAST
.sym 12605 I2C.i2c_state_machine
.sym 12607 $abc$61381$n780_1
.sym 12608 $abc$61381$n781
.sym 12609 $auto$alumacc.cc:484:replace_alu$36674[7]
.sym 12610 $auto$alumacc.cc:484:replace_alu$36695[7]
.sym 12617 I2C.wr
.sym 12618 $false
.sym 12619 $false
.sym 12620 $false
.sym 12621 $true
.sym 12622 CLK$2$2
.sym 12623 $logic_not$top.v:60$10_Y$2
.sym 12624 $abc$61381$n582
.sym 12625 $abc$61381$n584
.sym 12626 $abc$61381$n577
.sym 12627 $abc$61381$n644
.sym 12628 $auto$dff2dffe.cc:175:make_patterns_logic$49267
.sym 12629 $abc$61381$n589
.sym 12630 $abc$61381$n583
.sym 12631 $abc$61381$n585
.sym 12698 $abc$61381$n648
.sym 12699 $abc$61381$n934
.sym 12700 $abc$61381$n646_1
.sym 12701 $auto$simplemap.cc:250:simplemap_eqne$52942[1]
.sym 12703 $techmap\I2C.$procmux$19301_Y
.sym 12704 I2C.i2c_bit_counter[0]
.sym 12705 $false
.sym 12706 $false
.sym 12708 $abc$61381$n643
.sym 12709 $abc$61381$n646_1
.sym 12710 $auto$simplemap.cc:250:simplemap_eqne$52942[1]
.sym 12711 $false
.sym 12713 $abc$61381$n931_1
.sym 12714 $abc$61381$n646_1
.sym 12715 $false
.sym 12716 $false
.sym 12718 $abc$61381$n644
.sym 12719 I2C.SCL_LAST
.sym 12720 I2C.FLT_SCL.out
.sym 12721 $false
.sym 12723 $abc$61381$n644
.sym 12724 I2C.SCL_LAST
.sym 12725 I2C.FLT_SCL.out
.sym 12726 $false
.sym 12728 $abc$61381$n934
.sym 12729 $abc$61381$n646_1
.sym 12730 $techmap\I2C.$sub$i2c_slave.v:143$204_Y[2]
.sym 12731 $auto$simplemap.cc:250:simplemap_eqne$52942[1]
.sym 12733 $abc$61381$n933
.sym 12734 $abc$61381$n931_1
.sym 12735 $auto$alumacc.cc:470:replace_alu$36715.A_buf[0]
.sym 12736 $abc$61381$n646_1
.sym 12737 $true
.sym 12738 CLK$2$2
.sym 12739 $false
.sym 12740 $abc$61381$n610
.sym 12741 $abc$61381$n595
.sym 12742 $abc$61381$n594
.sym 12743 $abc$61381$n602
.sym 12744 $auto$simplemap.cc:256:simplemap_eqne$37067
.sym 12745 $abc$61381$n596
.sym 12746 $abc$61381$n609
.sym 12747 I2C_OUTPUT_TYPE[2]
.sym 12814 I2C.byte_counter[2]
.sym 12815 I2C.byte_counter[3]
.sym 12816 $false
.sym 12817 $false
.sym 12819 $abc$61381$n616
.sym 12820 $abc$61381$n603
.sym 12821 $abc$61381$n617
.sym 12822 $false
.sym 12824 $abc$61381$n581
.sym 12825 $abc$61381$n586
.sym 12826 I2C.byte_counter[0]
.sym 12827 I2C.byte_counter[1]
.sym 12829 $abc$61381$n588
.sym 12830 $abc$61381$n586
.sym 12831 $abc$61381$n606
.sym 12832 $false
.sym 12834 $abc$61381$n588
.sym 12835 I2C.byte_counter[0]
.sym 12836 I2C.byte_counter[1]
.sym 12837 $false
.sym 12839 $abc$61381$n581
.sym 12840 $abc$61381$n586
.sym 12841 I2C.byte_counter[0]
.sym 12842 I2C.byte_counter[1]
.sym 12844 I2C.byte_counter[3]
.sym 12845 I2C.byte_counter[2]
.sym 12846 $abc$61381$n606
.sym 12847 $false
.sym 12849 $abc$61381$n601
.sym 12850 $abc$61381$n616
.sym 12851 $false
.sym 12852 $false
.sym 12856 $auto$dff2dffe.cc:158:make_patterns_logic$53269
.sym 12857 $abc$61381$n593
.sym 12858 $abc$61381$n608
.sym 12859 $abc$61381$n597
.sym 12860 $abc$61381$n614_1
.sym 12861 $abc$61381$n607
.sym 12862 I2C_TRANS
.sym 12863 I2C.i2c_start_latency
.sym 12930 $abc$61381$n783
.sym 12931 $abc$61381$n618_1
.sym 12932 KEYBOARD.report[0][0]
.sym 12933 $false
.sym 12935 $abc$61381$n783
.sym 12936 $abc$61381$n618_1
.sym 12937 KEYBOARD.report[0][4]
.sym 12938 $false
.sym 12940 $abc$61381$n783
.sym 12941 $abc$61381$n618_1
.sym 12942 KEYBOARD.report[0][5]
.sym 12943 $false
.sym 12945 UART.tx_activity
.sym 12946 last_uart_active
.sym 12947 uart_double_ff
.sym 12948 $false
.sym 12950 $false
.sym 12951 I2C.byte_counter[0]
.sym 12952 $false
.sym 12953 $true$2
.sym 12955 $abc$61381$n587
.sym 12956 $abc$61381$n586
.sym 12957 $false
.sym 12958 $false
.sym 12960 $abc$61381$n820
.sym 12961 $abc$61381$n815
.sym 12962 $abc$61381$n618_1
.sym 12963 $abc$61381$n779
.sym 12965 $abc$61381$n813
.sym 12966 $abc$61381$n808
.sym 12967 $abc$61381$n618_1
.sym 12968 $abc$61381$n779
.sym 12969 $auto$dff2dffe.cc:175:make_patterns_logic$47877
.sym 12970 CLK$2$2
.sym 12971 $auto$simplemap.cc:256:simplemap_eqne$37067
.sym 12972 $abc$61381$n612
.sym 12973 $abc$61381$n600
.sym 12974 $abc$61381$n561
.sym 12975 $auto$dff2dffe.cc:175:make_patterns_logic$51864
.sym 12976 $abc$61381$n619_1
.sym 12977 $abc$61381$n592
.sym 12978 $auto$dff2dffe.cc:175:make_patterns_logic$49520
.sym 12979 $auto$dff2dffe.cc:175:make_patterns_logic$50775
.sym 13046 I2C_TX_REPORT[4]
.sym 13047 I2C_TX_DESC[4]
.sym 13048 I2C_OUT_DESC_MASK[4]
.sym 13049 $false
.sym 13051 $0\uart_double_ff[0:0]
.sym 13052 RESET$2
.sym 13053 I2C.wr
.sym 13054 last_wr
.sym 13056 $abc$61381$n562
.sym 13057 $2\INT[0:0]
.sym 13058 $false
.sym 13059 $false
.sym 13061 I2C.wr
.sym 13062 last_wr
.sym 13063 $false
.sym 13064 $false
.sym 13066 I2C.wr
.sym 13067 last_wr
.sym 13068 $false
.sym 13069 $false
.sym 13071 $abc$61381$n559
.sym 13072 RESET$2
.sym 13073 $abc$61381$n561
.sym 13074 $false
.sym 13076 $abc$61381$n568
.sym 13077 $abc$61381$n567
.sym 13078 RESET$2
.sym 13079 $auto$simplemap.cc:127:simplemap_reduce$48347[1]
.sym 13081 $0\uart_double_ff[0:0]
.sym 13082 $auto$rtlil.cc:1692:NotGate$61156
.sym 13083 $abc$61381$n568
.sym 13084 $false
.sym 13085 $auto$simplemap.cc:127:simplemap_reduce$48347[1]
.sym 13086 CLK$2$2
.sym 13087 $logic_not$top.v:60$10_Y$2
.sym 13088 $abc$61381$n605
.sym 13089 $abc$61381$n851
.sym 13090 $abc$61381$n852
.sym 13091 $abc$61381$n603
.sym 13092 $abc$61381$n856
.sym 13093 $abc$61381$n604
.sym 13094 $abc$61381$n849
.sym 13095 I2C.received_byte[5]
.sym 13167 $abc$61381$n599
.sym 13168 I2C.received_byte[4]
.sym 13169 I2C.received_byte[5]
.sym 13170 $false
.sym 13172 I2C.received_byte[7]
.sym 13173 I2C.received_byte[6]
.sym 13174 $false
.sym 13175 $false
.sym 13177 I2C.received_byte[5]
.sym 13178 $abc$61381$n875
.sym 13179 I2C.is_read
.sym 13180 $false
.sym 13182 I2C.received_byte[4]
.sym 13183 $abc$61381$n873
.sym 13184 I2C.is_read
.sym 13185 $false
.sym 13187 I2C.received_byte[0]
.sym 13188 $abc$61381$n865
.sym 13189 I2C.is_read
.sym 13190 $false
.sym 13192 I2C.received_byte[2]
.sym 13193 $abc$61381$n869
.sym 13194 I2C.is_read
.sym 13195 $false
.sym 13201 $auto$dff2dffe.cc:175:make_patterns_logic$47997
.sym 13202 CLK$2$2
.sym 13203 $auto$rtlil.cc:1692:NotGate$61156
.sym 13204 $abc$61381$n720
.sym 13205 $abc$61381$n817_1
.sym 13208 $abc$61381$n850
.sym 13209 $abc$61381$n677
.sym 13211 I2C.received_byte[7]
.sym 13278 KEYBOARD.kbd_code_hid[4]
.sym 13279 KEYBOARD.kbd_code_hid[5]
.sym 13280 kbd_report[3][4]
.sym 13281 kbd_report[3][5]
.sym 13283 kbd_report[3][4]
.sym 13284 kbd_report[3][5]
.sym 13285 kbd_report[3][6]
.sym 13286 kbd_report[3][7]
.sym 13288 kbd_report[3][4]
.sym 13289 $abc$61381$n774
.sym 13290 $abc$61381$n809
.sym 13291 $abc$61381$n812_1
.sym 13293 $abc$61381$n722
.sym 13294 $abc$61381$n723
.sym 13295 $abc$61381$n724
.sym 13296 $abc$61381$n725_1
.sym 13298 KEYBOARD.kbd_code_hid[7]
.sym 13299 KEYBOARD.kbd_code_hid[6]
.sym 13300 kbd_report[3][6]
.sym 13301 kbd_report[3][7]
.sym 13303 KEYBOARD.kbd_code_hid[5]
.sym 13304 $false
.sym 13305 $false
.sym 13306 $false
.sym 13308 KEYBOARD.kbd_code_hid[4]
.sym 13309 $false
.sym 13310 $false
.sym 13311 $false
.sym 13313 KEYBOARD.kbd_code_hid[6]
.sym 13314 $false
.sym 13315 $false
.sym 13316 $false
.sym 13317 $auto$dff2dffe.cc:175:make_patterns_logic$57638
.sym 13318 CLK$2$2
.sym 13319 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 13320 $abc$61381$n684
.sym 13321 $auto$dff2dffe.cc:175:make_patterns_logic$57638
.sym 13322 $abc$61381$n676
.sym 13323 $abc$61381$n719
.sym 13324 $abc$61381$n735
.sym 13325 $auto$dff2dffe.cc:175:make_patterns_logic$59214
.sym 13326 $abc$61381$n718
.sym 13327 $abc$61381$n667
.sym 13394 $abc$61381$n675
.sym 13395 $abc$61381$n674
.sym 13396 RESET$2
.sym 13397 $false
.sym 13399 $abc$61381$n737
.sym 13400 $abc$61381$n738
.sym 13401 $abc$61381$n739
.sym 13402 $abc$61381$n740
.sym 13404 kbd_report[3][6]
.sym 13405 $abc$61381$n774
.sym 13406 $abc$61381$n823
.sym 13407 $abc$61381$n826
.sym 13409 $abc$61381$n771
.sym 13410 $auto$wreduce.cc:310:run$36584[0]
.sym 13411 $auto$wreduce.cc:310:run$36584[2]
.sym 13412 $false
.sym 13414 KEYBOARD.kbd_code_hid[3]
.sym 13415 KEYBOARD.kbd_code_hid[2]
.sym 13416 KEYBOARD.report[1][2]
.sym 13417 KEYBOARD.report[1][3]
.sym 13419 KEYBOARD.report[1][0]
.sym 13420 KEYBOARD.report[1][1]
.sym 13421 KEYBOARD.report[1][2]
.sym 13422 KEYBOARD.report[1][3]
.sym 13424 KEYBOARD.kbd_code_hid[1]
.sym 13425 KEYBOARD.kbd_code_hid[0]
.sym 13426 KEYBOARD.report[1][0]
.sym 13427 KEYBOARD.report[1][1]
.sym 13429 KEYBOARD.kbd_code_hid[0]
.sym 13430 $false
.sym 13431 $false
.sym 13432 $false
.sym 13433 $auto$dff2dffe.cc:175:make_patterns_logic$59214
.sym 13434 CLK$2$2
.sym 13435 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 13436 $abc$61381$n811
.sym 13437 $abc$61381$n815
.sym 13438 $abc$61381$n772
.sym 13439 $abc$61381$n823
.sym 13440 $abc$61381$n810
.sym 13441 $abc$61381$n824
.sym 13442 $abc$61381$n809
.sym 13443 KEYBOARD.report[1][5]
.sym 13510 $abc$61381$n777
.sym 13511 KEYBOARD.report[1][4]
.sym 13512 kbd_report[5][4]
.sym 13513 $abc$61381$n776
.sym 13515 KEYBOARD.report[1][4]
.sym 13516 KEYBOARD.report[1][5]
.sym 13517 KEYBOARD.report[1][6]
.sym 13518 KEYBOARD.report[1][7]
.sym 13520 KEYBOARD.kbd_code_hid[7]
.sym 13521 KEYBOARD.kbd_code_hid[6]
.sym 13522 KEYBOARD.report[1][6]
.sym 13523 KEYBOARD.report[1][7]
.sym 13525 $abc$61381$n777
.sym 13526 KEYBOARD.report[1][6]
.sym 13527 kbd_report[5][6]
.sym 13528 $abc$61381$n776
.sym 13530 $abc$61381$n777
.sym 13531 KEYBOARD.report[1][5]
.sym 13532 kbd_report[5][5]
.sym 13533 $abc$61381$n776
.sym 13535 KEYBOARD.kbd_code_hid[4]
.sym 13536 KEYBOARD.kbd_code_hid[5]
.sym 13537 KEYBOARD.report[1][4]
.sym 13538 KEYBOARD.report[1][5]
.sym 13540 KEYBOARD.kbd_code_hid[6]
.sym 13541 $false
.sym 13542 $false
.sym 13543 $false
.sym 13545 KEYBOARD.kbd_code_hid[4]
.sym 13546 $false
.sym 13547 $false
.sym 13548 $false
.sym 13549 $auto$dff2dffe.cc:175:make_patterns_logic$59214
.sym 13550 CLK$2$2
.sym 13551 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 13552 $auto$dff2dffe.cc:175:make_patterns_logic$56573
.sym 13553 $auto$dff2dffe.cc:175:make_patterns_logic$55287
.sym 13554 $abc$61381$n683
.sym 13555 $abc$61381$n816
.sym 13556 $abc$61381$n701
.sym 13557 $abc$61381$n710
.sym 13558 $abc$61381$n702
.sym 13559 $abc$61381$n685
.sym 13626 $abc$61381$n687
.sym 13627 $abc$61381$n688
.sym 13628 $false
.sym 13629 $false
.sym 13631 KEYBOARD.kbd_code_hid[7]
.sym 13632 KEYBOARD.kbd_code_hid[6]
.sym 13633 kbd_report[4][6]
.sym 13634 kbd_report[4][7]
.sym 13636 $abc$61381$n668
.sym 13637 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 13638 $abc$61381$n712
.sym 13639 RESET$2
.sym 13641 kbd_report[4][4]
.sym 13642 kbd_report[4][5]
.sym 13643 kbd_report[4][6]
.sym 13644 kbd_report[4][7]
.sym 13646 $abc$61381$n668
.sym 13647 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 13648 $abc$61381$n704_1
.sym 13649 RESET$2
.sym 13651 KEYBOARD.kbd_code_hid[4]
.sym 13652 KEYBOARD.kbd_code_hid[5]
.sym 13653 kbd_report[4][4]
.sym 13654 kbd_report[4][5]
.sym 13656 $abc$61381$n713
.sym 13657 $abc$61381$n714
.sym 13658 $abc$61381$n715
.sym 13659 $abc$61381$n716
.sym 13661 KEYBOARD.kbd_code_hid[6]
.sym 13662 $false
.sym 13663 $false
.sym 13664 $false
.sym 13665 $auto$dff2dffe.cc:175:make_patterns_logic$55287
.sym 13666 CLK$2$2
.sym 13667 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 13669 kbd_report[4][5]
.sym 13670 kbd_report[4][4]
.sym 13673 kbd_report[4][6]
.sym 13742 kbd_report[5][4]
.sym 13743 kbd_report[5][5]
.sym 13744 kbd_report[5][6]
.sym 13745 kbd_report[5][7]
.sym 13747 RESET$2
.sym 13748 $false
.sym 13749 $false
.sym 13750 $false
.sym 13752 KEYBOARD.kbd_code_hid[4]
.sym 13753 KEYBOARD.kbd_code_hid[5]
.sym 13754 kbd_report[5][4]
.sym 13755 kbd_report[5][5]
.sym 13757 KEYBOARD.kbd_code_hid[7]
.sym 13758 KEYBOARD.kbd_code_hid[6]
.sym 13759 kbd_report[5][6]
.sym 13760 kbd_report[5][7]
.sym 13762 $abc$61381$n690
.sym 13763 $abc$61381$n691
.sym 13764 $false
.sym 13765 $false
.sym 13767 $abc$61381$n705
.sym 13768 $abc$61381$n706
.sym 13769 $abc$61381$n707
.sym 13770 $abc$61381$n708
.sym 13772 KEYBOARD.kbd_code_hid[4]
.sym 13773 $false
.sym 13774 $false
.sym 13775 $false
.sym 13777 KEYBOARD.kbd_code_hid[5]
.sym 13778 $false
.sym 13779 $false
.sym 13780 $false
.sym 13781 $auto$dff2dffe.cc:175:make_patterns_logic$55287
.sym 13782 CLK$2$2
.sym 13783 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 13828 $logic_not$top.v:60$10_Y
.sym 13858 $auto$rtlil.cc:1692:NotGate$61316
.sym 13887 KEYBOARD.COLS_SHADOW[2]
.sym 13888 KEYBOARD.COLS_SHADOW[0]
.sym 13889 KEYBOARD.COLS_SHADOW[5]
.sym 13891 KEYBOARD.COLS_SHADOW[4]
.sym 13921 $true
.sym 13958 $auto$simplemap.cc:309:simplemap_lut$45894[3]$2
.sym 13959 $false
.sym 13960 $auto$simplemap.cc:309:simplemap_lut$45894[3]
.sym 13961 $false
.sym 13962 $false
.sym 13963 $auto$alumacc.cc:484:replace_alu$36674[1]
.sym 13965 $true$2
.sym 13966 $techmap$auto$alumacc.cc:470:replace_alu$36724.$not$/usr/bin/../share/yosys/ice40/arith_map.v:42$37884_Y[1]
.sym 13968 $auto$alumacc.cc:484:replace_alu$36674[2]
.sym 13970 $false
.sym 13971 $auto$alumacc.cc:483:replace_alu$36673[2]
.sym 13973 $auto$alumacc.cc:484:replace_alu$36674[3]
.sym 13975 $false
.sym 13976 $auto$alumacc.cc:483:replace_alu$36673[3]
.sym 13978 $auto$alumacc.cc:484:replace_alu$36674[4]
.sym 13980 $false
.sym 13981 $auto$simplemap.cc:309:simplemap_lut$47343[1]
.sym 13983 $auto$alumacc.cc:484:replace_alu$36674[5]
.sym 13985 $false
.sym 13986 $auto$alumacc.cc:483:replace_alu$36673[5]
.sym 13988 $auto$alumacc.cc:484:replace_alu$36674[6]
.sym 13990 $false
.sym 13991 $auto$alumacc.cc:483:replace_alu$36673[6]
.sym 13993 $auto$alumacc.cc:484:replace_alu$36674[7]$2
.sym 13995 $false
.sym 13996 $auto$alumacc.cc:483:replace_alu$36673[7]
.sym 14003 KBD_COLUMNS[5]$2
.sym 14005 $auto$wreduce.cc:310:run$36595[0]
.sym 14007 $auto$wreduce.cc:310:run$36593[0]
.sym 14008 KEYBOARD.ROWS_EN[15]
.sym 14011 KEYBOARD.ROWS_EN[13]
.sym 14118 $auto$alumacc.cc:484:replace_alu$36674[7]$2
.sym 14120 $false
.sym 14121 I2C.byte_counter[0]
.sym 14122 $false
.sym 14123 $true$2
.sym 14130 I2C.byte_counter[1]
.sym 14131 $false
.sym 14132 $false
.sym 14133 $false
.sym 14140 I2C.byte_counter[3]
.sym 14141 $false
.sym 14142 $false
.sym 14143 $false
.sym 14150 I2C.byte_counter[0]
.sym 14151 $false
.sym 14152 $false
.sym 14153 $false
.sym 14157 $abc$61381$n544
.sym 14158 $abc$61381$n1003
.sym 14159 $abc$61381$n1005_1
.sym 14160 $abc$61381$n548
.sym 14161 $abc$61381$n532
.sym 14162 $abc$61381$n1002
.sym 14163 $abc$61381$n497
.sym 14164 $abc$61381$n524
.sym 14231 $abc$61381$n524
.sym 14232 $abc$61381$n515
.sym 14233 $abc$61381$n526
.sym 14234 $false
.sym 14236 $abc$61381$n529
.sym 14237 $abc$61381$n523
.sym 14238 $abc$61381$n497
.sym 14239 $abc$61381$n534
.sym 14241 $techmap\I2C.$procmux$19301_Y
.sym 14242 I2C.i2c_bit_counter[1]
.sym 14243 $false
.sym 14244 $false
.sym 14246 $abc$61381$n544
.sym 14247 $abc$61381$n546
.sym 14248 $false
.sym 14249 $false
.sym 14251 $abc$61381$n543
.sym 14252 $abc$61381$n538
.sym 14253 $abc$61381$n496_1
.sym 14254 $abc$61381$n548
.sym 14256 $abc$61381$n530
.sym 14257 $abc$61381$n532
.sym 14258 $false
.sym 14259 $false
.sym 14261 $abc$61381$n539
.sym 14262 $abc$61381$n541
.sym 14263 $false
.sym 14264 $false
.sym 14266 $abc$61381$n559
.sym 14267 $sub$top.v:78$20_Y[0]
.sym 14268 $false
.sym 14269 $false
.sym 14270 $auto$dff2dffe.cc:175:make_patterns_logic$50775
.sym 14271 CLK$2$2
.sym 14272 $logic_not$top.v:60$10_Y$2
.sym 14273 $abc$61381$n1015_1
.sym 14274 $abc$61381$n533
.sym 14275 $abc$61381$n525
.sym 14276 $abc$61381$n1016_1
.sym 14277 $abc$61381$n1006
.sym 14278 $abc$61381$n1007
.sym 14279 KEYBOARD.temp[5]
.sym 14280 KEYBOARD.temp[4]
.sym 14347 KEYBOARD.ram_wr
.sym 14348 KEYBOARD.RAM.last_we
.sym 14349 $false
.sym 14350 $false
.sym 14352 $abc$61381$n915
.sym 14353 $abc$61381$n646_1
.sym 14354 I2C.received_byte[0]
.sym 14355 $false
.sym 14357 $techmap\I2C.$procmux$19301_Y
.sym 14358 I2C.is_ack
.sym 14359 $false
.sym 14360 $false
.sym 14362 $abc$61381$n644
.sym 14363 $abc$61381$n910
.sym 14364 $abc$61381$n943
.sym 14365 $false
.sym 14367 $abc$61381$n937
.sym 14368 $abc$61381$n936
.sym 14369 $auto$alumacc.cc:470:replace_alu$36715.A_buf[1]
.sym 14370 $false
.sym 14377 I2C.is_ack
.sym 14378 $abc$61381$n907
.sym 14379 $abc$61381$n646_1
.sym 14380 $false
.sym 14382 KEYBOARD.ram_wr
.sym 14383 $false
.sym 14384 $false
.sym 14385 $false
.sym 14386 $true
.sym 14387 CLK$2$2
.sym 14388 $false
.sym 14389 $auto$wreduce.cc:310:run$36596[0]
.sym 14390 $abc$61381$n521
.sym 14391 $abc$61381$n997
.sym 14392 $abc$61381$n519
.sym 14393 $auto$wreduce.cc:310:run$36597[0]
.sym 14394 $abc$61381$n1004_1
.sym 14396 KEYBOARD.temp[6]
.sym 14463 $abc$61381$n901
.sym 14464 $auto$simplemap.cc:250:simplemap_eqne$52942[1]
.sym 14465 $abc$61381$n899
.sym 14466 $abc$61381$n908
.sym 14468 I2C_INPUT_LEN[4]
.sym 14469 I2C_INPUT_LEN[5]
.sym 14470 I2C_INPUT_LEN[6]
.sym 14471 I2C_INPUT_LEN[7]
.sym 14473 $abc$61381$n918
.sym 14474 $abc$61381$n917
.sym 14475 $abc$61381$n908
.sym 14476 $abc$61381$n644
.sym 14478 $auto$simplemap.cc:250:simplemap_eqne$52942[1]
.sym 14479 $abc$61381$n901
.sym 14480 $abc$61381$n898
.sym 14481 $false
.sym 14488 $auto$simplemap.cc:250:simplemap_eqne$52942[1]
.sym 14489 $abc$61381$n898
.sym 14490 $abc$61381$n901
.sym 14491 $false
.sym 14493 I2C_INPUT_LEN[5]
.sym 14494 $false
.sym 14495 $false
.sym 14496 $false
.sym 14498 $abc$61381$n559
.sym 14499 $abc$61381$n771
.sym 14500 $false
.sym 14501 $false
.sym 14502 $auto$dff2dffe.cc:175:make_patterns_logic$50775
.sym 14503 CLK$2$2
.sym 14504 $logic_not$top.v:60$10_Y$2
.sym 14505 $abc$61381$n629
.sym 14506 $abc$61381$n635
.sym 14507 $abc$61381$n633
.sym 14508 $abc$61381$n858_1
.sym 14509 $abc$61381$n627
.sym 14510 $abc$61381$n625
.sym 14511 i2c_input_data_type[1]
.sym 14512 i2c_input_data_type[2]
.sym 14579 $abc$61381$n949
.sym 14580 $abc$61381$n948
.sym 14581 $abc$61381$n644
.sym 14582 $abc$61381$n646_1
.sym 14584 $abc$61381$n631
.sym 14585 I2C_INPUT_LEN[0]
.sym 14586 I2C_INPUT_LEN[1]
.sym 14587 $abc$61381$n613
.sym 14589 $abc$61381$n627
.sym 14590 $abc$61381$n630
.sym 14591 $abc$61381$n632
.sym 14592 $abc$61381$n634
.sym 14594 I2C.FLT_SCL.out
.sym 14595 I2C.FLT_SDA.out
.sym 14596 I2C.SDA_LAST
.sym 14597 I2C.SDA_DIR
.sym 14599 $abc$61381$n628
.sym 14600 I2C_INPUT_LEN[2]
.sym 14601 I2C_INPUT_LEN[3]
.sym 14602 $false
.sym 14604 $abc$61381$n631
.sym 14605 I2C_INPUT_LEN[0]
.sym 14606 I2C_INPUT_LEN[1]
.sym 14607 $abc$61381$n611_1
.sym 14609 $abc$61381$n633
.sym 14610 $abc$61381$n631
.sym 14611 $abc$61381$n590
.sym 14612 $false
.sym 14614 $abc$61381$n899
.sym 14615 I2C.i2c_state_machine
.sym 14616 $abc$61381$n947
.sym 14617 $false
.sym 14618 $true
.sym 14619 CLK$2$2
.sym 14620 $false
.sym 14621 $abc$61381$n611_1
.sym 14622 $abc$61381$n613
.sym 14623 $abc$61381$n590
.sym 14624 $abc$61381$n580
.sym 14625 $auto$alumacc.cc:483:replace_alu$36644[0]
.sym 14626 $auto$alumacc.cc:483:replace_alu$36662[3]
.sym 14627 KEYBOARD.report[0][7]
.sym 14628 KEYBOARD.report[0][4]
.sym 14695 I2C.byte_counter[0]
.sym 14696 I2C.byte_counter[2]
.sym 14697 I2C.byte_counter[3]
.sym 14698 I2C.byte_counter[1]
.sym 14700 $abc$61381$n585
.sym 14701 $abc$61381$n586
.sym 14702 I2C.is_read
.sym 14703 $false
.sym 14705 $abc$61381$n581
.sym 14706 I2C.byte_counter[1]
.sym 14707 $abc$61381$n582
.sym 14708 $abc$61381$n578
.sym 14710 I2C.is_read
.sym 14711 $techmap\I2C.$procmux$19301_Y
.sym 14712 I2C.i2c_state_machine
.sym 14713 I2C.i2c_start_latency
.sym 14715 I2C.byte_counter[1]
.sym 14716 $abc$61381$n589
.sym 14717 $abc$61381$n577
.sym 14718 $abc$61381$n583
.sym 14720 I2C.byte_counter[0]
.sym 14721 $abc$61381$n590
.sym 14722 I2C.byte_counter[2]
.sym 14723 I2C.byte_counter[3]
.sym 14725 $abc$61381$n584
.sym 14726 $abc$61381$n587
.sym 14727 RESET$2
.sym 14728 $abc$61381$n559
.sym 14730 I2C.byte_counter[0]
.sym 14731 I2C.byte_counter[1]
.sym 14732 $abc$61381$n581
.sym 14733 $false
.sym 14737 $abc$61381$n636
.sym 14738 $abc$61381$n862
.sym 14739 $abc$61381$n578
.sym 14740 $abc$61381$n574
.sym 14741 $abc$61381$n980_1
.sym 14742 $abc$61381$n883
.sym 14743 i2c_input_data_type[3]
.sym 14744 i2c_input_data_type[0]
.sym 14811 I2C.received_byte[0]
.sym 14812 I2C.received_byte[1]
.sym 14813 $abc$61381$n611_1
.sym 14814 $abc$61381$n601
.sym 14816 $abc$61381$n596
.sym 14817 I2C.byte_counter[0]
.sym 14818 I2C.byte_counter[1]
.sym 14819 $false
.sym 14821 $abc$61381$n602
.sym 14822 $abc$61381$n595
.sym 14823 $abc$61381$n581
.sym 14824 $false
.sym 14826 $abc$61381$n579
.sym 14827 $abc$61381$n603
.sym 14828 $abc$61381$n606
.sym 14829 $false
.sym 14831 I2C_OUTPUT_TYPE[2]
.sym 14832 I2C_OUTPUT_TYPE[1]
.sym 14833 I2C_OUTPUT_TYPE[0]
.sym 14834 $false
.sym 14836 $abc$61381$n601
.sym 14837 $abc$61381$n597
.sym 14838 $abc$61381$n590
.sym 14839 $false
.sym 14841 I2C.received_byte[0]
.sym 14842 I2C.received_byte[1]
.sym 14843 $abc$61381$n578
.sym 14844 $abc$61381$n610
.sym 14846 $abc$61381$n889
.sym 14847 $2\INT[0:0]
.sym 14848 $false
.sym 14849 $false
.sym 14850 $auto$dff2dffe.cc:175:make_patterns_logic$51864$2
.sym 14851 CLK$2$2
.sym 14852 $logic_not$top.v:60$10_Y$2
.sym 14853 $abc$61381$n557
.sym 14854 $abc$61381$n982
.sym 14855 $abc$61381$n637
.sym 14856 $abc$61381$n836
.sym 14857 $abc$61381$n623
.sym 14858 $abc$61381$n579
.sym 14859 KEYBOARD.report[0][0]
.sym 14860 KEYBOARD.report[0][5]
.sym 14927 I2C.i2c_state_machine
.sym 14928 I2C.i2c_start_latency
.sym 14929 $techmap\I2C.$procmux$19301_Y
.sym 14930 $false
.sym 14932 $abc$61381$n587
.sym 14933 $abc$61381$n607
.sym 14934 $abc$61381$n614_1
.sym 14935 $abc$61381$n594
.sym 14937 $abc$61381$n598
.sym 14938 $abc$61381$n605
.sym 14939 $abc$61381$n579
.sym 14940 $abc$61381$n609
.sym 14942 $abc$61381$n600
.sym 14943 $abc$61381$n598
.sym 14944 $abc$61381$n579
.sym 14945 $false
.sym 14947 $abc$61381$n618_1
.sym 14948 $abc$61381$n613
.sym 14949 $abc$61381$n615
.sym 14950 $false
.sym 14952 $abc$61381$n613
.sym 14953 $abc$61381$n612
.sym 14954 $abc$61381$n608
.sym 14955 $false
.sym 14957 I2C.i2c_state_machine
.sym 14958 I2C.i2c_start_latency
.sym 14959 $false
.sym 14960 $false
.sym 14962 $techmap\I2C.$procmux$19301_Y
.sym 14963 $false
.sym 14964 $false
.sym 14965 $false
.sym 14966 $auto$dff2dffe.cc:158:make_patterns_logic$53269
.sym 14967 CLK$2$2
.sym 14968 $false
.sym 14969 $abc$61381$n638
.sym 14970 $auto$dff2dffe.cc:175:make_patterns_logic$48548
.sym 14971 $auto$dff2dffe.cc:175:make_patterns_logic$52500
.sym 14972 $abc$61381$n863
.sym 14973 $auto$dff2dffe.cc:175:make_patterns_logic$48604
.sym 14974 $abc$61381$n571
.sym 14975 $abc$61381$n570
.sym 14976 INT
.sym 15043 $abc$61381$n598
.sym 15044 $abc$61381$n605
.sym 15045 I2C.received_byte[0]
.sym 15046 I2C.received_byte[1]
.sym 15048 I2C.received_byte[0]
.sym 15049 I2C.received_byte[3]
.sym 15050 I2C.received_byte[1]
.sym 15051 I2C.received_byte[2]
.sym 15053 $abc$61381$n562
.sym 15054 $2\INT[0:0]
.sym 15055 $false
.sym 15056 $false
.sym 15058 I2C.is_read
.sym 15059 $abc$61381$n561
.sym 15060 $abc$61381$n570
.sym 15061 $false
.sym 15063 $2\INT[0:0]
.sym 15064 I2C.is_read
.sym 15065 $abc$61381$n562
.sym 15066 $false
.sym 15068 $abc$61381$n559
.sym 15069 $abc$61381$n593
.sym 15070 $abc$61381$n586
.sym 15071 I2C.is_read
.sym 15073 $abc$61381$n592
.sym 15074 $abc$61381$n619_1
.sym 15075 $auto$rtlil.cc:1692:NotGate$61156
.sym 15076 RESET$2
.sym 15078 $2\INT[0:0]
.sym 15079 $abc$61381$n568
.sym 15080 $abc$61381$n562
.sym 15081 $abc$61381$n572
.sym 15085 $abc$61381$n860
.sym 15086 $abc$61381$n854
.sym 15087 $auto$dff2dffe.cc:175:make_patterns_logic$59740
.sym 15088 $abc$61381$n669
.sym 15089 $abc$61381$n672
.sym 15090 $abc$61381$n859_1
.sym 15091 $abc$61381$n855_1
.sym 15092 temp_output_report[0]
.sym 15159 I2C.received_byte[3]
.sym 15160 I2C.received_byte[2]
.sym 15161 $false
.sym 15162 $false
.sym 15164 $abc$61381$n852
.sym 15165 $abc$61381$n598
.sym 15166 $abc$61381$n618_1
.sym 15167 $abc$61381$n604
.sym 15169 $abc$61381$n599
.sym 15170 I2C.received_byte[4]
.sym 15171 I2C.received_byte[5]
.sym 15172 $false
.sym 15174 $abc$61381$n598
.sym 15175 $abc$61381$n604
.sym 15176 $false
.sym 15177 $false
.sym 15179 $abc$61381$n604
.sym 15180 $abc$61381$n599
.sym 15181 I2C.received_byte[4]
.sym 15182 I2C.received_byte[5]
.sym 15184 $abc$61381$n605
.sym 15185 I2C.received_byte[0]
.sym 15186 I2C.received_byte[1]
.sym 15187 $false
.sym 15189 $abc$61381$n851
.sym 15190 $abc$61381$n780_1
.sym 15191 $abc$61381$n850
.sym 15192 I2C.received_byte[0]
.sym 15194 I2C.FLT_SDA.out
.sym 15195 $false
.sym 15196 $false
.sym 15197 $false
.sym 15198 $auto$dff2dffe.cc:175:make_patterns_logic$53126
.sym 15199 CLK$2$2
.sym 15200 $false
.sym 15206 $auto$alumacc.cc:484:replace_alu$36629[7]
.sym 15207 $abc$61381$n668
.sym 15208 KBD_FREEZE
.sym 15275 $abc$61381$n668
.sym 15276 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 15277 $abc$61381$n721
.sym 15278 RESET$2
.sym 15280 $abc$61381$n774
.sym 15281 kbd_report[3][5]
.sym 15282 $false
.sym 15283 $false
.sym 15295 $auto$alumacc.cc:484:replace_alu$36650[7]
.sym 15296 $abc$61381$n612
.sym 15297 $auto$alumacc.cc:484:replace_alu$36685[7]
.sym 15298 $false
.sym 15300 $abc$61381$n682
.sym 15301 $abc$61381$n681
.sym 15302 $abc$61381$n678
.sym 15303 $false
.sym 15310 I2C.FLT_SDA.out
.sym 15311 $false
.sym 15312 $false
.sym 15313 $false
.sym 15314 $auto$dff2dffe.cc:175:make_patterns_logic$53260
.sym 15315 CLK$2$2
.sym 15316 $false
.sym 15317 $abc$61381$n680
.sym 15318 $abc$61381$n778
.sym 15319 $abc$61381$n733
.sym 15320 $abc$61381$n728
.sym 15321 $auto$dff2dffe.cc:175:make_patterns_logic$58513
.sym 15322 $abc$61381$n727
.sym 15323 $abc$61381$n678
.sym 15324 KEYBOARD.report[2][1]
.sym 15391 $abc$61381$n677
.sym 15392 $abc$61381$n673
.sym 15393 $false
.sym 15394 $false
.sym 15396 $abc$61381$n667
.sym 15397 $abc$61381$n718
.sym 15398 $abc$61381$n719
.sym 15399 $abc$61381$n720
.sym 15401 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 15402 $abc$61381$n668
.sym 15403 $abc$61381$n677
.sym 15404 $abc$61381$n673
.sym 15406 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 15407 $abc$61381$n668
.sym 15408 $abc$61381$n684
.sym 15409 $false
.sym 15411 $abc$61381$n736
.sym 15412 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 15413 $abc$61381$n668
.sym 15414 RESET$2
.sym 15416 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 15417 $abc$61381$n668
.sym 15418 $abc$61381$n673
.sym 15419 $abc$61381$n735
.sym 15421 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 15422 $abc$61381$n668
.sym 15423 $abc$61381$n673
.sym 15424 $abc$61381$n678
.sym 15426 RESET$2
.sym 15427 $abc$61381$n668
.sym 15428 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 15429 $abc$61381$n673
.sym 15433 $abc$61381$n833
.sym 15434 $abc$61381$n730
.sym 15435 $abc$61381$n804
.sym 15436 $abc$61381$n825
.sym 15437 $abc$61381$n731
.sym 15438 $abc$61381$n789
.sym 15439 $abc$61381$n819
.sym 15440 $abc$61381$n729
.sym 15507 $abc$61381$n771
.sym 15508 $auto$wreduce.cc:310:run$36584[0]
.sym 15509 $auto$wreduce.cc:310:run$36584[2]
.sym 15510 KEYBOARD.report[2][4]
.sym 15512 $abc$61381$n816
.sym 15513 $abc$61381$n817_1
.sym 15514 $abc$61381$n818
.sym 15515 $abc$61381$n819
.sym 15517 $abc$61381$n771
.sym 15518 $auto$wreduce.cc:310:run$36584[0]
.sym 15519 $auto$wreduce.cc:310:run$36584[2]
.sym 15520 $false
.sym 15522 kbd_report[6][6]
.sym 15523 $abc$61381$n770
.sym 15524 $abc$61381$n825
.sym 15525 $abc$61381$n824
.sym 15527 $abc$61381$n772
.sym 15528 kbd_report[4][4]
.sym 15529 $false
.sym 15530 $false
.sym 15532 $abc$61381$n772
.sym 15533 kbd_report[4][6]
.sym 15534 $false
.sym 15535 $false
.sym 15537 kbd_report[6][4]
.sym 15538 $abc$61381$n770
.sym 15539 $abc$61381$n811
.sym 15540 $abc$61381$n810
.sym 15542 KEYBOARD.kbd_code_hid[5]
.sym 15543 $false
.sym 15544 $false
.sym 15545 $false
.sym 15546 $auto$dff2dffe.cc:175:make_patterns_logic$59214
.sym 15547 CLK$2$2
.sym 15548 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 15549 $abc$61381$n695
.sym 15550 $abc$61381$n696
.sym 15551 $auto$dff2dffe.cc:175:make_patterns_logic$55122
.sym 15552 $abc$61381$n697
.sym 15553 $abc$61381$n692
.sym 15554 $abc$61381$n694
.sym 15555 kbd_report[6][5]
.sym 15556 kbd_report[6][6]
.sym 15623 $abc$61381$n667
.sym 15624 $abc$61381$n676
.sym 15625 $abc$61381$n710
.sym 15626 $abc$61381$n711
.sym 15628 $abc$61381$n667
.sym 15629 $abc$61381$n676
.sym 15630 $abc$61381$n701
.sym 15631 $abc$61381$n703
.sym 15633 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 15634 $abc$61381$n668
.sym 15635 $abc$61381$n684
.sym 15636 $abc$61381$n685
.sym 15638 $abc$61381$n772
.sym 15639 kbd_report[4][5]
.sym 15640 kbd_report[6][5]
.sym 15641 $abc$61381$n770
.sym 15643 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 15644 $abc$61381$n668
.sym 15645 $abc$61381$n684
.sym 15646 $abc$61381$n702
.sym 15648 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 15649 $abc$61381$n668
.sym 15650 $abc$61381$n684
.sym 15651 $abc$61381$n686
.sym 15653 $abc$61381$n686
.sym 15654 $abc$61381$n689
.sym 15655 $false
.sym 15656 $false
.sym 15658 $abc$61381$n686
.sym 15659 $abc$61381$n689
.sym 15660 $abc$61381$n692
.sym 15661 $abc$61381$n693
.sym 15666 kbd_report[6][3]
.sym 15668 kbd_report[6][7]
.sym 15671 kbd_report[6][4]
.sym 15744 KEYBOARD.kbd_code_hid[5]
.sym 15745 $false
.sym 15746 $false
.sym 15747 $false
.sym 15749 KEYBOARD.kbd_code_hid[4]
.sym 15750 $false
.sym 15751 $false
.sym 15752 $false
.sym 15764 KEYBOARD.kbd_code_hid[6]
.sym 15765 $false
.sym 15766 $false
.sym 15767 $false
.sym 15778 $auto$dff2dffe.cc:175:make_patterns_logic$56573
.sym 15779 CLK$2$2
.sym 15780 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 15825 $auto$dff2dffe.cc:175:make_patterns_logic$51864
.sym 15971 KBD_COLUMNS[2]$2
.sym 15972 $false
.sym 15973 $false
.sym 15974 $false
.sym 15976 KBD_COLUMNS[0]$2
.sym 15977 $false
.sym 15978 $false
.sym 15979 $false
.sym 15981 KBD_COLUMNS[5]$2
.sym 15982 $false
.sym 15983 $false
.sym 15984 $false
.sym 15991 KBD_COLUMNS[4]$2
.sym 15992 $false
.sym 15993 $false
.sym 15994 $false
.sym 15995 $true
.sym 15996 CLK$2$2
.sym 15997 $false
.sym 15998 KBD_COLUMNS[6]$2
.sym 16000 KBD_COLUMNS[7]$2
.sym 16003 KEYBOARD.COLS_SHADOW[6]
.sym 16004 KEYBOARD.COLS_SHADOW[7]
.sym 16005 I2C.SCLF
.sym 16006 I2C.SDAF
.sym 16007 KEYBOARD.COLS_SHADOW[1]
.sym 16008 KEYBOARD.COLS_SHADOW[3]
.sym 16112 $false
.sym 16113 $true$2
.sym 16114 $false
.sym 16115 $false
.sym 16122 $false
.sym 16123 $true$2
.sym 16124 $false
.sym 16125 $false
.sym 16127 $techmap$techmap\KEYBOARD.$shl$matrix_kbd.v:55$268.$procmux$44379_Y[15]
.sym 16128 $false
.sym 16129 $false
.sym 16130 $false
.sym 16142 $techmap$techmap\KEYBOARD.$shl$matrix_kbd.v:55$268.$procmux$44379_Y[13]
.sym 16143 $false
.sym 16144 $false
.sym 16145 $false
.sym 16151 $auto$dff2dffe.cc:175:make_patterns_logic$59992$2
.sym 16152 CLK$2$2
.sym 16153 $auto$rtlil.cc:1692:NotGate$61332
.sym 16154 $abc$61381$n1019
.sym 16155 $abc$61381$n1010
.sym 16156 $techmap\KEYBOARD.$add$matrix_kbd.v:240$336_Y[0]
.sym 16157 $abc$61381$n1008
.sym 16158 $abc$61381$n1001
.sym 16159 $abc$61381$n1018
.sym 16160 $techmap\KEYBOARD.$procmux$8366_Y[2]
.sym 16161 I2C.FLT_SCL.out
.sym 16228 $abc$61381$n545
.sym 16229 KEYBOARD.is_pressed
.sym 16230 KEYBOARD.COLS_SHADOW[2]
.sym 16231 $abc$61381$n541
.sym 16233 $abc$61381$n1004_1
.sym 16234 $abc$61381$n1005_1
.sym 16235 $abc$61381$n526
.sym 16236 $false
.sym 16238 $abc$61381$n515
.sym 16239 $abc$61381$n525
.sym 16240 $auto$wreduce.cc:310:run$36595[0]
.sym 16241 KEYBOARD.COLS_SHADOW[5]
.sym 16243 $abc$61381$n549
.sym 16244 KEYBOARD.is_pressed
.sym 16245 KEYBOARD.COLS_SHADOW[0]
.sym 16246 $abc$61381$n546
.sym 16248 $abc$61381$n533
.sym 16249 KEYBOARD.is_pressed
.sym 16250 KEYBOARD.COLS_SHADOW[4]
.sym 16251 $abc$61381$n526
.sym 16253 $auto$wreduce.cc:310:run$36594[0]
.sym 16254 $abc$61381$n526
.sym 16255 $abc$61381$n1003
.sym 16256 $abc$61381$n1006
.sym 16258 KEYBOARD.is_pressed
.sym 16259 $abc$61381$n498_1
.sym 16260 $abc$61381$n519
.sym 16261 $abc$61381$n515
.sym 16263 $abc$61381$n525
.sym 16264 KEYBOARD.is_pressed
.sym 16265 KEYBOARD.COLS_SHADOW[5]
.sym 16266 $false
.sym 16270 $abc$61381$n545
.sym 16271 $abc$61381$n999
.sym 16272 $techmap\KEYBOARD.$procmux$8366_Y[7]
.sym 16273 $abc$61381$n1022
.sym 16274 KEYBOARD.temp[0]
.sym 16275 KEYBOARD.temp[2]
.sym 16276 KEYBOARD.temp[7]
.sym 16277 KEYBOARD.kbd_code[1]
.sym 16344 $abc$61381$n1007
.sym 16345 $abc$61381$n1016_1
.sym 16346 $abc$61381$n535
.sym 16347 $false
.sym 16349 KEYBOARD.temp[4]
.sym 16350 KEYBOARD.RAM.r_data[4]
.sym 16351 $abc$61381$n507
.sym 16352 $false
.sym 16354 KEYBOARD.temp[5]
.sym 16355 KEYBOARD.RAM.r_data[5]
.sym 16356 $abc$61381$n507
.sym 16357 $false
.sym 16359 $abc$61381$n515
.sym 16360 $abc$61381$n525
.sym 16361 KEYBOARD.COLS_SHADOW[5]
.sym 16362 $abc$61381$n526
.sym 16364 $abc$61381$n530
.sym 16365 $abc$61381$n1007
.sym 16366 $false
.sym 16367 $false
.sym 16369 $abc$61381$n526
.sym 16370 $abc$61381$n533
.sym 16371 KEYBOARD.COLS_SHADOW[4]
.sym 16372 $false
.sym 16374 KEYBOARD.COLS_SHADOW[5]
.sym 16375 $abc$61381$n525
.sym 16376 $abc$61381$n515
.sym 16377 $false
.sym 16379 KEYBOARD.COLS_SHADOW[4]
.sym 16380 $abc$61381$n533
.sym 16381 $abc$61381$n526
.sym 16382 $false
.sym 16383 RESET$2
.sym 16384 CLK$2$2
.sym 16385 $false
.sym 16386 $abc$61381$n498_1
.sym 16387 $abc$61381$n514
.sym 16388 $abc$61381$n1013
.sym 16389 $techmap$techmap\KEYBOARD.$shl$matrix_kbd.v:55$268.$procmux$44379_Y[13]
.sym 16390 $abc$61381$n506
.sym 16391 KEYBOARD.ram_adr[6]
.sym 16393 KEYBOARD.ram_adr[2]
.sym 16460 $false
.sym 16461 $false
.sym 16462 $false
.sym 16463 $false
.sym 16465 KEYBOARD.temp[6]
.sym 16466 KEYBOARD.RAM.r_data[6]
.sym 16467 $abc$61381$n507
.sym 16468 KEYBOARD.COLS_SHADOW[6]
.sym 16470 KEYBOARD.temp[6]
.sym 16471 KEYBOARD.RAM.r_data[6]
.sym 16472 $abc$61381$n507
.sym 16473 $false
.sym 16475 $abc$61381$n521
.sym 16476 $abc$61381$n522
.sym 16477 $abc$61381$n499
.sym 16478 $abc$61381$n520
.sym 16480 $false
.sym 16481 $true$2
.sym 16482 $false
.sym 16483 $false
.sym 16485 $auto$wreduce.cc:310:run$36596[0]
.sym 16486 $auto$wreduce.cc:310:run$36597[0]
.sym 16487 $abc$61381$n498_1
.sym 16488 $abc$61381$n511
.sym 16495 KEYBOARD.COLS_SHADOW[6]
.sym 16496 $abc$61381$n997
.sym 16497 $abc$61381$n511
.sym 16498 $false
.sym 16499 RESET$2
.sym 16500 CLK$2$2
.sym 16501 $false
.sym 16502 $techmap$techmap\KEYBOARD.$shl$matrix_kbd.v:55$268.$procmux$44379_Y[11]
.sym 16503 $false$2
.sym 16504 $auto$alumacc.cc:483:replace_alu$36689[6]
.sym 16505 $auto$alumacc.cc:483:replace_alu$36689[2]
.sym 16506 $auto$rtlil.cc:1692:NotGate$61332
.sym 16507 $abc$61381$n624
.sym 16508 KEYBOARD.kbd_code[2]
.sym 16509 KEYBOARD.kbd_code[0]
.sym 16576 I2C_INPUT_LEN[2]
.sym 16577 I2C_INPUT_LEN[3]
.sym 16578 I2C_INPUT_LEN[0]
.sym 16579 I2C_INPUT_LEN[1]
.sym 16581 $abc$61381$n628
.sym 16582 $abc$61381$n633
.sym 16583 I2C_INPUT_LEN[2]
.sym 16584 I2C_INPUT_LEN[3]
.sym 16586 I2C_INPUT_LEN[0]
.sym 16587 I2C_INPUT_LEN[1]
.sym 16588 $false
.sym 16589 $false
.sym 16591 $abc$61381$n625
.sym 16592 i2c_input_data_type[2]
.sym 16593 $false
.sym 16594 $false
.sym 16596 $abc$61381$n629
.sym 16597 $abc$61381$n628
.sym 16598 $abc$61381$n590
.sym 16599 $auto$alumacc.cc:484:replace_alu$36663[3]
.sym 16601 $abc$61381$n635
.sym 16602 $abc$61381$n578
.sym 16603 $abc$61381$n626
.sym 16604 $false
.sym 16606 $abc$61381$n854
.sym 16607 $abc$61381$n624
.sym 16608 $0\uart_double_ff[0:0]
.sym 16609 $abc$61381$n559
.sym 16611 $abc$61381$n859_1
.sym 16612 $abc$61381$n858_1
.sym 16613 $0\uart_double_ff[0:0]
.sym 16614 $abc$61381$n559
.sym 16615 $auto$dff2dffe.cc:175:make_patterns_logic$49520
.sym 16616 CLK$2$2
.sym 16617 $false
.sym 16618 $techmap$auto$alumacc.cc:470:replace_alu$36661.$ternary$/usr/bin/../share/yosys/ice40/arith_map.v:42$37725_Y[2]
.sym 16619 $auto$alumacc.cc:483:replace_alu$36662[1]
.sym 16620 $auto$alumacc.cc:470:replace_alu$36715.A_buf[2]
.sym 16621 $techmap\I2C.$procmux$19301_Y
.sym 16622 $auto$alumacc.cc:483:replace_alu$36644[1]
.sym 16624 I2C.SDA_LAST
.sym 16625 I2C.i2c_bit_counter[2]
.sym 16692 $abc$61381$n580
.sym 16693 i2c_input_data_type[1]
.sym 16694 i2c_input_data_type[0]
.sym 16695 $false
.sym 16697 $abc$61381$n580
.sym 16698 i2c_input_data_type[1]
.sym 16699 i2c_input_data_type[0]
.sym 16700 $false
.sym 16702 $abc$61381$n580
.sym 16703 i2c_input_data_type[1]
.sym 16704 i2c_input_data_type[0]
.sym 16705 $false
.sym 16707 i2c_input_data_type[3]
.sym 16708 i2c_input_data_type[2]
.sym 16709 $false
.sym 16710 $false
.sym 16712 $auto$alumacc.cc:470:replace_alu$36715.A_buf[0]
.sym 16713 $false
.sym 16714 $false
.sym 16715 $false
.sym 16717 i2c_input_data_type[3]
.sym 16718 $false
.sym 16719 $false
.sym 16720 $false
.sym 16722 KEYBOARD.report[0][7]
.sym 16723 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 16724 $abc$61381$n672
.sym 16725 $false
.sym 16727 KEYBOARD.report[0][4]
.sym 16728 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 16729 $abc$61381$n980_1
.sym 16730 $false
.sym 16731 $auto$dff2dffe.cc:175:make_patterns_logic$59740
.sym 16732 CLK$2$2
.sym 16733 $false
.sym 16734 $auto$dff2dffe.cc:175:make_patterns_logic$59992
.sym 16735 $abc$61381$n889
.sym 16736 $abc$61381$n887
.sym 16737 $abc$61381$n882
.sym 16738 $2\I2C_OUT_DESC_MASK[7:0][7]
.sym 16739 $abc$61381$n886
.sym 16740 $abc$61381$n884
.sym 16741 $abc$61381$n890
.sym 16808 $abc$61381$n625
.sym 16809 i2c_input_data_type[0]
.sym 16810 $false
.sym 16811 $false
.sym 16813 $abc$61381$n625
.sym 16814 i2c_input_data_type[3]
.sym 16815 $false
.sym 16816 $false
.sym 16818 $abc$61381$n579
.sym 16819 i2c_input_data_type[0]
.sym 16820 $false
.sym 16821 $false
.sym 16823 I2C_OUTPUT_TYPE[2]
.sym 16824 I2C_OUTPUT_TYPE[1]
.sym 16825 I2C_OUTPUT_TYPE[0]
.sym 16826 $auto$alumacc.cc:484:replace_alu$36690[7]
.sym 16828 KEYBOARD.kbd_code_hid[2]
.sym 16829 KEYBOARD.kbd_code_hid[1]
.sym 16830 KEYBOARD.kbd_code_hid[0]
.sym 16831 $false
.sym 16833 $abc$61381$n858_1
.sym 16834 $abc$61381$n862
.sym 16835 $false
.sym 16836 $false
.sym 16838 $abc$61381$n863
.sym 16839 $abc$61381$n862
.sym 16840 $0\uart_double_ff[0:0]
.sym 16841 $abc$61381$n559
.sym 16843 $abc$61381$n849
.sym 16844 $abc$61381$n636
.sym 16845 $0\uart_double_ff[0:0]
.sym 16846 $abc$61381$n559
.sym 16847 $auto$dff2dffe.cc:175:make_patterns_logic$49520
.sym 16848 CLK$2$2
.sym 16849 $false
.sym 16850 $abc$61381$n556
.sym 16851 $0\uart_double_ff[0:0]
.sym 16852 $2\INT[0:0]
.sym 16853 $auto$wreduce.cc:310:run$36592[6]
.sym 16854 last_isr
.sym 16857 KEYBOARD.row_counter[3]
.sym 16924 KEYBOARD.kbd_code_hid[2]
.sym 16925 KEYBOARD.kbd_code_hid[1]
.sym 16926 KEYBOARD.kbd_code_hid[0]
.sym 16927 $false
.sym 16929 KEYBOARD.kbd_code_hid[2]
.sym 16930 KEYBOARD.kbd_code_hid[1]
.sym 16931 KEYBOARD.kbd_code_hid[0]
.sym 16932 $false
.sym 16934 $abc$61381$n625
.sym 16935 $abc$61381$n580
.sym 16936 $false
.sym 16937 $false
.sym 16939 $abc$61381$n636
.sym 16940 $abc$61381$n637
.sym 16941 $abc$61381$n638
.sym 16942 i2c_input_data_type[1]
.sym 16944 $abc$61381$n637
.sym 16945 $abc$61381$n636
.sym 16946 $abc$61381$n624
.sym 16947 $abc$61381$n638
.sym 16949 $abc$61381$n580
.sym 16950 i2c_input_data_type[1]
.sym 16951 $false
.sym 16952 $false
.sym 16954 KEYBOARD.report[0][0]
.sym 16955 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 16956 $abc$61381$n557
.sym 16957 $false
.sym 16959 KEYBOARD.report[0][5]
.sym 16960 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 16961 $abc$61381$n982
.sym 16962 $false
.sym 16963 $auto$dff2dffe.cc:175:make_patterns_logic$59740
.sym 16964 CLK$2$2
.sym 16965 $false
.sym 16966 $abc$61381$n573
.sym 16967 $auto$dff2dffe.cc:158:make_patterns_logic$53542
.sym 16968 $auto$simplemap.cc:250:simplemap_eqne$55268[1]
.sym 16971 I2C_OUTPUT_TYPE[0]
.sym 16972 I2C_OUTPUT_TYPE[1]
.sym 16973 I2C_OUT_DESC_MASK[4]
.sym 17040 $abc$61381$n561
.sym 17041 I2C.is_read
.sym 17042 $false
.sym 17043 $false
.sym 17045 $abc$61381$n574
.sym 17046 I2C.is_read
.sym 17047 $abc$61381$n561
.sym 17048 $abc$61381$n570
.sym 17050 $abc$61381$n623
.sym 17051 $abc$61381$n571
.sym 17052 $abc$61381$n619_1
.sym 17053 $false
.sym 17055 $abc$61381$n850
.sym 17056 $abc$61381$n780_1
.sym 17057 I2C.received_byte[3]
.sym 17058 $false
.sym 17060 $abc$61381$n567
.sym 17061 RESET$2
.sym 17062 I2C.wr
.sym 17063 last_wr
.sym 17065 $abc$61381$n559
.sym 17066 RESET$2
.sym 17067 $abc$61381$n572
.sym 17068 $false
.sym 17070 $abc$61381$n568
.sym 17071 $abc$61381$n573
.sym 17072 $abc$61381$n567
.sym 17073 $abc$61381$n571
.sym 17075 $2\INT[0:0]
.sym 17076 $false
.sym 17077 $false
.sym 17078 $false
.sym 17079 $auto$dff2dffe.cc:175:make_patterns_logic$48548
.sym 17080 CLK$2$2
.sym 17081 $logic_not$top.v:60$10_Y$2
.sym 17082 $abc$61381$n671
.sym 17083 $abc$61381$n670
.sym 17084 $auto$wreduce.cc:310:run$36590[0]
.sym 17085 $auto$dff2dffe.cc:175:make_patterns_logic$60842
.sym 17087 $techmap\I2C.FLT_SCL.$procmux$993_Y[0]
.sym 17088 KEYBOARD.ROWS_EN[0]
.sym 17089 KEYBOARD.ROWS_EN[3]
.sym 17156 $abc$61381$n856
.sym 17157 $abc$61381$n603
.sym 17158 $abc$61381$n618_1
.sym 17159 $false
.sym 17161 $abc$61381$n618_1
.sym 17162 $abc$61381$n856
.sym 17163 $abc$61381$n855_1
.sym 17164 $false
.sym 17166 $auto$simplemap.cc:250:simplemap_eqne$55268[1]
.sym 17167 $abc$61381$n669
.sym 17168 RESET$2
.sym 17169 $false
.sym 17171 $abc$61381$n672
.sym 17172 $abc$61381$n670
.sym 17173 $auto$alumacc.cc:484:replace_alu$36629[7]
.sym 17174 $auto$alumacc.cc:484:replace_alu$36634[7]
.sym 17176 KEYBOARD.kbd_code_hid[2]
.sym 17177 KEYBOARD.kbd_code_hid[1]
.sym 17178 KEYBOARD.kbd_code_hid[0]
.sym 17179 $false
.sym 17181 $abc$61381$n860
.sym 17182 $abc$61381$n850
.sym 17183 $abc$61381$n780_1
.sym 17184 I2C.received_byte[2]
.sym 17186 $abc$61381$n850
.sym 17187 $abc$61381$n780_1
.sym 17188 I2C.received_byte[1]
.sym 17189 $false
.sym 17191 I2C.received_byte[0]
.sym 17192 $false
.sym 17193 $false
.sym 17194 $false
.sym 17195 $auto$dff2dffe.cc:175:make_patterns_logic$49267
.sym 17196 CLK$2$2
.sym 17197 $false
.sym 17198 $abc$61381$n754
.sym 17199 $abc$61381$n755
.sym 17200 $auto$wreduce.cc:310:run$36590[2]
.sym 17201 $techmap\I2C.FLT_SCL.$procmux$993_Y[1]
.sym 17202 $auto$dff2dffe.cc:158:make_patterns_logic$60857
.sym 17203 I2C.FLT_SCL.counter[1]
.sym 17204 I2C.FLT_SCL.counter[2]
.sym 17205 I2C.FLT_SCL.counter[0]
.sym 17234 $true
.sym 17271 KEYBOARD.kbd_code_hid[3]$2
.sym 17272 $false
.sym 17273 KEYBOARD.kbd_code_hid[3]
.sym 17274 $false
.sym 17275 $false
.sym 17276 $auto$alumacc.cc:484:replace_alu$36629[4]
.sym 17278 KEYBOARD.kbd_code_hid[4]
.sym 17279 $true$2
.sym 17281 $auto$alumacc.cc:484:replace_alu$36629[5]
.sym 17283 KEYBOARD.kbd_code_hid[5]
.sym 17284 $false
.sym 17286 $auto$alumacc.cc:484:replace_alu$36629[6]
.sym 17288 KEYBOARD.kbd_code_hid[6]
.sym 17289 $false
.sym 17291 $auto$alumacc.cc:484:replace_alu$36629[7]$2
.sym 17293 KEYBOARD.kbd_code_hid[7]
.sym 17294 $false
.sym 17300 $auto$alumacc.cc:484:replace_alu$36629[7]$2
.sym 17302 $auto$simplemap.cc:250:simplemap_eqne$55268[1]
.sym 17303 $abc$61381$n669
.sym 17304 $false
.sym 17305 $false
.sym 17307 $false
.sym 17308 $false
.sym 17309 $false
.sym 17310 $false
.sym 17311 $auto$dff2dffe.cc:175:make_patterns_logic$48604
.sym 17312 CLK$2$2
.sym 17313 $false
.sym 17314 $true$2
.sym 17316 KEYBOARD.report[2][0]
.sym 17317 KEYBOARD.report[2][2]
.sym 17319 KEYBOARD.report[2][3]
.sym 17388 KEYBOARD.report[2][0]
.sym 17389 KEYBOARD.report[2][1]
.sym 17390 KEYBOARD.report[2][2]
.sym 17391 KEYBOARD.report[2][3]
.sym 17393 $abc$61381$n771
.sym 17394 $auto$wreduce.cc:310:run$36584[0]
.sym 17395 $auto$wreduce.cc:310:run$36584[2]
.sym 17396 KEYBOARD.report[2][0]
.sym 17398 KEYBOARD.kbd_code_hid[1]
.sym 17399 KEYBOARD.kbd_code_hid[0]
.sym 17400 KEYBOARD.report[2][0]
.sym 17401 KEYBOARD.report[2][1]
.sym 17403 $abc$61381$n668
.sym 17404 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 17405 $abc$61381$n729
.sym 17406 RESET$2
.sym 17408 $abc$61381$n667
.sym 17409 $abc$61381$n727
.sym 17410 $abc$61381$n728
.sym 17411 $false
.sym 17413 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 17414 $abc$61381$n668
.sym 17415 $abc$61381$n673
.sym 17416 $abc$61381$n678
.sym 17418 $abc$61381$n679
.sym 17419 $abc$61381$n680
.sym 17420 $false
.sym 17421 $false
.sym 17423 KEYBOARD.kbd_code_hid[1]
.sym 17424 $false
.sym 17425 $false
.sym 17426 $false
.sym 17427 $auto$dff2dffe.cc:175:make_patterns_logic$58513
.sym 17428 CLK$2$2
.sym 17429 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 17430 $abc$61381$n679
.sym 17432 $abc$61381$n732
.sym 17433 KEYBOARD.report[2][7]
.sym 17434 KEYBOARD.report[2][4]
.sym 17436 KEYBOARD.report[2][6]
.sym 17504 $abc$61381$n771
.sym 17505 $auto$wreduce.cc:310:run$36584[0]
.sym 17506 $auto$wreduce.cc:310:run$36584[2]
.sym 17507 KEYBOARD.report[2][7]
.sym 17509 KEYBOARD.kbd_code_hid[4]
.sym 17510 KEYBOARD.kbd_code_hid[5]
.sym 17511 KEYBOARD.report[2][4]
.sym 17512 KEYBOARD.report[2][5]
.sym 17514 $abc$61381$n771
.sym 17515 $auto$wreduce.cc:310:run$36584[0]
.sym 17516 $auto$wreduce.cc:310:run$36584[2]
.sym 17517 KEYBOARD.report[2][3]
.sym 17519 $abc$61381$n771
.sym 17520 $auto$wreduce.cc:310:run$36584[0]
.sym 17521 $auto$wreduce.cc:310:run$36584[2]
.sym 17522 KEYBOARD.report[2][6]
.sym 17524 KEYBOARD.kbd_code_hid[7]
.sym 17525 KEYBOARD.kbd_code_hid[6]
.sym 17526 KEYBOARD.report[2][6]
.sym 17527 KEYBOARD.report[2][7]
.sym 17529 $abc$61381$n771
.sym 17530 $auto$wreduce.cc:310:run$36584[0]
.sym 17531 $auto$wreduce.cc:310:run$36584[2]
.sym 17532 KEYBOARD.report[2][1]
.sym 17534 $abc$61381$n771
.sym 17535 $auto$wreduce.cc:310:run$36584[0]
.sym 17536 $auto$wreduce.cc:310:run$36584[2]
.sym 17537 KEYBOARD.report[2][5]
.sym 17539 $abc$61381$n730
.sym 17540 $abc$61381$n731
.sym 17541 $abc$61381$n732
.sym 17542 $abc$61381$n733
.sym 17620 $abc$61381$n696
.sym 17621 $abc$61381$n697
.sym 17622 $abc$61381$n698
.sym 17623 $abc$61381$n699
.sym 17625 KEYBOARD.kbd_code_hid[4]
.sym 17626 KEYBOARD.kbd_code_hid[5]
.sym 17627 kbd_report[6][4]
.sym 17628 kbd_report[6][5]
.sym 17630 $abc$61381$n667
.sym 17631 $abc$61381$n676
.sym 17632 $abc$61381$n683
.sym 17633 $abc$61381$n694
.sym 17635 KEYBOARD.kbd_code_hid[7]
.sym 17636 KEYBOARD.kbd_code_hid[6]
.sym 17637 kbd_report[6][6]
.sym 17638 kbd_report[6][7]
.sym 17640 kbd_report[6][4]
.sym 17641 kbd_report[6][5]
.sym 17642 kbd_report[6][6]
.sym 17643 kbd_report[6][7]
.sym 17645 $abc$61381$n668
.sym 17646 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 17647 $abc$61381$n695
.sym 17648 RESET$2
.sym 17650 KEYBOARD.kbd_code_hid[5]
.sym 17651 $false
.sym 17652 $false
.sym 17653 $false
.sym 17655 KEYBOARD.kbd_code_hid[6]
.sym 17656 $false
.sym 17657 $false
.sym 17658 $false
.sym 17659 $auto$dff2dffe.cc:175:make_patterns_logic$55122
.sym 17660 CLK$2$2
.sym 17661 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 17662 $auto$alumacc.cc:484:replace_alu$36634[7]
.sym 17666 KEYBOARD.ROWS_EN[4]
.sym 17741 KEYBOARD.kbd_code_hid[3]
.sym 17742 $false
.sym 17743 $false
.sym 17744 $false
.sym 17751 KEYBOARD.kbd_code_hid[7]
.sym 17752 $false
.sym 17753 $false
.sym 17754 $false
.sym 17766 KEYBOARD.kbd_code_hid[4]
.sym 17767 $false
.sym 17768 $false
.sym 17769 $false
.sym 17775 $auto$dff2dffe.cc:175:make_patterns_logic$55122
.sym 17776 CLK$2$2
.sym 17777 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 18113 KBD_COLUMNS[6]$2
.sym 18114 $false
.sym 18115 $false
.sym 18116 $false
.sym 18118 KBD_COLUMNS[7]$2
.sym 18119 $false
.sym 18120 $false
.sym 18121 $false
.sym 18123 SCL$2
.sym 18124 $false
.sym 18125 $false
.sym 18126 $false
.sym 18128 I2C.SDA_IN
.sym 18129 $false
.sym 18130 $false
.sym 18131 $false
.sym 18133 KBD_COLUMNS[1]$2
.sym 18134 $false
.sym 18135 $false
.sym 18136 $false
.sym 18138 KBD_COLUMNS[3]$2
.sym 18139 $false
.sym 18140 $false
.sym 18141 $false
.sym 18147 $true
.sym 18148 CLK$2$2
.sym 18149 $false
.sym 18150 KEYBOARD.RAM.r_data[0]
.sym 18152 KEYBOARD.RAM.r_data[1]
.sym 18154 KEYBOARD.RAM.r_data[2]
.sym 18156 KEYBOARD.RAM.r_data[3]
.sym 18224 $abc$61381$n541
.sym 18225 $abc$61381$n545
.sym 18226 KEYBOARD.COLS_SHADOW[2]
.sym 18227 $abc$61381$n1012
.sym 18229 $techmap\KEYBOARD.$add$matrix_kbd.v:240$336_Y[0]
.sym 18230 $abc$61381$n535
.sym 18231 $abc$61381$n1011
.sym 18232 $false
.sym 18234 $false
.sym 18235 $true$2
.sym 18236 $false
.sym 18237 $false
.sym 18239 $auto$wreduce.cc:310:run$36593[0]
.sym 18240 $abc$61381$n1009
.sym 18241 $abc$61381$n535
.sym 18242 $false
.sym 18244 $abc$61381$n1010
.sym 18245 $abc$61381$n1008
.sym 18246 $abc$61381$n1002
.sym 18247 $abc$61381$n541
.sym 18249 $abc$61381$n1011
.sym 18250 $abc$61381$n1009
.sym 18251 $abc$61381$n535
.sym 18252 $abc$61381$n541
.sym 18254 $abc$61381$n1012
.sym 18255 $abc$61381$n546
.sym 18256 $abc$61381$n1018
.sym 18257 $abc$61381$n1019
.sym 18259 I2C.SCLF
.sym 18260 $false
.sym 18261 $false
.sym 18262 $false
.sym 18263 $auto$dff2dffe.cc:175:make_patterns_logic$60842
.sym 18264 CLK$2$2
.sym 18265 $logic_not$top.v:60$10_Y$2
.sym 18266 KEYBOARD.RAM.r_data[4]
.sym 18268 KEYBOARD.RAM.r_data[5]
.sym 18270 KEYBOARD.RAM.r_data[6]
.sym 18272 KEYBOARD.RAM.r_data[7]
.sym 18340 KEYBOARD.temp[2]
.sym 18341 KEYBOARD.RAM.r_data[2]
.sym 18342 $abc$61381$n507
.sym 18343 $false
.sym 18345 KEYBOARD.temp[7]
.sym 18346 KEYBOARD.RAM.r_data[7]
.sym 18347 $abc$61381$n507
.sym 18348 $false
.sym 18350 $abc$61381$n1016_1
.sym 18351 $abc$61381$n498_1
.sym 18352 $abc$61381$n1022
.sym 18353 $techmap\KEYBOARD.$procmux$8366_Y[2]
.sym 18355 $abc$61381$n1006
.sym 18356 $abc$61381$n1011
.sym 18357 $abc$61381$n1019
.sym 18358 $false
.sym 18360 KEYBOARD.COLS_SHADOW[0]
.sym 18361 $abc$61381$n549
.sym 18362 $abc$61381$n546
.sym 18363 $false
.sym 18365 KEYBOARD.COLS_SHADOW[2]
.sym 18366 $abc$61381$n545
.sym 18367 $abc$61381$n541
.sym 18368 $false
.sym 18370 KEYBOARD.COLS_SHADOW[7]
.sym 18371 $abc$61381$n999
.sym 18372 $abc$61381$n499
.sym 18373 $false
.sym 18375 $abc$61381$n546
.sym 18376 $abc$61381$n1011
.sym 18377 $abc$61381$n1015_1
.sym 18378 $abc$61381$n1012
.sym 18379 RESET$2
.sym 18380 CLK$2$2
.sym 18381 $false
.sym 18456 $abc$61381$n511
.sym 18457 $abc$61381$n514
.sym 18458 $abc$61381$n499
.sym 18459 $abc$61381$n506
.sym 18461 KEYBOARD.RAM.r_data[6]
.sym 18462 KEYBOARD.temp[6]
.sym 18463 $abc$61381$n507
.sym 18464 KEYBOARD.COLS_SHADOW[6]
.sym 18466 $abc$61381$n541
.sym 18467 $abc$61381$n545
.sym 18468 $auto$wreduce.cc:310:run$36592[0]
.sym 18469 KEYBOARD.COLS_SHADOW[2]
.sym 18471 $auto$wreduce.cc:310:run$36598[1]
.sym 18472 $auto$wreduce.cc:310:run$36598[0]
.sym 18473 $auto$wreduce.cc:310:run$36598[2]
.sym 18474 $false
.sym 18476 KEYBOARD.RAM.r_data[7]
.sym 18477 KEYBOARD.temp[7]
.sym 18478 $abc$61381$n507
.sym 18479 KEYBOARD.COLS_SHADOW[7]
.sym 18481 $false
.sym 18482 $false
.sym 18483 $false
.sym 18484 $false
.sym 18491 $auto$wreduce.cc:310:run$36598[2]
.sym 18492 $false
.sym 18493 $false
.sym 18494 $false
.sym 18495 $auto$dff2dffe.cc:175:make_patterns_logic$59992$2
.sym 18496 CLK$2$2
.sym 18497 $false
.sym 18572 $auto$wreduce.cc:310:run$36598[1]
.sym 18573 $auto$wreduce.cc:310:run$36598[0]
.sym 18574 $auto$wreduce.cc:310:run$36598[2]
.sym 18575 $false
.sym 18577 $false
.sym 18578 $false
.sym 18579 $false
.sym 18580 $false
.sym 18582 I2C_INPUT_LEN[6]
.sym 18583 $false
.sym 18584 $false
.sym 18585 $false
.sym 18587 I2C_INPUT_LEN[2]
.sym 18588 $false
.sym 18589 $false
.sym 18590 $false
.sym 18592 $auto$wreduce.cc:310:run$36598[3]$2
.sym 18593 $false
.sym 18594 $false
.sym 18595 $false
.sym 18597 $abc$61381$n625
.sym 18598 i2c_input_data_type[1]
.sym 18599 $false
.sym 18600 $false
.sym 18602 $techmap\KEYBOARD.$procmux$8366_Y[2]
.sym 18603 $false
.sym 18604 $false
.sym 18605 $false
.sym 18607 $abc$61381$n546
.sym 18608 $abc$61381$n1013
.sym 18609 $abc$61381$n1001
.sym 18610 $abc$61381$n1012
.sym 18611 RESET$2
.sym 18612 CLK$2$2
.sym 18613 $false
.sym 18614 KEYBOARD.kbd_code_hid[0]
.sym 18615 KEYBOARD.kbd_code_hid[1]
.sym 18616 KEYBOARD.kbd_code_hid[2]
.sym 18617 KEYBOARD.kbd_code_hid[3]
.sym 18618 KEYBOARD.kbd_code_hid[4]
.sym 18619 KEYBOARD.kbd_code_hid[5]
.sym 18620 KEYBOARD.kbd_code_hid[6]
.sym 18621 KEYBOARD.kbd_code_hid[7]
.sym 18688 i2c_input_data_type[2]
.sym 18689 $false
.sym 18690 $false
.sym 18691 $false
.sym 18693 i2c_input_data_type[1]
.sym 18694 $false
.sym 18695 $false
.sym 18696 $false
.sym 18698 $techmap\I2C.$procmux$19301_Y
.sym 18699 I2C.i2c_bit_counter[2]
.sym 18700 $false
.sym 18701 $false
.sym 18703 I2C.FLT_SCL.out
.sym 18704 I2C.FLT_SDA.out
.sym 18705 I2C.SDA_LAST
.sym 18706 $false
.sym 18708 $auto$alumacc.cc:470:replace_alu$36715.A_buf[1]
.sym 18709 $false
.sym 18710 $false
.sym 18711 $false
.sym 18718 I2C.FLT_SDA.out
.sym 18719 $false
.sym 18720 $false
.sym 18721 $false
.sym 18723 $abc$61381$n939
.sym 18724 $abc$61381$n936
.sym 18725 $auto$alumacc.cc:470:replace_alu$36715.A_buf[2]
.sym 18726 $false
.sym 18727 $true
.sym 18728 CLK$2$2
.sym 18729 $false
.sym 18804 $auto$rtlil.cc:1692:NotGate$61364$2
.sym 18805 RESET$2
.sym 18806 $false
.sym 18807 $false
.sym 18809 $abc$61381$n624
.sym 18810 $abc$61381$n636
.sym 18811 $abc$61381$n883
.sym 18812 $abc$61381$n890
.sym 18814 $abc$61381$n611_1
.sym 18815 $abc$61381$n625
.sym 18816 I2C_OUTPUT_TYPE[1]
.sym 18817 $false
.sym 18819 $abc$61381$n624
.sym 18820 $abc$61381$n883
.sym 18821 $abc$61381$n636
.sym 18822 $abc$61381$n884
.sym 18824 $abc$61381$n882
.sym 18825 $abc$61381$n886
.sym 18826 $abc$61381$n889
.sym 18827 $2\INT[0:0]
.sym 18829 $abc$61381$n636
.sym 18830 $abc$61381$n624
.sym 18831 $abc$61381$n883
.sym 18832 $abc$61381$n887
.sym 18834 $abc$61381$n611_1
.sym 18835 $abc$61381$n625
.sym 18836 I2C_OUTPUT_TYPE[0]
.sym 18837 $false
.sym 18839 $abc$61381$n611_1
.sym 18840 $abc$61381$n625
.sym 18841 I2C_OUTPUT_TYPE[2]
.sym 18842 $false
.sym 18920 $abc$61381$n557
.sym 18921 KEYBOARD.kbd_code_hid[7]
.sym 18922 KEYBOARD.kbd_code_hid[6]
.sym 18923 KEYBOARD.kbd_code_hid[3]
.sym 18925 I2C_TRANS
.sym 18926 last_trans
.sym 18927 $false
.sym 18928 $false
.sym 18930 I2C_TRANS
.sym 18931 last_trans
.sym 18932 $false
.sym 18933 $false
.sym 18935 KEYBOARD.row_counter[3]
.sym 18936 $auto$wreduce.cc:310:run$36598[3]$2
.sym 18937 $auto$rtlil.cc:1692:NotGate$61364$2
.sym 18938 $false
.sym 18940 KEYBOARD.isr
.sym 18941 $false
.sym 18942 $false
.sym 18943 $false
.sym 18955 $auto$wreduce.cc:310:run$36592[6]
.sym 18956 $false
.sym 18957 $false
.sym 18958 $false
.sym 18959 RESET$2
.sym 18960 CLK$2$2
.sym 18961 $false
.sym 19036 UART_WR
.sym 19037 KEYBOARD.isr
.sym 19038 INT
.sym 19039 last_isr
.sym 19041 UART.TX_sig_last
.sym 19042 UART_WR
.sym 19043 RESET$2
.sym 19044 UART.tx_activity
.sym 19046 $abc$61381$n556
.sym 19047 KEYBOARD.kbd_code_hid[4]
.sym 19048 KEYBOARD.kbd_code_hid[5]
.sym 19049 $false
.sym 19061 $abc$61381$n882
.sym 19062 $2\INT[0:0]
.sym 19063 $false
.sym 19064 $false
.sym 19066 $abc$61381$n886
.sym 19067 $2\INT[0:0]
.sym 19068 $false
.sym 19069 $false
.sym 19071 $2\I2C_OUT_DESC_MASK[7:0][7]
.sym 19072 $false
.sym 19073 $false
.sym 19074 $false
.sym 19075 $auto$dff2dffe.cc:175:make_patterns_logic$51864$2
.sym 19076 CLK$2$2
.sym 19077 $logic_not$top.v:60$10_Y$2
.sym 19152 KEYBOARD.kbd_code_hid[4]
.sym 19153 KEYBOARD.kbd_code_hid[3]
.sym 19154 KEYBOARD.kbd_code_hid[5]
.sym 19155 $false
.sym 19157 $abc$61381$n671
.sym 19158 KEYBOARD.kbd_code_hid[7]
.sym 19159 KEYBOARD.kbd_code_hid[6]
.sym 19160 $false
.sym 19162 $false
.sym 19163 I2C.FLT_SCL.counter[0]
.sym 19164 $false
.sym 19165 $true$2
.sym 19167 $techmap\I2C.FLT_SCL.$procmux$993_Y[0]
.sym 19168 $abc$61381$n755
.sym 19169 $false
.sym 19170 $false
.sym 19177 $abc$61381$n754
.sym 19178 $auto$wreduce.cc:310:run$36590[0]
.sym 19179 $false
.sym 19180 $false
.sym 19182 $techmap$techmap\KEYBOARD.$shl$matrix_kbd.v:55$268.$procmux$44379_Y[8]
.sym 19183 $false
.sym 19184 $false
.sym 19185 $false
.sym 19187 $techmap$techmap\KEYBOARD.$shl$matrix_kbd.v:55$268.$procmux$44379_Y[11]
.sym 19188 $false
.sym 19189 $false
.sym 19190 $false
.sym 19191 $auto$dff2dffe.cc:175:make_patterns_logic$59992$2
.sym 19192 CLK$2$2
.sym 19193 $auto$wreduce.cc:310:run$36598[3]$2
.sym 19268 I2C.FLT_SCL.counter[0]
.sym 19269 I2C.FLT_SCL.counter[1]
.sym 19270 I2C.FLT_SCL.counter[2]
.sym 19271 $false
.sym 19273 $techmap\I2C.FLT_SCL.$procmux$993_Y[1]
.sym 19274 $auto$wreduce.cc:310:run$36590[2]
.sym 19275 I2C.FLT_SCL.out
.sym 19276 I2C.SCLF
.sym 19278 $false
.sym 19279 I2C.FLT_SCL.counter[2]
.sym 19280 $true$2
.sym 19281 $auto$alumacc.cc:484:replace_alu$36720[1]
.sym 19283 I2C.FLT_SCL.counter[0]
.sym 19284 I2C.FLT_SCL.counter[1]
.sym 19285 $false
.sym 19286 $false
.sym 19288 $abc$61381$n754
.sym 19289 I2C.FLT_SCL.out
.sym 19290 I2C.SCLF
.sym 19291 $false
.sym 19293 $techmap\I2C.FLT_SCL.$procmux$993_Y[1]
.sym 19294 $false
.sym 19295 $false
.sym 19296 $false
.sym 19298 $abc$61381$n754
.sym 19299 $auto$wreduce.cc:310:run$36590[2]
.sym 19300 $false
.sym 19301 $false
.sym 19303 $techmap\I2C.FLT_SCL.$procmux$993_Y[0]
.sym 19304 $false
.sym 19305 $false
.sym 19306 $false
.sym 19307 $auto$dff2dffe.cc:158:make_patterns_logic$60857
.sym 19308 CLK$2$2
.sym 19309 $logic_not$top.v:60$10_Y$2
.sym 19384 $false
.sym 19385 $false
.sym 19386 $false
.sym 19387 $false
.sym 19394 KEYBOARD.kbd_code_hid[0]
.sym 19395 $false
.sym 19396 $false
.sym 19397 $false
.sym 19399 KEYBOARD.kbd_code_hid[2]
.sym 19400 $false
.sym 19401 $false
.sym 19402 $false
.sym 19409 KEYBOARD.kbd_code_hid[3]
.sym 19410 $false
.sym 19411 $false
.sym 19412 $false
.sym 19423 $auto$dff2dffe.cc:175:make_patterns_logic$58513
.sym 19424 CLK$2$2
.sym 19425 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 19500 KEYBOARD.report[2][4]
.sym 19501 KEYBOARD.report[2][5]
.sym 19502 KEYBOARD.report[2][6]
.sym 19503 KEYBOARD.report[2][7]
.sym 19510 KEYBOARD.kbd_code_hid[3]
.sym 19511 KEYBOARD.kbd_code_hid[2]
.sym 19512 KEYBOARD.report[2][2]
.sym 19513 KEYBOARD.report[2][3]
.sym 19515 KEYBOARD.kbd_code_hid[7]
.sym 19516 $false
.sym 19517 $false
.sym 19518 $false
.sym 19520 KEYBOARD.kbd_code_hid[4]
.sym 19521 $false
.sym 19522 $false
.sym 19523 $false
.sym 19530 KEYBOARD.kbd_code_hid[6]
.sym 19531 $false
.sym 19532 $false
.sym 19533 $false
.sym 19539 $auto$dff2dffe.cc:175:make_patterns_logic$58513
.sym 19540 CLK$2$2
.sym 19541 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 19578 $true
.sym 19615 KEYBOARD.kbd_code_hid[0]$2
.sym 19616 $false
.sym 19617 KEYBOARD.kbd_code_hid[0]
.sym 19618 $false
.sym 19619 $false
.sym 19620 $auto$alumacc.cc:484:replace_alu$36634[1]
.sym 19622 KEYBOARD.kbd_code_hid[1]
.sym 19623 $false
.sym 19625 $auto$alumacc.cc:484:replace_alu$36634[2]
.sym 19627 KEYBOARD.kbd_code_hid[2]
.sym 19628 $false
.sym 19630 $auto$alumacc.cc:484:replace_alu$36634[3]
.sym 19632 KEYBOARD.kbd_code_hid[3]
.sym 19633 $false
.sym 19635 $auto$alumacc.cc:484:replace_alu$36634[4]
.sym 19637 KEYBOARD.kbd_code_hid[4]
.sym 19638 $false
.sym 19640 $auto$alumacc.cc:484:replace_alu$36634[5]
.sym 19642 KEYBOARD.kbd_code_hid[5]
.sym 19643 $true$2
.sym 19645 $auto$alumacc.cc:484:replace_alu$36634[6]
.sym 19647 KEYBOARD.kbd_code_hid[6]
.sym 19648 $false
.sym 19650 $auto$alumacc.cc:484:replace_alu$36634[7]$2
.sym 19652 KEYBOARD.kbd_code_hid[7]
.sym 19653 $false
.sym 19735 $auto$alumacc.cc:484:replace_alu$36634[7]$2
.sym 19752 $techmap$techmap\KEYBOARD.$shl$matrix_kbd.v:55$268.$procmux$44379_Y[12]
.sym 19753 $false
.sym 19754 $false
.sym 19755 $false
.sym 19771 $auto$dff2dffe.cc:175:make_patterns_logic$59992$2
.sym 19772 CLK$2$2
.sym 19773 $auto$wreduce.cc:310:run$36598[3]$2
.sym 19819 $false
.sym 19821 KEYBOARD.ROWS_EN[0]
.sym 19822 $false
.sym 19824 KEYBOARD.ROWS_EN[1]
.sym 19950 $auto$wreduce.cc:310:run$36594[0]
.sym 19957 KEYBOARD.ROWS_EN[5]
.sym 20088 $abc$61381$n536
.sym 20089 $abc$61381$n539
.sym 20090 $abc$61381$n1009
.sym 20091 $abc$61381$n1011
.sym 20092 $abc$61381$n1012
.sym 20093 $abc$61381$n534
.sym 20094 KEYBOARD.temp[1]
.sym 20095 KEYBOARD.temp[3]
.sym 20190 $abc$61381$n549
.sym 20191 $abc$61381$n537
.sym 20192 $abc$61381$n540
.sym 20193 KEYBOARD.ram_adr[4]
.sym 20194 KEYBOARD.ram_adr[5]
.sym 20195 KEYBOARD.ram_adr[1]
.sym 20196 KEYBOARD.ram_adr[3]
.sym 20197 KEYBOARD.ram_adr[7]
.sym 20198 $undef
.sym 20199 $undef
.sym 20200 $undef
.sym 20201 $undef
.sym 20202 $undef
.sym 20203 $undef
.sym 20204 $undef
.sym 20205 $undef
.sym 20206 KEYBOARD.ram_adr[0]
.sym 20207 KEYBOARD.ram_adr[1]
.sym 20208 $false
.sym 20209 KEYBOARD.ram_adr[2]
.sym 20210 KEYBOARD.ram_adr[3]
.sym 20211 KEYBOARD.ram_adr[4]
.sym 20212 KEYBOARD.ram_adr[5]
.sym 20213 KEYBOARD.ram_adr[6]
.sym 20214 KEYBOARD.ram_adr[7]
.sym 20215 $false
.sym 20216 $false
.sym 20217 CLK$2$2
.sym 20218 $true
.sym 20219 KEYBOARD.temp[0]
.sym 20220 $undef
.sym 20221 KEYBOARD.temp[1]
.sym 20222 $undef
.sym 20223 KEYBOARD.temp[2]
.sym 20224 $undef
.sym 20225 KEYBOARD.temp[3]
.sym 20226 $undef
.sym 20227 $techmap$techmap36770\KEYBOARD.RAM.mem.0.0.0.$reduce_or$/usr/bin/../share/yosys/ice40/brams_map.v:308$36769_Y
.sym 20292 $abc$61381$n520
.sym 20293 $auto$alumacc.cc:483:replace_alu$36689[4]
.sym 20295 $auto$alumacc.cc:483:replace_alu$36689[1]
.sym 20296 $auto$alumacc.cc:483:replace_alu$36689[7]
.sym 20299 $auto$alumacc.cc:483:replace_alu$36689[3]
.sym 20300 $undef
.sym 20301 $undef
.sym 20302 $undef
.sym 20303 $undef
.sym 20304 $undef
.sym 20305 $undef
.sym 20306 $undef
.sym 20307 $undef
.sym 20308 KEYBOARD.ram_adr[0]
.sym 20309 KEYBOARD.ram_adr[1]
.sym 20310 $false
.sym 20311 KEYBOARD.ram_adr[2]
.sym 20312 KEYBOARD.ram_adr[3]
.sym 20313 KEYBOARD.ram_adr[4]
.sym 20314 KEYBOARD.ram_adr[5]
.sym 20315 KEYBOARD.ram_adr[6]
.sym 20316 KEYBOARD.ram_adr[7]
.sym 20317 $false
.sym 20318 $false
.sym 20319 CLK$2$2
.sym 20320 $true
.sym 20321 $true$2
.sym 20322 KEYBOARD.temp[5]
.sym 20323 $undef
.sym 20324 KEYBOARD.temp[6]
.sym 20325 $undef
.sym 20326 KEYBOARD.temp[7]
.sym 20327 $undef
.sym 20328 KEYBOARD.temp[4]
.sym 20329 $undef
.sym 20401 $auto$alumacc.cc:484:replace_alu$36690[7]
.sym 20500 $auto$simplemap.cc:250:simplemap_eqne$52942[1]
.sym 20501 $auto$alumacc.cc:483:replace_alu$36644[2]
.sym 20502 KEYBOARD.ram_adr[0]
.sym 20599 KEYBOARD.kbd_code[4]
.sym 20600 KEYBOARD.kbd_code[3]
.sym 20601 KEYBOARD.kbd_code[5]
.sym 20603 KEYBOARD.kbd_code[6]
.sym 20604 KEYBOARD.kbd_code[7]
.sym 20614 $false
.sym 20615 $false
.sym 20617 $false
.sym 20618 $false
.sym 20619 $false
.sym 20620 $false
.sym 20621 $false
.sym 20622 $false
.sym 20625 $false
.sym 20626 $false$2
.sym 20627 $false
.sym 20628 $false
.sym 20629 $false
.sym 20630 $false
.sym 20631 $false
.sym 20632 $false
.sym 20633 $false
.sym 20634 $false
.sym 20635 $false
.sym 20703 last_trans
.sym 20707 last_uart_active
.sym 20716 KEYBOARD.kbd_code[0]
.sym 20717 KEYBOARD.kbd_code[1]
.sym 20719 KEYBOARD.kbd_code[2]
.sym 20720 KEYBOARD.kbd_code[3]
.sym 20721 KEYBOARD.kbd_code[4]
.sym 20722 KEYBOARD.kbd_code[5]
.sym 20723 KEYBOARD.kbd_code[6]
.sym 20724 KEYBOARD.kbd_code[7]
.sym 20727 CLK$2$2
.sym 20728 $true
.sym 20729 $true$2
.sym 20803 $abc$61381$n572
.sym 20804 UART.tx_activity
.sym 20806 KEYBOARD.isr
.sym 20807 UART.TX_sig_last
.sym 20809 last_wr
.sym 20907 I2C.received_byte[0]
.sym 21008 $auto$wreduce.cc:310:run$36604[2]
.sym 21009 $auto$alumacc.cc:484:replace_alu$36756[2]
.sym 21010 $abc$61381$n663
.sym 21012 UART.tx_clk_counter[2]
.sym 21013 UART.tx_clk_counter[1]
.sym 21110 $auto$alumacc.cc:484:replace_alu$36720[1]
.sym 21114 I2C.FLT_SDA.out
.sym 21212 $auto$alumacc.cc:484:replace_alu$36723[1]
.sym 21216 KEYBOARD.report[2][5]
.sym 21591 $false
.sym 21593 KEYBOARD.ROWS_EN[2]
.sym 21594 $false
.sym 21596 KEYBOARD.ROWS_EN[3]
.sym 21770 KEYBOARD.ROWS_EN[14]
.sym 21877 $false
.sym 21878 $false
.sym 21879 $false
.sym 21880 $false
.sym 21912 $techmap$techmap\KEYBOARD.$shl$matrix_kbd.v:55$268.$procmux$44379_Y[13]
.sym 21913 $false
.sym 21914 $false
.sym 21915 $false
.sym 21916 $auto$dff2dffe.cc:175:make_patterns_logic$59992$2
.sym 21917 CLK$2$2
.sym 21918 $auto$wreduce.cc:310:run$36598[3]$2
.sym 21920 KEYBOARD.is_pressed
.sym 21993 $abc$61381$n537
.sym 21994 KEYBOARD.is_pressed
.sym 21995 KEYBOARD.COLS_SHADOW[3]
.sym 21996 $false
.sym 21998 $abc$61381$n540
.sym 21999 KEYBOARD.is_pressed
.sym 22000 KEYBOARD.COLS_SHADOW[1]
.sym 22001 $abc$61381$n535
.sym 22003 $abc$61381$n530
.sym 22004 $abc$61381$n537
.sym 22005 KEYBOARD.COLS_SHADOW[3]
.sym 22006 $false
.sym 22008 $abc$61381$n535
.sym 22009 $abc$61381$n540
.sym 22010 KEYBOARD.COLS_SHADOW[1]
.sym 22011 $false
.sym 22013 $abc$61381$n546
.sym 22014 $abc$61381$n549
.sym 22015 KEYBOARD.COLS_SHADOW[0]
.sym 22016 $false
.sym 22018 $abc$61381$n536
.sym 22019 $abc$61381$n530
.sym 22020 $abc$61381$n535
.sym 22021 $false
.sym 22023 KEYBOARD.COLS_SHADOW[1]
.sym 22024 $abc$61381$n540
.sym 22025 $abc$61381$n535
.sym 22026 $false
.sym 22028 KEYBOARD.COLS_SHADOW[3]
.sym 22029 $abc$61381$n537
.sym 22030 $abc$61381$n530
.sym 22031 $false
.sym 22032 RESET$2
.sym 22033 CLK$2$2
.sym 22034 $false
.sym 22035 KEYBOARD.ROWS_EN[9]
.sym 22037 KEYBOARD.ROWS_EN[10]
.sym 22040 KEYBOARD.ROWS_EN[8]
.sym 22109 KEYBOARD.temp[0]
.sym 22110 KEYBOARD.RAM.r_data[0]
.sym 22111 $abc$61381$n507
.sym 22112 $false
.sym 22114 KEYBOARD.temp[3]
.sym 22115 KEYBOARD.RAM.r_data[3]
.sym 22116 $abc$61381$n507
.sym 22117 $false
.sym 22119 KEYBOARD.temp[1]
.sym 22120 KEYBOARD.RAM.r_data[1]
.sym 22121 $abc$61381$n507
.sym 22122 $false
.sym 22124 $false
.sym 22125 $false
.sym 22126 $false
.sym 22127 $false
.sym 22129 $false
.sym 22130 $false
.sym 22131 $false
.sym 22132 $false
.sym 22134 $auto$wreduce.cc:310:run$36598[1]
.sym 22135 $false
.sym 22136 $false
.sym 22137 $false
.sym 22139 $auto$wreduce.cc:310:run$36598[3]$2
.sym 22140 $false
.sym 22141 $false
.sym 22142 $false
.sym 22144 $false
.sym 22145 $false
.sym 22146 $false
.sym 22147 $false
.sym 22148 $auto$dff2dffe.cc:175:make_patterns_logic$59992$2
.sym 22149 CLK$2$2
.sym 22150 $false
.sym 22152 $techmap$techmap\KEYBOARD.$shl$matrix_kbd.v:55$268.$procmux$44379_Y[9]
.sym 22153 $techmap$techmap\KEYBOARD.$shl$matrix_kbd.v:55$268.$procmux$44379_Y[10]
.sym 22154 $techmap$techmap\KEYBOARD.$shl$matrix_kbd.v:55$268.$procmux$44379_Y[15]
.sym 22155 $auto$wreduce.cc:310:run$36598[0]
.sym 22157 KEYBOARD.row_counter[0]
.sym 22225 KEYBOARD.temp[7]
.sym 22226 KEYBOARD.RAM.r_data[7]
.sym 22227 $abc$61381$n507
.sym 22228 KEYBOARD.COLS_SHADOW[7]
.sym 22230 I2C_INPUT_LEN[4]
.sym 22231 $false
.sym 22232 $false
.sym 22233 $false
.sym 22240 I2C_INPUT_LEN[1]
.sym 22241 $false
.sym 22242 $false
.sym 22243 $false
.sym 22245 I2C_INPUT_LEN[7]
.sym 22246 $false
.sym 22247 $false
.sym 22248 $false
.sym 22260 I2C_INPUT_LEN[3]
.sym 22261 $false
.sym 22262 $false
.sym 22263 $false
.sym 22267 $auto$simplemap.cc:309:simplemap_lut$46578[3]
.sym 22268 $techmap$techmap\KEYBOARD.$shl$matrix_kbd.v:55$268.$procmux$44379_Y[12]
.sym 22270 $techmap$techmap\KEYBOARD.$shl$matrix_kbd.v:55$268.$procmux$44379_Y[14]
.sym 22271 $techmap$techmap\KEYBOARD.$shl$matrix_kbd.v:55$268.$procmux$44379_Y[8]
.sym 22272 KEYBOARD.ROWS_EN[11]
.sym 22274 KEYBOARD.ROWS_EN[12]
.sym 22303 $true
.sym 22340 $auto$alumacc.cc:483:replace_alu$36689[1]$2
.sym 22341 $false
.sym 22342 $auto$alumacc.cc:483:replace_alu$36689[1]
.sym 22343 $false
.sym 22344 $false
.sym 22345 $auto$alumacc.cc:484:replace_alu$36690[2]
.sym 22347 $false
.sym 22348 $auto$alumacc.cc:483:replace_alu$36689[2]
.sym 22350 $auto$alumacc.cc:484:replace_alu$36690[3]
.sym 22352 $false
.sym 22353 $auto$alumacc.cc:483:replace_alu$36689[3]
.sym 22355 $auto$alumacc.cc:484:replace_alu$36690[4]
.sym 22357 $false
.sym 22358 $auto$alumacc.cc:483:replace_alu$36689[4]
.sym 22360 $auto$alumacc.cc:484:replace_alu$36690[5]
.sym 22362 $false
.sym 22363 $auto$alumacc.cc:483:replace_alu$36689[5]
.sym 22365 $auto$alumacc.cc:484:replace_alu$36690[6]
.sym 22367 $false
.sym 22368 $auto$alumacc.cc:483:replace_alu$36689[6]
.sym 22370 $auto$alumacc.cc:484:replace_alu$36690[7]$2
.sym 22372 $false
.sym 22373 $auto$alumacc.cc:483:replace_alu$36689[7]
.sym 22379 $auto$alumacc.cc:484:replace_alu$36690[7]$2
.sym 22387 $auto$alumacc.cc:484:replace_alu$36663[3]
.sym 22388 $auto$alumacc.cc:483:replace_alu$36662[0]
.sym 22390 KEYBOARD.ROWS_EN[1]
.sym 22419 $true
.sym 22456 $auto$alumacc.cc:483:replace_alu$36644[0]$2
.sym 22457 $false
.sym 22458 $auto$alumacc.cc:483:replace_alu$36644[0]
.sym 22459 $false
.sym 22460 $false
.sym 22461 $auto$alumacc.cc:484:replace_alu$36645[1]
.sym 22463 $false
.sym 22464 $auto$alumacc.cc:483:replace_alu$36644[1]
.sym 22466 $auto$alumacc.cc:484:replace_alu$36645[2]
.sym 22468 $false
.sym 22469 $auto$alumacc.cc:483:replace_alu$36644[2]
.sym 22471 $auto$simplemap.cc:250:simplemap_eqne$52942[1]$2
.sym 22473 $false
.sym 22474 $auto$alumacc.cc:483:replace_alu$36644[3]
.sym 22480 $auto$simplemap.cc:250:simplemap_eqne$52942[1]$2
.sym 22482 $auto$alumacc.cc:470:replace_alu$36715.A_buf[2]
.sym 22483 $false
.sym 22484 $false
.sym 22485 $false
.sym 22487 $auto$wreduce.cc:310:run$36598[0]
.sym 22488 $false
.sym 22489 $false
.sym 22490 $false
.sym 22496 $auto$dff2dffe.cc:175:make_patterns_logic$59992$2
.sym 22497 CLK$2$2
.sym 22498 $false
.sym 22501 $auto$wreduce.cc:310:run$36598[1]
.sym 22503 $auto$wreduce.cc:310:run$36592[4]
.sym 22504 KEYBOARD.row_counter[1]
.sym 22578 $techmap\KEYBOARD.$procmux$8366_Y[7]
.sym 22579 $auto$wreduce.cc:310:run$36592[4]
.sym 22580 $false
.sym 22581 $false
.sym 22583 $techmap\KEYBOARD.$procmux$8366_Y[7]
.sym 22584 $auto$simplemap.cc:309:simplemap_lut$46578[3]
.sym 22585 $false
.sym 22586 $false
.sym 22588 $techmap\KEYBOARD.$procmux$8366_Y[7]
.sym 22589 $auto$wreduce.cc:310:run$36592[5]
.sym 22590 $false
.sym 22591 $false
.sym 22598 $techmap\KEYBOARD.$procmux$8366_Y[7]
.sym 22599 $auto$wreduce.cc:310:run$36592[6]
.sym 22600 $false
.sym 22601 $false
.sym 22603 $techmap\KEYBOARD.$procmux$8366_Y[7]
.sym 22604 $false
.sym 22605 $false
.sym 22606 $false
.sym 22612 RESET$2
.sym 22613 CLK$2$2
.sym 22614 $false
.sym 22617 $auto$wreduce.cc:310:run$36598[2]
.sym 22618 $auto$alumacc.cc:484:replace_alu$36750[2]
.sym 22619 $auto$wreduce.cc:310:run$36592[5]
.sym 22621 $auto$wreduce.cc:310:run$36598[3]
.sym 22622 KEYBOARD.row_counter[2]
.sym 22704 I2C_TRANS
.sym 22705 $false
.sym 22706 $false
.sym 22707 $false
.sym 22724 UART.tx_activity
.sym 22725 $false
.sym 22726 $false
.sym 22727 $false
.sym 22728 RESET$2
.sym 22729 CLK$2$2
.sym 22730 $false
.sym 22735 temp_output_report[2]
.sym 22737 temp_output_report[1]
.sym 22810 $0\uart_double_ff[0:0]
.sym 22811 I2C.wr
.sym 22812 last_wr
.sym 22813 RESET$2
.sym 22815 UART_WR
.sym 22816 UART.TX_sig_last
.sym 22817 $abc$61381$n967
.sym 22818 UART.tx_activity
.sym 22825 $auto$simplemap.cc:250:simplemap_eqne$55268[1]
.sym 22826 $false
.sym 22827 $false
.sym 22828 $false
.sym 22830 UART_WR
.sym 22831 $false
.sym 22832 $false
.sym 22833 $false
.sym 22840 I2C.wr
.sym 22841 $false
.sym 22842 $false
.sym 22843 $false
.sym 22844 RESET$2
.sym 22845 CLK$2$2
.sym 22846 $false
.sym 22848 LED2$2
.sym 22850 LED3$2
.sym 22853 LED4$2
.sym 22936 I2C.FLT_SDA.out
.sym 22937 $false
.sym 22938 $false
.sym 22939 $false
.sym 22960 $auto$dff2dffe.cc:175:make_patterns_logic$52791
.sym 22961 CLK$2$2
.sym 22962 $false
.sym 22963 $auto$wreduce.cc:310:run$36604[0]
.sym 22964 $auto$wreduce.cc:310:run$36604[3]
.sym 22965 LED1$2
.sym 22966 $abc$61381$n664
.sym 22968 UART.tx_clk_counter[3]
.sym 22970 UART.tx_clk_counter[0]
.sym 22999 $true
.sym 23036 UART.tx_clk_counter[0]$2
.sym 23037 $false
.sym 23038 UART.tx_clk_counter[0]
.sym 23039 $false
.sym 23040 $false
.sym 23041 $auto$alumacc.cc:484:replace_alu$36756[1]
.sym 23043 UART.tx_clk_counter[1]
.sym 23044 $true$2
.sym 23046 $auto$alumacc.cc:484:replace_alu$36756[2]$2
.sym 23047 $false
.sym 23048 UART.tx_clk_counter[2]
.sym 23049 $true$2
.sym 23050 $auto$alumacc.cc:484:replace_alu$36756[1]
.sym 23055 $auto$alumacc.cc:484:replace_alu$36756[2]$2
.sym 23057 $abc$61381$n664
.sym 23058 UART.tx_clk_counter[0]
.sym 23059 UART.tx_clk_counter[1]
.sym 23060 $false
.sym 23067 $abc$61381$n663
.sym 23068 UART.tx_activity
.sym 23069 $auto$wreduce.cc:310:run$36604[2]
.sym 23070 $false
.sym 23072 UART.tx_activity
.sym 23073 UART.tx_clk_counter[0]
.sym 23074 UART.tx_clk_counter[1]
.sym 23075 $false
.sym 23076 $auto$dff2dffe.cc:158:make_patterns_logic$53542
.sym 23077 CLK$2$2
.sym 23078 $logic_not$top.v:60$10_Y$2
.sym 23079 $techmap\I2C.FLT_SDA.$procmux$993_Y[1]
.sym 23080 $abc$61381$n749
.sym 23081 $auto$wreduce.cc:310:run$36591[0]
.sym 23082 $auto$dff2dffe.cc:158:make_patterns_logic$60797
.sym 23083 $auto$dff2dffe.cc:175:make_patterns_logic$60782
.sym 23084 I2C.FLT_SDA.counter[1]
.sym 23085 I2C.FLT_SDA.counter[2]
.sym 23086 I2C.FLT_SDA.counter[0]
.sym 23115 $true
.sym 23152 I2C.FLT_SCL.counter[0]$2
.sym 23153 $false
.sym 23154 I2C.FLT_SCL.counter[0]
.sym 23155 $false
.sym 23156 $false
.sym 23157 $auto$alumacc.cc:484:replace_alu$36720[1]$2
.sym 23159 I2C.FLT_SCL.counter[1]
.sym 23160 $true$2
.sym 23166 $auto$alumacc.cc:484:replace_alu$36720[1]$2
.sym 23183 I2C.SDAF
.sym 23184 $false
.sym 23185 $false
.sym 23186 $false
.sym 23192 $auto$dff2dffe.cc:175:make_patterns_logic$60782
.sym 23193 CLK$2$2
.sym 23194 $logic_not$top.v:60$10_Y$2
.sym 23197 $techmap\I2C.FLT_SDA.$procmux$993_Y[2]
.sym 23200 $auto$wreduce.cc:310:run$36591[2]
.sym 23201 $abc$61381$n748
.sym 23231 $true
.sym 23268 I2C.FLT_SDA.counter[0]$2
.sym 23269 $false
.sym 23270 I2C.FLT_SDA.counter[0]
.sym 23271 $false
.sym 23272 $false
.sym 23273 $auto$alumacc.cc:484:replace_alu$36723[1]$2
.sym 23275 I2C.FLT_SDA.counter[1]
.sym 23276 $true$2
.sym 23282 $auto$alumacc.cc:484:replace_alu$36723[1]$2
.sym 23299 KEYBOARD.kbd_code_hid[5]
.sym 23300 $false
.sym 23301 $false
.sym 23302 $false
.sym 23308 $auto$dff2dffe.cc:175:make_patterns_logic$58513
.sym 23309 CLK$2$2
.sym 23310 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 23318 KEYBOARD.ROWS_EN[7]
.sym 23433 KEYBOARD.ROWS_EN[2]
.sym 23434 KEYBOARD.ROWS_EN[6]
.sym 23588 $false
.sym 23590 KEYBOARD.ROWS_EN[4]
.sym 23591 $false
.sym 23593 KEYBOARD.ROWS_EN[5]
.sym 23885 $techmap$techmap\KEYBOARD.$shl$matrix_kbd.v:55$268.$procmux$44379_Y[14]
.sym 23886 $false
.sym 23887 $false
.sym 23888 $false
.sym 23909 $auto$dff2dffe.cc:175:make_patterns_logic$59992$2
.sym 23910 CLK$2$2
.sym 23911 $auto$rtlil.cc:1692:NotGate$61332
.sym 24023 $auto$rtlil.cc:1692:NotGate$61316$2
.sym 24024 $false
.sym 24025 $false
.sym 24026 $false
.sym 24057 RESET$2
.sym 24058 CLK$2$2
.sym 24059 $false
.sym 24166 $techmap$techmap\KEYBOARD.$shl$matrix_kbd.v:55$268.$procmux$44379_Y[9]
.sym 24167 $false
.sym 24168 $false
.sym 24169 $false
.sym 24176 $techmap$techmap\KEYBOARD.$shl$matrix_kbd.v:55$268.$procmux$44379_Y[10]
.sym 24177 $false
.sym 24178 $false
.sym 24179 $false
.sym 24191 $techmap$techmap\KEYBOARD.$shl$matrix_kbd.v:55$268.$procmux$44379_Y[8]
.sym 24192 $false
.sym 24193 $false
.sym 24194 $false
.sym 24205 $auto$dff2dffe.cc:175:make_patterns_logic$59992$2
.sym 24206 CLK$2$2
.sym 24207 $auto$rtlil.cc:1692:NotGate$61332
.sym 24319 $auto$wreduce.cc:310:run$36598[1]
.sym 24320 $auto$wreduce.cc:310:run$36598[0]
.sym 24321 $auto$wreduce.cc:310:run$36598[2]
.sym 24322 $false
.sym 24324 $auto$wreduce.cc:310:run$36598[1]
.sym 24325 $auto$wreduce.cc:310:run$36598[0]
.sym 24326 $auto$wreduce.cc:310:run$36598[2]
.sym 24327 $false
.sym 24329 $auto$wreduce.cc:310:run$36598[1]
.sym 24330 $auto$wreduce.cc:310:run$36598[0]
.sym 24331 $auto$wreduce.cc:310:run$36598[2]
.sym 24332 $false
.sym 24334 $false
.sym 24335 $true$2
.sym 24336 KEYBOARD.row_counter[0]
.sym 24337 $false
.sym 24344 $auto$simplemap.cc:309:simplemap_lut$46578[3]
.sym 24345 $false
.sym 24346 $false
.sym 24347 $false
.sym 24353 RESET$2
.sym 24354 CLK$2$2
.sym 24355 $false
.sym 24462 KEYBOARD.row_counter[0]
.sym 24463 $auto$wreduce.cc:310:run$36598[0]
.sym 24464 $auto$rtlil.cc:1692:NotGate$61364$2
.sym 24465 $false
.sym 24467 $auto$wreduce.cc:310:run$36598[1]
.sym 24468 $auto$wreduce.cc:310:run$36598[0]
.sym 24469 $auto$wreduce.cc:310:run$36598[2]
.sym 24470 $false
.sym 24477 $auto$wreduce.cc:310:run$36598[1]
.sym 24478 $auto$wreduce.cc:310:run$36598[0]
.sym 24479 $auto$wreduce.cc:310:run$36598[2]
.sym 24480 $false
.sym 24482 $auto$wreduce.cc:310:run$36598[1]
.sym 24483 $auto$wreduce.cc:310:run$36598[0]
.sym 24484 $auto$wreduce.cc:310:run$36598[2]
.sym 24485 $false
.sym 24487 $techmap$techmap\KEYBOARD.$shl$matrix_kbd.v:55$268.$procmux$44379_Y[11]
.sym 24488 $false
.sym 24489 $false
.sym 24490 $false
.sym 24497 $techmap$techmap\KEYBOARD.$shl$matrix_kbd.v:55$268.$procmux$44379_Y[12]
.sym 24498 $false
.sym 24499 $false
.sym 24500 $false
.sym 24501 $auto$dff2dffe.cc:175:make_patterns_logic$59992$2
.sym 24502 CLK$2$2
.sym 24503 $auto$rtlil.cc:1692:NotGate$61332
.sym 24506 SCL$2
.sym 24572 $true
.sym 24609 $auto$alumacc.cc:483:replace_alu$36662[0]$2
.sym 24610 $false
.sym 24611 $auto$alumacc.cc:483:replace_alu$36662[0]
.sym 24612 $false
.sym 24613 $false
.sym 24614 $auto$alumacc.cc:484:replace_alu$36663[1]
.sym 24616 $false
.sym 24617 $auto$alumacc.cc:483:replace_alu$36662[1]
.sym 24619 $auto$alumacc.cc:484:replace_alu$36663[2]
.sym 24621 $true$2
.sym 24622 $techmap$auto$alumacc.cc:470:replace_alu$36661.$ternary$/usr/bin/../share/yosys/ice40/arith_map.v:42$37725_Y[2]
.sym 24624 $auto$alumacc.cc:484:replace_alu$36663[3]$2
.sym 24626 $false
.sym 24627 $auto$alumacc.cc:483:replace_alu$36662[3]
.sym 24633 $auto$alumacc.cc:484:replace_alu$36663[3]$2
.sym 24635 i2c_input_data_type[0]
.sym 24636 $false
.sym 24637 $false
.sym 24638 $false
.sym 24645 $techmap$techmap\KEYBOARD.$shl$matrix_kbd.v:55$268.$procmux$44379_Y[9]
.sym 24646 $false
.sym 24647 $false
.sym 24648 $false
.sym 24649 $auto$dff2dffe.cc:175:make_patterns_logic$59992$2
.sym 24650 CLK$2$2
.sym 24651 $auto$wreduce.cc:310:run$36598[3]$2
.sym 24652 I2C.SDA_IN
.sym 24768 KEYBOARD.row_counter[0]
.sym 24769 KEYBOARD.row_counter[1]
.sym 24770 $false
.sym 24771 $false
.sym 24778 $auto$rtlil.cc:1692:NotGate$61364$2
.sym 24779 KEYBOARD.row_counter[0]
.sym 24780 KEYBOARD.row_counter[1]
.sym 24781 $false
.sym 24783 $auto$wreduce.cc:310:run$36592[4]
.sym 24784 $false
.sym 24785 $false
.sym 24786 $false
.sym 24797 RESET$2
.sym 24798 CLK$2$2
.sym 24799 $false
.sym 24868 $true
.sym 24905 KEYBOARD.row_counter[0]$2
.sym 24906 $false
.sym 24907 KEYBOARD.row_counter[0]
.sym 24908 $false
.sym 24909 $false
.sym 24910 $auto$alumacc.cc:484:replace_alu$36750[1]
.sym 24912 $false
.sym 24913 KEYBOARD.row_counter[1]
.sym 24915 $auto$alumacc.cc:484:replace_alu$36750[2]$2
.sym 24916 $false
.sym 24917 $false
.sym 24918 KEYBOARD.row_counter[2]
.sym 24919 $auto$alumacc.cc:484:replace_alu$36750[1]
.sym 24924 $auto$alumacc.cc:484:replace_alu$36750[2]$2
.sym 24926 KEYBOARD.row_counter[2]
.sym 24927 $auto$wreduce.cc:310:run$36598[2]
.sym 24928 $auto$rtlil.cc:1692:NotGate$61364$2
.sym 24929 $false
.sym 24936 $false
.sym 24937 $false
.sym 24938 KEYBOARD.row_counter[3]
.sym 24939 $auto$alumacc.cc:484:replace_alu$36750[2]
.sym 24941 $auto$wreduce.cc:310:run$36592[5]
.sym 24942 $false
.sym 24943 $false
.sym 24944 $false
.sym 24945 RESET$2
.sym 24946 CLK$2$2
.sym 24947 $false
.sym 25074 I2C.received_byte[2]
.sym 25075 $false
.sym 25076 $false
.sym 25077 $false
.sym 25084 I2C.received_byte[1]
.sym 25085 $false
.sym 25086 $false
.sym 25087 $false
.sym 25093 $auto$dff2dffe.cc:175:make_patterns_logic$49267
.sym 25094 CLK$2$2
.sym 25095 $false
.sym 25207 temp_output_report[0]
.sym 25208 $false
.sym 25209 $false
.sym 25210 $false
.sym 25217 temp_output_report[1]
.sym 25218 $false
.sym 25219 $false
.sym 25220 $false
.sym 25232 temp_output_report[2]
.sym 25233 $false
.sym 25234 $false
.sym 25235 $false
.sym 25241 $auto$dff2dffe.cc:175:make_patterns_logic$52500
.sym 25242 CLK$2$2
.sym 25243 $logic_not$top.v:60$10_Y$2
.sym 25350 $false
.sym 25351 UART.tx_clk_counter[0]
.sym 25352 $false
.sym 25353 $true$2
.sym 25355 $false
.sym 25356 UART.tx_clk_counter[3]
.sym 25357 $true$2
.sym 25358 $auto$alumacc.cc:484:replace_alu$36756[2]
.sym 25360 INT
.sym 25361 $false
.sym 25362 $false
.sym 25363 $false
.sym 25365 $auto$wreduce.cc:310:run$36604[0]
.sym 25366 $auto$wreduce.cc:310:run$36604[2]
.sym 25367 $auto$wreduce.cc:310:run$36604[3]
.sym 25368 $false
.sym 25375 $abc$61381$n663
.sym 25376 UART.tx_activity
.sym 25377 $auto$wreduce.cc:310:run$36604[3]
.sym 25378 $false
.sym 25385 $abc$61381$n663
.sym 25386 UART.tx_activity
.sym 25387 $auto$wreduce.cc:310:run$36604[0]
.sym 25388 $false
.sym 25389 $auto$dff2dffe.cc:158:make_patterns_logic$53542
.sym 25390 CLK$2$2
.sym 25391 $logic_not$top.v:60$10_Y$2
.sym 25498 I2C.FLT_SDA.counter[0]
.sym 25499 I2C.FLT_SDA.counter[1]
.sym 25500 $false
.sym 25501 $false
.sym 25503 $techmap\I2C.FLT_SDA.$procmux$993_Y[1]
.sym 25504 $auto$wreduce.cc:310:run$36591[0]
.sym 25505 I2C.FLT_SDA.out
.sym 25506 I2C.SDAF
.sym 25508 $false
.sym 25509 I2C.FLT_SDA.counter[0]
.sym 25510 $false
.sym 25511 $true$2
.sym 25513 $abc$61381$n748
.sym 25514 I2C.FLT_SDA.out
.sym 25515 I2C.SDAF
.sym 25516 $false
.sym 25518 $techmap\I2C.FLT_SDA.$procmux$993_Y[2]
.sym 25519 $abc$61381$n749
.sym 25520 $false
.sym 25521 $false
.sym 25523 $techmap\I2C.FLT_SDA.$procmux$993_Y[1]
.sym 25524 $false
.sym 25525 $false
.sym 25526 $false
.sym 25528 $techmap\I2C.FLT_SDA.$procmux$993_Y[2]
.sym 25529 $false
.sym 25530 $false
.sym 25531 $false
.sym 25533 $abc$61381$n748
.sym 25534 $auto$wreduce.cc:310:run$36591[0]
.sym 25535 $false
.sym 25536 $false
.sym 25537 $auto$dff2dffe.cc:158:make_patterns_logic$60797
.sym 25538 CLK$2$2
.sym 25539 $logic_not$top.v:60$10_Y$2
.sym 25656 $abc$61381$n748
.sym 25657 $auto$wreduce.cc:310:run$36591[2]
.sym 25658 $false
.sym 25659 $false
.sym 25671 $false
.sym 25672 I2C.FLT_SDA.counter[2]
.sym 25673 $true$2
.sym 25674 $auto$alumacc.cc:484:replace_alu$36723[1]
.sym 25676 I2C.FLT_SDA.counter[0]
.sym 25677 I2C.FLT_SDA.counter[1]
.sym 25678 I2C.FLT_SDA.counter[2]
.sym 25679 $false
.sym 25829 $techmap$techmap\KEYBOARD.$shl$matrix_kbd.v:55$268.$procmux$44379_Y[15]
.sym 25830 $false
.sym 25831 $false
.sym 25832 $false
.sym 25833 $auto$dff2dffe.cc:175:make_patterns_logic$59992$2
.sym 25834 CLK$2$2
.sym 25835 $auto$wreduce.cc:310:run$36598[3]$2
.sym 25972 $techmap$techmap\KEYBOARD.$shl$matrix_kbd.v:55$268.$procmux$44379_Y[10]
.sym 25973 $false
.sym 25974 $false
.sym 25975 $false
.sym 25977 $techmap$techmap\KEYBOARD.$shl$matrix_kbd.v:55$268.$procmux$44379_Y[14]
.sym 25978 $false
.sym 25979 $false
.sym 25980 $false
.sym 25981 $auto$dff2dffe.cc:175:make_patterns_logic$59992$2
.sym 25982 CLK$2$2
.sym 25983 $auto$wreduce.cc:310:run$36598[3]$2
.sym 26069 $false
.sym 26071 KEYBOARD.ROWS_EN[6]
.sym 26072 $false
.sym 26074 KEYBOARD.ROWS_EN[7]
.sym 26163 $false
.sym 26165 KEYBOARD.ROWS_EN[8]
.sym 26190 $false
.sym 26192 KEYBOARD.ROWS_EN[9]
.sym 26193 $false
.sym 26195 KEYBOARD.ROWS_EN[10]
.sym 26250 $false
.sym 26252 KEYBOARD.ROWS_EN[11]
.sym 26253 $false
.sym 26255 KEYBOARD.ROWS_EN[12]
.sym 26280 INT
.sym 26309 $auto$dff2dffe.cc:175:make_patterns_logic$59992
.sym 26310 $false
.sym 26312 I2C.SDA_DIR
.sym 26339 $auto$wreduce.cc:310:run$36598[3]
.sym 26343 I2C_TRANS
.sym 26399 LED4$2
.sym 26402 LED3$2
.sym 26429 LED2$2
.sym 26432 LED1$2