.device 1k .io_tile 1 0 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000100000000010000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .io_tile 2 0 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .io_tile 3 0 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .io_tile 4 0 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000100000001000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .io_tile 5 0 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .io_tile 6 0 000000111000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000100 000000000000000000 001000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .io_tile 7 0 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000001111000000100 000000001000000100 000100000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .io_tile 8 0 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000100000000100000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .io_tile 9 0 000000000000011000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .io_tile 10 0 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .io_tile 11 0 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000100000000000000 000000000001100000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .io_tile 12 0 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .io_tile 0 1 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000100000000011000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .logic_tile 1 1 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 .logic_tile 2 1 000000000000000111100000001000000000000010000001000000 000000000000000000100000000011000000000000000000000000 111000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 010000000000000000000000000000000000000000000100000001 000000000000010000000000000011000000000010000000000000 000000000000000000000000000000000000000000000100000000 000000000000000000000000000001000000000010000000100000 000000000000000000000000000000000000000000000000000000 000000000000001111000000000000000000000000000000000000 000000000000001000000000000000000000000000000000000000 000000000000001011000000000000000000000000000000000000 000000000000000000000000001000000000000000000100000000 000000000000000000000000000111000000000010000000000010 000000000000000111100000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 .ramb_tile 3 1 000000000000000000000000000000000000000000 000000010000000000000000000000000000000000 000000000000000000000000000000000000000000 000001000000000000000000000000000000000000 000001000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 .logic_tile 4 1 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000010100000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000010000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 .logic_tile 5 1 000000000000000011000000000111100000000000001000000000 000000000000000000000000000000100000000000000000001000 000000000000000000000110000101000001000000001000000000 000000000000000000000000000000001001000000000000000000 000000000000000001000110100000000000000000001000000000 000000000000000000100100000000001011000000000000000000 000000000110000111000000000000000000000000001000000000 000000000000000000100000000000001000000000000000000000 000000000000000000000000000000000001000000001000000000 000000000000000000000000000000001010000000000000000000 000000000000000001000000000000000001000000001000000000 000000000000000000000000000000001100000000000000000000 000000000000001000000000000000001000111100000000000110 000000000000001111000000000000000000111100000000000000 000000000000000000000000000000000000000010000001000000 000000000000000000000010100111000000000000000000000000 .logic_tile 6 1 000000000000001111100000000101000000000000001000000000 000000000110001111100000000000000000000000000000001000 000000000000001000000110100000000000000000001000000000 010000000000001101000010110000001011000000000000000000 000000000010000000000000010011000001000000001000000000 000000000001001011000011110000001001000000000000000000 000000000000000000000000000111000001000000001000000000 000000000000000000000000000000001001000000000000000000 000000000000000011100000000000000001000000001000000000 000000000000000000000000000000001000000000000000000000 000000000000000000000000000000000000000000001000000000 000000000000000000000000000000001000000000000000000000 000000000000000011100000010000000000000000001000000000 000000000000000000000010110000001000000000000000000000 000000000000000000000000000000000000000000001000000000 000000000010000000000000000000001111000000000000000000 .logic_tile 7 1 000000000000000111100011000001000000000000001000000000 000000000000001001100100000000100000000000000000001000 000000000000000000000000000001000001000000001000000000 000000000000000000000000000000001100000000000000000000 000000000000000000000000000000000001000000001000000000 000000000000000000000011000000001101000000000000000000 000000000000000000000000000000000000000000001000000000 000000000000000000000000000000001011000000000000000000 000001000000001000000110100000000000000000001000000000 000010000000000101000000000000001100000000000000000000 000000000000001101100000000000000000000000001000000000 000000000000000101000010110000001101000000000000000000 000000000000000000000000000000000001000000001000000000 000000000000000000000000000000001100000000000000000000 000000000000000000000000000000000000000000001000000000 000000000000000000000000000000001000000000000000000000 .logic_tile 8 1 000000000000000101000111100000000000000010000001000000 000000000000011001100100000001000000000000000000000000 111000000000000001000111010000000000000000000000000000 000000000000000000000110000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000001100000000000110000000000000000010000001000000 000000000000000000000000001001000000000000000000000000 010000000000000000000000001000000000000010000000000000 010000000000000000000000000011000000000000000001000000 000001000000001000000000001000000000000010000000000000 000011100000001101000000001001000000000000000001000000 000000000000000000000000000001100001001100110000000000 000000000000000000000000000000001011110011000000000000 000000000000000000000000000001100000000000000101000000 000000000000000000000000000001100000000001000000000000 .logic_tile 9 1 000000000000000001000010000101000000000000001000000000 000000000000000001000110010000000000000000000000001000 000000000100000011100000000001000000000000001000000000 000000000000000000000000000000101000000000000000000000 000100000001010001000000000001001000001100111000000000 000000000000000001100000000000101010110011000000000000 000000000000000000000000000011001000001100111000000000 000000000000000000000000000000001000110011000000000000 000000000000001000000111000011001000001100111000000000 000000000000001111000100000000101010110011000000000000 000000000000000000000000000001001000001100111000000000 000000000000000000000000000000001000110011000000000000 000000000000000000000000000001101000001100111000000000 000000000000000000010000000000001010110011000000000000 000000000000000000000000000000001000111100000000000000 000000000000000000000000000000000000111100000000000000 .ramb_tile 10 1 000010000000000000000000000000000000000000 000000010000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 .logic_tile 11 1 000000000000000000000000000001100001000000001000000000 000000000000000000000011100000001010000000000000000000 111000000000000001000110010000001001001100111000000000 000000000000000000000010000000001001110011000000000000 000000000000000001100000000000001001001100111000000000 000000000000000000000011100000001001110011000000000000 000000000000000011000110000000001000111100000000000000 000000000000000000000011110000000000111100000000000000 010000000000000000000000000111111011100000000000000110 010000000000000000000000000111111011000000000000000101 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000101100000010111000000000000000100000000 000000000000000000000010001001100000000001000000000000 000000000000000000000000010101000000000000000100000000 000000000000000000000010001101000000000001000000000000 .logic_tile 12 1 000000000000001000000110100000001000001100110000000000 000000000000000001000000000000011010110011000000000000 111000000000000111000000001001000000000000000100000000 000000000000100000000000000001000000000001000000000000 000000000000000001100000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 001000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000100000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 .io_tile 13 1 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .io_tile 0 2 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .logic_tile 1 2 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 111000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 010000000000000000000010000000000000000000000000000000 110000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000001000000000111010000000000000000000000000000000000 000010100000000000100000000000000000000000000000000000 000000000000000000000000000000000000000000000100000000 000000000000000000000000000011000000000010000010000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 .logic_tile 2 2 000000000001010101100111110111100000000000001000000000 000000000000000000100111000000100000000000000000001000 000000000000000111000000000011000000000000001000000000 000000000000000000000000000000000000000000000000000000 000011000000101000000111100101000000000000001000000000 000000100001010111000000000000000000000000000000000000 000000000000000000000000000101000000000000001000000000 000000000000000000000000000000100000000000000000000000 000000000000000000000000000001000000000000001000000000 000000000000001111000000000000100000000000000000000000 000000000000000000000000000001000001000000001000000000 000000000000000000000000000000101000000000000000000000 000100000000000000000010000001000000000000001000000000 000010000110000000000100000000000000000000000000000000 000000000000000000000000000111000000000000001000000000 000000000100000000000011000000100000000000000000000000 .ramt_tile 3 2 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000001010000000000000000000000000000000 000000001110000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000001000000100000000000000000000000000000 000010100001000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000010000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 .logic_tile 4 2 000000000000000000000111100000000000000000000000000000 000000000000000000000111100000000000000000000000000000 111000000000000000000111100000000000000000000000000000 000010000000000000000000000000000000000000000000000000 110000000000000000000000000000000000000000000000000000 110000000000000000000000000000000000000000000000000000 000000000000000111100000000000000000000000000000000000 000000000000000000100000000000000000000000000000000000 000000000000000111100000000001001101000010000001000000 000000000000000000000000001001101010000000000000000000 000000000001010000000000000000000000000000000000000000 000000000000100000000000000000000000000000000000000000 000000000000000000000011100000000000000000000000000000 000000000000000000000100000000000000000000000000000000 000000000000000000000000001000000000000000000100000000 000000000000000000010000001001000000000010000000000000 .logic_tile 5 2 000000000000000001000000000001000000000010000000000000 000000000000000000100000000011000000000000000000000000 111000000000000000000110111011011010000000000001000000 000000000000000000000110001001001000000001000000000000 010000000000000000000000000000000000000000000000000000 100000000000001101010000000000000000000000000000000000 000001000000000101100000011011011010000001000001000000 000011100000000000100010001001001000000000000000000000 000000000000001000000000000000000000000000000000000000 000000000000001111000000000000000000000000000000000000 000000000000000000000000001111100000000000000100000001 000000000000000000000000001101000000000011000000000001 000000000000000000000000000101000001001100110100000000 000000000000000000000000000000001001110011000000000101 010000000000000001110000000000000000000000000000000000 100000001000000000000000000000000000000000000000000000 .logic_tile 6 2 000000000000001000000000000000001000111100000000000000 000001000000000101000011100000000000111100000000010010 000000000000000000000000010000000000000000000000000000 000000000000000011000010110000000000000000000000000000 000000000000001000000000000000000000000000000000000000 000000000000000101000000000000000000000000000000000000 000000000000000000000000011001011001001000000000000000 000000000000000011000010110101011111000000000000000000 000100000000000000000000001101011011000000010000000001 000100000000000000000000000001011101000000000000000000 000000000000100000000000011001011001100000000000000000 000000000001010000000011100101011111000000000000000000 000000000000000000000000000000000000000010000000000000 000000000000000000000000001001000000000000000000000000 000100000000100000000000010000000000000000000000000000 000000000001010000010011100000000000000000000000000000 .logic_tile 7 2 000000000000000011100111100000001000111100000000000000 000000000000000000100000000000000000111100000000110000 111000000000101000000110001111111011000010000000000000 000000000100010001000000001111011010000000000000000000 110000000000000111100000000101111001000001000000000000 110000000000000000000000001011111000000000000000000000 000000000000001001000110001111111110000100000000000000 000000000001010001100011001111101100000000000000000000 000000000000000111100000001000000000000000000100000000 000000000000000000000011000101000000000010000000000000 000000001010000000000000000000000000000000000100000000 000000000000000000000000000001000000000010000000000000 000000100000000000010010000000000000000000000100000000 000001000000000000000100000101000000000010000000000000 000000000000000001100010110000000000000000000100000000 000000000000100000000010001001000000000010000000000000 .logic_tile 8 2 000000000001000101100010011001100000000000010000000000 000000000000100011000010100101001000000000000000000000 111000000000001011000000001001100001000000010010000000 000000000000000001100000000101001000000000000010000000 110000000000001000000110100111100000000000010000000000 010000000000000001000000001001101011000000000000000000 000000000000010111000000000000000000000000000000000000 000000000000101001000000000000000000000000000000000000 000000000000000000000000011111100000000001000000100000 000000000000000000000011010101100000000000000000000000 000000000000000000000000000111000000000000010000000100 000000000000000000000000000101101000000000000000000000 000000000000000000000011000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000010000000000000000000101000011 000000000000000000000011101001000000000010000000000000 .logic_tile 9 2 000000000000000011000010010001011001001100110000000000 000000000000000000000111010000111100110011000000000000 111000000000000000000010100101100001000000000101000000 000000000000000101000000000111101011000000100000000000 010010100000001000000010101001000001000000000110000000 010001000000000001010010100111001010000000100000000000 000010000000000101000110100101100000000000000110000001 000000000000000000000010100111101011000000100000000000 000000000000000000000000001001000000000000000110100000 000000000000000000000000000111001011000000100000000000 000010100000000000010000000000000000000000000000000000 000001000000000001000000000000000000000000000000000000 000000000000000000000000001001000001000000000101000000 000000001010001001000000000111001000000000100000000000 110001000000000001000000000101100000000000000100000000 000010000000000000100000000111101010000000100010000000 .ramt_tile 10 2 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 .logic_tile 11 2 000001100000000011100010000000000000000000000000000000 000011000000000011100000000000000000000000000000000000 111000000000000000000000000000000000000010000001000000 000000000000000000000011001001000000000000000000000000 110000000000000000000000001000000000000010000000000000 110000000000010000000000000011000000000000000000000000 000000000001000000000000001000000000000010000000000000 000000000000001011000000000101000000000000000000000000 000000000000000000000000000111111111000010000010000000 000000001100000000000000000001011001000000000001000000 000000000000001000000000010000000000000000000000000000 000000000000001111000011100000000000000000000000000000 000010000000000000000010001000000000000010000000000000 000000000000000000000100001011000000000000000000000000 000001000000101000000000010000000000000000000110000000 000000100001001111000011100001000000000010000000100000 .logic_tile 12 2 000000000000001000000111000000000000000000000000000000 000000000000001111000100000000000000000000000000000000 111000000000000111100000000000000000000010000000000000 000000000000000000000000001001000000000000000000000000 010000000000000000000011000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000001010000000000000000000000000010000000000000 000000000000100000000000001101000000000000000000000000 000000000000000000000000001000000000000000000100100000 000000000000000000000000000001000000000010000000000000 000000000000010000000000000000000000000000000100100000 000000000000100000000000000001000000000010000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 .io_tile 13 2 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .io_tile 0 3 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .logic_tile 1 3 000000000000000111100010000101100000000000001000000000 000000000000000000000000000000000000000000000000001000 000000000000000000000110100000000000000000001000000000 000000000000000000000100000000001001000000000000000000 000000000000000000000000000000001001001100111000000010 000000000000000000000000000000001100110011000000000000 000100000000000011000000000000001000001100111000000000 000100000000001111000000000000001000110011000000000000 000000000000100000000000000000001001001100111000000000 000000000001000000000000000000001010110011000000000000 000010000000000000000000000000001001001100111000000000 000001000000001001000000000000001001110011000000000010 000000000000000101000000000000001000001100111000000000 000000000000000000000000000000001110110011000000000000 000110000000000000000000000000001000111100000000000000 000101000000000000000000000000000000111100000000000000 .logic_tile 2 3 000000000000001000000111000000001000111100000000000010 000000000000001011000111000000000000111100000000010000 111000000000001111100011110001000000001100110000000000 010000000000001111100010100000001011110011000000000000 000000000000000101000110100001111001101001110101000100 000000000000000011100011000101101001010101110000000000 001000000000001111100011101101111011101001110110000000 000000000000000101100011001101101010010101110010000010 000000000001000000000000001001111000101001110101100000 000000000000000000000000000001101011010101110010000100 000000000000000000000000000101111010101001110100100011 000000000000000000000000000101101001010101110010000001 000000000000000001100111000001111000101001110101000000 000000000000000000000000001001101110010101110000100101 000010100000000000000000001101101110101100100100000010 000001000000000000000000000001111011111101010000000100 .ramb_tile 3 3 000000001110000000000000000000000000000000 000000010000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000010000000000000000000000000000000000000 000001000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000010000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000010000000000000000000000 .logic_tile 4 3 001000000000000001100000000000000000000000000000000000 000000000000000011000000000000000000000000000000000000 111000000000000001000111101111111010000010000000000000 000000000000000000000100001001111110000000000000000000 010000000000000000000011100101100000000001000001000000 110000000000000000000000001011100000000000000000000000 000000000000000000000010100001000000000001000001000000 000000000000001011000011011111000000000000000000000000 010000000000000000000000001001000000000001000001000000 010000000010000000000011100011000000000000000010000000 000000000000000000000000010011100000000001000000100000 000000000000000011000011111111100000000000000000000000 001000000000000000000000000101100000000001000000000000 000000000000000011000011101011000000000000000001000000 000000000000000000000010001000000000000000000101000000 000000000000000000000100000001000000000010000010000000 .logic_tile 5 3 000000000000000000000000000000000000000010000011000000 000000000000000000000010110000000000000000000000000010 111000000000000000000000000000000000000000000100000011 000000000000000000000000000101000000000010000000000000 110000000000000000000000000000000000000000000000000000 110000000000001101000000000000000000000000000000000000 000000000000000000000000000000000000000000000100000100 000000000000000000000000000111000000000010000000000000 000000000000000000000010100000000000000000000000000000 000000000000000000000100000000000000000000000000000000 000000000001000000000000000000000000000000000100000011 000000000000100000000000001011000000000010000000000000 000000000000000000000011000000000000000000000100000000 000000000001000101000000001001000000000010000000000100 110000000000000000000000000000000000000000000000000000 000000000000100000000000000000000000000000000000000000 .logic_tile 6 3 000001001100000000000000010000000000000000000000000000 000000000000001001000010000000000000000000000000000000 111010100000000101000011101101000000000010000000000000 000000000000000000000100000001100000000000000000100000 010000000000000000000010100001111010000011010000000000 000000001110000000000000001101001000000010100000000000 000000100001010000000000000000000000000000000000000000 000000000000100101000000000000000000000000000000000000 000000000000000111100000000111011000010101110000000001 000000001010000000000000001001111000101001110000000100 000000000000000000000000000000000000000000000110000000 000000001100100000000000000011000000000010000000000000 000001000000000000000000010000000000000000000000000000 000000000000000000000010100000000000000000000000000000 000000000001000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 .logic_tile 7 3 000000000000001001100110001001011010100000000000000000 000000000000001111000010011101001010000000000000000010 111000000000000000000011100001100000000000000000000000 000000001000000000000111000011101011000010000000000000 010000000000001111000011101001011101000000010000000000 010000000000000111100110001101111010000000000000000000 000000000000001001100010001001000000000001000000000000 000000000000000001000100001001000000000000000000000000 000000000000000011000111001011101010001000000000000000 000000000000000000000000001111101110000000000000000000 000000000001000001010110100111101010000000000000000000 000000000000100000000000000001111101010000000000000000 001000000100000011000000001011001011000010000001000000 000000000000000000100000001111111001000000000000000000 000000000000000000000110001000000000000000000100000000 000000000010100000000000000011000000000010000000000000 .logic_tile 8 3 000000000001000011000110010101101111100000000000000001 000100000000000011000010001001011001000000000000000000 111010100000001001100110110111011011000010000000000000 000001000000000001000110001001101100000000000000100000 110000000000000011100011001111000000000000010000000000 010000000000000000010010100001001110000000000000000000 000000000001010001000011011101001010111111000000000000 000000000000101101000110000001101000010110000000000000 000000000000010000000010001111111101000001000000000000 000000000000100011000110001101111101000000000000000000 000010000000000101100111100001000001000000010000000000 000001000000000000000110011101001011000000000000000000 000000000001010001100110110001100000000001000000000000 000000000000100111100010100011100000000000000000000000 000001000000000000000000000000000000000000000110000000 000010000000000000000011111011000000000010000000000000 .logic_tile 9 3 000000000000000101000011000001011110001100110000000000 000000000000000000000100000000100000110011000000000000 111100000000000001000000000000000000000010000000000000 000000000000000000100000000001000000000000000010000000 110000000000001000000000011101011011000001000000000000 010000000000000111000011110101111011000000000000000000 000010100000010111100110010101100001000000000010000000 000001000000000000100010000101101011000010000000000000 000000000000000000000000010101011011001000000000000000 000000000000001001000011001111111011000000000001000000 000010100000001000000110000101100001000000000000000000 000001000110001111010100000101101011000000100001000000 000100000000011000000011101001011100000000110100000000 000000000000100001000000000011111100000000000010000000 110000000010001000000110001111100000000000000101000000 000000000000000111000100000001101110000000100010000000 .ramb_tile 10 3 000010000000000000000000000000000000000000 000001011100000000000000000000000000000000 000000100000000000000000000000000000000000 000001000000000000000000000000000000000000 000000001110000000000000000000000000000000 000000000000000000000000000000000000000000 000010100000000000000000000000000000000000 000001000000000000000000000000000000000000 001000000001000000000000000000000000000000 000000000000100000000000000000000000000000 000000100000010000000000000000000000000000 000000000000000000000000000000000000000000 000010000000000000000000000000000000000000 000001000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 .logic_tile 11 3 000001000000000111100010001001000000000000000000000000 000000100000000000100110000001001100000010000001000000 111000001100000001100000000011011100000000000000000000 000000000000000101000000000001001011000000010000000000 010000000000000001100000001000000000000010000000000000 010000000000000000000011000011000000000000000000000000 000001100000000000000000001101000000000001000001000001 000000000000000101000000000101000000000000000000000000 001000000000000000000000001001111111000000010000100000 000000000000000111000000000001001101000000000000000000 000000001111011000000000010011000000000000000000000000 000000000000110111000011100001000000000010000001000000 000000000000000000000010000000000000000000000100000000 000000000000000000000100001111000000000010000001000000 000000000000001000000000000000000000000000000100100000 000000000000000111000000001001000000000010000000000000 .logic_tile 12 3 000000000000000101000000000101000000000000001000000000 000000000000000000000000000000100000000000000000001000 000000000000000000000000000000000000000000001000000000 000000000000000000000000000000001000000000000000000000 000000000000000000000000010000000000000000001000000000 000000000000000000000010100000001111000000000000000000 000000000000000000000000000000000001000000001000000000 000000001100000101000000000000001010000000000000000000 000000000000000000000000010000000000000000001000000000 000000000000000000000010010000001101000000000000000000 000001000000100000000111110000000001000000001000000000 000000100001010000000010010000001101000000000000000000 000000000000000000000110000000000001000000001000000000 000000000000000000000100000000001101000000000000000000 000000000000000000010000000000001000111100000000000100 000000000000000000000000000000000000111100000000000000 .io_tile 13 3 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000001100000 000000000000000000 100100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000001 000000000000000000 000000000000000000 .io_tile 0 4 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .logic_tile 1 4 000000100000000001000000001000000000000010000000000010 000000000000000000100000000111000000000000000000000000 111000000000000001100010100000000000000000000000000000 000000000000000000000000000000000000000000000000000000 001000000000000000000000010000011001001100110000000000 000000000000000000000010000000011110110011000000000000 000100000000000101100110000000000000000010000000000000 000100000000000000100000000011000000000000000000000100 000000000010000101100000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000101100000000001000000000000 000000000000000000000000000001100000000000000000000000 000000000000000000010000000000000000000000000000000000 001000000000000000000000000000000000000000000000000000 000000000000000001100011001101111110101001110101000000 000000000000000000000000000001011011010101110000000000 .logic_tile 2 4 000000000000001000000010101001001010000100000000000000 001000000000000111000110100001111000000000000000000001 111000000000001000000000000001000000000001000001000000 000000001100001111000000001111100000000000000000000000 010000000000000001000000000000000000000000000100000000 000000000000000000100010110101000000000010000010000000 000000000000000001000000000000000000000000000000000000 000000001110000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000011000000000000000000100000000 001000001000000000000011000101000000000010000000000100 000010100000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 .ramt_tile 3 4 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000100000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 .logic_tile 4 4 000000000000000000000110000000000000000000000000000000 000000000000000000000010100000000000000000000000000000 111000000000000000000000001111000000000001000001000000 000000000000000000000000001101000000000000000001000000 010000000000000000000010000000000000000000000000000000 110000000000000000000100000000000000000000000000000000 000000000000000000000000000011100000000001000000000000 000000000000000000000011001011100000000000000000100100 000010101000001000000010000000000000000010000000000100 001001000000000101000100001001000000000000000000000000 000000000000010000000000010000000000000000000000000000 000000000000100000000010110000000000000000000000000000 000000000000000101100000000000000000000000000100000010 001000000000000000000000000011000000000010000010000000 110000000000000000000000000000000000000000000100000000 000000000000000000000000001001000000000010000000100000 .logic_tile 5 4 000000000000000011100000000001000000000001000001000001 000000001110000111000011101111000000000000000000000000 111000000000000001000010001011111001100000000000000000 000000000000111011100111001111111100000000000000000000 010000000000000000000110010101000000000001000001000000 011000000000000111000011111111000000000000000001100000 001000000001011000000000001011000001000010100000000000 001000001010000001000010001101001101000010010000000000 000000000000000111000010001011000000000010100000000000 001000000000001001100000000001001110000010010000000000 000000000000000001000010001101000001000001010000000100 000000001010000000100111100101101110000010010000000000 000000000000000001000111000001101010111100010100100000 001000000000000000100100001111011000011100000000000000 110000000000000000000000000111000001000001010100000000 000010000000001001000010101011101001000010010001100000 .logic_tile 6 4 000000000000000101000110000011000000000001000000000011 001000000000000001000000000001000000000000000001000000 111000000000000000000000001101101010000000110000000000 000000001000000000000000001011101111000000100000000000 110000000000000001000000010000000000000000000000000000 000000000000000000000010010000000000000000000000000000 000000000000000001100111000101111110001100000000000000 000000000000000000000000001111011011001000000000000000 000000000000000011000000000111001010000011000000000000 001000000000000111100010001011111110000001000000000010 000001000000010000000111100101000000000000000000000000 001011100000110000010100000001000000000010000000000000 000000000000010001100000000000000000000000000000000000 001000001110100000000011100000000000000000000000000000 110000000000000000000110000011000000000001000100000000 000000000000000000000000001001000000000000000000000000 .logic_tile 7 4 000000000000001000000000001011000000000001000000000000 000000000000000111000010010011100000000000000000000010 111000100000000000000110101001101001000010000000000000 000001000000000000000011101001111110000000010000000000 110000000000000000000000000000000000000000000000000000 110000000000000000000000000000000000000000000000000000 000000100000100000000110100000000000000000000000000000 000000000001010000000011100000000000000000000000000000 000000000000000000000011001101100000000011110000000000 000000000000010000000000001101101000000011100000100000 001000000000001001000000000000000000000000000000000000 000000000000000101100000000000000000000000000000000000 000000000000000000000010000000000000000000000000000000 001000000000000000000000000000000000000000000000000000 000000000100000000000000001000000000000000000100000010 000000000000001011000000000011000000000010000000100000 .logic_tile 8 4 000000100000000001000110010111011000011100000000000000 000000000000001001000010000011011010001100000000000010 000000000000001000000111010101100000000000110000000000 000000000000001011000110000001101001000000010000000000 000000000000100011100011111111000000000011000010000000 000000000001000000000110000011100000000010000000000000 000010001000001001100111011001000000000000000000000000 000001000000000001000010000101000000000010000000000001 000000000000000000000010001101000000000001000000000000 001000000000000111000111001001100000000000000000000000 000000000000001000000000000001000001000011000000000000 000001000000001111000000001011101011000011010000000000 000001000000000000000000000111100001000000110000000000 001010001110001001000011001011001000000000100000000000 000000000000101000000000000101011010001100000000000001 000000000001111111000000000001101001101100000000000010 .logic_tile 9 4 000000000000001101100010100011011101000001000000000000 000000000000000001000000001101011010000000000000000000 111000000000001101000111110111100000000000000000000000 000000000000000001000110001001100000000001000000000000 110010000000000011100110110001111101000000010000000000 010000000000000000000010001101011111000000000000000000 000000000000000101000111000001101010000100000000001100 000000000000000001000000000001000000000000000000000000 000000001010000001100000000001100001000000000000000000 001000000000000000000011010001101101000010000000000000 000000000000000000000010000001100000000000000000101000 000000000000000000000010010001100000000001000000000000 000000000000100000000000001111001011000010110000000000 001000000001000001000000000111011011000011010000000000 000001000000000111000011001000000000000000000101000000 000010100001000000100100000101000000000010000000000000 .ramt_tile 10 4 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000110000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000010000000000000000000000000000 000000000000100000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 .logic_tile 11 4 000000000000000111100000001001011010000010000000000000 000000000000000000100010110001011011000000000000000000 111000000000001000000000000000000000000000000000000000 010000000000000001000000000000000000000000000000000000 110000000000001001000110000111001010100000000000000000 110000000000000001100010001001001010000000000000000100 000000000000100000000000010000000000000000000100000000 000100000000000000000010001101000000000010000000000000 000001000000001000000000000000000000000000000100000000 001010100000000011000000000011000000000010000000000000 000000000001000000000000000000000000000000000000000000 000000000000100101000000000000000000000000000000000000 000000000000001000000111101000000000000000000100000000 001000000000000101000000000011000000000010000000000000 000000000000000000000000000000000000000000000000000000 000001000000000000000000000000000000000000000000000000 .logic_tile 12 4 000000001010010111000111101001111011000010000000000000 001000000000000000100100000101101001000000000000000000 111010000000000000000110010000000000000000000000000000 000001001100000000000010000000000000000000000000000000 110010100000000000000000000000000000000000000000000000 010001000000000000000000000000000000000000000000000000 000001000100001001100000000000000000000000000000000000 000000100000000001000000000000000000000000000000000000 000000000000000000000000011000000000000000000100000000 000000000000000000000011111011000000000010000000000000 000000000010000000000000010000000000000000000100000000 000000000000000111000011001001000000000010000000000000 000000000000000000000000001000000000000000000100000000 001000000000000000000000000011000000000010000000000000 000000000100000000000000000000000000000000000100000000 000000000000000000000000000001000000000010000000000000 .io_tile 13 4 000000000000000000 100100000000011000 000000000000000000 000000000000000001 000000000000000000 000000000000000000 001000000000000000 000000000000000000 000000000000000000 000000000000000000 010000000000000000 000000000000000000 000000000000000000 000000000000000001 000000000000000000 000000000000000000 .io_tile 0 5 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000100000000010000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .logic_tile 1 5 000000000000000001100111100000000000000000000000000000 000000000000000000000100000000000000000000000000000000 000001000000000000000000001101100000000001000000000000 000010100000000000000000001011000000000000000000000010 000000000000000000000000000000000000000010000000000000 000000000000000000000000000111000000000000000000000100 000000000000000001000000000000000000000010000000000000 000000000000000000100000000001000000000000000000000001 000000000000000000000010100000000000000000000000000000 001000000000000000000000000000000000000000000000000000 000010100000001101100010010011111101000000000001000000 000001000000000101000010101001011100100000000000000000 000000000000000011110000001011011111100000000000000000 001000000000000000100000001111111110000000000000000000 000000000000000101100110110000000000000000000000000000 000000001110000000000010100000000000000000000000000000 .logic_tile 2 5 000000000000000111000111110001000000000000001000000000 000000000000000000100010000000000000000000000000001000 111010000000011001100110010000000000000000001000000000 010000000000100001000010000000001001000000000000000000 010100000100000000000000000000001000001100111110000000 101100000000000000000000000000001001110011000000000000 000010100000010000000000000000001000001100111101000000 001001000100100000000000000000001101110011000000000000 000000000000000000000110000000001001001100111100000000 000000000000000000000000000000001000110011000000000000 000010000000000000000000000000001001001100111100000000 000000000000000000000000000000001000110011000000000000 000000000000000000000000000000001001001100111100000000 001000000000000000000000000000001001110011000000000000 010000000001010000000000000000001001001100111110000000 100000000000100000000000000000001001110011000000000000 .ramb_tile 3 5 001000000000000000000000000000000000000000 000000010000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000100000000000000000000000000000000000 000001000000000000000000000000000000000000 000010100000000000000000000000000000000000 000001000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000001110000000000000000000000000000000 000001000000000000000000000000000000000000 000010100000000000000000000000000000000000 000000000000010000000000000000000000000000 000000000000100000000000000000000000000000 .logic_tile 4 5 000000000000001011000000000101000001000000000000000000 000000000000000001000011011111101100000000100000000000 111000000000000000000000000101011100000001000000000010 000000001110001001000000000101011111000000000000000000 110000000000001011000000000101011111010000000000000000 011000000000000001000011010111101101000000000000000000 000010000001000000000000000001011100000000100000000000 001000000000000000000000001111101101000000000000000000 000000000000000111100111110001001100001000000000100001 001000000000000000000011000001011110000000000000000000 000000100000001000000000000001011100000010000010000000 000001000000001111000011111111101101000000000000000000 000000000000000111000010001000000000000000000100000100 001000000000000000110010010001000000000010000000100000 110000000000011000000000000000000000000000000100000010 000000000000001111000000000011000000000010000000000000 .logic_tile 5 5 010000100000011000000110001111001011000010000000000000 000001000000000001000010111011101010000000000000000000 111001000000001101000010101111111100000000000000000000 000010100000000011100110011101011100100001000000100000 011000000001001111100010011101011001100010000000000000 010000000000100011000011001001101000000100010000000000 000000000001011101000110001101011011000010000000000000 001000000000000011100011101001111010000000000000000000 000000000000000111000000000001000000000001000000000000 001000000100000000000010010001100000000000000000000100 000000000000000000000110001101100000000000000000000000 000000000000000000000011001111100000000011000000000000 000001001110000000000000010011100000000001010000000010 001010100000001101000010110101101101000010010000000000 110000000001010001100000010000000000000000000100000000 000000001100100000000011010111000000000010000000000000 .logic_tile 6 5 000001000100000001100111101001000000000000010010000000 000000000000000011000011111101001001000000000000000001 111000000010000000000011101011100001000000000000000000 000000001010000000000100001101101101000011000000000000 000000001010001000000010110000000000000000000000000000 000000000000100011000011010000000000000000000000000000 000000000000000000000011000000000000000000000000000000 000000001000000101000010000000000000000000000000000000 000000000110100000000111010011011100000010000010000100 001000000000000000000011011111101000000000000000000000 000001000000101111000110001101011110000100000000100010 000000001101000011000010010101101010010000000000000000 000000000100000000000111000101011001100000000000000001 001000000000000000000100001011111100000000000000000000 110000000000000011100000000000000000000000000100000000 000010000000010000000000001001000000000010000000000000 .logic_tile 7 5 000000000000000111100011011101000001000000100010000000 000000000000000101100011110101001100000000110000000000 111000000000001111100111100001101110000000000000000010 000000000000000111000111100011111001000001000000000001 010000000000000101000010000000000000000000000000000000 110000000000000101000000000000000000000000000000000000 000000000000000111100000000000000000000000000000000000 001000001010000000100000000000000000000000000000000000 000000100000000011100000000001000000000000000000000000 001001000000000000000000000111101111000010000010000000 000000000000001000000000001001101001000100000000000100 001000000000000101000000000001011001000000000000000000 000000001111010011100010000001011110101100000000000000 001000100000000011000100000101001000001100000001000000 110000000000111000000000000000000000000000000110000000 000000000000110101000000000111000000000010000000000010 .logic_tile 8 5 000000100000001011100010000001000000000000000000000000 000001001110000001000100001101100000000010000000000000 111000000000001000000010001101100000000000000000100000 000001001100001111000110101101000000000001000000000000 110010100000000000000010100101100000000010000000000000 100001000110000000000010010011100000000000000010000000 000000000001000101000000010011111000001100000010000000 000100000000000011000010001001111011101100000000000000 000000000000001001100000001111001100001100000000000000 000000000000001001000000001011101000101100000000000000 000000000001010101100000011001101111000000100000000000 000000000000100000100011011001011010000000000000000000 000010000000000000000011101001000000000000000000000000 001000000000000000000010101001000000000001000000000010 000000000000000000000000001000000000000000000100000000 001000000000000000000000000011000000000010000010000000 .logic_tile 9 5 000000000000001111000110010111111010001100110000000000 000000000000000001100010000000110000110011000000000000 111000000000000000000000010101101011001100110000000000 000000000000001011000010000000001011110011000000000000 010000000000001011000110001101100001000011110010000000 010000000000001111000000000001001110000001110000000000 000000000000000001100000001001100000000001000000000010 000000000000001101000010010111101010000000100000000000 000000000000000001100000000001000000000010000000000000 001000000000000000000000000001001110000000000000000000 000000000000000011000000000111100000000011110100000000 000001000000000000100000001001001100000010110000000000 000000000000010001100000000011100000000011110101000000 001001000000000000000000001101001000000010110000000000 110000000000001011000000010111100000000011110101000000 000100000000000001100010001001001000000010110000000000 .ramb_tile 10 5 000011100001010000000000000000000000000000 000000010000100000000000000000000000000000 000000000000100000000000000000000000000000 000000001001000000000000000000000000000000 000000000001000000000000000000000000000000 000000000000100000000000000000000000000000 000000000000010000000000000000000000000000 000000000000000000000000000000000000000000 001000000001010000000000000000000000000000 000000000000100000000000000000000000000000 000000100000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000100000000000000000000000000000 000000000001010000000000000000000000000000 .logic_tile 11 5 000000000000000000000111000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 111000100000001000000000000000000000000000000000000000 000101000000000001000010110000000000000000000000000000 010010000000000000000010001101001001000100000000000000 110001000000000011000010111001111011000000000000000000 000000100000000000000010100000000000000000000000000000 000100000010000000000100000000000000000000000000000000 000000000000001000000000000101000001000000010100000000 001000000000001011000000000011001000000010000001000000 000000000000000000000000000000000000000000000000000000 000000000000000000010000000000000000000000000000000000 000010100000000000000000000000000000000000000000000000 001001000000000000000000000000000000000000000000000000 110000000000000000000000000000000000000000000000000000 001000000000000000000000000000000000000000000000000000 .logic_tile 12 5 000000000000000000000011000001000000000000001000000000 000000000000000000000000000000100000000000000000001000 111000001110101011000000000001100000000000001000000000 000000000001010101000000000000001101000000000000000000 110010100000000000000000000001101000001100111000000000 010001000000000000000000000000001111110011000001000000 000000000000000000000000000000001000111100000001000000 000000000000000000000000000000000000111100000000000000 000000000000000000000111000000000000000000000100100000 000000000000001111000111010011000000000010000000100000 000000000000010000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000111000000000000000000000000000000 001000000000000000000100000000000000000000000000000000 000000100000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 .io_tile 13 5 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .io_tile 0 6 000000000000000000 000000000000000000 000000000001100000 000000000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .logic_tile 1 6 000000000000000011000011101111100000000001000000000000 000000000000000000000000000001100000000000000000000110 000000000000001000000000000001101011100000000000000000 000000000000001101000010101101101101000000000010000000 000000000000000011000000011101111110000000000000000000 000000000000000000000010000111001100000010000000000000 000000000000001000000110000101100000000001000000000000 000000000000001001000000000001100000000000000010000000 000000000000001000000110100000000000000000000000000000 000000000000000101000000000000000000000000000000000000 000000000000001000000010000000000000000010000000000000 000000000000000101000100001001000000000000000000000000 000000000000001000000000000000000000000000000000000000 000000000000000101000000000000000000000000000000000000 000000000000001101100000000111111100010000000000000000 000000000000000101000011011011001110000000000000000000 .logic_tile 2 6 000000000001001001100110010000001000001100111100000000 000000000000000001000010000000001000110011000000010000 111000000000001001100000010000001000001100111110000000 000000000000000001000010000000001000110011000000000000 010010100010000000000000000000001000001100111100000000 100000000000010000010000000000001001110011000000000010 000000000000000000000000000000001000001100111100000000 000000001010000000000000000000001001110011000000000000 000010100000000000000000000000001001001100111100000000 000000000000000000000000000000001000110011000000000000 000010100000000000000000000000001001001100111100000000 000001001110000000000000000000001000110011000000000000 000000000010000000000000000000001001001100111101000000 000000000000000000000000000000001001110011000000000000 010000000000000000000000000000001000111100000000000000 100000000000000000000000000000000000111100000010000000 .ramt_tile 3 6 000001000000100000000000000000000000000000 000000000001010000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000010000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000001000000100000000000000000000000000000 000000100001010000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 .logic_tile 4 6 000000000000000000000010101011100000000001000000000011 000000000000000000000010100011000000000000000000000000 111000000000001101000110010011000000000000010000000010 000000000000001111000011111011001001000000000000000001 010000000000000000000000000111000000000000010000000010 100000000000000011000000001111001001000000000000000001 000000000000000101000110000101111000010000000001000000 000000001010000000000000000101111111000000000000000000 000000000000000000000111100111000001000000010010000000 000000001000000111000100001111001000000000000000000001 000000001011011111000000010101100000000000010000000010 000000000000101111100011101011001110000000000000000000 000100000000000000000111110001100000000000010000000010 000000000000000111000111111111001100000000000000000000 010000000001000000000000000000011101001100110100000000 100000000000100000000000000000011001110011000000000000 .logic_tile 5 6 000000000010001001000011100011111011001000100000000000 000000000000000001100010101111011011010001000000000000 111000000001000111000111011001001001100000000000000000 000000000000101001010011011001011010000000000000000000 111000000000100001100000000111101001111100000000000100 010000000001010111000000000101011000011100000000000000 000000000000001000000110010111100001000000100000000000 000000000000000001000010000001001111000000000000000010 000010000000000111100000011001011001010001000000000000 000001000000000000100010000011001001001000100000000000 000000000000001111000000010000000000000000000100000000 000000000000001011000011010011000000000010000001000000 000000101011110000000011101000000000000000000100000110 000001000001000000000000001011000000000010000000000000 110001000000000111000000000000000000000000000100000000 000010100000001001000011010101000000000010000001000000 .logic_tile 6 6 000000000000000011100110001111101101000000000000000000 000000001010100011000000001101001111000100000000000001 111000001111011111100110011011000000000001000000000001 000001001110110111000011110101000000000000000000000000 110000000000011001000000000000000000000000000000000000 110000000000101111000000000000000000000000000000000000 000100000000000111100011100001100000000000000000000000 000100000000000101000000001111001000000000010000000000 000000001001011111000000001011100000000001000000000000 000010100000100001000000000101000000000000000010000100 000000000000000111000000001001001011000000000010000000 000000000000001111000011100001001100000100000000000001 000000100000000000000011011101000001000001010110000000 000001000000000000000111010011001101000010010000000000 110000000000001000000011101001100000000001010100000010 000000100000101011000000001001101001000010010000000000 .logic_tile 7 6 000011000000001001100111110011100000000000010000000000 000011100000000001000111011011001110000000110000000000 111000000000000011100011100001111010100111110000000000 000000000010000101100011101011111011111111110000000000 010000000000000001100111010001100000000011000000000000 100000000000000000000111010101001000000010000000000000 000000000000000101000011100101011001110000000000000000 000000000000000101000011100011101110110100000000000000 001010000000000101100010000101111000000000000000000100 000000000000000001000011100011111001000010000000000000 000000000000000001100000001101000000000001000010000000 000000000000000000000000000101100000000000000000000101 000000001010000011100000001001000000000000000000000000 000010000010000000100000000101000000000001000000000000 000100000000001000010000000000000000000000000100000000 000100001110000001000000001001000000000010000010000000 .logic_tile 8 6 000000000000000000000111011111000001000000100000000010 000000000000000000000110100101001001000000110000000000 000010100000001001100000010011111010000001000000000000 010000000000001111000010001001111010000000000000100000 000000000000101001100110101011100000000001000001100000 000000000001011111000000000111000000000000000000000000 000000000000000101000111100111101010000010100000000000 000000000000000000000100000011011110000011010000000100 000000000000110001100110100011000000000000100000000000 000000000001010111100000000011101001000000110000000010 000000000000000011100000000011111010001000000000000000 000000000010000001100010001001111010000000000000000000 000000100001001000000000001001100000000011100000000010 000000000000100101000000000001001100000011000000000000 000000000000100101100000001101011100000110100000000011 000000000000010000000000000011001110001111110000000000 .logic_tile 9 6 000000000000000001100000000011100001000000000000000000 000000000100000000000000000101101110000010000000000100 111001000000000000000110001111000000000010000000000000 000000000000100000000011100011000000000000000000000000 010000000000000001100011101111111001000000000000000000 110000000000000000000000001001111010000000010000000000 000010000000010111100000010011100000000000000010000000 000001000000100000100010000001001110000000100000000000 000100000000000000010000001101100000000000000000000100 000010100000000000000000001001100000000010000000000000 000000000001010001000010000011100000000000010000000000 000000000000101001000000000001001110000000000000000000 000000000000010001000000001000000000000000000100000000 000000000000000001100000001001000000000010000000000000 000010000000000001000000011000000000000000000100000000 000000000000000000000011101111000000000010000000000000 .ramt_tile 10 6 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000010000000000000000000000 000001000000000000000000000000000000000000 .logic_tile 11 6 000010000000001011100110001001101000000100000000000000 000001000000000011100010000001011010000000000000000010 111100000000001001100000001000000000000000000100000000 000000000000000001000000001101000000000010000000000000 110000000000000001100000000000000000000000000100000000 100000000000000000000000001001000000000010000000000000 000000000000101000000000000000000000000000000100000010 000000000001011001000010000001000000000010000000000000 000000000000000000000000000000000000000000000100000000 000000000000000000000011011011000000000010000000000000 000000000000000000000000001000000000000000000100000000 000000000000000000000000000111000000000010000000000000 000010000000000000000000000000000000000000000100000100 000000000000000000000000000001000000000010000000000000 000000000000000000000000001000000000000000000100000000 000000000000000001000000000101000000000010000000000000 .logic_tile 12 6 100000000000000111000000000000000000000000000000000000 000000000000000000100000000000000000000000000000000000 111000000001010111100000000000000000000000000101000000 000000000000000000000000000111000000000010000000000000 000000000000000111000000000000000000000000000101000000 000000000000000000000000000011000000000010000000000000 000000000010000000000000000000000000000000000100000010 000000000000100000000000000001000000000010000001000000 000010000000001000000000000000000000000000000100000000 000000000000000011000010100101000000000010000001000000 000000000000000000000000001000000000000000000100100010 000000000000000000000000000001000000000010000000000000 000000000000001000000000000000000000000000000100000010 000000000000000101000000001011000000000010000000000000 000000000000000000000000000000000000000000000000000000 000000000000100000000000000000000000000000000000000000 .io_tile 13 6 000000000000001000 000000000000000000 000000000000000000 000000000000000001 000000000000000000 000000000000000000 001100000000011000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000100000 000000000000000000 000000000000000000 000000000000000000 .io_tile 0 7 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .logic_tile 1 7 000000000000001000000111000011100000000000001000000000 000000000000001111000000000000100000000000000000001000 000000000000001101000000000000000001000000001000000000 000000000000001011000000000000001011000000000000000000 000000000000000000000000000000000001000000001000000000 000000000000000000000000000000001000000000000000000000 000000000000000000000000000000000001000000001000000000 000000000000000000000010110000001000000000000000000000 000000000000000000000000000000000000000000001000000000 000000000000000000000000000000001000000000000000000000 000000000000000000000010000000000000000000001000000000 000000000000000000000000000000001001000000000000000000 000000000000000000000011000000000000000000001000000000 000000000000000000000000000000001111000000000000000000 000000000000000000000000000000001000111100000001000000 000000000000000000000000000000000000111100000000000000 .logic_tile 2 7 000000000010000011100010000011100000000001000011000000 000000000000001001100000001111000000000000000000000000 111000100000000000000010000001101010001100110001000010 000001000000000111000100000000001000110011000010000000 110000000100100011100000000000000000000000000000000000 010000000001000000100000000000000000000000000000000000 000000000000000011000000000111100000000000000001000000 000000000000000000000000000111000000000010000000000100 000000000010000000000000000111000000000000000001000000 000010000000000000000011100001100000000010000000000000 000000000000000101100000000000000000000000000100100000 000000000000000000100000001001000000000010000000000000 000000000100000000000010011000000000000000000100100000 000000000000000011000110110101000000000010000000000000 000000000000000101000000001000000000000000000101000000 000000000000000000100000001001000000000010000000000000 .ramb_tile 3 7 000000000000000000000000000000000000000000 000000010000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000001000000000000000000000000000000 000000000000100000000000000000000000000000 000010000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000010100000000000000000000000000000000000 000001000000000000000000000000000000000000 .logic_tile 4 7 000000000001000000000000001011000001000001010000000000 000100000000100101000011000011001110000010010000000000 111000000000000001100000000001100001000001010000000000 000000000000001101000010110101101101000010010010000000 111000000000001011100010010101101010000010000000000100 110000000000000001100010110101111001000000000000000000 000000000000100000000011101101100001000001010000000000 000000000000000011000011011111101100000010010000000000 000100000000000111000000001001100001000001010000000000 000000000000000000000000000001001111000010010000000000 000000100000000111000011100101000001000001010000000000 000001000000001111100100000111101100000010010000000000 000000100000001000000010000000000000000000000100000000 000000000000001011000100000001000000000010000000100000 110000000000000111000011111000000000000000000100000000 000000000000000000100110000101000000000010000010000000 .logic_tile 5 7 000000000000101001100110010111111001000000100000000001 000000000001010011100011100001101001000000110000000000 111000000001011011000111101011011110001001000000000000 000000000110100101100010001001111000000101000000000000 110100000000010001100110110111000001000001010000000000 110100000000100111000011101101001100000010010000000000 000000000000000011100111001001111110001001000000000000 000000000000000111100100000101011000000101000000000000 000000100000001101100110110011000000000000000100000000 000001000000000111000010000111100000000010000000000001 110000000001011111000000000101100000000000000100000001 100000001010001111100000000011000000000010000000000000 000000000000000101100010000001001010101000000100000000 000000000000000011000000001001101100011100000000000000 010010100000000000000111110101011011101000000100000000 000000001010000000000011011101011100011100000010000000 .logic_tile 6 7 001000000001101011100110101011100001000010100000000000 000000000111100001000111011101001010000010010000000000 111000000000000001100000000101001100000000100000000010 000000000000101111000010100011001001000000000000000000 110000001110001101000010011111000001000010100000000000 010000000111011011000010001001001010000010010000000000 000000100000000111000111100101001001010100110000000000 000000000000001111110000000001111000000000110000000000 000010000000100101100000001101011111000000000000000000 000001000001000001000011100001001010100000000000000001 001000100000000011000000000001000001000001010000000000 000000000010000000100000001101001010000010010000000000 000000100000000000000000001000000000000000000110000000 000000000100000001000000000111000000000010000000000000 000000000001011111000000001000000000000000000101000000 000010000010100011100010001111000000000010000000000000 .logic_tile 7 7 000000100000000111000011010011001001001111110000000000 000010100000000000100010001111111010000110100000000000 000000100001011011100000000111100000000001000000000000 000001000000000101000010010101000000000000000001000010 000000000000000111000011011001100001000000010000000000 000001000001011001100010000001001101000000110000000000 000000000010100011100000001011000000000010000000000000 000000000001010101000010100101000000000000000000000001 000100000000000011100010001101000000000010000000000000 000100000000001101100000001001000000000000000000000010 000000000000101000000000010101001010000110100000000000 000000001000000001000011111011011110001111110000000000 000000000110000011100110001101101010000011000000000000 000000000000001101100000001011111110000001000000000000 000000000001000011100000000011101000000011000000000000 000010100000100000000000000001011100000001000000000001 .logic_tile 8 7 000100000000001001100111010011101100000100000000000000 000100000000001111000110001101011110001100000000000000 111000000000000001100111000011011011010010100000000000 000000000000000011000011101001101010110011110000000100 111000000000000011100110000001011000010010100000000000 110000100000000000100110111101111010110011110000000000 000000000000001001100000001001111000001100000000000000 000000000000010101100000001011011100000100000000000100 000000001010001101100111001111011010111110000000000001 000100000000000011000010011111001000111100000000000000 000110000000000001100111001001000000000000010000000000 000000000000000000100100000111101000000000000000000000 000000000000001101100111100111001111010100000000000000 000100000000000101000110110011011010101100000000000000 000010100001110011100111100111111001111111000100000000 000001001100001001100100001101011000101011000000000010 .logic_tile 9 7 000000000000000111000010110101100001000001000000000000 000000000110000101000011110101101010000000000000000000 111000000000001101000000000001100000000001000000000000 000000000000001111000000000111000000000000000000000000 000000000000001101000000000101011111010100000000000100 000000000000000001000000001001001000101100000000000000 000000000000001001000011000011011011000111110000000000 000000000000101111000010011001011010000011110000000000 000000000010001001100110001011000000000001000000000000 000000000000000001100000001011100000000000000000000000 000001000000000000000111011001111011000110100000000000 000000100000000000000110001011011000001111110000000001 000100000001000000000000000011011100000110100000000000 000100000000000001000000001001011000001111110000000000 001000000000001000000000000000000000000000000100000010 000000000000000001000000000001000000000010000000000010 .ramb_tile 10 7 000000000001110000000000000000000000000000 000000010001100000000000000000000000000000 000000000000000000000000000000000000000000 000000000110100000010000000000000000000000 000000001000010000000000000000000000000000 000000000001100000000000000000000000000000 000000000000000000000000000000000000000000 000000000000100000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000100000000000000000000000000000000000 000001000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000100000000000000000000000000000000000 000000000000000000000000000000000000000000 .logic_tile 11 7 000000000000001101000111000000000000000000000000000000 000000000000001111100010010000000000000000000000000000 111000101110010001000111100000000000000000000000000000 000000000010100111100000000000000000000000000000000000 010000000000000111100000000000000000000000000000000000 010000000000000000100000000000000000000000000000000000 000011000001000000000000000000000000000000000000000000 000010100000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000100000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000001101000000000010000000000 000000000000000000000000000101111000000000000001000000 110000000000000000000000001001100000000011110110000000 000000001000000000000000000001001000000010110000000000 .logic_tile 12 7 000000000000000000000110001001001011000010000001000000 000000000000000000000000000001111111000000000000000000 111000000000001000000111011101100000000010000001100000 000000000000000001000111001101000000000000000000000000 110000000000000011000000011000000000000000000100000000 010000000000000000010010001101000000000010000000000000 000000000000000001100010111000000000000000000100000000 000000000000000000000110001001000000000010000000000000 000010000000000000000000011000000000000000000100000000 000000000000000000000011111001000000000010000000000000 000000000000000000000010101000000000000000000100000000 000000000000000000000100001011000000000010000000000000 000000100000011000000000000000000000000000000100000000 000001000000001011000000000101000000000010000000000000 000000000000000000010110000000000000000000000100000000 000000000000000000000000000111000000000010000000000000 .io_tile 13 7 000000000000000010 000100000000000000 000010000000000000 000001010000000001 000000000000000010 000000000000110000 001000000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000001 000000000000000000 000000000000000000 .io_tile 0 8 000000000000010000 000000000000000000 000000000000000000 000000000000000000 000000000000001100 000000000000001000 001100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 010011010000000000 000000000000000000 000000000000000001 000000000000000000 000000000000000000 .logic_tile 1 8 000000000001011001000011110101000000000000001000000000 000000000000001011100011000000000000000000000000001000 111000000000000111100000000001000001000000001000000000 000000000000000000000000000000101101000000000000000000 110001000000000000000000000001000000000000001000000000 010000000000001001000000000000000000000000000000000000 000000000000000000000000000011100000000000001000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000001000000000000001000000000 000000000000000000000010000000100000000000000000000000 000000000000000000000011000000001000111100000000000000 000000000000001001000000000000000000111100000000000000 000000000000000000000000000000000000000010000000000000 000000000000000000000000000001000000000000000000000000 110000000000000000000000001000000000000000000100000000 000000000000000000000000000001000000000010001000000001 .logic_tile 2 8 000000000000000001100110000101001010100000000000000000 000000000000010011000011010001101001000000000000000100 111010100010001000000000000001100001000001010000000000 000000000100000111000000001001001100000010010000000000 110000000000001000000000011001000001000001010010000000 110000000000000111000011100101001111000010010000000000 000000000000000011000000000000000000000000000100000000 000000000000000000100000000000000000000010000000000000 000000000000000000000000000000000000000000000100000000 000000000000000000000000000000000000000010000000100000 000010100000000101100000000000000000000000000100000001 000001000000000000100000000000000000000010000000000000 000000000000000000000110100000000000000000000101000000 000000000110000000000100000000000000000010000000000000 000000000000000000000111000000000000000000000100000000 000000000000000000000100000000000000000010000000000010 .ramt_tile 3 8 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000010000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000010000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 .logic_tile 4 8 000000000001010000000011110011011011100010000000000000 000000000000000011000011001111111000000100010001000000 000001100000001011100010111101001010000100010000000000 000011001000001111100011010011101011010001000001000000 000000000001000011100010000011101001010001000001000000 000000000000000000000011111001111011001000100000000000 000000000001011011100010111101101101000010000000000000 000000000000001111000011110111001010000000000000000000 000000000000000111000111011001100000000001010000000000 000000000000000001000111001001001101000010010000000000 000100000000000011000011001001101010000010000000000000 000000000000000001100000001001101011000000000000000000 000000000000000000000010000011000000000001010000000000 000000000110000000000011010001001101000010010000000000 000000000001001000000000000011111011010001000000100000 000000000000101101000000001111001110000100010000000000 .logic_tile 5 8 000000000010000111000000011001111101010100110000100000 000000000000000000100011101011011000000000110000000000 111000001110001001100110010001100001000001010000000001 000000000000000001000010001111101100000010010000000000 110010000000000001000110010011000001000010100000000000 110000000000000000100010000101001110000010010000000000 000000000000000000000011100111000001000010100000000000 000000000000000000000000001011001111000010010000000000 000001000001000111100011100101000001000001010000000000 000010000000000000100100001101101111000010010000000000 000000001110000001000010011001011111001001000000000000 000000000000000000000110111001101100000101000000000000 000010000110000111100010011001000001000010100000000000 000001000000000000000110101101001110000010010000000000 000000000000010001000010000000000000000000000100000000 000000000000000000100110010000000000000010000000000000 .logic_tile 6 8 000000000000011011100111111101101011000000000000000000 000000000000101101000111001111011110010000000000000010 111001000000000011100000001001000000000001010000000100 000000100000000101000000001111001001000010010000000000 010000000000000000000000001011100001000010100000000000 010000000000000000000011101101001110000010010000000000 000010001100001000000111001001100000000001000000000000 000001000000001011000000000001000000000000000000000000 000000000000000000000000010000000000000000000110000000 000000000000000011000011110011000000000010000001000000 000010000001010001100010000000000000000000000110000000 000001000000100000000000000001000000000010000000000000 000000000000100000000000000000000000000000000100000000 000000000111010000000000001011000000000010000001000000 110000000000000111000011111000000000000000000100000000 000000000000000000000010011011000000000010000011000000 .logic_tile 7 8 001000000000101111000110001101000001000010000000000000 000000000001000011000000001101101101000011000000000000 111000000000000101000000000011001011000000010000000000 000000000000000000000010100111111000000000000000000000 110000000000011011100110111101100000000000000000000000 000000000000100111000011001111100000000010000000100010 000000000000000000000111011101000000000000010000000000 000000000000000000010010000111001011000000110000000000 000000000000001000000110100001001110000000000000000000 000000000000000001000110010011111011000010000000000010 000000000000000000010111000001101011000001000000000000 000000000000000000000110100101111101000000000000000000 000000000000001000000110110011000000000010000100000010 000000000000100001000110000001100000000011000000000000 110010000000001000000110000111000000000011000100000000 000001000000001001000000000001100000000010000000100000 .logic_tile 8 8 000000000000000011100011001111001100010000000000000000 000000000000000101100010100101001001110000000000000000 111000000001001011100000011001000000000000010000000000 000000000000101001000011100011001011000000000001000000 110000000000000101100110000111100001000010000001000000 110000000000000101000010100111101001000000000000000000 000000000000001011000010000011101101100000000000000000 000000000000000001000010100101001110000000000000000100 000000000000001101100111010001000001000000010000000000 000000000000001001000011101101001000000000000000000000 000000000000000001000000000011000001000010100110000000 000000000000000001000000001111101000000010010000000000 000000000000000101000010010001011011010110100101000000 000000000000001001000110000101111011001001010000000000 000001000000001111000000000111100001000010000110000000 000000101100000101100011101011001010000011000000000000 .logic_tile 9 8 000000000100001000010010100101100000000000000000000000 000000000110001011000111000101100000000001000001000000 111010000000010101000000011011000000000011000000000000 000001000000000000100010000011001011000010000000000000 010110000000000101000000010111100001000000110000000000 010000001010000000100010000111001001000000010000000000 000000000000000000000000001001000000000000100000000000 000000000000000000010010011111001100000000110000000100 000000000000000001000000000001101110000110100000000000 000000000000000111100011111011001000001111110000000000 000000000000000001100010011111001111111011110000000000 000000000000001001000111110111101101011011110000000000 000000000000000001000010001111000001000000000000000000 000000000000000111000010001011101100000000100000000000 000010100000000000000000010000000000000000000101000000 000000000000001001000011111001000000000010000000000000 .ramt_tile 10 8 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000001010000000000000000000000000000 000000000000100000000000000000000000000000 000001000000000000000000000000000000000000 000000000000000000000000000000000000000000 000001001011000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000110000000000000000000000000000000 .logic_tile 11 8 000000000000000111000111110001000000000001000000000000 000000000000001001000111111001100000000000000010100000 111000000000000001000000001111100000000000000000000000 000000000000000000100000000111001011000000010000000010 110000000000001011100011000000000000000000000000000000 010000000000001011100111000000000000000000000000000000 000001000001010000000000000101000000000000110001000000 000010000000000000000000000101001000000000010000000000 000000000000000111000111000011100000000000100000100000 000000000000000111100111000001001011000000110000000000 000000000000000011100000011011011100000000000000100100 000000000000000000100011010001011101001000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000001000000001111000000000000000000000000000100000010 000000000001011011000000000011000000000010000010000100 .logic_tile 12 8 000000000001000000000000000000000000000000000000000000 000000000000110000000011110000000000000000000000000000 111000000000000000000000000000000000000000000000000000 000000000100000000000000000000000000000000000000000000 010000000000000000000000000000000000000000000000000000 010000000000000000000000000000000000000000000000000000 000000000001000000000000000000000000000000000000000000 000000000000100000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000010001000000000001000000000000000000100000000 000000000000000111000000000111000000000010000010000100 .io_tile 13 8 000001011000000010 000000000000000000 010000000000000000 000000000000000001 000000000000001101 000000000001000100 001101011000000000 000000001001100000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .io_tile 0 9 000000011000000000 000000001000000000 000000000000000000 000000000000000000 000000000000000100 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .logic_tile 1 9 000000000000000000000000010000000000000000000000000000 000010000000000000000011010000000000000000000000000000 111000000000000000000000000111100000000000000000000000 000000000000000000000000001011000000000010000000000000 110000000000000000000000010000000000000000000000000000 000000000100000000000011010000000000000000000000000000 001000000000000000000000000000000000000000000100000000 000000000000000000000000001101000000000010000000000100 000000000000000000000010000000000000000000000100000000 000000000000000000000000001001000000000010000010000000 000000000000000000000000000000000000000000000000000000 000000001010000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000101000000 000000000000000000000000001001000000000010000000000000 110000000000000011000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 .logic_tile 2 9 000001000000001111100111111001000000000011100001000100 000010100000001111000011110101001011000001010000000100 111000000001001101100110010001011100010100110000000000 000000000000100011100011001011011001000000110010000000 011000000000001000000010001011101011101010110010000000 010010000000010011000111011001101000101101110000000000 000010000000000011100000001011000000000001000000000100 000000000000000001000000000011100000000000000000100001 000100000010000000000011000000000000000000000000000000 000000000000000000000011000000000000000000000000000000 000000000001010001000010100111000001000001010110100000 000000000000000000000111001101101000000010010000000000 000000000100000000000010000000000000000000000000000000 000010000000000000000000000000000000000000000000000000 110000000000000000000000001111000001000001010100000000 000000000000000000000000001001101010000010010000000001 .ramb_tile 3 9 000000000000000000000000000000000000000000 000000010000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000010000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000100000000000000000000000000000 000000000001010000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 .logic_tile 4 9 000010101000001001000111001111001100001001000000000000 000001000000000001100110000011111100000101000000000000 111000001010000101000000001011101100100000010000000000 000000000100000000000000000011111110010000010000000000 110000000000000000000010100000000000000000000000000000 110000000000000000000000000000000000000000000000000000 000000000000000111100110001101100000000001010000000010 000000000000000000100000001011101110000010010000000000 000000000001010001100011111111101100001001000000000000 000000000000101111000111100101111100000101000001000000 000000001100101111000111110001001000010100110000000000 000000000110011011000010110011011000000000110000000001 000000000110100000000111010001100000000001000000000001 000010000000011111000111011101000000000000000000100000 110000000000000000000000010000000000000000000100000000 000000001110000000000011101001000000000010000000000000 .logic_tile 5 9 001000000001001111100010001101001111010001000000000000 000000001010101011000111100101001001001000100000000000 111000000000100111100111111001000000000000000001000000 000000000001000111100111110001001100000000100000000000 010001101100001111100011111111101110010001000000000000 110011000001011011000110000001111010000100010000000000 000001100000001111100011101111100000000010100000000000 000011100000000111100010111011001001000010010000000000 000010001011001011000011100111101101010001000000000000 000000001101100001100111011001011011000100010000000000 000000000001001000000110101011101100000010000000000000 000000001010100001000111000101111000000000000000000000 000000000000001000000000000101011011100000000000000000 000000000000000011000011010011111100000000000000000000 110010000000101001000000011000000000000000000100100000 000001000000000111000011011001000000000010000000000000 .logic_tile 6 9 000010001100000111000110101011101110001001000000000000 000001100000001011000000000011001101000101000000000000 111000001100000001000011000001100001000001010001000000 000000000000000111000010010001101101000010010000000000 110000001100000000000110001011000001000001010000000000 000000000000010000000000001111101010000010010000000000 000000000001000111100010100101100000000010100000000000 000000000000001001100000000011101110000010010000000000 110000001001010111100011110001000000000001010000000000 100000000000000000000011011101101101000010010000000100 000000000000000111000110001111100001000001010000000000 000000000010000001100000000101001001000010010000000000 000111000101001000010000011001100000000000110010100010 000111101100101011000010110001001000000000100000000000 110000000000000111000011000000000000000000000100000000 000000000010010000000000001111000000000010000000000000 .logic_tile 7 9 000101000000011000000011111001100000000010100001000000 000110100000101111000010100101101010000010010000000000 111000000000101101100010000001000000000010100001000000 000000000001011111000110011101101101000010010000000000 010000000000001001000111011111000000000001010000000000 110000000000001111000110000001001111000010010000000000 000000000000000101100010000101100000000001010100000100 000000100000000000000100001001101010000010011000000000 000000000000000000000111101001100000000001010100000100 000000000000000001000100001001001000000010011000000000 000000000000000000000010101111000000000001010100000000 000000000000000111000000001011001010000010011000000000 000001000000000001100011100101000000000001010100000010 000000100000001111100000000011101000000010011000000000 110000000000100000000000001001000000000001010100000000 010000000101010000000010001111101010000010011000000000 .logic_tile 8 9 000000000000000001100111010001101100110000000000000000 000000000000000101000010000011001001010000000000000100 111000000000001001000111110111000000000000000000000000 000000000000001111100110011101100000000010000000000000 110000000000001111010111011001100001000000100000000000 010000000000001001000011011011101000000000000000000000 000000000000001000000011000101000001000000010000000000 000000000000001001000100000001101010000000000000000100 000000000000001011000011011101000000000000010000000000 000000000000001111000011111101001010000000000000000100 000000000000100001100000011001011010100000000000000000 000010000001001111110010000011011000000000000000000100 001000000000000000000110001111000001000000000000000000 000001000000001111000100001001001100000000100000000000 010000000000000000000000000111000000000011110101000000 010000000000000000000000001001101101000011010000000000 .logic_tile 9 9 000001000000000001000000000000000000000000000000000000 000010100000000000000010010000000000000000000000000000 111000000001010000000110001101100000000001000000100000 000100000000000000000000000011000000000000000000000000 110000000000001001000000000101101010000001000010000000 010000000000000111000000000011001001000000000000000000 000000000000010001100110000101100000000000000010000000 000000001000001101000000000111100000000010000000100000 000000000000000001000000010101101010001000000000000010 000000000000001111100011110011001001000000000000000000 000000000000010011100000000101001110000000000000000000 000000000100100111000000000011001000000000100000100001 000000000000010111100000001001100000000000000001000010 000000000000000111100000000011100000000001000000100000 000001000000000000000000000000000000000000000100000000 000010000110000000000000000111000000000010000000000000 .ramb_tile 10 9 000010000001000000000000000000000000000000 000010110000100000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000001100010000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000100000000000000000000000000000000000000 000110101110000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 .logic_tile 11 9 000000000000000001100111000001101100001100110000000000 000000000000001001000011010000011000110011000001000000 111000001111000111100000001011101111000010000000000000 000000000000100000000000000101011011000000000000000000 010000000000000000000111101101000001000010100000000000 110000000000001011000111000101101011000010010000000100 000000000000000011000010000111101101100000000000000000 000010001110110111100010010001001111000000000000000100 000000000000000000000010010101001110000010100000000001 000000000000000001000111011001011110000001100000000000 000000100000000000000011000000000000000000000101000000 000000001010000111000000001001000000000010000000100000 000000000000010001000010000000000000000000000100100000 000000000000100000100010001011000000000010000000000000 110010000010000011000000001000000000000000000110000000 000000000000000000000010011011000000000010000000000000 .logic_tile 12 9 000000000000000000000000000000000000000000000000000000 000000000000000000000011000000000000000000000000000000 111000000000001000000000000111000000000000010001000000 000010000000001011000000000111001011000000000000000000 010000000001010000000000000000000000000000000000000000 010000000000100000000011100000000000000000000000000000 000000000001000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000001111000000000000000000000000000000000000 000000001010000011000000000000000000000000000000000000 000000000000000111000000000111000000000000000000000010 000000000000000000100000000111001011000010000000000000 000000000000001111000000000011000001000000000000000100 000000000000010011000000000011001000000000100000000000 001000000000000000000000001000000000000000000100000100 000000000000000000000000000011000000000010000000000000 .io_tile 13 9 000000000000000000 000100000000000000 000000111000000000 000000001000000000 000000000000001100 000000000000000100 000101010000000000 000000001000010000 000000000000000000 000100000000000000 000000000000000010 000000000000110000 000000000000000000 000000000000000001 000000000000000010 000000000000000000 .io_tile 0 10 000000000000000000 000000000000000000 000000000001000000 000000000000000000 000000000000000000 000000000000000000 000100000000010000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .logic_tile 1 10 000000000000000111100010100001011001001100000000000000 000000000000000001100100001101101000000100000010000001 111001000000001101000000010101100000000000000000000001 000000100000000001100011100001000000000001000000000000 000001000010000001100111100001011001001100000000000010 000010000000000000000100000101101001000100000000000001 000000000000000111100000000000000000000000000000000000 000000000000000001000000000000000000000000000000000000 000000000000000000000000000111000000000001000000000000 000000000000010001000000000111001100000000000000000000 000000000000000000000110100000000000000000000000000000 000000000000000000000100000000000000000000000000000000 000000000000001001000110100000000000000000000000000000 000000000000000101100100000000000000000000000000000000 000000000000000000000000001001001111101001110110000010 000000000000000000000000000101011101010101110000000011 .logic_tile 2 10 000010000000001111000011011001100000000000000001000000 000010000000001111100010001001101011000001000000000000 111000000001010101100010011001000000000010000000000000 000000000000000011110011100001001001000011000000100000 110000001001010011100111000011111011001100110010000000 010000000000000000100000000000011010110011000000000000 000010001010100011100011100111001000000000010001000000 000001001110110001100111100011011101000010000000000000 000000000000000111000111100111001100100000010000000010 000000000000000000100110000101111110010000010000000000 000000000000000111000000000001111010001100000000000000 000000000000000000000000000001011110011100000000000100 110101101100000101100111101111100000000010100000100000 100111100010001011100110000111001111000010010000000000 000100000000000011000000001000000000000000000100000000 000000000000000001100000000101000000000010000000000010 .ramt_tile 3 10 000010000000000000000000000000000000000000 000001000001010000000000000000000000000000 000000000000000000000000000000000000000000 000001000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000010000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000010100000000000000000000000000000000000 000001000000000000000000000000000000000000 000000000001010000000000000000000000000000 000000000000000000000000000000000000000000 000001000000000000000000000000000000000000 000000001000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 .logic_tile 4 10 000000000100000001100010001101100000000000000000000000 000000000000101101000010000001100000000010000010000000 111001000010000001000010110101011110000000000000000000 000010000000000011100010000101001100000010000000000000 110000000000000101000010010001011100010001000000000000 110100000000001001100010000111101001000100010000000000 000001001100001001000010111101011100100011110001000000 000010001010000001000010010101101000110011110000100000 000000000000001111100011001101011100100000000000000000 000000000000000011000000001001111000000000000000000000 000000000000001011100110111101101101000010000010000000 000010000110001011000111001111101000000000000000000000 000000000000000001010010001011011001010001000000000000 000000000000000000100011101011111010001000100000000000 110000000000000111100000010000000000000000000100000101 000000000000000000100011111111000000000010000000000000 .logic_tile 5 10 000000000000000001000010011111001101000010000000100000 000010100000001111100010000111001101000000000000000000 111000000001010101000111001101101101000010000001000000 000000000000100000000010111011111010000000000000000000 010010000001010000000011100001011101000010000000000000 110011000001110000000110010001101001000000000000000000 000000000001001101100010100011011011010001000000000000 000000000000110111100010001101011101001000100000000001 001010100000010111100000010001100000000001000000100000 000001000100000111100011011001000000000000000000000000 000000000000000011000011111111111011010001000000000000 000000000000000000110110101001101011000100010000000000 000010000000000000000011100111111101100010000000000000 000000001110011111000000001111001001000100010000000000 110000000000000111110011100000000000000000000100100000 000000000001000001000000000001000000000010001000000000 .logic_tile 6 10 000000000000000001100010000001100001000010100000000000 000000000000000101000010001101001010000010010000000000 111000001100011001100011110001111011100000010000000000 000000000000001101000011111001101001010000010000000000 110000000110001011000111001101000000000001010000000000 110000000000000001000100000001001010000010010000000000 000001100001110111000111000001011010010100110000001000 000011100001010000000100000001010000000000110000000001 000010100000100000000000001000000000000000000100000000 000001001000000000000000000111000000000010000000100000 001000001010100000000000000000000000000000000100000000 000000000000000000000000001111000000000010000001000000 000010000000000000000011100000000000000000000100000000 000001001010000000000010001001000000000010000000000100 110000000000001001000000001000000000000000000101000010 000100000000001101100000000111000000000010000000000000 .logic_tile 7 10 000001000000000111100010001101000001000010100000000001 000010000000000111100111010001101001000010010000000000 111000000000001111100010100000000000000000000000000000 000000000000000001100010010000000000000000000000000000 010000000000100111100000011011100001000010100000000000 010000000000010111100010000111001011000010010000000000 000000000001010000000011100001001100001100000010000000 000000000000100000000000000001011001011100000000000000 000000000000000001000000000001100001000010100000000000 000001000000001001100011001111101011000010010000000000 000000000000001101100000010011111101101100000000100000 000000000000000101100010000001011000001100000000000000 000000000000000000000011000101001110101100000000000000 000100000000000000000011000101011100001100000000000000 110000001010000011100000000000000000000000000100000000 000000000100010000000000000011000000000010001000100000 .logic_tile 8 10 000000000000000001000011000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 111100000000000111100111001111100001000010100000000000 000100000000000111000000000101001000000010010000000000 110000000000001001100000001101000000000001010001000001 010000000000001111000010010001101110000010010000000000 000000000000000000000000001011101100000001000010000000 000000000000000001000000001001101010000000000000000000 000000001101011000000000000000000000001100110001000100 000000000000101111000010010000000000110011000000000100 000000000000000000000000010101000000000010100010000000 000010100000000000000010101001001110000010010000000000 000000000000000111100000000000000000000000000000000000 000000000000001011000000000000000000000000000000000000 000000000001000001100000000000000000000000000101000000 000000000000000000100000000001000000000010000010000000 .logic_tile 9 10 000000000000001000000000010000000000000000000000000000 000000000000000111000011100000000000000000000000000000 111000000000001101110011101101000001000000010000000000 000000000110000001100011001001101010000000000000000100 010000000000000000000011011101100000000001000000000010 010000001000000000000111110101100000000000000000000000 000000000000001101100000011001100001000000010000000100 000000000000000111100010000001101100000000000000000000 000000000000100011100000001111000000000000000000000000 000000000000010000000000001001001000000011000000000000 000000000000010111000000000001111111100000000010000000 000000000000000000000000001101001110000000000001000000 000000000000000000000000001011100000000000000001000000 000000000000000001000000001001000000000010000000000000 000000000001010111000000000000000000000000000110000100 000000000000000001000000000011000000000010000010000001 .ramt_tile 10 10 000000000010000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000100000000000000000000000000000 000000000000000000000000000000000000000000 000010000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000100000000000000000000000000000000 000000000000000000000000000000000000000000 000001000000000000000000000000000000000000 000010100000000000000000000000000000000000 .logic_tile 11 10 000000000000001101000111000101001110001000000000000101 000010000000000111100111011011001000000000000000000000 111000000000001101000111110101100000000001000000000000 000000000000000111000111100001101111000000000001000000 110100000000000111000011001001101000001001000000000000 110100000000000011000110001111011001000101000000100000 000000000000000001000011010101100000000000000000000100 000000000000000000100111000001101111000000100000000000 000000000000100111000000011011100000000010100000100000 000000000000010000000011111011001010000010010000000000 000000000000000001100000011101000001000001010100000000 000000000000000000000011111101101001000010011000000000 000010100001011000000011101011000001000001010110000000 000001000000100111000010100101001001000010011000000000 110000000000000011100111100001100001000001010100000000 110000000000000000000000001101001001000010011001000000 .logic_tile 12 10 000000000000000000000000000000000000000000000000000000 000000000100000000000000000000000000000000000000000000 111100001100100000000000000000000000000000000000000000 000000000001000000000000000000000000000000000000000000 010010000000000000000110100000000000000000000000000000 110001000000000000000100000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000011000000000000000000000000000000 000000000100000000000000000000000000000000000000000000 000000001110000000000000000000000000000000000000000000 000000100000000000000000001000000000000000000100000100 000001000000000000000000001101000000000010000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000001110000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 .io_tile 13 10 000000000000000000 000100000000000000 000000000000000000 000000000000011000 000000000000000000 000000000000000000 001100000001100000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .io_tile 0 11 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 001100000000000000 000000000001100000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000001100001 000000000000000000 000000000000000000 .logic_tile 1 11 000100000000000011000110100101000000000001000000000000 000100000000001101000110110001000000000000000000000000 111000000000000000000111010101101000000111110000000000 000001000000001101000110110001011111001111110000000000 110000000000001011000000000101100001000001110000000000 110000000000001001000010110101101100000000110000000000 000000000000000111000000000101000000000001000000000000 000000000000000000100010001101000000000000000000000000 000000000000000001100011010101000001000010000000000000 000000100000000000000011010101101000000011000000000000 000000000000011000000000000001101101000000000000000000 000000000000100101000000001001011001000010000000000000 000000000000001000000011011111001100110000000000001001 000000000000000001000110001001000000010000000000000100 111000000000000000000000000000000000000000000100100100 000000000000000000000000001011000000000010000000000000 .logic_tile 2 11 000000000100000001100000010101111010110000000000000010 000000001010000101000010000001101001100000000000100010 111000000000001001000111001101000000000000000000000000 000000000000001101000000001001001010000010000000000000 110000000000001111000011111011000000000000000010000000 110010000010001111000011110001100000000010000000000000 000000000000001111100000010101101100000000000001000000 000000000000000101100011010001001100010000000000000000 110000000000100111000111000001100001000001000000000000 100000000001010111100100000111001010000000000000000000 000000000000001000010000000011111111100000010000100000 000000000000000111000000000111011111010000010000000000 000001000001000001100111100000000000000000000110000010 000010100000100001000100001101000000000010000000000000 110000000000000000000110000000000000000000000110000000 000000000000000000000111011101000000000010000000000000 .ramb_tile 3 11 000000000000000000000000000000000000000000 000000010000000000000000000000000000000000 000000001000000000000000000000000000000000 000000100000000000000000000000000000000000 000000000010000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000010000000000000000000000000000000 000000000000000000000000000000000000000000 000010000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000010000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 .logic_tile 4 11 000000000000000001000010001001011100010001000000000000 000010100000000000100111010111001101000100010000000000 111000000010000001000000000001000000000000000000000000 000000000000000000000010010111100000000010000000000000 010000000010000000010010101011011111100010000000000100 110000001000000000000000001001111101000100010000000000 000000000000000000000000001011000001000000000001000000 000000000000000000010011100001001110000010000000000000 110001000000000000000011110011111111000010000000000000 100000100000000001000110111011011101000000000000100000 000000000000000001100000011000000000000000000110000000 000000000000000000000010001101000000000010000000000000 000000000000000111100000000000000000000000000100000000 000000001100001001000000000111000000000010000010000000 110100100001000011010000000000000000000000000101000000 000000000000000001000010101001000000000010000000000010 .logic_tile 5 11 000010100000000001100111100111000001000010010000000000 000010000000001101000110001101101000000000110000000000 111000000000001101000111011001011000000000010000001000 000000001110001001000010010001010000010000000000000000 110010101000100000000010101011111101100000010000000000 010001000001011111000100000101101111010000010000000010 000000001111111111100000010001000001000000010001000000 000000001110000001000011010001101010000000000000000000 000010000010000000000000000101101011000100010000000000 000101000000000000000010011111101110010001000000000000 000000000100101111100111100000000000000000000100000010 000000000000001111100000001001000000000010000010000100 000000000000000000000111001000000000000000000100000000 000000000000010000000110100011000000000010000000100000 110010100000000011100111101000000000000000000100000010 000000000000000000100100001001000000000010000001000000 .logic_tile 6 11 000000000000001111110111001101100001000000000000000000 000000000000001111100010010011001101000000010000000100 111000000000001001000010001101011110011000000000000000 000000000010000001000010001001011101000000000000000000 010000000110001111100111010101111001010111110001000000 010000000000000011100111010011101000001011110000000000 000000000000000011000111000111111010010100110000000000 000000000000001111100010010011011010000000110000000001 110000000000010101000011100111101111100000000000000000 100000000000100111100010101011111010000000000000000000 110000000000001111100000010001001010001001000000000000 000000000000000011000011010111011011000101000000000000 110010100000001000000011101001001000100100000000000000 000001000000000111000011101001011111000000000000000001 110000000100000001100110011000000000000000000100000000 000000000000000000000011110011000000000010001000000000 .logic_tile 7 11 000000000000000111100111011011001001100100000000000000 000000000000001111100010000001111100000000000000000000 111011000001000000000011100101101011101100000000000010 000011000110000001000100000001011100001100000000000000 110000000001001101100110001101001101001000010000000000 010000000110000001000010010011111000001100110000000000 110010100000000001000000010001001111101100000000000000 000001000000000000100010000001001001001100000000000000 000001100000001000000111110101101010000011000000000001 000010100000000101000011111001101010000001000000000100 000000000000000011100011101101101101101100000000000000 000000000000000111100100001011001100001100000001000000 000000001100000011000000011011011111000001100000000000 000000001110010000000010100001111100000000110000000000 110000000000000000000000010000000000000000000100000000 000000100000000000000011111111000000000010001001000000 .logic_tile 8 11 000000000000001001000111010001111111101100000000000000 000000000000000011100011001011011010001100000000000000 111000001100000111100011111111100001000001010000000000 000000000000001001000011011101101110000010010010000000 010000000000001001000111111001100001000001010010000000 110000000000001011100111010111101000000010010000100000 000000000000000111010111000101000000000000000000000000 000000000100000000000111100011001011000001000000000001 000000000000000001000110111111000001000000100000000000 000000000010000000100111111011101000000000000000000000 000100100000100001000000010001011011101010110100000000 000000000000010000000010110001011100010110110000000001 000000000000000000010000011011011101111110100100000000 000000000000000000000011111101101001111101000010000000 000000000000000001000110010001000000000010000100000000 000000000000000101100011011001101010000011000000000000 .logic_tile 9 11 000000000000000000000111101001111100111100110000000000 000000000000001111000111101001011010010100110000000000 111000000000010011000000011101101110111010100000000000 000000000000101001100011110001101001111001010000000000 000000000000001001100111000101000000000001010000000001 000000000000000001000011101111001001000010010000000000 000000000000000000000111110001011111000111000000000000 000000000000000000000111110011011000010111000000000000 000000000000100111000011101111100001000011110000100000 000001000001000000000010010001101111000011100000000000 000000000000000001100011111011101101100000000000000000 000000000000001111000011001101111101000000000000000000 000001000000000111000110001011000001000001010001000000 000010101000000000000000000011101110000010010000000001 000000000000000111100011110101000001000001110100000011 000000000000000000100011001101101100000010100000000001 .ramb_tile 10 11 000011100000000000000000000000000000000000 000010110000000000000000000000000000000000 000010000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000001000000000000000000000000000000000000 000000100000000000000000000000000000000000 000000000000100000000000000000000000000000 000000000001010000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000010000000000000000000000 000000000000000000000000000000000000000000 .logic_tile 11 11 000000000000000101000111111011000000000000010000000010 000000000000000000100111001001001011000000110010000000 111000000000000001000011110001100000000000000000000000 000000000000001001100111010001000000000010000001000000 010000000000000001100010000101111000010100000000000000 010000001110000011000100001111011101011000000000000010 000000000010001111100010000011000001000010100000000000 000000000000001011000100000101001000000010010000000000 000000000000011111100000000111000001000000000000000000 000000100000000111000010100101101100000010000000000001 000100001100000011000110101111000000000001010100000100 000000000000001001000000001011001001000010010000000000 000000000000010011100110001011100001000001010110000000 000000000000100000100010101101001010000010010000000000 110000000000000011100000011111100000000001010101000000 000000000000000000000010101111001001000010010000000000 .logic_tile 12 11 000000000000001000000110000111100000000001000000100000 000000000000000111000010110111000000000000000000000000 111000000000001111000000000001000000001100110001000000 000000000000001011100000000000000000110011000000000000 011010100000101000000111010001011000001100110001000000 110001000001010001000010000000100000110011000000000100 000000000000100000000010101101100000000001000000000010 000000000001000000000100001111100000000000000000000000 000010000000000000000011100000000000000000000000000000 000000000000010000000000000000000000000000000000000000 000000000000000000000000000001000000000001000000000000 000010000000000000000000000101101011000000000000000100 000000000001010101000000001000000000000000000100000000 000000000000000000100000000001000000000010000000000000 000000000010101000000000000000000000000000000100000000 000010000001000011000010111011000000000010000000000000 .io_tile 13 11 000001111000000010 000100001000000000 000000000000000000 000000000000000001 000000000000100010 000000000000010000 001100000000000000 000000000001100000 000000110000000000 000100000000000000 000000000000000010 000000000000010000 000000000000000000 000000000001100001 000000000000000010 000000000000000000 .io_tile 0 12 000000000000000010 000100000000000000 000000000000010000 000000000000000001 000000000000110010 000000000000010000 000100000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000001011000000000 000000000000000000 000000000000000000 000000000000000000 .logic_tile 1 12 001000000000000111000010000101100000000010000000000001 000000000000000001100011101111100000000011000010000001 111000000000000001000000011111011010010000000000100000 000000001110000000000010001101101001110000000000000000 010000000000000000000010001011000000000000100000000000 010000000000000000000100001001101011000000110000000000 000000000000000001100000011111100000000001000000000000 001000001100001001000010000001000000000000000000000001 110000100000000000000110101011011100010000000000000000 101000000000000000000000001001111011110000000000000000 000000000000000000000010001111100000000000000000000000 001000000000000000000100000001001111000000100000000000 000000000000000101000110110001011010000010000000000000 001000000000000011000010100111001000000000000000000000 110000000000000111000000000000000000000000000100000001 000000000000000000000000000111000000000010000000000000 .logic_tile 2 12 000000000000000011100111100011000000000000000000000000 000000000000001011000100001111000000000001000010000000 111000000000001000000000010011100001000000000001000000 000000000000000001000011101101001010000000010000000000 010000101110001000000011101101000000000001000010100000 110000000000001111000010010001000000000000000000000000 000000000000000001110000010001100001000010000000000000 001000000000001011000011011001101101000000000000000000 000000000000000111100011001011011110000010000000000000 001010000000001101000000000101111000000000000000000000 000000001100000000000010001000000000000000000110000000 000000000000001011000100001101000000000010000000000000 000000000000100000000110100000000000000000000100000000 001000000001010000000100000011000000000010000001000000 110000000000000000000000010000000000000000000101000000 000000000000000000000010000001000000000010000000000100 .ramt_tile 3 12 000000000000100000000000000000000000000000 000000000001000000000000000000000000000000 000000000001000000000000000000000000000000 000000001100000000000000000000000000000000 000000000001010000000000000000000000000000 000000000000100000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000010000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000100000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000001000000000000000000000000000000 .logic_tile 4 12 000001000001000111100000001011111011100010000000000000 000010000000100000100011000101101000000100010000000000 111000000000000001100111010101001101100000000000000000 010100000000001011000010111111101000000000000001000000 110000000000001111000110000101011011010001000000000000 110100000000001011100010110101111111001000100000000000 000000000000001111000111100001111100010001000000000000 001100000000101111000011100011111000000100010000000000 000000100101011001000000001101111110000010000000000000 001000000000100001100000001111111001000000000001000000 000000000000000000000111001111111100010001000000000000 000000001000000111000011101001001010000100010000000000 001000000000000000000111111000000000000000000100100000 001000000000000000010010001101000000000010000000000000 110000000000000101000110001000000000000000000100000000 000010000000001001000011100111000000000010000010000000 .logic_tile 5 12 000010000000100001000111000101011100000010000000000000 000001000000010000100111100101101011000000000000000000 111010001100010111100000011001111100100000010000000000 000001000000000000000010001011101110010000010000000000 110000000001100011000110011011000000000000000000000000 010001000011111111100010001011001001000000010000000000 000001000101011011100000000111100001000000100000000000 000000100000100011100000000101101000000000000000000000 000000000000010111100000010101100000000010000000100001 001000000000000011100011000011000000000000000000000010 000001001000000001100011100011000000000000100000000000 000000100000001001000110000001001001000000000000000000 000010000000000000000000001000000000000000000100000000 001001000100000001000000000101000000000010000000000000 110000100000010000010111001000000000000000000100000000 000000000000010111000100000111000000000010000000000100 .logic_tile 6 12 010000000001001011100110001101100000000000000000000000 000000000000001111100010001001001111000000010000000000 111000100000001000000111110001100000000000010000000001 000001000000001111000011010101001001000000000000000000 111001000000001000000011101001000000000000000000000000 011010000000000101000111101111001000000000010000000000 000000000000000000000000000011001010000010000000001000 001000001000000111000000001011010000000000000000000000 000100000000001011000110110101000000000000000100000010 001000000000000001000011000111100000000010000000000000 000000000000000000000010000001000000000000000100000000 001001000000000000000000000011100000000010000000000001 000000000000000011000111000001100000000000000100000000 001000000110000000000000000111100000000010000000000001 010000000001000000000011101111000000000000000110000000 000000000000000000000000001011000000000001000000000000 .logic_tile 7 12 000000000000110001000000001001000000000000000000000000 000000000001110001000011111011001000000000010000100000 111000000000000001100110111001100001000000100000000001 000000000000001011000111010111001001000000000000000000 010010000000000001100010000111011110000010000010000001 011001000000000001000111000101011100000000000001000000 000000000000000000000000011001100001000000100000000000 000000000000000000010011010111101001000000000000000010 000000000000001001000110101101011001101100000000000000 001001000000000001010110101001001111001100000000100000 000000100000001000000000001011101010101100000000000000 000000000000001011000011101101011011001100000000000000 000000000000001000000000000011000001000000100000000000 001000000000000101000000001011101110000000000000000000 110000000000001111100111010000000000000000000100000000 000000000000000011000010000011000000000010001000000010 .logic_tile 8 12 000000000000000011100010011001000000000000000000000000 000000000100000000000010001001001110000000010000000000 111000100000001011100111010101000001000000000000000000 000000000000000001010011011101001000000000010001000000 110000000000010011110011101001000000000000100000000000 110000000000000000000010111001101110000000000000000000 000000000001000000000000001001001100000010000001000010 000000000110000101000000001001111101000000000001000000 000000000001011000000010011001000000000000000000000000 000000000000100011000011100111001100000000010000000000 000010100000000111000000011011100000000000000000000000 000000000010000000000011110011101110000000010000000010 000000000000011001000111000101100001000010000000000000 001000000000000011000100001101001000000000000001000000 000010100001001111000000001000000000000000000100000010 000000000000000111000000000111000000000010000010000000 .logic_tile 9 12 000000000000000011100000001101100001000010100000000001 000000000110000000000000001001001100000001100000000000 111001000100000101000111011000000000000010000001000000 000000100000000000100111011001000000000000000000000000 110010100101000000000000000001011001110100000001000000 000000000000100000000000000111001110101100000000000000 000000000000001000000000000000000000000000000100000000 000000000000001111000000001111000000000010000000000001 000000001110000000000000000000000000000000000100000000 001000001010000000000011001011000000000010000000000000 000000000000000000000000000000000000000000000100000001 001000000000001101000000001111000000000010000000000000 000000000010000001000000000000000000000000000000000000 001000000000000000100011000000000000000000000000000000 110000000000100101100000000000000000000000000110000000 000000000001000000100000001111000000000010000000000000 .ramt_tile 10 12 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000001110000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000100000000000000000000000000000 000000000001000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000001100000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 .logic_tile 11 12 000000000000000001000110000011001101010000100000000000 000000000000001011100010011001101100010000010000000000 111000000000000011100111100011000000000001000000000000 000000000000000001100111100001000000000000000000000000 000000000000001111100000000001101011101001010000000001 000000000000000001100000000001001001010110000000000000 110000000000000111100110000011011011110100000000000011 101000000000000000100011101111111001101100000000000000 000000000000000011100010010001101011111110000000000000 001000000000001011100111100011001001111101010000000000 000000000000000001000011101001100000000001000000100100 000000000000001111000100000011000000000000000000000000 000010100000000001000000000011100000000011110000000011 001001000000000000100010010111101010000011010000000000 000000000000000000000000000101100001000001100100000001 000000000000000000000000001001001011000010100000000000 .logic_tile 12 12 000000000000000111000010101001100000000000000000000000 000000000000000000000010101001000000000010000000000100 111000000000001001100000011011100000000001000000000010 000100000000000101000010101101000000000000000000000000 000000000000001001100110010001000000000000000000100010 000000000000000001000010000101100000000011000000000000 000000000000001000000000011011100000000001000000000000 000000000000000101000010101101100000000000000000000000 000000000000000001100000001101001101110000000100000000 000000000000000000000000001111101000110110100000000000 000000000000001000000111011111011000001111110100000000 000000000000000001000110001011001010001001010000000000 000000000000000011000000001001011010111001010100000000 001000000000000000000000001111001011110000000000000000 000001000000000000000111001001011000111001010100000000 000010100000000000000100001011101001110000000000000000 .io_tile 13 12 000000110000000010 000000001000000000 000010000000000000 000001010000000001 000000000000000010 000000000000110000 000100000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000010 000000000000010000 000000000000000000 000000000000000001 000000000000000010 000000000000000000 .io_tile 0 13 000010000000000010 000101110000000000 000000000000000000 000000000000000001 000000000000000010 000000000000010000 000100000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .logic_tile 1 13 000000000001010000000000011101100000000001000000100000 000010100000100000000011000101100000000000000001000000 111000000000000000000000000000000000000000000000000000 000000000000000000010000000000000000000000000000000000 011000000000000111000000000011000000000011000001000000 010010100000000000100010000101000000000000000010000000 000000000110000011100000010000000000000000000000000000 001000000000000000100010110000000000000000000000000000 000001000000001111000000000000000000000000000000000000 001010100000000011000000000000000000000000000000000000 000000001110100000000000000111100000000001000001000000 000000000000010000000000001101000000000000000000100010 000000000000000000000000000000000000000000000101000000 001000000000000000000000000011000000000010001000000000 110000000000000101110000000000000000000000000000000000 000000000000000000100000000000000000000000000000000000 .logic_tile 2 13 000100000000100000000010100011001011001100000010000000 000100000001000001000011000111001000011100000000000000 111000000000000111100011110101001001111100110000000100 000000000000001101000010001011111010111110110000000100 110000000000000000000110011001111111000000000000000000 010000000000001111000011111101101010000000010000000010 000000000000001111100111100011111011111111000000000000 001000000000000001000111010111011001010110000000000000 000001000000001111000011010001100000000000100000000000 001010100000000011100111100001001100000000000000000000 000000000000000001000110001111000000000000100000100000 000000000001001001000010001101101011000000000000000000 000000001000000011100010001011100001000001010110000000 001000000000000001000100001001001101000010010000000000 111000000010000001000000001111100000000001010100000010 000000000000001001000000001011001001000010010000000000 .ramb_tile 3 13 000001000000000000000000000000000000000000 000000010000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 001000000000000000000000000000000000000000 000000000001000000000000000000000000000000 000100000000000000000000000000000000000000 000100000000000000000000000000000000000000 000000001000000000010000000000000000000000 000000000000000000000000000000000000000000 000000000010000000000000000000000000000000 000000000000000000000000000000000000000000 .logic_tile 4 13 000000001100000001000011101001011000011000000010000000 000000000000000000100000000001011110000000000000000000 111000101010000111110011110011100001000000100000000000 000000000000000001010111101001001101000000000000000000 110001000000000001100011000101101010000010000000000101 011000001100001011000100000101101111000000000000000010 110000000000001000000111101101000001000000000000000000 001000000000001111000111010101101100000000010000000000 000000000001010000000110111001100001000000000000100000 001000000000100001000111101001001111000000010000000000 000000000000000101100011000011111011111100110000000010 000000000000000001110110100111111110111110110000000011 000000000000000001000110000000000000000000000100000000 001000000000001001000000000011000000000010000000100011 110000000100001000000110100000000000000000000100000101 000000000000000101010100001011000000000010000000000001 .logic_tile 5 13 000010100000001000000111001001000001000010110000000000 000001000000000001000000000101101111000011100000000000 111000001100000101100111001001100001000000000000000000 010000000000001011100000000001001001000000010000000000 111000000000001001100000001101011110000011000000100000 111000000000000001000010110011001100000001000000100000 000010000000000011000000011111100000000001000001100000 000000000000001011000010001101000000000011000000000000 000000000000000000000110100101100001000000100000000000 001000000000000001000110011011001101000000000000000000 000010000100000000000000001001001010000000000000000000 000001000000000111000011101101001101000001000001100000 000000000000001000000111100101011111000100000000000000 001000000001010111000100001011111100000000000000000000 110000100000001101100011100000000000000000000100000010 000000001010000001000111100111000000000010000000000000 .logic_tile 6 13 000000000000001001000111110001100000000000000000000000 000001001110001111100111101001101010000000010000000000 111000000000000111100011011011011110000011000001000000 000000000000100001000110000101101110000001000000000000 010000100000000111000111001001001011000001010000000000 111000000100000111000110010011001010000011100000100000 111000100000001101000010011011000001000011010000000010 001000001111000001100010101101001000000011110000100000 000000100000001111100011111111101101001000010000000000 001001000000000001000110101011111000001100110000000000 000000000001010000000111000001111010000000010000100000 000000000001111001000011101001111100100000000000000000 000010000001011000000000000011100000000010000000000000 001001000000101111000000000001100000000000000000000000 110000000001010001000000010000000000000000000100000000 000000000000000000000011111101000000000010001001000000 .logic_tile 7 13 000000001110001101100000010111011011001100000010000000 000100000000000011000011011101001010011100000000000000 111000000000000001100110011011001010001100000001000000 000001000000000001000011011011001111011100000000000000 010000100000000101000111001111111001000001100000000000 011001000000000000100000000001111001000000110000000000 110000000000001011100011100001011010000010100000000000 001000000000000001100000000001011110000001100000000000 000000000000011011100111000011011100001100000000000000 001010000000100011000000001101001110011100000000000000 000010000100000101100010001011001010001100000000000000 000001000000001001100000000111001111011100000000000000 000000000000001001000000001111011001001100000000000010 001000000000001111100010010011001010011100000000000000 110001000000000000000000010000000000000000000100000000 000010100000001001000011011011000000000010001000000000 .logic_tile 8 13 000001000000000011100011001111011111110100000010000000 000010000000000000000010001011011011111100100000000010 111000000000001011100011100001101111010101010001000100 000000001000000001000011000001111000100101100001000000 000000000000001011100000000101111010010101010001000000 001000000000000001000010010101101001100101100000000001 000000000000101001000010001111000000000001000000000000 000001001000000111100011001111000000000000000010000001 001000000000000011000000000001101101101001000000100000 001000001110001111100000000011101010010110100000000011 000000000000001000000000011101000000000010100010100000 000000000000000101000011111101001011000001100000000001 000000000000000011000011101001001011010100000100000001 001000000000001001100000000011101000100100000100000001 110000000000000000000000010000000000000000000000000000 000010001010000000000010000000000000000000000000000000 .logic_tile 9 13 000000001100001000000000000101000000000001000000000000 000000000000000001000011101001000000000000000000000000 111001000000001111100111010001111000110000000000001000 000010100110000111100111100111100000100000000000000000 000000100000000001100000000000000000000000000000000000 000000000000000111000000000000000000000000000000000000 000000000000100000000000010000000000000000000000000000 000000000001000000000011100000000000000000000000000000 000000100000000000000000000101100000000000000000000000 001000000000000111000000000001101100000000100000000000 000000000000000000000000001001001011111101110100000100 000000000000000000000000001001001000111100110000000010 000000000000000000000000000000000000000000000000000000 001000000000000111000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 .ramb_tile 10 13 000000100000000000000000000000000000000000 000001010000000000000000000000000000000000 000000000000000000000000000000000000000000 000010000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000001000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 .logic_tile 11 13 000000000000000001100010010111111001000011100000100000 000000000000001101000011000001011000000011110000000000 111000000001000001100011000011100000000000000000000000 000000000000000111000100000101100000000001000001000011 010000000000000000000000001011000000000001000000000000 011000000000001101000000001101000000000000000001000000 000000000000000111100011001111011011000100000000000001 001000000000100000000100001001101000000000000000000000 000000000000000111000000001001000001000000000000100000 000000000000000000100000000011001000000000010000000000 000000000000000000000000000000011010001100110000000000 000000000000000011000010000000001001110011000000000000 000000000001010000000110100000000000000000000100000001 001000000000100000000000000000000000000010000000000000 000000000000000000000000000000000000000000000100000000 000000000000000001000000000000000000000010000000000010 .logic_tile 12 13 000010000000000000000010110111000000000000001000000000 000001000000000000000011000000100000000000000000001000 111000000000000000000000000101000000000000001000000000 000000000000000000000000000000001101000000000000000000 010000000000000101000010100001001000001100111000100000 010000000000000101000000000000101111110011000000000000 000000000000000001100000000101101000001100111000000100 000010000000000000000000000000001101110011000000000000 000010000000000111100111000000001000111100000010000000 001001000000000000000000000000000000111100000000000000 000000000000100000000000000000000000000010000000000000 000000000000000000000000000101000000000000000000000000 000000000000000000000111000000000000000010000000000000 001000000000000000000011011101000000000000000000000000 000000000000000000000000000000000000000000000100000000 000000000000000000000000000011000000000010000000000100 .io_tile 13 13 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .io_tile 0 14 000001010000000010 000100001000000000 000000000000000000 000000000000000001 000000000000010010 000000000000110000 001110000000000000 000001110000000000 000000000000000000 000100000000000000 000000000000000010 000000000000010000 000000000000000000 000000000000000001 000000000000000010 000000000000000000 .logic_tile 1 14 000000100000000000000000000111000000000000001000000000 000000000000000000000000000000100000000000000000001000 111000000000001000000000000011100000000000001000000000 000000000000001101000000000000101101000000000000000000 010000000000000000000011000000001000111100000000000001 100000000000000000000000000000000000111100000000000000 000001000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000110101000000000000000000110000001 000000000000000000000100000001000000000010000010000000 000000000000000000000000010000000000000000000000000000 000000000000000000000010110000000000000000000000000000 000000000000000000000000000000000000000000000100100000 000000000000000000000010011101000000000010000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 .logic_tile 2 14 000000000000001001000110110011000000000001000001000000 000001000000001111000110001011100000000000000000000000 000000000000000011000010011101100001000000000000000000 000000000000000000000011010001001010000001000000000000 001000000000001000000010011001000000000000000000000000 000000000000000001000011001011000000000001000000000000 000000000000000011000110101001000000000000100000000000 000000000000001001100100000001001011000000000001000000 000000000000000001100011111001100000000001000001000010 000000000000000000000110010101100000000000000010000000 000000000000000001100000010001011000111111000000000000 000000000000000000000010001001111010010110000000000000 110000000000000000000000001101100000000000000010000000 100000001000000000000000001101000000000010000010100000 000000000000000000000000000101000001000011010000000010 000000000000000000000000000011101100000011110000000010 .ramt_tile 3 14 000000000001000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000001100000010000000000000000000000000000 000110000000100000000000000000000000000000 000000000000000000000000000000000000000000 000000000001010000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000100000000000000000000000000000000000 000001000001010000000000000000000000000000 001000000000000000000000000000000000000000 000000000000000000000000000000000000000000 .logic_tile 4 14 000000000000100011000000001111000000000000000000000000 000000000001000011100011101101100000000001000000000000 000000000000000000000110010001001101000110100000000000 000000000000001001000011110101111110101001010000000010 000000000000000011000010010011100000000000000000000000 000000000000000011100010000101101110000000010000000000 000001000000000000000110111011011001000011010000000100 000000000000000011000110001111011011000010100000000010 000001100110001101100000011101111000111100110000000001 000010000000000001100010111011111000111101110000000000 000000000000000011100010001001101010110111110000000011 000100000000000001100011110011011011110011110000000000 000000000000100101100000000101100000000000000000000000 000000000001000000100011011001000000000001000000000000 000000000000001000000000000011100000000000100000000000 000000000000000111000011110001001100000000000000000000 .logic_tile 5 14 000000000000000000000111110101100001000000100000000100 000000001100000111000111100111001001000000000000000000 000010100000000001100011110001001001000000010000000000 000000000010000001000011111011011010100000000001000000 000000000000000011100111101001100000000001100001000100 000000001011010111000000000001101011000000110000000100 110000000000100000000110001101100001000010000000000100 000000000000011001000000000001101110000000000000000010 000000001110001011100011100011000001000000000000000000 000000000000000011100000000011001101000000010000000000 000000000000000101000011111101000001000000000000000000 000000000000000111000011011111001101000000010000000000 000000000000100111100011100101000000000010110000000000 000010101010010000000000001111001001000011100000000100 000000000000001000000000001011100000000000100000000000 000010100000000001000010010011001001000000000000000000 .logic_tile 6 14 000000000110001011000010001001111111111000000000000000 000000000000001111100100000101111000110000000000000000 111000000000000111000110101011011010000010110000000000 000000100000001101000110010011111110100011110000000000 000000000000001011100111000001011011000000100001000000 000000001110000001000000000101101001100000000000000000 000000000000001101000110100111000000000010000000000001 000000000000000111100110010001100000000000000000000000 000010000000010000000110000001111010001100000000000001 000000000000101001000011110011111000101000000000000000 000000000001011111000000001111001010000001000000000000 000010000000100001000000001111011010000011000000000000 000001000000100001100111101011000000000001010000101000 000010101010010001000000000011100000000011100000000000 000000000000000000000000001000000000000000000101000000 000000000000000000000011110001000000000010000000000000 .logic_tile 7 14 000000100000000001000110001001000000000010000000000000 000000000000000001100000001001100000000000000000000000 111000000000000001000000011111000000000000110000000100 000000000000000001100011110001101000000000100000000010 110010000000000001100010100011000000000000000001100000 010001000000000011110000000011000000000011000001000000 110000000000001000000000010011111001000100000000000000 100000000000001111000010001011101010000000000000000000 000000000000001111000111100011101101000000100000000000 000000001000001011100111000011001101010000000000000000 000000000001000011100000010101001011000000100000100000 000000000000100000100011000101011010000000110000000000 000010100000000000000110000011000001000001010000000010 000001000000000000000000000001001101000010010000000100 110000000000000000000000001000000000000000000100000010 000010000000000000000000001101000000000010001000000000 .logic_tile 8 14 000010100000001101000000011011000000000000000000000000 000001001110110011000010000101101000000000010000000000 111000000000001101000110001001000000000000000000000000 000000000000000101000010011101000000000010000000000000 011000000000001001100011111001001100010010100000000000 110000000000000001000011100001001101101001010000000000 000000000000000111000111001101011111000000010000000000 000000001110000000000010110001001101100000000000000000 000000000000000111000010010101000000000011110010001000 000000001010001001100111111001000000000001110000000000 000000000000000111100110101001111001000010110000000000 000100000000000000100100001011101100000011010000000001 000000000000000000000000000001100001000011000000000000 000000001000000000000000000011101011000011100000100000 000010100000000111100000000000000000000000000100000010 000000000000000000100000001101000000000010000000000000 .logic_tile 9 14 000000000000001000000011000000000000000000000000000000 000000000000000111000000000000000000000000000000000000 111000000100100000000110010000000000000000000000000000 000000000001010000010010110000000000000000000000000000 000010100000000000000000011011100000000000000010100000 000001000000100000000010000101000000000010000000000000 000000000000000011000000000000000000000000000000000000 000000000110000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000010000000000000000000000000000000000000000000 000000000000100001000000000001000000000010100000100000 000000000110000000000000001001001011000010010000000000 000000001110001000000000000000000000000000000000000000 000000000010001001000000000000000000000000000000000000 000000001110000000000000001001100000000001100100000000 000000000000100000000000001001101110000010100010000000 .ramt_tile 10 14 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000100000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 .logic_tile 11 14 000000000000001011000000001111100000000001000000000000 000000000000000001100000000101100000000000000001000000 000000000000001000010000001101000001000001010001000000 000000000000000001000000001101101101000001100000000000 000000000000001011000110011001000000000010010000000000 000000000000000001100010001111001110000011110000000000 000000000000000001000000000001011100001110100000000000 000000000000000000000011011111001101000110100000000000 000000000000000000000011000011100000000000000000000000 000000000000000111000000000101000000000001000000000000 000000000000001001000111000001100000000001000010000001 000000000000000101000100000101000000000000000000000010 000000000000000001000000011111000001000001000000000010 000001000000000111000011100001001100000000000000000000 000000000000001000000111010011000001000000000000000000 000000000000000101000111101101001110000001000000000010 .logic_tile 12 14 000000000000000000000000000001100000000000001000000000 000000000000000000000000000000100000000000000000001000 000000000000000001100110000000000001000000001000000000 000000000000000000000010100000001000000000000000000000 000010100000001000000000000000000001000000001000000000 000001000000001011000000000000001001000000000000000000 000000000000000000000000000000000000000000001000000000 000000000000000000000000000000001010000000000000000000 001000000000000011000000000000001000111100000000100000 000000000000000000100000000000000000111100000001000000 000000000000000000000000001000000000000010000000000000 000000000000000000000000001111000000000000000000000000 000010000000000000000000000000000000000000000000000000 000001000000000000000000000000000000000000000000000000 000000000010000000000000000000000000000010000000000000 000000000000000000000011000011000000000000000000000000 .io_tile 13 14 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .io_tile 0 15 000000000000000000 000000000000000000 000000000000000000 000000000000010000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .logic_tile 1 15 000000000000000000000000011001100000000011000000000000 000000000000000000000010001001000000000000000000000000 111000000000001001100110011101100001000010000000000000 000000000000001011000010001101001001000000000000000000 110100000000001001100000010101101110001100110000000000 010100000000000001000010000000100000110011000000000000 000000000000000001100000010001011000000100100000000000 000000000000000000000010000101101100000000000000000000 000000000000000011100000010011000001000011100000000010 000000000000000000000011000101001000000001110000000000 000000000000000000000000000000000000000000000101000000 000000000000000000000000000101000000000010000100000000 000000000000001000000000000101000000000001000101000000 000000000000001101000000000101100000000011000100000000 110000000000001000000000001000000000000000000110000000 000000000000000101000000000111000000000010000100000000 .logic_tile 2 15 000000001100000111100000010001000000000000001000000000 000001000000000000000010000000000000000000000000001000 111000000000000111000111000000000001000000001000000000 000000000000000000000100000000001001000000000000000000 110000100000000101100110100000001000111100000000000000 110000000000000011000111100000000000111100000000000000 000000000000000000000000010000001010001100110000000000 000000000000000000000010000000011000110011000010000000 000000000000100000000111100101100000000001000000000000 000000000000000000000100000101100000000011000000000000 000000001010000000000000000000001001001100110000000000 000000000000000000000000000000011000110011000000000011 000000000000000000000111100011001010001100110000000000 000000000000000000000000000000101011110011000000000000 111000000000000000000000000000000000000000000100100000 000000000000000000010000001101000000000010001000000000 .ramb_tile 3 15 000000100000000000000000000000000000000000 000000010000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000100000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000010000000000000000000000 .logic_tile 4 15 000000000000000000000011000001000000000000001000000000 000000000000000111000011010000100000000000000000001000 111000000000001101100010000101000000000000001000000000 000000000000001111100010000000001101000000000000000000 010100000000000011000000000000001000111100000001000000 010100000000000011000011100000000000111100000000000000 000000000000001101100010101101111111011000000000000000 000000000000001111100110001001111100000000000000000000 000000000000000111000011101011011001110100000000000000 000000000010000000100100000001001101101000000010000000 110000000000000001000110011001011010110100000000100000 000000000000001001100011100101001010101000000000000000 110100000000000000010000001101111101100100000000000000 000100000000000000010000001001111100000000000000000000 110000000000100000010111100000000000000000000100000000 000000000000010000000100001101000000000010001000000000 .logic_tile 5 15 001000000001000111100110100101000000000000001000000000 000000000000000011100011100000100000000000000000001000 111000000000000000000010010001000000000000001000000000 000000000000000001000110100000101010000000000000000000 110000101110000111100111000011001000001100111000000000 010000000000000011000011110000001000110011000000000000 110000000000000001000000000000001000111100000000000000 000000000000000000000000000000000000111100000000000000 000010100000001011000000001001111101001100110000000000 000000000000001111100011110011111000001000010001000000 000000000000001000000010101101001010110100000000000100 000000000000001011000100001111011111101000000000000000 000000000000001000000111110111001001000011000000000000 000000000100000101000110100011011001000001000000000000 010000000000000001000000010111101111111001110100000000 110000000000001101100010100001011110111010110001000000 .logic_tile 6 15 000000000000000111100011011001011101000010010000000000 000000000000000001100010000001001001000011000000000000 111000000000000011110010000111000001000000110000000000 000010000000000001100011101101101000000000010000000000 010000001011000000000110010001000000001100110001000000 110000000000000000000010000000100000110011000000000000 110000000000000101100000011001001110110100000000001000 000001000000000000100010101111000000101000000000000000 000000000000010000000000001101111100000010100000000000 000000000010100000000000000011111001000001100000000000 000000000000000111100110101011111110010101010010000101 000000000000000101000100001101011011100101100001100010 110000000000000101100010001001100000000001000000000000 100000000000000000000000000101100000000000000001000000 110001000100000000000110111000000000000000000101000000 000000100000000000000110001011000000000010001000000000 .logic_tile 7 15 000000000000000111000000000001100000000001000000000000 000000000000000101000011011101000000000000000000000000 111000000000000001000011010011000001000000000001000000 000000000000000000000010000101001010000010000001000000 010000000000000011100011110111000000000010000000000000 010000000000000101100010000101000000000000000000100000 000000000000000000000000011011000001000010000000000001 000000000000001001000010101101001010000000000000000000 110000000000001000000000000001100000000001000000000100 100000000000000001000000000101100000000000000000000000 000000000000000000000000011011111000110000000000100000 000000000000000000000010100111111011111000000000000000 000010000000001000000000000101100000000000000000000000 000001000000000001000000000001000000000010000000000000 110000000000001000010000000000000000000000000100000000 000000000000000001000000000001000000000010001000000001 .logic_tile 8 15 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 111000000000001000000110010000000000000000000000000000 000000000000000001000011010000000000000000000000000000 110000000000000001000010000000000000000000000000000000 010000000000000000100000000000000000000000000000000000 000000000100001101000000001101011000110000000001000001 000000000000100001100000001001101100100000000000000001 000000000001010011100000010011111001011101010000000000 000000000000100000000011010101011001011110100000000000 000000000000000111100000000000000000000000000000000000 000000000000000000100000000000000000000000000000000000 000000000000000000000000001111100000000001000000000001 000000000000000000000000000101100000000000000001100001 000000000000000000000000001000000000000000000101100000 000000000000000000000010010101000000000010000000000000 .logic_tile 9 15 000000000000000000000000010000000000000000000101000000 000000000000000000000011101011000000000010001100100001 111000000000100000000000000000000000000000000000000000 000000000001010000000000000000000000000000000000000000 010000000000000000000000000000000000000000000000000000 010000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 001000000000000000000000000000000000000000000000000000 000100000000000000000011100000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000010000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 110000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 .ramb_tile 10 15 000000000000000000000000000000000000000000 000000010000000000000000000000000000000000 000001000000000000000000000000000000000000 000010000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000001100000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000110000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 .logic_tile 11 15 000000000000000000000000010000000000000000000000000000 000000000000000000000011000000000000000000000000000000 111000000000000000000000000011100000000000000000000000 000000000000000000000000000111000000000001000001000000 010000000000000000000000001000000000000010000010000000 010000000000000000000000000101000000000000000000100000 000000000000000011000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000001000000000000000000100000000 000000000000000000000000000101000000000010000000100000 000000000000001000000000000000000000000000000000000000 000000000000000101000000000000000000000000000000000000 000000000000001000000000000000000000000000000000000000 000000000000000101000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 .logic_tile 12 15 000000100000001000000110010001100000000001000000000000 000000000000000001000010001001000000000011000000000000 111000000000000101000011000101100001000011100000000000 000000000000000000100110111101101100000001110000000010 010010100000000111000010011011100001000010000000000000 110001001110000000000010001011101010000000000000000000 000000000000000001100011000101101011001100110000000000 000000000000000000000010110000001001110011000000000000 000000000000000000000000001001011101000100100000000000 000000001000000000000000001001101011000000000000000000 000000100000000101100110010111000000000001000100000000 000001000000000000100010001101100000000011000100000000 000000000000000000000110000000000000000000000100000000 000000000000000000000000000001000000000010000100000000 110000000110000000000000001000000000000000000100000000 000000000000000000000000001101000000000010000100000000 .io_tile 13 15 000000000000000000 000000000000000000 000000000000010000 000000000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .io_tile 0 16 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .logic_tile 1 16 000000000000100000000010100000000000000000000000000000 000000000001010000000011110000000000000000000000000000 111000000000001000010000000000000000000000000000000000 000000000000001001000000000000000000000000000000000000 010000000000000011100000000000000000000000000000000000 010000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000001001000000000000000000000000 000000000000000000000000000001100000000001000000100000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000100000000 000000000000000000000000000101000000000010001100100001 110000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 .logic_tile 2 16 000000000000000011100000000000000000000000000000000000 000000000000100000000000000000000000000000000000000000 000000000000000000000000010000000000000000000000000000 000000000000000000000010110000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000010000000000000000000000000000000000 000000000001000000000000000000000000000000000000000000 000000001000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000001001000000000000000001000010 000000000000000000000000001001000000000010000000000010 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 .ramt_tile 3 16 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000010100000000000000000000000000000000000 000000000000000000000000000000000000000000 000000001000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000010100000000000000000000000000000000000 000001000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000100000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000010000000000000000000000 000000000000000000000000000000000000000000 .logic_tile 4 16 000000000000000000000000000101000000000000001000000000 000000000000000000000000000000000000000000000000001000 111000000000000000000000000000000000000000001000000000 010000000000000000000000000000001100000000000000000000 010000000000000000000000000000000000000000001000000000 100000000000001011000011000000001111000000000000000000 000000000000000000000000010000000001000000001000000000 000000000000000000000010000000001011000000000000000000 000000000000000101100000000000001000111100000000000000 000000000000000000000000000000000000111100000000000000 000000000000001000000000000000000000000000000000000000 000000000000000101000000000000000000000000000000000000 000000000000000000000110101000000000000010000000000000 000000000000000000000000000011000000000000000000000000 000000000000000000000000000000000000000000000100000000 000000000000000000000000001101000000000010000010100001 .logic_tile 5 16 000000000000000111100010110000000000000000000000000000 000000000000000000000011100000000000000000000000000000 111000000000000001100111000101000000000000000001000000 000000000000000000000000000001100000000011000000000000 010000000000000111100111100001111001000010000010000000 010000000000010000000010100101101011000000000000000000 000000000000001000000110000000000000000010000000000000 000000000000000001000000001101000000000000000001000000 000000000000000000000000000001101001001100110000000000 000000001100000000000000000000011101110011000000000000 000000001010000000000000001000000000000000000100000000 000000000000000000000010010101000000000010001000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 110000000000000111000000000000000000000000000100000010 110000000000000000100000001101000000000010000000000000 .logic_tile 6 16 000001000000000000000000001000000000000010000000000000 000010100000000000000011001101000000000000000000000000 111000000000000000000110010000000000000000000000000000 000000000000000001000011000000000000000000000000000000 010000000000000101000010011111111001100100000000000000 110000000000000000000110010001111001000000000000000010 110000000000000000000111010000000000000000000000000000 000000000000000001010110010000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000010000010000000000000000101000001000000010000000001 000000000000000000000000001101001011000000110000000000 000000000000000000000000000000000000000010000000100100 000000000000000000000000001001000000000000000000000000 110000000000000000000000011000000000000000000100000000 000000000000000000000011100101000000000010001000000000 .logic_tile 7 16 000000100000001011100000001101011101011000000000000000 000000000000000001100010100001011010000000000000000000 111000000000000011100010001011011101001100110000000000 000000000000000001000010100011111001001000010000000000 010010000000001001100011111101001111000010010000000000 110001000000000011000010000001011010000011000000000000 110000000000000111100011001101111000110000000000000100 000000000001010101000010100101111000111000000000000000 000000000000000001000000000101011000000011000000000000 000000000000000000100010010101101000000001000000100000 000000000000000111000110000000000000000000000000000000 000000000000000000100010000000000000000000000000000000 110000000000000000000000001011011010110000000000000000 000000000001010011000011000111011001111000000000100000 110000000000000011100000000000000000000000000100000000 000000000000000000000000000111000000000010001000000000 .logic_tile 8 16 000000000000000011000110000000000000000000000000000000 000000000000000000100010000000000000000000000000000000 111000000000001001000000010000000000000000000000000000 000000000000001111000011110000000000000000000000000000 010010100000000011000110000001000000000011000000000100 010001000000000000100000000101100000000000000000000000 000000000000000000000000000011101100001100110001000000 000000000000000000000000000000100000110011000000000000 110000000000000000000000000000000000000000000000000000 000000000000000111000000000000000000000000000000000000 000000000000000000000000011001100000000000000000100000 000000000000000000000010000001100000000011000000000010 000000000000000000000000000000000000000000000100000000 000000000000000000000000001101000000000010001001000001 010000000000000000000000000000000000000010000100000000 010000000000000000000000000001000000000000000001000000 .logic_tile 9 16 000000000000000000000000000000000000000000000000000000 000000000000000000000011000000000000000000000000000000 111000000000000000000000000000000000000010000010000000 000000000000000011000000001011000000000000000000000000 010000000000000001100000000000000000000000000000000000 010000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000001100000000000000000000000000000000000000000000 000000000000000000000111100000000000000000000100000000 000000000000000000000000001111000000000010000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000111100000000000000000000100000000 000000000000000000000000000101000000000010000000000000 010000000100000000000000000000000000000000000000000000 010000000000000000000000000000000000000000000000000000 .ramt_tile 10 16 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000001000000000000000000000000000000000000 000010000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 000000000000000000000000000000000000000000 .logic_tile 11 16 000000000000000000000111000000000000000000000000000000 000000000000000000000100000000000000000000000000000000 111000000000000001000000010001100000000000000000000000 000000000000000001000011101001100000000011000010000000 010000000000010001100110000000000000000000000000000000 110000000000100000000000000000000000000000000000000000 110000000000100011100011101001100000000001000001000000 100000000000010000000100000001000000000000000000000000 110000001010000000000000000000000000000010000000100000 000000000000000000000000000101000000000000000000000000 000000001000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000010000000000011000000000000000000110000000 000000000000100000000011111101000000000010000000000000 010001000000000000000000000000000000000000000100000000 110000000000000000000000001111000000000010000000000100 .logic_tile 12 16 000000000000000000000000000101100000000000001000000000 000000000000000000000000000000100000000000000000001000 000000000000000000000010100101100000000000001000000000 000000000000000000000010100000101101000000000000000000 000000000000000000000000000000001000111100000000100000 000000000000000000000000000000000000111100000000000000 000000000000000000000010100000000000000000000000000000 000000000000000000000010100000000000000000000000000000 000000000000000000000011100000000000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000001101110001100110000000000 000000000000000000000000000000110000110011000000000000 000000000000000000000011101001100000000011000000000000 000000000000000000000000001001100000000000000000000000 000000000000000000000000000000000000000000000000000000 000000000000000000000000000000000000000000000000000000 .io_tile 13 16 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .io_tile 1 17 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .io_tile 2 17 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .io_tile 3 17 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .io_tile 4 17 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .io_tile 5 17 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000100000000000000 000000000001100000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .io_tile 6 17 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000100 000000000000001000 000100000000000000 000000000000000000 000010000000000000 000110010000000000 000000000000000000 000000000000000000 000000000000010000 000000000000000000 000000000000000000 000000000000000000 .io_tile 7 17 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000001110000000100 000000000000000100 000100000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .io_tile 8 17 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .io_tile 9 17 000001111000000010 000100001000000000 000000000000000000 000000000000000001 000000000000000001 000000000001000000 001100000000000000 000000000000000000 000000000000000000 000100000000000000 000001011001000010 000000000011000000 000000000000000000 000000000000000001 000000000000000001 000000000000000000 .io_tile 10 17 000000000000000010 000100000000000000 000000000000000000 000000000000000001 000000000011000001 000000000001000000 001110000000000000 000000010000000000 000000000000000000 000100000000000000 000000000010000010 000000000011000000 000010000000000000 000000010000000001 000000000000000001 000000000000000000 .io_tile 11 17 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000001100000 000000000000000000 000000000000000000 000000000000000000 .io_tile 12 17 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000100000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 000000000000000000 .sym 1 $auto$simplemap.cc:256:simplemap_eqne$23468$2 .sym 2 $memory\I2C_INPUT_DATA$wren[0][0][0]$y$23284$2 .sym 3 $auto$rtlil.cc:1692:NotGate$60414$2 .sym 4 $auto$dff2dffe.cc:175:make_patterns_logic$50051$2 .sym 5 $0\KBD_FREEZE[0:0]$2 .sym 6 $auto$dff2dffe.cc:175:make_patterns_logic$48057$2 .sym 7 CLK$2$2 .sym 8 $memory\I2C_INPUT_DATA$wren[4][0][0]$y$23322$2 .sym 52 I2C_INPUT_DATA[1][1] .sym 179 $techmap\I2C.$add$i2c_slave.v:156$223_Y[2] .sym 180 $techmap\I2C.$add$i2c_slave.v:156$223_Y[3] .sym 181 $techmap\I2C.$add$i2c_slave.v:156$223_Y[4] .sym 182 $techmap\I2C.$add$i2c_slave.v:156$223_Y[5] .sym 183 $techmap\I2C.$add$i2c_slave.v:156$223_Y[6] .sym 184 $auto$alumacc.cc:484:replace_alu$22890[6] .sym 291 $auto$alumacc.cc:483:replace_alu$22884[7] .sym 293 $techmap\I2C.$add$i2c_slave.v:156$223_Y[7] .sym 294 $auto$alumacc.cc:483:replace_alu$22884[6] .sym 296 $auto$alumacc.cc:483:replace_alu$22889[7] .sym 298 I2C.byte_counter[7] .sym 406 $auto$alumacc.cc:483:replace_alu$22889[1] .sym 407 $auto$alumacc.cc:483:replace_alu$22884[3] .sym 408 $auto$alumacc.cc:484:replace_alu$22885[1] .sym 410 $abc$60421$n558 .sym 411 $abc$60421$n533 .sym 519 $auto$alumacc.cc:483:replace_alu$22889[2] .sym 520 $auto$rtlil.cc:1692:NotGate$60414 .sym 521 $abc$60421$n532 .sym 522 $abc$60421$n556_1 .sym 524 $auto$alumacc.cc:483:replace_alu$22884[4] .sym 526 $abc$60421$n557 .sym 640 $auto$alumacc.cc:484:replace_alu$22885[7] .sym 751 $auto$alumacc.cc:484:replace_alu$22818[7] .sym 752 $auto$alumacc.cc:483:replace_alu$22884[2] .sym 753 KEYBOARD.last_data[2] .sym 830 CLK$2 .sym 836 CLK$2 .sym 861 $auto$dff2dffe.cc:175:make_patterns_logic$50051 .sym 863 I2C_OUT_DESC_MASK[1] .sym 864 I2C_OUT_DESC_MASK[2] .sym 866 I2C_OUT_DESC_MASK[4] .sym 944 $auto$dff2dffe.cc:175:make_patterns_logic$50051 .sym 974 $auto$dff2dffe.cc:175:make_patterns_logic$53084 .sym 975 $abc$60421$n823_1 .sym 976 $auto$dff2dffe.cc:175:make_patterns_logic$53393 .sym 978 $abc$60421$n807 .sym 981 I2C.byte_counter[2] .sym 1088 $abc$60421$n828 .sym 1089 $abc$60421$n835 .sym 1090 $abc$60421$n836 .sym 1091 $abc$60421$n803 .sym 1092 $abc$60421$n782 .sym 1093 $abc$60421$n804 .sym 1094 $auto$dff2dffe.cc:175:make_patterns_logic$54691 .sym 1095 KEYBOARD.report[44] .sym 1202 $auto$simplemap.cc:250:simplemap_eqne$53051[2] .sym 1203 $abc$60421$n805 .sym 1204 $abc$60421$n783 .sym 1205 $abc$60421$n786 .sym 1206 $abc$60421$n785 .sym 1207 $abc$60421$n806 .sym 1208 $abc$60421$n615 .sym 1209 KEYBOARD.report[52] .sym 1289 UART.tx_line .sym 1316 $techmap\KEYBOARD.$procmux$4894_Y[7] .sym 1318 $abc$60421$n587_1 .sym 1321 $abc$60421$n756 .sym 1322 KEYBOARD.last_data[10] .sym 1403 I2C.is_read .sym 1432 $auto$alumacc.cc:484:replace_alu$22879[2] .sym 1434 KEYBOARD.row_counter[1] .sym 1436 KEYBOARD.is_pressed .sym 1517 KBD_FREEZE .sym 1522 INT .sym 1544 $techmap\I2C.FLT_SCL.$procmux$979_Y[1] .sym 1545 $abc$60421$n900 .sym 1546 $auto$wreduce.cc:310:run$22795[0] .sym 1547 $abc$60421$n901_1 .sym 1548 $auto$dff2dffe.cc:158:make_patterns_logic$59851 .sym 1549 I2C.FLT_SCL.counter[1] .sym 1550 I2C.FLT_SCL.counter[0] .sym 1551 I2C.FLT_SCL.counter[2] .sym 1662 $auto$dff2dffe.cc:175:make_patterns_logic$59836 .sym 1664 I2C.FLT_SCL.out .sym 1879 $auto$alumacc.cc:483:replace_alu$22849[0] .sym 1881 I2C_INPUT_DATA[0][6] .sym 1882 I2C_INPUT_DATA[0][2] .sym 1885 I2C_INPUT_DATA[0][5] .sym 2203 I2C.received_byte[1] .sym 2204 $false .sym 2205 $false .sym 2206 $false .sym 2217 $auto$dff2dffe.cc:158:make_patterns_logic$44967 .sym 2218 CLK$2$2 .sym 2219 $false .sym 2220 $auto$alumacc.cc:484:replace_alu$22823[7] .sym 2221 $techmap\I2C.$add$i2c_slave.v:156$223_Y[0] .sym 2222 I2C.byte_counter[6] .sym 2223 I2C.byte_counter[4] .sym 2224 I2C.byte_counter[3] .sym 2225 I2C.byte_counter[5] .sym 2226 I2C.byte_counter[0] .sym 2227 I2C.byte_counter[1] .sym 2268 $true .sym 2305 $auto$alumacc.cc:484:replace_alu$22890[0]$2 .sym 2306 $false .sym 2307 $auto$alumacc.cc:484:replace_alu$22890[0] .sym 2308 $false .sym 2309 $false .sym 2310 $auto$alumacc.cc:484:replace_alu$22890[1] .sym 2312 $false .sym 2313 $auto$alumacc.cc:483:replace_alu$22889[1] .sym 2315 $auto$alumacc.cc:484:replace_alu$22890[2] .sym 2316 $false .sym 2317 $false .sym 2318 $auto$alumacc.cc:483:replace_alu$22889[2] .sym 2319 $auto$alumacc.cc:484:replace_alu$22890[1] .sym 2320 $auto$alumacc.cc:484:replace_alu$22890[3] .sym 2321 $false .sym 2322 $false .sym 2323 $auto$alumacc.cc:483:replace_alu$22889[3] .sym 2324 $auto$alumacc.cc:484:replace_alu$22890[2] .sym 2325 $auto$alumacc.cc:484:replace_alu$22890[4] .sym 2326 $false .sym 2327 $false .sym 2328 $auto$alumacc.cc:483:replace_alu$22889[4] .sym 2329 $auto$alumacc.cc:484:replace_alu$22890[3] .sym 2330 $auto$alumacc.cc:484:replace_alu$22890[5] .sym 2331 $false .sym 2332 $false .sym 2333 $auto$alumacc.cc:483:replace_alu$22889[5] .sym 2334 $auto$alumacc.cc:484:replace_alu$22890[4] .sym 2335 $auto$alumacc.cc:484:replace_alu$22890[6]$2 .sym 2336 $false .sym 2337 $false .sym 2338 $auto$alumacc.cc:483:replace_alu$22889[6] .sym 2339 $auto$alumacc.cc:484:replace_alu$22890[5] .sym 2344 $auto$alumacc.cc:484:replace_alu$22890[6]$2 .sym 2348 $abc$60421$n723 .sym 2349 $auto$alumacc.cc:483:replace_alu$22889[6] .sym 2350 I2C_INPUT_DATA[0][3] .sym 2354 I2C_INPUT_DATA[0][7] .sym 2434 $auto$alumacc.cc:483:replace_alu$22889[7] .sym 2435 $false .sym 2436 $false .sym 2437 $false .sym 2444 $false .sym 2445 $false .sym 2446 $auto$alumacc.cc:483:replace_alu$22889[7] .sym 2447 $auto$alumacc.cc:484:replace_alu$22890[6] .sym 2449 $auto$alumacc.cc:483:replace_alu$22889[6] .sym 2450 $false .sym 2451 $false .sym 2452 $false .sym 2459 $techmap\I2C.$procmux$12628_Y .sym 2460 I2C.byte_counter[7] .sym 2461 $false .sym 2462 $false .sym 2469 $auto$alumacc.cc:483:replace_alu$22889[7] .sym 2470 $abc$60421$n1062 .sym 2471 $techmap\I2C.$add$i2c_slave.v:156$223_Y[7] .sym 2472 $abc$60421$n1060 .sym 2473 $true .sym 2474 CLK$2$2 .sym 2475 $false .sym 2478 KEYBOARD.row_time[2] .sym 2479 KEYBOARD.row_time[3] .sym 2480 KEYBOARD.row_time[4] .sym 2481 KEYBOARD.row_time[5] .sym 2482 KEYBOARD.row_time[6] .sym 2483 KEYBOARD.row_time[7] .sym 2567 $techmap\I2C.$procmux$12628_Y .sym 2568 I2C.byte_counter[1] .sym 2569 $false .sym 2570 $false .sym 2572 $auto$alumacc.cc:483:replace_alu$22889[3] .sym 2573 $false .sym 2574 $false .sym 2575 $false .sym 2577 $auto$alumacc.cc:483:replace_alu$22889[1] .sym 2578 $false .sym 2579 $false .sym 2580 $false .sym 2587 KEYBOARD.row_time[7] .sym 2588 KEYBOARD.row_time[4] .sym 2589 KEYBOARD.row_time[5] .sym 2590 KEYBOARD.row_time[6] .sym 2592 KEYBOARD.row_time[7] .sym 2593 KEYBOARD.row_time[11] .sym 2594 KEYBOARD.row_time[5] .sym 2595 KEYBOARD.row_time[6] .sym 2604 KEYBOARD.row_time[8] .sym 2605 KEYBOARD.row_time[9] .sym 2606 KEYBOARD.row_time[10] .sym 2607 KEYBOARD.row_time[11] .sym 2608 KEYBOARD.row_time[12] .sym 2609 KEYBOARD.row_time[13] .sym 2610 KEYBOARD.row_time[14] .sym 2611 $auto$alumacc.cc:484:replace_alu$22905[14] .sym 2690 $techmap\I2C.$procmux$12628_Y .sym 2691 I2C.byte_counter[2] .sym 2692 $false .sym 2693 $false .sym 2695 $abc$60421$n532 .sym 2696 $abc$60421$n533 .sym 2697 $abc$60421$n534_1 .sym 2698 $abc$60421$n535 .sym 2700 KEYBOARD.row_time[13] .sym 2701 KEYBOARD.row_time[4] .sym 2702 KEYBOARD.row_time[8] .sym 2703 KEYBOARD.row_time[12] .sym 2705 $abc$60421$n535 .sym 2706 $abc$60421$n557 .sym 2707 $false .sym 2708 $false .sym 2715 $auto$alumacc.cc:483:replace_alu$22889[4] .sym 2716 $false .sym 2717 $false .sym 2718 $false .sym 2725 KEYBOARD.row_time[11] .sym 2726 KEYBOARD.row_time[13] .sym 2727 KEYBOARD.row_time[8] .sym 2728 KEYBOARD.row_time[12] .sym 2732 $techmap\KEYBOARD.$procmux$4894_Y[0] .sym 2733 $sub$top.v:74$27_Y[0] .sym 2735 $abc$60421$n714 .sym 2736 $abc$60421$n1134 .sym 2737 I2C_INPUT_DATA[1][5] .sym 2738 I2C_INPUT_DATA[1][2] .sym 2739 I2C_INPUT_DATA[1][6] .sym 2780 $true .sym 2817 $auto$alumacc.cc:484:replace_alu$22885[1]$2 .sym 2818 $false .sym 2819 $auto$alumacc.cc:484:replace_alu$22885[1] .sym 2820 $false .sym 2821 $false .sym 2822 $auto$alumacc.cc:484:replace_alu$22885[2] .sym 2824 $false .sym 2825 $auto$alumacc.cc:483:replace_alu$22884[2] .sym 2827 $auto$alumacc.cc:484:replace_alu$22885[3] .sym 2829 $false .sym 2830 $auto$alumacc.cc:483:replace_alu$22884[3] .sym 2832 $auto$alumacc.cc:484:replace_alu$22885[4] .sym 2834 $false .sym 2835 $auto$alumacc.cc:483:replace_alu$22884[4] .sym 2837 $auto$alumacc.cc:484:replace_alu$22885[5] .sym 2839 $false .sym 2840 $auto$alumacc.cc:483:replace_alu$22884[5] .sym 2842 $auto$alumacc.cc:484:replace_alu$22885[6] .sym 2844 $false .sym 2845 $auto$alumacc.cc:483:replace_alu$22884[6] .sym 2847 $auto$alumacc.cc:484:replace_alu$22885[7]$2 .sym 2849 $false .sym 2850 $auto$alumacc.cc:483:replace_alu$22884[7] .sym 2856 $auto$alumacc.cc:484:replace_alu$22885[7]$2 .sym 2860 $abc$60421$n808 .sym 2861 $abc$60421$n931 .sym 2862 $abc$60421$n930 .sym 2863 KEYBOARD.report[9] .sym 2864 KEYBOARD.report[12] .sym 2865 KEYBOARD.report[8] .sym 2866 KEYBOARD.report[11] .sym 2867 KEYBOARD.report[10] .sym 2908 $true .sym 2945 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[3]$2 .sym 2946 $false .sym 2947 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[3] .sym 2948 $false .sym 2949 $false .sym 2950 $auto$alumacc.cc:470:replace_alu$22816.C[5] .sym 2952 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[4] .sym 2953 $true$2 .sym 2955 $auto$alumacc.cc:470:replace_alu$22816.C[6] .sym 2957 $auto$alumacc.cc:470:replace_alu$22821.AA[5] .sym 2958 $false .sym 2960 $auto$alumacc.cc:470:replace_alu$22816.C[7] .sym 2962 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[6] .sym 2963 $false .sym 2965 $auto$alumacc.cc:484:replace_alu$22818[7]$2 .sym 2967 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[7] .sym 2968 $false .sym 2974 $auto$alumacc.cc:484:replace_alu$22818[7]$2 .sym 2976 $auto$alumacc.cc:483:replace_alu$22889[2] .sym 2977 $false .sym 2978 $false .sym 2979 $false .sym 2981 $techmap\KEYBOARD.$procmux$3661_Y .sym 2982 $false .sym 2983 $false .sym 2984 $false .sym 2985 $auto$dff2dffe.cc:175:make_patterns_logic$57800 .sym 2986 CLK$2$2 .sym 2987 $0\KBD_FREEZE[0:0]$2 .sym 2988 $auto$dff2dffe.cc:175:make_patterns_logic$50579 .sym 2989 $abc$60421$n934 .sym 2990 $abc$60421$n1182_1 .sym 2991 $techmap\KEYBOARD.$procmux$4894_Y[6] .sym 2993 KEYBOARD.report[1] .sym 2995 KEYBOARD.report[6] .sym 3079 RESET .sym 3080 KBD_FREEZE .sym 3081 $false .sym 3082 $false .sym 3089 $2\I2C_OUT_DESC_MASK[7:0][7] .sym 3090 $false .sym 3091 $false .sym 3092 $false .sym 3094 $2\I2C_OUT_DESC_MASK[7:0][7] .sym 3095 $false .sym 3096 $false .sym 3097 $false .sym 3104 $2\I2C_OUT_DESC_MASK[7:0][7] .sym 3105 $false .sym 3106 $false .sym 3107 $false .sym 3113 $auto$dff2dffe.cc:175:make_patterns_logic$48057$2 .sym 3114 CLK$2$2 .sym 3115 $0\KBD_FREEZE[0:0]$2 .sym 3116 $abc$60421$n801 .sym 3117 $abc$60421$n839 .sym 3118 $0$memwr$\I2C_INPUT_DATA$top.v:63$1_ADDR[3:0]$8[3] .sym 3119 $abc$60421$n1219 .sym 3120 $abc$60421$n938 .sym 3121 $auto$dff2dffe.cc:175:make_patterns_logic$57800 .sym 3122 $abc$60421$n916 .sym 3123 I2C_INPUT_DATA[1][0] .sym 3202 $abc$60421$n813 .sym 3203 $abc$60421$n803 .sym 3204 $abc$60421$n807 .sym 3205 $abc$60421$n804 .sym 3207 $abc$60421$n813 .sym 3208 $abc$60421$n824 .sym 3209 $false .sym 3210 $false .sym 3212 $abc$60421$n823_1 .sym 3213 $abc$60421$n803 .sym 3214 $abc$60421$n817 .sym 3215 $abc$60421$n804 .sym 3222 $auto$simplemap.cc:250:simplemap_eqne$53051[2] .sym 3223 $abc$60421$n801 .sym 3224 $abc$60421$n808 .sym 3225 $false .sym 3237 $auto$alumacc.cc:483:replace_alu$22889[2] .sym 3238 $abc$60421$n1062 .sym 3239 $techmap\I2C.$add$i2c_slave.v:156$223_Y[2] .sym 3240 $abc$60421$n1060 .sym 3241 $true .sym 3242 CLK$2$2 .sym 3243 $false .sym 3244 $auto$dff2dffe.cc:175:make_patterns_logic$52061 .sym 3245 $abc$60421$n838 .sym 3246 $abc$60421$n716 .sym 3247 $abc$60421$n845 .sym 3248 $abc$60421$n837 .sym 3249 $abc$60421$n967 .sym 3250 KEYBOARD.report[29] .sym 3251 KEYBOARD.report[27] .sym 3330 $auto$simplemap.cc:250:simplemap_eqne$53051[2] .sym 3331 $abc$60421$n801 .sym 3332 $false .sym 3333 $false .sym 3335 $abc$60421$n787 .sym 3336 $abc$60421$n813 .sym 3337 $abc$60421$n836 .sym 3338 $abc$60421$n783 .sym 3340 $abc$60421$n787 .sym 3341 $abc$60421$n823_1 .sym 3342 $abc$60421$n837 .sym 3343 $false .sym 3345 $abc$60421$n783 .sym 3346 $abc$60421$n787 .sym 3347 $false .sym 3348 $false .sym 3350 $abc$60421$n787 .sym 3351 $abc$60421$n783 .sym 3352 $abc$60421$n785 .sym 3353 $false .sym 3355 $abc$60421$n717 .sym 3356 $abc$60421$n785 .sym 3357 $abc$60421$n805 .sym 3358 $abc$60421$n756 .sym 3360 $abc$60421$n829 .sym 3361 $abc$60421$n828 .sym 3362 $abc$60421$n804 .sym 3363 $abc$60421$n835 .sym 3365 $techmap\KEYBOARD.$procmux$4894_Y[4] .sym 3366 $false .sym 3367 $false .sym 3368 $false .sym 3369 $auto$dff2dffe.cc:175:make_patterns_logic$53393 .sym 3370 CLK$2$2 .sym 3371 $0\KBD_FREEZE[0:0]$2 .sym 3372 $abc$60421$n755 .sym 3373 $abc$60421$n745 .sym 3374 $abc$60421$n788 .sym 3375 $abc$60421$n614 .sym 3376 $abc$60421$n789 .sym 3377 KEYBOARD.report[28] .sym 3378 KEYBOARD.report[31] .sym 3379 KEYBOARD.report[26] .sym 3458 $abc$60421$n614 .sym 3459 $abc$60421$n615 .sym 3460 $false .sym 3461 $false .sym 3463 $abc$60421$n615 .sym 3464 $abc$60421$n614 .sym 3465 $abc$60421$n784 .sym 3466 $abc$60421$n806 .sym 3468 $abc$60421$n615 .sym 3469 $abc$60421$n614 .sym 3470 $abc$60421$n784 .sym 3471 $false .sym 3473 $auto$dff2dffe.cc:175:make_patterns_logic$50051$2 .sym 3474 $abc$60421$n778 .sym 3475 $false .sym 3476 $false .sym 3478 $abc$60421$n615 .sym 3479 $abc$60421$n614 .sym 3480 $abc$60421$n784 .sym 3481 $abc$60421$n786 .sym 3483 $auto$dff2dffe.cc:175:make_patterns_logic$50051$2 .sym 3484 $abc$60421$n778 .sym 3485 $abc$60421$n788 .sym 3486 $false .sym 3488 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[6] .sym 3489 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[4] .sym 3490 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[3] .sym 3491 $auto$alumacc.cc:470:replace_alu$22821.AA[5] .sym 3493 $techmap\KEYBOARD.$procmux$4894_Y[4] .sym 3494 $false .sym 3495 $false .sym 3496 $false .sym 3497 $auto$dff2dffe.cc:175:make_patterns_logic$54691 .sym 3498 CLK$2$2 .sym 3499 $0\KBD_FREEZE[0:0]$2 .sym 3500 $auto$dff2dffe.cc:175:make_patterns_logic$58544 .sym 3501 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[6] .sym 3502 $abc$60421$n600 .sym 3503 $abc$60421$n578 .sym 3504 $abc$60421$n577 .sym 3505 $abc$60421$n731 .sym 3506 KEYBOARD.report[7] .sym 3507 KEYBOARD.report[0] .sym 3586 $auto$simplemap.cc:250:simplemap_eqne$53186[5] .sym 3587 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[7] .sym 3588 $false .sym 3589 $false .sym 3596 $auto$simplemap.cc:309:simplemap_lut$44816 .sym 3597 $auto$simplemap.cc:250:simplemap_eqne$33874[2] .sym 3598 $false .sym 3599 $false .sym 3611 RESET .sym 3612 KBD_FREEZE .sym 3613 $false .sym 3614 $false .sym 3616 $techmap\KEYBOARD.$procmux$3661_Y .sym 3617 $false .sym 3618 $false .sym 3619 $false .sym 3625 $auto$dff2dffe.cc:175:make_patterns_logic$58544 .sym 3626 CLK$2$2 .sym 3627 $0\KBD_FREEZE[0:0]$2 .sym 3628 $abc$60421$n586 .sym 3629 $abc$60421$n606 .sym 3630 $abc$60421$n609 .sym 3631 $abc$60421$n799 .sym 3632 $abc$60421$n856 .sym 3633 $abc$60421$n608 .sym 3634 $abc$60421$n594 .sym 3635 $auto$alumacc.cc:470:replace_alu$22821.C[1] .sym 3676 $true .sym 3713 I2C.byte_counter[1]$2 .sym 3714 $false .sym 3715 I2C.byte_counter[1] .sym 3716 $false .sym 3717 $false .sym 3718 $auto$alumacc.cc:484:replace_alu$22879[2]$2 .sym 3720 I2C.byte_counter[2] .sym 3721 $true$2 .sym 3727 $auto$alumacc.cc:484:replace_alu$22879[2]$2 .sym 3734 $auto$simplemap.cc:309:simplemap_lut$44816 .sym 3735 $false .sym 3736 $false .sym 3737 $false .sym 3744 $auto$simplemap.cc:250:simplemap_eqne$53186[5] .sym 3745 $false .sym 3746 $false .sym 3747 $false .sym 3753 $auto$dff2dffe.cc:175:make_patterns_logic$50051$2 .sym 3754 CLK$2$2 .sym 3755 $false .sym 3758 $auto$alumacc.cc:484:replace_alu$22923[1] .sym 3759 $techmap\UART.$sub$uart.v:38$347_Y[0] .sym 3760 $techmap\I2C.FLT_SCL.$procmux$979_Y[2] .sym 3761 $techmap\UART.$sub$uart.v:38$347_Y[2] .sym 3762 $auto$wreduce.cc:310:run$22795[2] .sym 3763 KEYBOARD.last_data[9] .sym 3842 I2C.FLT_SCL.counter[0] .sym 3843 I2C.FLT_SCL.counter[1] .sym 3844 $false .sym 3845 $false .sym 3847 I2C.FLT_SCL.counter[0] .sym 3848 I2C.FLT_SCL.counter[1] .sym 3849 I2C.FLT_SCL.counter[2] .sym 3850 $false .sym 3852 $false .sym 3853 I2C.FLT_SCL.counter[0] .sym 3854 $false .sym 3855 $true$2 .sym 3857 $techmap\I2C.FLT_SCL.$procmux$979_Y[1] .sym 3858 $auto$wreduce.cc:310:run$22795[0] .sym 3859 I2C.FLT_SCL.out .sym 3860 I2C.SCLF .sym 3862 $abc$60421$n900 .sym 3863 I2C.FLT_SCL.out .sym 3864 I2C.SCLF .sym 3865 $false .sym 3867 $techmap\I2C.FLT_SCL.$procmux$979_Y[1] .sym 3868 $false .sym 3869 $false .sym 3870 $false .sym 3872 $abc$60421$n900 .sym 3873 $auto$wreduce.cc:310:run$22795[0] .sym 3874 $false .sym 3875 $false .sym 3877 $techmap\I2C.FLT_SCL.$procmux$979_Y[2] .sym 3878 $false .sym 3879 $false .sym 3880 $false .sym 3881 $auto$dff2dffe.cc:158:make_patterns_logic$59851 .sym 3882 CLK$2$2 .sym 3883 $0\KBD_FREEZE[0:0]$2 .sym 3890 $abc$60421$n583 .sym 3990 $techmap\I2C.FLT_SCL.$procmux$979_Y[2] .sym 3991 $abc$60421$n901_1 .sym 3992 $false .sym 3993 $false .sym 4000 I2C.SCLF .sym 4001 $false .sym 4002 $false .sym 4003 $false .sym 4009 $auto$dff2dffe.cc:175:make_patterns_logic$59836 .sym 4010 CLK$2$2 .sym 4011 $0\KBD_FREEZE[0:0]$2 .sym 4200 I2C.byte_counter[0] .sym 4201 $false .sym 4202 $false .sym 4203 $false .sym 4210 I2C.received_byte[6] .sym 4211 $false .sym 4212 $false .sym 4213 $false .sym 4215 I2C.received_byte[2] .sym 4216 $false .sym 4217 $false .sym 4218 $false .sym 4230 I2C.received_byte[5] .sym 4231 $false .sym 4232 $false .sym 4233 $false .sym 4239 $memory\I2C_INPUT_DATA$wren[0][0][0]$y$23284$2 .sym 4240 CLK$2$2 .sym 4241 $false .sym 4318 $true .sym 4355 $auto$alumacc.cc:470:replace_alu$22821.C[1]$2 .sym 4356 $false .sym 4357 $auto$alumacc.cc:470:replace_alu$22821.C[1] .sym 4358 $false .sym 4359 $false .sym 4360 $auto$alumacc.cc:470:replace_alu$22821.C[2] .sym 4362 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[1] .sym 4363 $false .sym 4365 $auto$alumacc.cc:470:replace_alu$22821.C[3] .sym 4367 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[2] .sym 4368 $false .sym 4370 $auto$alumacc.cc:470:replace_alu$22821.C[4] .sym 4372 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[3] .sym 4373 $false .sym 4375 $auto$alumacc.cc:470:replace_alu$22821.C[5] .sym 4377 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[4] .sym 4378 $false .sym 4380 $auto$alumacc.cc:470:replace_alu$22821.C[6] .sym 4382 $auto$alumacc.cc:470:replace_alu$22821.AA[5] .sym 4383 $true$2 .sym 4385 $auto$alumacc.cc:470:replace_alu$22821.C[7] .sym 4387 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[6] .sym 4388 $false .sym 4390 $auto$alumacc.cc:484:replace_alu$22823[7]$2 .sym 4392 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[7] .sym 4393 $false .sym 4475 $auto$alumacc.cc:484:replace_alu$22823[7]$2 .sym 4477 $false .sym 4478 $true$2 .sym 4479 $auto$alumacc.cc:484:replace_alu$22890[0] .sym 4480 $false .sym 4482 $auto$alumacc.cc:483:replace_alu$22889[6] .sym 4483 $abc$60421$n1062 .sym 4484 $techmap\I2C.$add$i2c_slave.v:156$223_Y[6] .sym 4485 $abc$60421$n1060 .sym 4487 $auto$alumacc.cc:483:replace_alu$22889[4] .sym 4488 $abc$60421$n1062 .sym 4489 $techmap\I2C.$add$i2c_slave.v:156$223_Y[4] .sym 4490 $abc$60421$n1060 .sym 4492 $auto$alumacc.cc:483:replace_alu$22889[3] .sym 4493 $abc$60421$n1062 .sym 4494 $techmap\I2C.$add$i2c_slave.v:156$223_Y[3] .sym 4495 $abc$60421$n1060 .sym 4497 $auto$alumacc.cc:483:replace_alu$22889[5] .sym 4498 $abc$60421$n1062 .sym 4499 $techmap\I2C.$add$i2c_slave.v:156$223_Y[5] .sym 4500 $abc$60421$n1060 .sym 4502 $auto$alumacc.cc:484:replace_alu$22890[0] .sym 4503 $abc$60421$n1062 .sym 4504 $techmap\I2C.$add$i2c_slave.v:156$223_Y[0] .sym 4505 $abc$60421$n1060 .sym 4507 $abc$60421$n1060 .sym 4508 $abc$60421$n1062 .sym 4509 $auto$alumacc.cc:484:replace_alu$22890[0] .sym 4510 $auto$alumacc.cc:483:replace_alu$22889[1] .sym 4511 $true .sym 4512 CLK$2$2 .sym 4513 $false .sym 4588 KEYBOARD.row_time[0] .sym 4589 KEYBOARD.row_time[3] .sym 4590 KEYBOARD.row_time[1] .sym 4591 KEYBOARD.row_time[2] .sym 4593 $techmap\I2C.$procmux$12628_Y .sym 4594 I2C.byte_counter[6] .sym 4595 $false .sym 4596 $false .sym 4598 I2C.received_byte[3] .sym 4599 $false .sym 4600 $false .sym 4601 $false .sym 4618 I2C.received_byte[7] .sym 4619 $false .sym 4620 $false .sym 4621 $false .sym 4627 $memory\I2C_INPUT_DATA$wren[0][0][0]$y$23284$2 .sym 4628 CLK$2$2 .sym 4629 $false .sym 4666 $true .sym 4703 KEYBOARD.row_time[0]$2 .sym 4704 $false .sym 4705 KEYBOARD.row_time[0] .sym 4706 $false .sym 4707 $false .sym 4708 $auto$alumacc.cc:484:replace_alu$22905[1] .sym 4710 $false .sym 4711 KEYBOARD.row_time[1] .sym 4713 $auto$alumacc.cc:484:replace_alu$22905[2] .sym 4714 $false .sym 4715 $false .sym 4716 KEYBOARD.row_time[2] .sym 4717 $auto$alumacc.cc:484:replace_alu$22905[1] .sym 4718 $auto$alumacc.cc:484:replace_alu$22905[3] .sym 4719 $false .sym 4720 $false .sym 4721 KEYBOARD.row_time[3] .sym 4722 $auto$alumacc.cc:484:replace_alu$22905[2] .sym 4723 $auto$alumacc.cc:484:replace_alu$22905[4] .sym 4724 $false .sym 4725 $false .sym 4726 KEYBOARD.row_time[4] .sym 4727 $auto$alumacc.cc:484:replace_alu$22905[3] .sym 4728 $auto$alumacc.cc:484:replace_alu$22905[5] .sym 4729 $false .sym 4730 $false .sym 4731 KEYBOARD.row_time[5] .sym 4732 $auto$alumacc.cc:484:replace_alu$22905[4] .sym 4733 $auto$alumacc.cc:484:replace_alu$22905[6] .sym 4734 $false .sym 4735 $false .sym 4736 KEYBOARD.row_time[6] .sym 4737 $auto$alumacc.cc:484:replace_alu$22905[5] .sym 4738 $auto$alumacc.cc:484:replace_alu$22905[7] .sym 4739 $false .sym 4740 $false .sym 4741 KEYBOARD.row_time[7] .sym 4742 $auto$alumacc.cc:484:replace_alu$22905[6] .sym 4743 $auto$dff2dffe.cc:175:make_patterns_logic$50051$2 .sym 4744 CLK$2$2 .sym 4745 $auto$rtlil.cc:1692:NotGate$60414$2 .sym 4782 $auto$alumacc.cc:484:replace_alu$22905[7] .sym 4819 $auto$alumacc.cc:484:replace_alu$22905[8] .sym 4820 $false .sym 4821 $false .sym 4822 KEYBOARD.row_time[8] .sym 4823 $auto$alumacc.cc:484:replace_alu$22905[7] .sym 4824 $auto$alumacc.cc:484:replace_alu$22905[9] .sym 4825 $false .sym 4826 $false .sym 4827 KEYBOARD.row_time[9] .sym 4828 $auto$alumacc.cc:484:replace_alu$22905[8] .sym 4829 $auto$alumacc.cc:484:replace_alu$22905[10] .sym 4830 $false .sym 4831 $false .sym 4832 KEYBOARD.row_time[10] .sym 4833 $auto$alumacc.cc:484:replace_alu$22905[9] .sym 4834 $auto$alumacc.cc:484:replace_alu$22905[11] .sym 4835 $false .sym 4836 $false .sym 4837 KEYBOARD.row_time[11] .sym 4838 $auto$alumacc.cc:484:replace_alu$22905[10] .sym 4839 $auto$alumacc.cc:484:replace_alu$22905[12] .sym 4840 $false .sym 4841 $false .sym 4842 KEYBOARD.row_time[12] .sym 4843 $auto$alumacc.cc:484:replace_alu$22905[11] .sym 4844 $auto$alumacc.cc:484:replace_alu$22905[13] .sym 4845 $false .sym 4846 $false .sym 4847 KEYBOARD.row_time[13] .sym 4848 $auto$alumacc.cc:484:replace_alu$22905[12] .sym 4849 $auto$alumacc.cc:484:replace_alu$22905[14]$2 .sym 4850 $false .sym 4851 $false .sym 4852 KEYBOARD.row_time[14] .sym 4853 $auto$alumacc.cc:484:replace_alu$22905[13] .sym 4858 $auto$alumacc.cc:484:replace_alu$22905[14]$2 .sym 4859 $auto$dff2dffe.cc:175:make_patterns_logic$50051$2 .sym 4860 CLK$2$2 .sym 4861 $auto$rtlil.cc:1692:NotGate$60414$2 .sym 4936 $auto$simplemap.cc:250:simplemap_eqne$53186[5] .sym 4937 $auto$alumacc.cc:470:replace_alu$22821.C[1] .sym 4938 $false .sym 4939 $false .sym 4941 $false .sym 4942 I2C.byte_counter[0] .sym 4943 $true$2 .sym 4944 $true$2 .sym 4951 $auto$alumacc.cc:484:replace_alu$22823[7] .sym 4952 $auto$alumacc.cc:484:replace_alu$22818[7] .sym 4953 $false .sym 4954 $false .sym 4956 $abc$60421$n1135_1 .sym 4957 I2C.byte_counter[5] .sym 4958 $false .sym 4959 $false .sym 4961 I2C.received_byte[5] .sym 4962 $false .sym 4963 $false .sym 4964 $false .sym 4966 I2C.received_byte[2] .sym 4967 $false .sym 4968 $false .sym 4969 $false .sym 4971 I2C.received_byte[6] .sym 4972 $false .sym 4973 $false .sym 4974 $false .sym 4975 $auto$dff2dffe.cc:158:make_patterns_logic$44967 .sym 4976 CLK$2$2 .sym 4977 $false .sym 5052 $abc$60421$n809 .sym 5053 $abc$60421$n810 .sym 5054 $abc$60421$n811 .sym 5055 $abc$60421$n812 .sym 5057 KEYBOARD.report[9] .sym 5058 KEYBOARD.report[25] .sym 5059 I2C.byte_counter[1] .sym 5060 $false .sym 5062 $abc$60421$n932 .sym 5063 $abc$60421$n931 .sym 5064 I2C.byte_counter[2] .sym 5065 $false .sym 5067 $false .sym 5068 $false .sym 5069 $false .sym 5070 $false .sym 5072 $false .sym 5073 $false .sym 5074 $false .sym 5075 $false .sym 5077 $false .sym 5078 $false .sym 5079 $false .sym 5080 $false .sym 5082 $false .sym 5083 $false .sym 5084 $false .sym 5085 $false .sym 5087 $false .sym 5088 $false .sym 5089 $false .sym 5090 $false .sym 5091 $auto$dff2dffe.cc:175:make_patterns_logic$50579 .sym 5092 CLK$2$2 .sym 5093 $false .sym 5168 RESET .sym 5169 $auto$simplemap.cc:250:simplemap_eqne$53051[2] .sym 5170 KBD_FREEZE .sym 5171 $false .sym 5173 $abc$60421$n938 .sym 5174 $abc$60421$n939 .sym 5175 $abc$60421$n935 .sym 5176 $sub$top.v:74$27_Y[0] .sym 5178 I2C.byte_counter[1] .sym 5179 I2C.byte_counter[2] .sym 5180 I2C.byte_counter[0] .sym 5181 I2C.byte_counter[3] .sym 5183 $auto$simplemap.cc:250:simplemap_eqne$53186[5] .sym 5184 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[6] .sym 5185 $false .sym 5186 $false .sym 5193 KEYBOARD.report[1] .sym 5194 $auto$simplemap.cc:250:simplemap_eqne$53186[5] .sym 5195 $abc$60421$n1118_1 .sym 5196 $false .sym 5203 KEYBOARD.report[6] .sym 5204 $auto$simplemap.cc:250:simplemap_eqne$53186[5] .sym 5205 $abc$60421$n724 .sym 5206 $false .sym 5207 $auto$dff2dffe.cc:175:make_patterns_logic$50377 .sym 5208 CLK$2$2 .sym 5209 $0\KBD_FREEZE[0:0]$2 .sym 5284 $auto$simplemap.cc:250:simplemap_eqne$53186[5] .sym 5285 $auto$dff2dffe.cc:175:make_patterns_logic$50051$2 .sym 5286 $abc$60421$n714 .sym 5287 $false .sym 5289 $abc$60421$n841 .sym 5290 $abc$60421$n840 .sym 5291 $abc$60421$n824 .sym 5292 $false .sym 5294 $false .sym 5295 I2C.byte_counter[3] .sym 5296 $true$2 .sym 5297 $auto$alumacc.cc:484:replace_alu$22879[2] .sym 5299 $abc$60421$n1216 .sym 5300 I2C.byte_counter[1] .sym 5301 I2C.byte_counter[2] .sym 5302 $0$memwr$\I2C_INPUT_DATA$top.v:63$1_ADDR[3:0]$8[3] .sym 5304 KEYBOARD.report[26] .sym 5305 KEYBOARD.report[58] .sym 5306 I2C.byte_counter[1] .sym 5307 I2C.byte_counter[2] .sym 5309 $abc$60421$n590 .sym 5310 $auto$simplemap.cc:127:simplemap_reduce$33820[0] .sym 5311 $abc$60421$n856 .sym 5312 $abc$60421$n865 .sym 5314 KEYBOARD.report[0] .sym 5315 KEYBOARD.report[32] .sym 5316 I2C.byte_counter[2] .sym 5317 $false .sym 5319 I2C.received_byte[0] .sym 5320 $false .sym 5321 $false .sym 5322 $false .sym 5323 $auto$dff2dffe.cc:158:make_patterns_logic$44967 .sym 5324 CLK$2$2 .sym 5325 $false .sym 5400 $abc$60421$n801 .sym 5401 $abc$60421$n791 .sym 5402 $abc$60421$n716 .sym 5403 $abc$60421$n782 .sym 5405 $abc$60421$n839 .sym 5406 $abc$60421$n788 .sym 5407 $abc$60421$n813 .sym 5408 $false .sym 5410 $abc$60421$n717 .sym 5411 $abc$60421$n756 .sym 5412 $false .sym 5413 $false .sym 5415 $abc$60421$n838 .sym 5416 $abc$60421$n778 .sym 5417 $abc$60421$n846 .sym 5418 $abc$60421$n847 .sym 5420 $abc$60421$n838 .sym 5421 $auto$dff2dffe.cc:175:make_patterns_logic$50051$2 .sym 5422 $abc$60421$n778 .sym 5423 $false .sym 5425 KEYBOARD.report[30] .sym 5426 KEYBOARD.report[62] .sym 5427 I2C.byte_counter[1] .sym 5428 I2C.byte_counter[2] .sym 5430 $techmap\KEYBOARD.$procmux$4894_Y[5] .sym 5431 $false .sym 5432 $false .sym 5433 $false .sym 5435 $techmap\KEYBOARD.$procmux$4894_Y[3] .sym 5436 $false .sym 5437 $false .sym 5438 $false .sym 5439 $auto$dff2dffe.cc:175:make_patterns_logic$52061 .sym 5440 CLK$2$2 .sym 5441 $0\KBD_FREEZE[0:0]$2 .sym 5516 $abc$60421$n726 .sym 5517 $abc$60421$n727 .sym 5518 $false .sym 5519 $false .sym 5521 $abc$60421$n580 .sym 5522 $abc$60421$n583 .sym 5523 $abc$60421$n582 .sym 5524 $false .sym 5526 $abc$60421$n789 .sym 5527 $abc$60421$n790 .sym 5528 $false .sym 5529 $false .sym 5531 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[2] .sym 5532 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[1] .sym 5533 $auto$alumacc.cc:470:replace_alu$22821.C[1] .sym 5534 $false .sym 5536 KEYBOARD.report[28] .sym 5537 KEYBOARD.report[29] .sym 5538 KEYBOARD.report[30] .sym 5539 KEYBOARD.report[31] .sym 5541 $techmap\KEYBOARD.$procmux$4894_Y[4] .sym 5542 $false .sym 5543 $false .sym 5544 $false .sym 5546 $techmap\KEYBOARD.$procmux$4894_Y[7] .sym 5547 $false .sym 5548 $false .sym 5549 $false .sym 5551 $techmap\KEYBOARD.$procmux$4894_Y[2] .sym 5552 $false .sym 5553 $false .sym 5554 $false .sym 5555 $auto$dff2dffe.cc:175:make_patterns_logic$52061 .sym 5556 CLK$2$2 .sym 5557 $0\KBD_FREEZE[0:0]$2 .sym 5632 $abc$60421$n594 .sym 5633 $auto$simplemap.cc:127:simplemap_reduce$33820[0] .sym 5634 $abc$60421$n856 .sym 5635 $abc$60421$n881_1 .sym 5637 $abc$60421$n583 .sym 5638 $abc$60421$n578 .sym 5639 $abc$60421$n577 .sym 5640 $abc$60421$n560 .sym 5642 $abc$60421$n579 .sym 5643 $abc$60421$n581 .sym 5644 $auto$simplemap.cc:309:simplemap_lut$44816 .sym 5645 $auto$simplemap.cc:250:simplemap_eqne$33874[2] .sym 5647 $abc$60421$n580 .sym 5648 $abc$60421$n582 .sym 5649 $abc$60421$n581 .sym 5650 $abc$60421$n579 .sym 5652 $abc$60421$n544_1 .sym 5653 $auto$simplemap.cc:309:simplemap_lut$44816 .sym 5654 $abc$60421$n555_1 .sym 5655 $false .sym 5657 $abc$60421$n579 .sym 5658 $auto$simplemap.cc:250:simplemap_eqne$33874[2] .sym 5659 $abc$60421$n722 .sym 5660 $false .sym 5662 KEYBOARD.report[7] .sym 5663 $auto$simplemap.cc:250:simplemap_eqne$53186[5] .sym 5664 $abc$60421$n607 .sym 5665 $false .sym 5667 KEYBOARD.report[0] .sym 5668 $auto$simplemap.cc:250:simplemap_eqne$53186[5] .sym 5669 $abc$60421$n614 .sym 5670 $false .sym 5671 $auto$dff2dffe.cc:175:make_patterns_logic$50377 .sym 5672 CLK$2$2 .sym 5673 $0\KBD_FREEZE[0:0]$2 .sym 5748 $abc$60421$n587_1 .sym 5749 $abc$60421$n555_1 .sym 5750 $false .sym 5751 $false .sym 5753 $abc$60421$n579 .sym 5754 $abc$60421$n581 .sym 5755 $auto$simplemap.cc:250:simplemap_eqne$33874[2] .sym 5756 $false .sym 5758 $abc$60421$n594 .sym 5759 $abc$60421$n582 .sym 5760 $false .sym 5761 $false .sym 5763 $abc$60421$n579 .sym 5764 $abc$60421$n573 .sym 5765 $abc$60421$n722 .sym 5766 $false .sym 5768 $abc$60421$n581 .sym 5769 $auto$dff2dffe.cc:175:make_patterns_logic$50051$2 .sym 5770 $false .sym 5771 $false .sym 5773 $abc$60421$n580 .sym 5774 $abc$60421$n609 .sym 5775 $abc$60421$n586 .sym 5776 $abc$60421$n544_1 .sym 5778 $auto$simplemap.cc:309:simplemap_lut$44816 .sym 5779 $auto$simplemap.cc:250:simplemap_eqne$33874[2] .sym 5780 $false .sym 5781 $false .sym 5783 $abc$60421$n606 .sym 5784 $abc$60421$n607 .sym 5785 $abc$60421$n608 .sym 5786 $false .sym 5826 $true .sym 5863 $auto$alumacc.cc:470:replace_alu$22811.C[1]$3 .sym 5864 $false .sym 5865 $auto$alumacc.cc:470:replace_alu$22811.C[1] .sym 5866 $false .sym 5867 $false .sym 5868 $auto$alumacc.cc:484:replace_alu$22923[1]$2 .sym 5870 $false .sym 5871 $auto$alumacc.cc:470:replace_alu$22811.BB[1] .sym 5877 $auto$alumacc.cc:484:replace_alu$22923[1]$2 .sym 5879 $false .sym 5880 $false .sym 5881 $auto$alumacc.cc:470:replace_alu$22811.C[1] .sym 5882 $true$2 .sym 5884 $abc$60421$n900 .sym 5885 $auto$wreduce.cc:310:run$22795[2] .sym 5886 $false .sym 5887 $false .sym 5889 $false .sym 5890 $false .sym 5891 $auto$alumacc.cc:470:replace_alu$22811.BB[2] .sym 5892 $auto$alumacc.cc:484:replace_alu$22923[1] .sym 5894 $false .sym 5895 I2C.FLT_SCL.counter[2] .sym 5896 $true$2 .sym 5897 $auto$alumacc.cc:484:replace_alu$22896[1] .sym 5899 KEYBOARD.COLS_SHADOW[1] .sym 5900 $false .sym 5901 $false .sym 5902 $false .sym 5903 $auto$dff2dffe.cc:175:make_patterns_logic$58440 .sym 5904 CLK$2$2 .sym 5905 $0\KBD_FREEZE[0:0]$2 .sym 6010 $auto$simplemap.cc:250:simplemap_eqne$33874[2] .sym 6011 KEYBOARD.row_counter[1] .sym 6012 $false .sym 6013 $false .sym 6202 $abc$60421$n646_1 .sym 6205 I2C_INPUT_DATA[1][3] .sym 6337 $abc$60421$n644 .sym 6338 $auto$alumacc.cc:483:replace_alu$22889[5] .sym 6339 $auto$alumacc.cc:484:replace_alu$22890[0] .sym 6340 $abc$60421$n642 .sym 6341 $auto$alumacc.cc:483:replace_alu$22889[4] .sym 6342 $auto$alumacc.cc:483:replace_alu$22889[3] .sym 6343 KBD_FREEZE .sym 6439 $abc$60421$n1062 .sym 6441 $techmap\KEYBOARD.$procmux$4894_Y[1] .sym 6442 $auto$alumacc.cc:483:replace_alu$22884[5] .sym 6444 KEYBOARD.report[36] .sym 6445 KEYBOARD.report[33] .sym 6540 $abc$60421$n575 .sym 6541 $abc$60421$n581 .sym 6542 $abc$60421$n728 .sym 6543 $abc$60421$n559 .sym 6544 $abc$60421$n574 .sym 6545 $abc$60421$n534_1 .sym 6546 KEYBOARD.report[59] .sym 6547 KEYBOARD.report[60] .sym 6642 $techmap\KEYBOARD.$procmux$4894_Y[3] .sym 6643 $abc$60421$n555_1 .sym 6644 $abc$60421$n727 .sym 6645 $abc$60421$n535 .sym 6646 $abc$60421$n722 .sym 6647 $abc$60421$n767 .sym 6648 $abc$60421$n582 .sym 6649 KEYBOARD.row_time[15] .sym 6744 $abc$60421$n947 .sym 6745 $abc$60421$n945 .sym 6746 $abc$60421$n643 .sym 6747 $abc$60421$n944 .sym 6748 $abc$60421$n927 .sym 6749 $abc$60421$n928 .sym 6750 KEYBOARD.report[35] .sym 6751 KEYBOARD.report[32] .sym 6846 $abc$60421$n812 .sym 6847 $abc$60421$n810 .sym 6848 $abc$60421$n809 .sym 6849 $abc$60421$n814 .sym 6850 $abc$60421$n929_1 .sym 6851 $abc$60421$n815 .sym 6852 $abc$60421$n946 .sym 6853 $abc$60421$n811 .sym 6948 $abc$60421$n954 .sym 6949 $abc$60421$n953_1 .sym 6951 $abc$60421$n932 .sym 6952 $abc$60421$n939 .sym 6953 $abc$60421$n949 .sym 6954 $abc$60421$n813 .sym 6955 KEYBOARD.report[57] .sym 7050 $abc$60421$n817 .sym 7051 $abc$60421$n843_1 .sym 7052 $abc$60421$n850 .sym 7053 $auto$dff2dffe.cc:175:make_patterns_logic$56016 .sym 7054 $abc$60421$n848 .sym 7055 $abc$60421$n847 .sym 7056 $abc$60421$n849 .sym 7057 KEYBOARD.report[25] .sym 7152 $abc$60421$n851_1 .sym 7153 $abc$60421$n844 .sym 7154 $abc$60421$n852 .sym 7155 $abc$60421$n787 .sym 7156 $abc$60421$n846 .sym 7157 KEYBOARD.report[61] .sym 7158 KEYBOARD.report[62] .sym 7159 KEYBOARD.report[58] .sym 7254 $abc$60421$n800 .sym 7255 $abc$60421$n791 .sym 7256 $abc$60421$n792_1 .sym 7257 $abc$60421$n793_1 .sym 7258 $abc$60421$n790 .sym 7259 $abc$60421$n796 .sym 7260 KEYBOARD.report[30] .sym 7261 KEYBOARD.report[24] .sym 7356 $abc$60421$n570 .sym 7357 $abc$60421$n730 .sym 7358 $abc$60421$n729 .sym 7359 $abc$60421$n732 .sym 7360 $abc$60421$n733 .sym 7361 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[2] .sym 7362 KEYBOARD.report[50] .sym 7363 KEYBOARD.report[51] .sym 7458 $abc$60421$n798 .sym 7459 $abc$60421$n603 .sym 7460 $abc$60421$n604 .sym 7461 $abc$60421$n797 .sym 7462 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[4] .sym 7463 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[1] .sym 7464 $abc$60421$n585 .sym 7465 $abc$60421$n588_1 .sym 7562 $auto$alumacc.cc:484:replace_alu$22896[1] .sym 7563 $abc$60421$n549 .sym 7564 $auto$dff2dffe.cc:175:make_patterns_logic$58440 .sym 7565 $auto$dff2dffe.cc:175:make_patterns_logic$57696 .sym 7566 $abc$60421$n546 .sym 7567 KEYBOARD.last_data[1] .sym 7666 $auto$alumacc.cc:484:replace_alu$22813[3] .sym 7668 $auto$alumacc.cc:470:replace_alu$22811.BB[3] .sym 7669 KEYBOARD.row_counter[0] .sym 7900 $auto$alumacc.cc:484:replace_alu$22861[7] .sym 7901 $auto$alumacc.cc:470:replace_alu$22837.BB[3] .sym 8015 $abc$60421$n1022 .sym 8016 $abc$60421$n660 .sym 8018 $abc$60421$n645 .sym 8020 KEYBOARD.row_time[1] .sym 8021 KEYBOARD.row_time[0] .sym 8145 I2C_INPUT_DATA[0][4] .sym 8146 I2C_INPUT_DATA[0][5] .sym 8147 I2C_INPUT_DATA[0][6] .sym 8148 I2C_INPUT_DATA[0][7] .sym 8160 I2C.received_byte[3] .sym 8161 $false .sym 8162 $false .sym 8163 $false .sym 8164 $auto$dff2dffe.cc:158:make_patterns_logic$44967 .sym 8165 CLK$2$2 .sym 8166 $false .sym 8167 $true$2 .sym 8168 KEYBOARD.report[20] .sym 8170 KEYBOARD.report[21] .sym 8172 KEYBOARD.report[17] .sym 8173 KEYBOARD.report[18] .sym 8246 I2C_INPUT_DATA[1][0] .sym 8247 I2C_INPUT_DATA[1][1] .sym 8248 I2C_INPUT_DATA[1][2] .sym 8249 I2C_INPUT_DATA[1][3] .sym 8251 $techmap\I2C.$procmux$12628_Y .sym 8252 I2C.byte_counter[5] .sym 8253 $false .sym 8254 $false .sym 8256 $techmap\I2C.$procmux$12628_Y .sym 8257 I2C.byte_counter[0] .sym 8258 $false .sym 8259 $false .sym 8261 $abc$60421$n643 .sym 8262 $abc$60421$n644 .sym 8263 $false .sym 8264 $false .sym 8266 $techmap\I2C.$procmux$12628_Y .sym 8267 I2C.byte_counter[4] .sym 8268 $false .sym 8269 $false .sym 8271 $techmap\I2C.$procmux$12628_Y .sym 8272 I2C.byte_counter[3] .sym 8273 $false .sym 8274 $false .sym 8276 $0\KBD_FREEZE[0:0]$2 .sym 8277 $false .sym 8278 $false .sym 8279 $false .sym 8280 $auto$dff2dffe.cc:175:make_patterns_logic$46096 .sym 8281 CLK$2$2 .sym 8282 $false .sym 8283 $techmap\KEYBOARD.$procmux$4894_Y[4] .sym 8284 $abc$60421$n1063 .sym 8285 $techmap\KEYBOARD.$procmux$4894_Y[2] .sym 8286 $abc$60421$n951 .sym 8287 $abc$60421$n952 .sym 8288 $abc$60421$n950 .sym 8289 KEYBOARD.report[4] .sym 8290 KEYBOARD.report[3] .sym 8362 $auto$alumacc.cc:483:replace_alu$22889[6] .sym 8363 $abc$60421$n1063 .sym 8364 $false .sym 8365 $false .sym 8372 $auto$simplemap.cc:250:simplemap_eqne$53186[5] .sym 8373 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[1] .sym 8374 $false .sym 8375 $false .sym 8377 $auto$alumacc.cc:483:replace_alu$22889[5] .sym 8378 $false .sym 8379 $false .sym 8380 $false .sym 8387 $techmap\KEYBOARD.$procmux$4894_Y[4] .sym 8388 $false .sym 8389 $false .sym 8390 $false .sym 8392 $techmap\KEYBOARD.$procmux$4894_Y[1] .sym 8393 $false .sym 8394 $false .sym 8395 $false .sym 8396 $auto$dff2dffe.cc:175:make_patterns_logic$53084 .sym 8397 CLK$2$2 .sym 8398 $0\KBD_FREEZE[0:0]$2 .sym 8399 $abc$60421$n779 .sym 8400 $abc$60421$n758 .sym 8401 $abc$60421$n776_1 .sym 8402 $abc$60421$n780 .sym 8403 $abc$60421$n778 .sym 8404 $abc$60421$n769 .sym 8405 $abc$60421$n943 .sym 8406 KEYBOARD.report[19] .sym 8473 $abc$60421$n556_1 .sym 8474 KEYBOARD.row_time[3] .sym 8475 KEYBOARD.row_time[2] .sym 8476 $false .sym 8478 $abc$60421$n575 .sym 8479 $abc$60421$n558 .sym 8480 KEYBOARD.row_time[0] .sym 8481 KEYBOARD.row_time[1] .sym 8483 KEYBOARD.row_time[0] .sym 8484 KEYBOARD.row_time[3] .sym 8485 KEYBOARD.row_time[1] .sym 8486 KEYBOARD.row_time[2] .sym 8488 KEYBOARD.row_time[0] .sym 8489 KEYBOARD.row_time[3] .sym 8490 KEYBOARD.row_time[1] .sym 8491 KEYBOARD.row_time[2] .sym 8493 $abc$60421$n575 .sym 8494 $abc$60421$n558 .sym 8495 KEYBOARD.row_time[0] .sym 8496 KEYBOARD.row_time[1] .sym 8498 KEYBOARD.row_time[0] .sym 8499 KEYBOARD.row_time[3] .sym 8500 KEYBOARD.row_time[1] .sym 8501 KEYBOARD.row_time[2] .sym 8503 $techmap\KEYBOARD.$procmux$4894_Y[3] .sym 8504 $false .sym 8505 $false .sym 8506 $false .sym 8508 $techmap\KEYBOARD.$procmux$4894_Y[4] .sym 8509 $false .sym 8510 $false .sym 8511 $false .sym 8512 $auto$dff2dffe.cc:175:make_patterns_logic$56016 .sym 8513 CLK$2$2 .sym 8514 $0\KBD_FREEZE[0:0]$2 .sym 8515 $abc$60421$n770 .sym 8516 $abc$60421$n757 .sym 8517 $auto$dff2dffe.cc:175:make_patterns_logic$51066 .sym 8518 $abc$60421$n1122 .sym 8519 $abc$60421$n771 .sym 8520 KEYBOARD.report[22] .sym 8521 KEYBOARD.report[23] .sym 8522 KEYBOARD.report[16] .sym 8589 $auto$simplemap.cc:250:simplemap_eqne$53186[5] .sym 8590 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[3] .sym 8591 $false .sym 8592 $false .sym 8594 $abc$60421$n556_1 .sym 8595 $abc$60421$n558 .sym 8596 $abc$60421$n559 .sym 8597 $false .sym 8599 $abc$60421$n556_1 .sym 8600 $abc$60421$n558 .sym 8601 $abc$60421$n728 .sym 8602 $false .sym 8604 KEYBOARD.row_time[14] .sym 8605 KEYBOARD.row_time[15] .sym 8606 KEYBOARD.row_time[9] .sym 8607 KEYBOARD.row_time[10] .sym 8609 $abc$60421$n556_1 .sym 8610 $abc$60421$n558 .sym 8611 $abc$60421$n723 .sym 8612 $false .sym 8614 $abc$60421$n556_1 .sym 8615 $abc$60421$n534_1 .sym 8616 $abc$60421$n558 .sym 8617 $false .sym 8619 $abc$60421$n556_1 .sym 8620 $abc$60421$n534_1 .sym 8621 $abc$60421$n558 .sym 8622 $false .sym 8624 $false .sym 8625 $false .sym 8626 KEYBOARD.row_time[15] .sym 8627 $auto$alumacc.cc:484:replace_alu$22905[14] .sym 8628 $auto$dff2dffe.cc:175:make_patterns_logic$50051$2 .sym 8629 CLK$2$2 .sym 8630 $auto$rtlil.cc:1692:NotGate$60414$2 .sym 8631 $abc$60421$n777 .sym 8632 $abc$60421$n941 .sym 8633 $abc$60421$n942 .sym 8634 $abc$60421$n926 .sym 8635 I2C_TX_REPORT[5] .sym 8636 I2C_TX_REPORT[6] .sym 8637 I2C_TX_REPORT[1] .sym 8638 I2C_TX_REPORT[3] .sym 8705 KEYBOARD.report[43] .sym 8706 KEYBOARD.report[59] .sym 8707 I2C.byte_counter[1] .sym 8708 $false .sym 8710 $abc$60421$n947 .sym 8711 $abc$60421$n946 .sym 8712 I2C.byte_counter[2] .sym 8713 $false .sym 8715 I2C_INPUT_DATA[1][4] .sym 8716 I2C_INPUT_DATA[1][5] .sym 8717 I2C_INPUT_DATA[1][6] .sym 8718 I2C_INPUT_DATA[1][7] .sym 8720 KEYBOARD.report[35] .sym 8721 KEYBOARD.report[51] .sym 8722 I2C.byte_counter[1] .sym 8723 $false .sym 8725 $abc$60421$n929_1 .sym 8726 $abc$60421$n928 .sym 8727 I2C.byte_counter[2] .sym 8728 $false .sym 8730 KEYBOARD.report[1] .sym 8731 KEYBOARD.report[17] .sym 8732 I2C.byte_counter[1] .sym 8733 $false .sym 8735 $techmap\KEYBOARD.$procmux$4894_Y[3] .sym 8736 $false .sym 8737 $false .sym 8738 $false .sym 8740 $techmap\KEYBOARD.$procmux$4894_Y[0] .sym 8741 $false .sym 8742 $false .sym 8743 $false .sym 8744 $auto$dff2dffe.cc:175:make_patterns_logic$53084 .sym 8745 CLK$2$2 .sym 8746 $0\KBD_FREEZE[0:0]$2 .sym 8747 $abc$60421$n963 .sym 8748 $abc$60421$n935 .sym 8749 $abc$60421$n965 .sym 8750 $abc$60421$n966 .sym 8751 $abc$60421$n964 .sym 8752 $abc$60421$n968_1 .sym 8753 $abc$60421$n936_1 .sym 8754 KEYBOARD.report[14] .sym 8821 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[7] .sym 8822 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[6] .sym 8823 KEYBOARD.report[38] .sym 8824 KEYBOARD.report[39] .sym 8826 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[2] .sym 8827 $abc$60421$n734 .sym 8828 KEYBOARD.report[34] .sym 8829 KEYBOARD.report[35] .sym 8831 $abc$60421$n719 .sym 8832 $abc$60421$n729 .sym 8833 KEYBOARD.report[32] .sym 8834 KEYBOARD.report[33] .sym 8836 KEYBOARD.report[36] .sym 8837 KEYBOARD.report[37] .sym 8838 KEYBOARD.report[38] .sym 8839 KEYBOARD.report[39] .sym 8841 KEYBOARD.report[33] .sym 8842 KEYBOARD.report[49] .sym 8843 I2C.byte_counter[1] .sym 8844 $false .sym 8846 KEYBOARD.report[32] .sym 8847 KEYBOARD.report[33] .sym 8848 KEYBOARD.report[34] .sym 8849 KEYBOARD.report[35] .sym 8851 KEYBOARD.report[11] .sym 8852 KEYBOARD.report[27] .sym 8853 I2C.byte_counter[1] .sym 8854 $false .sym 8856 $abc$60421$n797 .sym 8857 $abc$60421$n772 .sym 8858 KEYBOARD.report[36] .sym 8859 KEYBOARD.report[37] .sym 8863 $abc$60421$n819 .sym 8864 $abc$60421$n1118_1 .sym 8865 $abc$60421$n820 .sym 8866 $abc$60421$n972 .sym 8867 $abc$60421$n821 .sym 8868 $abc$60421$n826_1 .sym 8869 $abc$60421$n818 .sym 8870 KEYBOARD.report[49] .sym 8937 KEYBOARD.report[12] .sym 8938 KEYBOARD.report[44] .sym 8939 I2C.byte_counter[1] .sym 8940 I2C.byte_counter[2] .sym 8942 KEYBOARD.report[28] .sym 8943 KEYBOARD.report[60] .sym 8944 I2C.byte_counter[1] .sym 8945 I2C.byte_counter[2] .sym 8952 KEYBOARD.report[41] .sym 8953 KEYBOARD.report[57] .sym 8954 I2C.byte_counter[1] .sym 8955 $false .sym 8957 KEYBOARD.report[10] .sym 8958 KEYBOARD.report[42] .sym 8959 I2C.byte_counter[1] .sym 8960 I2C.byte_counter[2] .sym 8962 $abc$60421$n953_1 .sym 8963 $abc$60421$n954 .sym 8964 $abc$60421$n950 .sym 8965 $sub$top.v:74$27_Y[0] .sym 8967 $abc$60421$n814 .sym 8968 $abc$60421$n815 .sym 8969 $false .sym 8970 $false .sym 8972 $techmap\KEYBOARD.$procmux$4894_Y[1] .sym 8973 $false .sym 8974 $false .sym 8975 $false .sym 8976 $auto$dff2dffe.cc:175:make_patterns_logic$56016 .sym 8977 CLK$2$2 .sym 8978 $0\KBD_FREEZE[0:0]$2 .sym 8979 $abc$60421$n840 .sym 8980 $abc$60421$n841 .sym 8981 $abc$60421$n825 .sym 8982 $abc$60421$n833_1 .sym 8983 $abc$60421$n824 .sym 8984 $abc$60421$n831 .sym 8985 $abc$60421$n822 .sym 8986 KEYBOARD.last_data[13] .sym 9053 $abc$60421$n801 .sym 9054 $abc$60421$n818 .sym 9055 $false .sym 9056 $false .sym 9058 $auto$simplemap.cc:250:simplemap_eqne$53051[2] .sym 9059 $abc$60421$n844 .sym 9060 $abc$60421$n714 .sym 9061 KBD_FREEZE .sym 9063 $abc$60421$n794 .sym 9064 $abc$60421$n734 .sym 9065 KEYBOARD.report[58] .sym 9066 KEYBOARD.report[59] .sym 9068 $abc$60421$n848 .sym 9069 $auto$simplemap.cc:250:simplemap_eqne$53186[5] .sym 9070 $abc$60421$n843_1 .sym 9071 RESET .sym 9073 $abc$60421$n849 .sym 9074 $abc$60421$n850 .sym 9075 $abc$60421$n851_1 .sym 9076 $abc$60421$n852 .sym 9078 KEYBOARD.report[56] .sym 9079 KEYBOARD.report[57] .sym 9080 KEYBOARD.report[58] .sym 9081 KEYBOARD.report[59] .sym 9083 $abc$60421$n719 .sym 9084 $abc$60421$n729 .sym 9085 KEYBOARD.report[56] .sym 9086 KEYBOARD.report[57] .sym 9088 $techmap\KEYBOARD.$procmux$4894_Y[1] .sym 9089 $false .sym 9090 $false .sym 9091 $false .sym 9092 $auto$dff2dffe.cc:175:make_patterns_logic$52061 .sym 9093 CLK$2$2 .sym 9094 $0\KBD_FREEZE[0:0]$2 .sym 9095 $abc$60421$n832 .sym 9096 $abc$60421$n830 .sym 9097 $abc$60421$n960 .sym 9098 $abc$60421$n829 .sym 9099 $abc$60421$n834 .sym 9100 KEYBOARD.report[41] .sym 9101 KEYBOARD.report[46] .sym 9102 KEYBOARD.report[43] .sym 9169 $abc$60421$n797 .sym 9170 $abc$60421$n772 .sym 9171 KEYBOARD.report[60] .sym 9172 KEYBOARD.report[61] .sym 9174 $auto$simplemap.cc:250:simplemap_eqne$53186[5] .sym 9175 $abc$60421$n845 .sym 9176 $false .sym 9177 $false .sym 9179 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[7] .sym 9180 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[6] .sym 9181 KEYBOARD.report[62] .sym 9182 KEYBOARD.report[63] .sym 9184 $auto$dff2dffe.cc:175:make_patterns_logic$50051$2 .sym 9185 $abc$60421$n778 .sym 9186 $abc$60421$n788 .sym 9187 $false .sym 9189 KEYBOARD.report[60] .sym 9190 KEYBOARD.report[61] .sym 9191 KEYBOARD.report[62] .sym 9192 KEYBOARD.report[63] .sym 9194 $techmap\KEYBOARD.$procmux$4894_Y[5] .sym 9195 $false .sym 9196 $false .sym 9197 $false .sym 9199 $techmap\KEYBOARD.$procmux$4894_Y[6] .sym 9200 $false .sym 9201 $false .sym 9202 $false .sym 9204 $techmap\KEYBOARD.$procmux$4894_Y[2] .sym 9205 $false .sym 9206 $false .sym 9207 $false .sym 9208 $auto$dff2dffe.cc:175:make_patterns_logic$56016 .sym 9209 CLK$2$2 .sym 9210 $0\KBD_FREEZE[0:0]$2 .sym 9211 $abc$60421$n744 .sym 9212 $abc$60421$n974 .sym 9213 $abc$60421$n746 .sym 9214 $abc$60421$n747 .sym 9215 $abc$60421$n590 .sym 9216 $abc$60421$n748 .sym 9217 KEYBOARD.report[63] .sym 9218 KEYBOARD.report[56] .sym 9285 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[7] .sym 9286 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[6] .sym 9287 KEYBOARD.report[30] .sym 9288 KEYBOARD.report[31] .sym 9290 $abc$60421$n792_1 .sym 9291 $abc$60421$n793_1 .sym 9292 $abc$60421$n796 .sym 9293 $abc$60421$n800 .sym 9295 $abc$60421$n719 .sym 9296 $abc$60421$n729 .sym 9297 KEYBOARD.report[24] .sym 9298 KEYBOARD.report[25] .sym 9300 $abc$60421$n794 .sym 9301 $abc$60421$n734 .sym 9302 KEYBOARD.report[26] .sym 9303 KEYBOARD.report[27] .sym 9305 KEYBOARD.report[24] .sym 9306 KEYBOARD.report[25] .sym 9307 KEYBOARD.report[26] .sym 9308 KEYBOARD.report[27] .sym 9310 $abc$60421$n797 .sym 9311 $abc$60421$n772 .sym 9312 KEYBOARD.report[28] .sym 9313 KEYBOARD.report[29] .sym 9315 $techmap\KEYBOARD.$procmux$4894_Y[6] .sym 9316 $false .sym 9317 $false .sym 9318 $false .sym 9320 $techmap\KEYBOARD.$procmux$4894_Y[0] .sym 9321 $false .sym 9322 $false .sym 9323 $false .sym 9324 $auto$dff2dffe.cc:175:make_patterns_logic$52061 .sym 9325 CLK$2$2 .sym 9326 $0\KBD_FREEZE[0:0]$2 .sym 9327 $abc$60421$n773 .sym 9328 $abc$60421$n775_1 .sym 9329 $abc$60421$n794 .sym 9330 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[7] .sym 9331 $abc$60421$n601 .sym 9332 $abc$60421$n772 .sym 9333 $abc$60421$n543_1 .sym 9334 KEYBOARD.report[47] .sym 9401 $auto$rtlil.cc:1692:NotGate$60414$2 .sym 9402 KEYBOARD.row_counter[0] .sym 9403 KEYBOARD.row_counter[1] .sym 9404 KEYBOARD.last_data[10] .sym 9406 $abc$60421$n580 .sym 9407 $abc$60421$n594 .sym 9408 $abc$60421$n582 .sym 9409 $false .sym 9411 $abc$60421$n730 .sym 9412 $abc$60421$n731 .sym 9413 $abc$60421$n732 .sym 9414 $abc$60421$n733 .sym 9416 $abc$60421$n544_1 .sym 9417 $abc$60421$n587_1 .sym 9418 $abc$60421$n555_1 .sym 9419 $false .sym 9421 $abc$60421$n726 .sym 9422 $abc$60421$n583 .sym 9423 $abc$60421$n727 .sym 9424 $false .sym 9426 $auto$simplemap.cc:250:simplemap_eqne$33874[2] .sym 9427 $abc$60421$n599 .sym 9428 $abc$60421$n601 .sym 9429 $abc$60421$n600 .sym 9431 $techmap\KEYBOARD.$procmux$4894_Y[2] .sym 9432 $false .sym 9433 $false .sym 9434 $false .sym 9436 $techmap\KEYBOARD.$procmux$4894_Y[3] .sym 9437 $false .sym 9438 $false .sym 9439 $false .sym 9440 $auto$dff2dffe.cc:175:make_patterns_logic$54691 .sym 9441 CLK$2$2 .sym 9442 $0\KBD_FREEZE[0:0]$2 .sym 9443 $abc$60421$n774 .sym 9444 $abc$60421$n607 .sym 9445 $auto$simplemap.cc:309:simplemap_lut$44816 .sym 9446 $abc$60421$n739 .sym 9447 $abc$60421$n742 .sym 9448 $abc$60421$n740 .sym 9449 $abc$60421$n599 .sym 9450 $abc$60421$n741 .sym 9517 $abc$60421$n580 .sym 9518 $abc$60421$n767 .sym 9519 $false .sym 9520 $false .sym 9522 $abc$60421$n589 .sym 9523 $abc$60421$n544_1 .sym 9524 $abc$60421$n594 .sym 9525 $abc$60421$n555_1 .sym 9527 $abc$60421$n579 .sym 9528 $abc$60421$n573 .sym 9529 $abc$60421$n581 .sym 9530 $false .sym 9532 $abc$60421$n590 .sym 9533 $abc$60421$n798 .sym 9534 $abc$60421$n585 .sym 9535 $abc$60421$n799 .sym 9537 $abc$60421$n590 .sym 9538 $abc$60421$n585 .sym 9539 $abc$60421$n589 .sym 9540 $abc$60421$n588_1 .sym 9542 $abc$60421$n587_1 .sym 9543 $abc$60421$n599 .sym 9544 $abc$60421$n604 .sym 9545 $abc$60421$n603 .sym 9547 $abc$60421$n544_1 .sym 9548 $abc$60421$n586 .sym 9549 $false .sym 9550 $false .sym 9552 $abc$60421$n579 .sym 9553 $abc$60421$n573 .sym 9554 $abc$60421$n581 .sym 9555 $false .sym 9561 $auto$alumacc.cc:470:replace_alu$22811.B_buf[2] .sym 9562 $auto$alumacc.cc:484:replace_alu$22920[2] .sym 9563 $abc$60421$n548_1 .sym 9564 $auto$dff2dffe.cc:175:make_patterns_logic$58812 .sym 9565 $abc$60421$n545 .sym 9566 UART.tx_line .sym 9595 $true .sym 9632 I2C.FLT_SCL.counter[0]$2 .sym 9633 $false .sym 9634 I2C.FLT_SCL.counter[0] .sym 9635 $false .sym 9636 $false .sym 9637 $auto$alumacc.cc:484:replace_alu$22896[1]$2 .sym 9639 I2C.FLT_SCL.counter[1] .sym 9640 $true$2 .sym 9646 $auto$alumacc.cc:484:replace_alu$22896[1]$2 .sym 9648 $auto$rtlil.cc:1692:NotGate$60414$2 .sym 9649 KEYBOARD.row_counter[0] .sym 9650 KEYBOARD.row_counter[1] .sym 9651 KEYBOARD.last_data[9] .sym 9653 $abc$60421$n860 .sym 9654 $abc$60421$n594 .sym 9655 $auto$simplemap.cc:250:simplemap_eqne$33831[0] .sym 9656 $abc$60421$n863 .sym 9658 $abc$60421$n860 .sym 9659 $abc$60421$n590 .sym 9660 $auto$simplemap.cc:250:simplemap_eqne$33831[0] .sym 9661 $abc$60421$n863 .sym 9663 $auto$rtlil.cc:1692:NotGate$60414$2 .sym 9664 KEYBOARD.row_counter[0] .sym 9665 KEYBOARD.row_counter[1] .sym 9666 KEYBOARD.last_data[1] .sym 9668 KEYBOARD.COLS_SHADOW[1] .sym 9669 $false .sym 9670 $false .sym 9671 $false .sym 9672 $auto$dff2dffe.cc:175:make_patterns_logic$57696 .sym 9673 CLK$2$2 .sym 9674 $0\KBD_FREEZE[0:0]$2 .sym 9676 $auto$alumacc.cc:470:replace_alu$22811.BB[1] .sym 9677 $abc$60421$n709 .sym 9678 $auto$alumacc.cc:470:replace_alu$22811.BB[2] .sym 9679 $auto$alumacc.cc:470:replace_alu$22811.B_buf[3] .sym 9680 UART.tx_bit_counter[3] .sym 9682 UART.tx_bit_counter[2] .sym 9711 $true .sym 9748 $auto$alumacc.cc:470:replace_alu$22811.C[1]$2 .sym 9749 $false .sym 9750 $auto$alumacc.cc:470:replace_alu$22811.C[1] .sym 9751 $false .sym 9752 $false .sym 9753 $auto$alumacc.cc:470:replace_alu$22811.C[2] .sym 9755 $false .sym 9756 $auto$alumacc.cc:470:replace_alu$22811.BB[1] .sym 9758 $auto$alumacc.cc:470:replace_alu$22811.C[3] .sym 9760 $false .sym 9761 $auto$alumacc.cc:470:replace_alu$22811.BB[2] .sym 9763 $auto$alumacc.cc:484:replace_alu$22813[3]$2 .sym 9765 $false .sym 9766 $auto$alumacc.cc:470:replace_alu$22811.BB[3] .sym 9772 $auto$alumacc.cc:484:replace_alu$22813[3]$2 .sym 9779 $auto$alumacc.cc:470:replace_alu$22811.B_buf[3] .sym 9780 $false .sym 9781 $false .sym 9782 $false .sym 9784 $auto$simplemap.cc:250:simplemap_eqne$33874[2] .sym 9785 $false .sym 9786 $false .sym 9787 $false .sym 9788 $auto$dff2dffe.cc:175:make_patterns_logic$50051$2 .sym 9789 CLK$2$2 .sym 9790 $false .sym 9927 $true .sym 9964 $sub$top.v:74$27_Y[2]$2 .sym 9965 $false .sym 9966 $sub$top.v:74$27_Y[2] .sym 9967 $false .sym 9968 $false .sym 9969 $auto$alumacc.cc:484:replace_alu$22861[3] .sym 9971 $true$2 .sym 9972 $auto$alumacc.cc:470:replace_alu$22837.BB[3] .sym 9974 $auto$alumacc.cc:484:replace_alu$22861[4] .sym 9976 $false .sym 9977 $auto$alumacc.cc:483:replace_alu$22849[4] .sym 9979 $auto$alumacc.cc:484:replace_alu$22861[5] .sym 9981 $false .sym 9982 $auto$alumacc.cc:483:replace_alu$22849[5] .sym 9984 $auto$alumacc.cc:484:replace_alu$22861[6] .sym 9986 $false .sym 9987 $auto$alumacc.cc:483:replace_alu$22849[6] .sym 9989 $auto$alumacc.cc:484:replace_alu$22861[7]$2 .sym 9991 $false .sym 9992 $auto$alumacc.cc:483:replace_alu$22849[7] .sym 9998 $auto$alumacc.cc:484:replace_alu$22861[7]$2 .sym 10000 I2C.byte_counter[3] .sym 10001 $false .sym 10002 $false .sym 10003 $false .sym 10011 $auto$alumacc.cc:484:replace_alu$22850[7] .sym 10014 $abc$60421$n1024 .sym 10015 $abc$60421$n1023 .sym 10016 $abc$60421$n1021 .sym 10017 $sub$top.v:74$27_Y[2] .sym 10121 I2C_INPUT_DATA[0][2] .sym 10122 I2C_INPUT_DATA[0][3] .sym 10123 $false .sym 10124 $false .sym 10126 I2C_INPUT_DATA[0][0] .sym 10127 I2C_INPUT_DATA[0][2] .sym 10128 I2C_INPUT_DATA[0][3] .sym 10129 I2C_INPUT_DATA[0][1] .sym 10136 I2C_INPUT_DATA[0][0] .sym 10137 I2C_INPUT_DATA[0][2] .sym 10138 I2C_INPUT_DATA[0][3] .sym 10139 I2C_INPUT_DATA[0][1] .sym 10146 KEYBOARD.row_time[0] .sym 10147 KEYBOARD.row_time[1] .sym 10148 $false .sym 10149 $false .sym 10151 $false .sym 10152 $true$2 .sym 10153 KEYBOARD.row_time[0] .sym 10154 $false .sym 10160 $auto$dff2dffe.cc:175:make_patterns_logic$50051$2 .sym 10161 CLK$2$2 .sym 10162 $auto$rtlil.cc:1692:NotGate$60414$2 .sym 10164 $abc$60421$n1028 .sym 10165 $abc$60421$n1020_1 .sym 10167 $abc$60421$n1015 .sym 10168 I2C_INPUT_DATA[0][4] .sym 10237 $false .sym 10238 $false .sym 10239 $false .sym 10240 $false .sym 10242 $techmap\KEYBOARD.$procmux$4894_Y[4] .sym 10243 $false .sym 10244 $false .sym 10245 $false .sym 10252 $techmap\KEYBOARD.$procmux$4894_Y[5] .sym 10253 $false .sym 10254 $false .sym 10255 $false .sym 10262 $techmap\KEYBOARD.$procmux$4894_Y[1] .sym 10263 $false .sym 10264 $false .sym 10265 $false .sym 10267 $techmap\KEYBOARD.$procmux$4894_Y[2] .sym 10268 $false .sym 10269 $false .sym 10270 $false .sym 10276 $auto$dff2dffe.cc:175:make_patterns_logic$51066 .sym 10277 CLK$2$2 .sym 10278 $0\KBD_FREEZE[0:0]$2 .sym 10279 $techmap\KEYBOARD.$procmux$4894_Y[5] .sym 10280 $abc$60421$n1027 .sym 10282 $abc$60421$n1030 .sym 10283 $abc$60421$n1026 .sym 10284 $abc$60421$n1031 .sym 10286 I2C_OUTPUT_TYPE[2] .sym 10353 $auto$simplemap.cc:250:simplemap_eqne$53186[5] .sym 10354 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[4] .sym 10355 $false .sym 10356 $false .sym 10358 $abc$60421$n1064 .sym 10359 I2C.byte_counter[4] .sym 10360 I2C.byte_counter[5] .sym 10361 I2C.byte_counter[7] .sym 10363 $auto$simplemap.cc:250:simplemap_eqne$53186[5] .sym 10364 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[2] .sym 10365 $false .sym 10366 $false .sym 10368 KEYBOARD.report[20] .sym 10369 KEYBOARD.report[52] .sym 10370 I2C.byte_counter[2] .sym 10371 $false .sym 10373 KEYBOARD.report[4] .sym 10374 KEYBOARD.report[36] .sym 10375 I2C.byte_counter[2] .sym 10376 $false .sym 10378 $abc$60421$n952 .sym 10379 $abc$60421$n951 .sym 10380 I2C.byte_counter[1] .sym 10381 $false .sym 10383 $auto$simplemap.cc:250:simplemap_eqne$53186[5] .sym 10384 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[3] .sym 10385 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[2] .sym 10386 KEYBOARD.report[4] .sym 10388 KEYBOARD.report[3] .sym 10389 $auto$simplemap.cc:250:simplemap_eqne$53186[5] .sym 10390 $abc$60421$n1122 .sym 10391 $false .sym 10392 $auto$dff2dffe.cc:175:make_patterns_logic$50377 .sym 10393 CLK$2$2 .sym 10394 $0\KBD_FREEZE[0:0]$2 .sym 10395 $auto$dff2dffe.cc:175:make_patterns_logic$59498 .sym 10396 $abc$60421$n891 .sym 10399 $abc$60421$n921 .sym 10400 $2\I2C_OUT_DESC_MASK[7:0][7] .sym 10401 $abc$60421$n1064 .sym 10402 I2C_HID_DESC.last_rd_request .sym 10469 KEYBOARD.report[20] .sym 10470 KEYBOARD.report[21] .sym 10471 KEYBOARD.report[22] .sym 10472 KEYBOARD.report[23] .sym 10474 $auto$simplemap.cc:250:simplemap_eqne$53186[5] .sym 10475 $abc$60421$n769 .sym 10476 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[4] .sym 10477 KEYBOARD.report[20] .sym 10479 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[6] .sym 10480 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[2] .sym 10481 KEYBOARD.report[18] .sym 10482 KEYBOARD.report[22] .sym 10484 KEYBOARD.report[16] .sym 10485 KEYBOARD.report[17] .sym 10486 KEYBOARD.report[18] .sym 10487 KEYBOARD.report[19] .sym 10489 $abc$60421$n779 .sym 10490 $abc$60421$n780 .sym 10491 $false .sym 10492 $false .sym 10494 $abc$60421$n734 .sym 10495 KEYBOARD.report[19] .sym 10496 $false .sym 10497 $false .sym 10499 KEYBOARD.report[3] .sym 10500 KEYBOARD.report[19] .sym 10501 I2C.byte_counter[1] .sym 10502 $false .sym 10504 $techmap\KEYBOARD.$procmux$4894_Y[3] .sym 10505 $false .sym 10506 $false .sym 10507 $false .sym 10508 $auto$dff2dffe.cc:175:make_patterns_logic$51066 .sym 10509 CLK$2$2 .sym 10510 $0\KBD_FREEZE[0:0]$2 .sym 10511 $abc$60421$n924 .sym 10512 $abc$60421$n923 .sym 10514 $abc$60421$n1120 .sym 10515 $auto$dff2dffe.cc:175:make_patterns_logic$45135 .sym 10516 $abc$60421$n1216 .sym 10517 KEYBOARD.report[5] .sym 10518 KEYBOARD.report[2] .sym 10585 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[7] .sym 10586 $abc$60421$n729 .sym 10587 KEYBOARD.report[16] .sym 10588 KEYBOARD.report[23] .sym 10590 $abc$60421$n758 .sym 10591 $abc$60421$n770 .sym 10592 $abc$60421$n771 .sym 10593 $abc$60421$n776_1 .sym 10595 $abc$60421$n757 .sym 10596 $auto$simplemap.cc:250:simplemap_eqne$53051[2] .sym 10597 $abc$60421$n777 .sym 10598 $abc$60421$n716 .sym 10600 $abc$60421$n719 .sym 10601 $abc$60421$n729 .sym 10602 $abc$60421$n739 .sym 10603 $false .sym 10605 $abc$60421$n772 .sym 10606 $abc$60421$n719 .sym 10607 KEYBOARD.report[17] .sym 10608 KEYBOARD.report[21] .sym 10610 $techmap\KEYBOARD.$procmux$4894_Y[6] .sym 10611 $false .sym 10612 $false .sym 10613 $false .sym 10615 $techmap\KEYBOARD.$procmux$4894_Y[7] .sym 10616 $false .sym 10617 $false .sym 10618 $false .sym 10620 $techmap\KEYBOARD.$procmux$4894_Y[0] .sym 10621 $false .sym 10622 $false .sym 10623 $false .sym 10624 $auto$dff2dffe.cc:175:make_patterns_logic$51066 .sym 10625 CLK$2$2 .sym 10626 $0\KBD_FREEZE[0:0]$2 .sym 10627 $abc$60421$n958 .sym 10628 $abc$60421$n919 .sym 10629 $abc$60421$n959 .sym 10630 $abc$60421$n956_1 .sym 10631 $abc$60421$n1147_1 .sym 10632 $abc$60421$n957 .sym 10633 I2C_INPUT_DATA[1][4] .sym 10634 I2C_INPUT_DATA[1][7] .sym 10701 $abc$60421$n778 .sym 10702 $auto$simplemap.cc:250:simplemap_eqne$53186[5] .sym 10703 $auto$dff2dffe.cc:175:make_patterns_logic$50051$2 .sym 10704 $abc$60421$n714 .sym 10706 $abc$60421$n945 .sym 10707 $abc$60421$n942 .sym 10708 $abc$60421$n923 .sym 10709 $sub$top.v:74$27_Y[0] .sym 10711 $abc$60421$n944 .sym 10712 $abc$60421$n943 .sym 10713 I2C.byte_counter[2] .sym 10714 $false .sym 10716 $abc$60421$n930 .sym 10717 $abc$60421$n927 .sym 10718 $abc$60421$n923 .sym 10719 $sub$top.v:74$27_Y[0] .sym 10721 $abc$60421$n919 .sym 10722 $abc$60421$n956_1 .sym 10723 $false .sym 10724 $false .sym 10726 $abc$60421$n919 .sym 10727 $abc$60421$n963 .sym 10728 $false .sym 10729 $false .sym 10731 $abc$60421$n920 .sym 10732 $abc$60421$n926 .sym 10733 $auto$alumacc.cc:484:replace_alu$22839[7] .sym 10734 $auto$alumacc.cc:484:replace_alu$22861[7] .sym 10736 $abc$60421$n920 .sym 10737 $abc$60421$n941 .sym 10738 $auto$alumacc.cc:484:replace_alu$22839[7] .sym 10739 $auto$alumacc.cc:484:replace_alu$22861[7] .sym 10740 $auto$dff2dffe.cc:175:make_patterns_logic$45135 .sym 10741 CLK$2$2 .sym 10742 $auto$simplemap.cc:256:simplemap_eqne$23468$2 .sym 10743 $abc$60421$n1162 .sym 10744 $abc$60421$n1000 .sym 10745 $abc$60421$n937 .sym 10746 $abc$60421$n1148 .sym 10747 KEYBOARD.report[37] .sym 10748 KEYBOARD.report[34] .sym 10749 KEYBOARD.report[38] .sym 10750 KEYBOARD.report[39] .sym 10817 $abc$60421$n967 .sym 10818 $abc$60421$n968_1 .sym 10819 $abc$60421$n964 .sym 10820 $sub$top.v:74$27_Y[0] .sym 10822 $abc$60421$n937 .sym 10823 $abc$60421$n936_1 .sym 10824 I2C.byte_counter[1] .sym 10825 $false .sym 10827 KEYBOARD.report[22] .sym 10828 KEYBOARD.report[54] .sym 10829 I2C.byte_counter[2] .sym 10830 $false .sym 10832 KEYBOARD.report[6] .sym 10833 KEYBOARD.report[38] .sym 10834 I2C.byte_counter[2] .sym 10835 $false .sym 10837 $abc$60421$n966 .sym 10838 $abc$60421$n965 .sym 10839 I2C.byte_counter[1] .sym 10840 $false .sym 10842 KEYBOARD.report[14] .sym 10843 KEYBOARD.report[46] .sym 10844 I2C.byte_counter[1] .sym 10845 I2C.byte_counter[2] .sym 10847 KEYBOARD.report[18] .sym 10848 KEYBOARD.report[50] .sym 10849 I2C.byte_counter[2] .sym 10850 $false .sym 10852 $false .sym 10853 $false .sym 10854 $false .sym 10855 $false .sym 10856 $auto$dff2dffe.cc:175:make_patterns_logic$50579 .sym 10857 CLK$2$2 .sym 10858 $false .sym 10859 $abc$60421$n918 .sym 10860 $abc$60421$n1008_1 .sym 10861 $abc$60421$n1002 .sym 10862 $abc$60421$n973 .sym 10863 $abc$60421$n971_1 .sym 10864 $abc$60421$n1006 .sym 10865 $auto$dff2dffe.cc:175:make_patterns_logic$50377 .sym 10866 I2C_OUT_DESC_MASK[5] .sym 10933 $abc$60421$n719 .sym 10934 $abc$60421$n729 .sym 10935 KEYBOARD.report[40] .sym 10936 KEYBOARD.report[41] .sym 10938 $abc$60421$n719 .sym 10939 $abc$60421$n729 .sym 10940 $abc$60421$n739 .sym 10941 $false .sym 10943 $abc$60421$n794 .sym 10944 $abc$60421$n734 .sym 10945 KEYBOARD.report[42] .sym 10946 KEYBOARD.report[43] .sym 10948 KEYBOARD.report[23] .sym 10949 KEYBOARD.report[55] .sym 10950 I2C.byte_counter[2] .sym 10951 $false .sym 10953 $abc$60421$n797 .sym 10954 $abc$60421$n772 .sym 10955 KEYBOARD.report[44] .sym 10956 KEYBOARD.report[45] .sym 10958 KEYBOARD.report[40] .sym 10959 KEYBOARD.report[41] .sym 10960 KEYBOARD.report[42] .sym 10961 KEYBOARD.report[43] .sym 10963 $abc$60421$n819 .sym 10964 $abc$60421$n820 .sym 10965 $abc$60421$n821 .sym 10966 $abc$60421$n822 .sym 10968 $techmap\KEYBOARD.$procmux$4894_Y[1] .sym 10969 $false .sym 10970 $false .sym 10971 $false .sym 10972 $auto$dff2dffe.cc:175:make_patterns_logic$54691 .sym 10973 CLK$2$2 .sym 10974 $0\KBD_FREEZE[0:0]$2 .sym 10975 $abc$60421$n915_1 .sym 10976 $abc$60421$n917 .sym 10977 $abc$60421$n914 .sym 10978 $abc$60421$n913 .sym 10979 KEYBOARD.report[55] .sym 10980 KEYBOARD.report[48] .sym 10981 KEYBOARD.report[54] .sym 10982 KEYBOARD.report[53] .sym 11049 KEYBOARD.report[52] .sym 11050 KEYBOARD.report[53] .sym 11051 KEYBOARD.report[54] .sym 11052 KEYBOARD.report[55] .sym 11054 KEYBOARD.report[48] .sym 11055 KEYBOARD.report[49] .sym 11056 KEYBOARD.report[50] .sym 11057 KEYBOARD.report[51] .sym 11059 KEYBOARD.report[44] .sym 11060 KEYBOARD.report[45] .sym 11061 KEYBOARD.report[46] .sym 11062 KEYBOARD.report[47] .sym 11064 $abc$60421$n719 .sym 11065 $abc$60421$n729 .sym 11066 KEYBOARD.report[48] .sym 11067 KEYBOARD.report[49] .sym 11069 $abc$60421$n825 .sym 11070 $abc$60421$n826_1 .sym 11071 $false .sym 11072 $false .sym 11074 $abc$60421$n797 .sym 11075 $abc$60421$n772 .sym 11076 KEYBOARD.report[52] .sym 11077 KEYBOARD.report[53] .sym 11079 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[7] .sym 11080 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[6] .sym 11081 KEYBOARD.report[46] .sym 11082 KEYBOARD.report[47] .sym 11084 KEYBOARD.COLS_SHADOW[1] .sym 11085 $false .sym 11086 $false .sym 11087 $false .sym 11088 $auto$dff2dffe.cc:175:make_patterns_logic$58812 .sym 11089 CLK$2$2 .sym 11090 $0\KBD_FREEZE[0:0]$2 .sym 11091 $abc$60421$n795 .sym 11092 $abc$60421$n565 .sym 11093 $abc$60421$n717 .sym 11094 $abc$60421$n970 .sym 11095 $abc$60421$n718 .sym 11096 $abc$60421$n975 .sym 11097 $abc$60421$n571 .sym 11098 KEYBOARD.last_data[11] .sym 11165 $abc$60421$n747 .sym 11166 $abc$60421$n754 .sym 11167 KEYBOARD.report[55] .sym 11168 $false .sym 11170 $abc$60421$n831 .sym 11171 $abc$60421$n744 .sym 11172 $abc$60421$n832 .sym 11173 KEYBOARD.report[54] .sym 11175 KEYBOARD.report[29] .sym 11176 KEYBOARD.report[61] .sym 11177 I2C.byte_counter[1] .sym 11178 I2C.byte_counter[2] .sym 11180 $abc$60421$n830 .sym 11181 $abc$60421$n833_1 .sym 11182 $abc$60421$n834 .sym 11183 $false .sym 11185 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[2] .sym 11186 $abc$60421$n734 .sym 11187 KEYBOARD.report[50] .sym 11188 KEYBOARD.report[51] .sym 11190 $techmap\KEYBOARD.$procmux$4894_Y[1] .sym 11191 $false .sym 11192 $false .sym 11193 $false .sym 11195 $techmap\KEYBOARD.$procmux$4894_Y[6] .sym 11196 $false .sym 11197 $false .sym 11198 $false .sym 11200 $techmap\KEYBOARD.$procmux$4894_Y[3] .sym 11201 $false .sym 11202 $false .sym 11203 $false .sym 11204 $auto$dff2dffe.cc:175:make_patterns_logic$53393 .sym 11205 CLK$2$2 .sym 11206 $0\KBD_FREEZE[0:0]$2 .sym 11207 $abc$60421$n753 .sym 11208 $abc$60421$n743 .sym 11209 $abc$60421$n754 .sym 11210 $abc$60421$n752 .sym 11211 I2C_TX_REPORT[2] .sym 11212 I2C_TX_REPORT[7] .sym 11213 I2C_TX_REPORT[4] .sym 11214 I2C_TX_REPORT[0] .sym 11281 $abc$60421$n745 .sym 11282 $abc$60421$n746 .sym 11283 $abc$60421$n747 .sym 11284 $abc$60421$n748 .sym 11286 KEYBOARD.report[31] .sym 11287 KEYBOARD.report[63] .sym 11288 I2C.byte_counter[1] .sym 11289 I2C.byte_counter[2] .sym 11291 $abc$60421$n579 .sym 11292 $abc$60421$n583 .sym 11293 $abc$60421$n722 .sym 11294 $false .sym 11296 $abc$60421$n726 .sym 11297 $abc$60421$n573 .sym 11298 $abc$60421$n727 .sym 11299 $false .sym 11301 $auto$simplemap.cc:309:simplemap_lut$44816 .sym 11302 $auto$simplemap.cc:250:simplemap_eqne$33874[2] .sym 11303 $false .sym 11304 $false .sym 11306 $abc$60421$n544_1 .sym 11307 $auto$simplemap.cc:309:simplemap_lut$44816 .sym 11308 $abc$60421$n555_1 .sym 11309 $false .sym 11311 $techmap\KEYBOARD.$procmux$4894_Y[7] .sym 11312 $false .sym 11313 $false .sym 11314 $false .sym 11316 $techmap\KEYBOARD.$procmux$4894_Y[0] .sym 11317 $false .sym 11318 $false .sym 11319 $false .sym 11320 $auto$dff2dffe.cc:175:make_patterns_logic$56016 .sym 11321 CLK$2$2 .sym 11322 $0\KBD_FREEZE[0:0]$2 .sym 11323 $abc$60421$n611 .sym 11324 $abc$60421$n567_1 .sym 11325 $abc$60421$n784 .sym 11326 $auto$alumacc.cc:470:replace_alu$22821.AA[5] .sym 11327 $abc$60421$n569 .sym 11328 $abc$60421$n560 .sym 11329 $abc$60421$n572_1 .sym 11330 KEYBOARD.last_data[6] .sym 11397 $abc$60421$n561 .sym 11398 $abc$60421$n727 .sym 11399 KEYBOARD.COLS_SHADOW[3] .sym 11400 $false .sym 11402 $abc$60421$n579 .sym 11403 $abc$60421$n587_1 .sym 11404 $abc$60421$n722 .sym 11405 $false .sym 11407 $auto$simplemap.cc:250:simplemap_eqne$33874[2] .sym 11408 $abc$60421$n773 .sym 11409 $abc$60421$n795 .sym 11410 $abc$60421$n601 .sym 11412 $abc$60421$n543_1 .sym 11413 $abc$60421$n560 .sym 11414 $false .sym 11415 $false .sym 11417 $abc$60421$n544_1 .sym 11418 $abc$60421$n587_1 .sym 11419 $abc$60421$n555_1 .sym 11420 $false .sym 11422 $abc$60421$n543_1 .sym 11423 $abc$60421$n773 .sym 11424 $abc$60421$n774 .sym 11425 $abc$60421$n775_1 .sym 11427 $abc$60421$n544_1 .sym 11428 $auto$simplemap.cc:309:simplemap_lut$44816 .sym 11429 $auto$simplemap.cc:250:simplemap_eqne$33874[2] .sym 11430 $abc$60421$n555_1 .sym 11432 $techmap\KEYBOARD.$procmux$4894_Y[7] .sym 11433 $false .sym 11434 $false .sym 11435 $false .sym 11436 $auto$dff2dffe.cc:175:make_patterns_logic$53393 .sym 11437 CLK$2$2 .sym 11438 $0\KBD_FREEZE[0:0]$2 .sym 11439 $abc$60421$n761 .sym 11440 $abc$60421$n763 .sym 11441 $abc$60421$n589 .sym 11442 $abc$60421$n764_1 .sym 11443 $abc$60421$n768_1 .sym 11444 $abc$60421$n760 .sym 11445 $auto$simplemap.cc:250:simplemap_eqne$53186[5] .sym 11446 I2C.SCL_LAST .sym 11513 $abc$60421$n580 .sym 11514 $abc$60421$n583 .sym 11515 $abc$60421$n767 .sym 11516 $false .sym 11518 $abc$60421$n561 .sym 11519 $abc$60421$n574 .sym 11520 $abc$60421$n583 .sym 11521 KEYBOARD.COLS_SHADOW[3] .sym 11523 $auto$rtlil.cc:1692:NotGate$60414$2 .sym 11524 KEYBOARD.row_counter[0] .sym 11525 KEYBOARD.row_counter[1] .sym 11526 $false .sym 11528 $abc$60421$n740 .sym 11529 $abc$60421$n741 .sym 11530 $abc$60421$n742 .sym 11531 $false .sym 11533 $abc$60421$n726 .sym 11534 $auto$simplemap.cc:250:simplemap_eqne$33874[2] .sym 11535 $abc$60421$n727 .sym 11536 $false .sym 11538 $abc$60421$n579 .sym 11539 $abc$60421$n594 .sym 11540 $abc$60421$n722 .sym 11541 $false .sym 11543 $abc$60421$n561 .sym 11544 $abc$60421$n574 .sym 11545 KEYBOARD.COLS_SHADOW[3] .sym 11546 $false .sym 11548 $abc$60421$n544_1 .sym 11549 $abc$60421$n587_1 .sym 11550 $abc$60421$n555_1 .sym 11551 $false .sym 11555 $abc$60421$n547 .sym 11556 $abc$60421$n858 .sym 11557 $auto$simplemap.cc:250:simplemap_eqne$33831[0] .sym 11558 $auto$dff2dffe.cc:175:make_patterns_logic$58068 .sym 11559 $abc$60421$n762 .sym 11560 $abc$60421$n544_1 .sym 11561 $abc$60421$n860 .sym 11562 KEYBOARD.last_data[5] .sym 11591 $true .sym 11628 UART.tx_bit_counter[0]$2 .sym 11629 $false .sym 11630 UART.tx_bit_counter[0] .sym 11631 $false .sym 11632 $false .sym 11633 $auto$alumacc.cc:484:replace_alu$22920[1] .sym 11635 UART.tx_bit_counter[1] .sym 11636 $true$2 .sym 11638 $auto$alumacc.cc:484:replace_alu$22920[2]$2 .sym 11639 $false .sym 11640 UART.tx_bit_counter[2] .sym 11641 $true$2 .sym 11642 $auto$alumacc.cc:484:replace_alu$22920[1] .sym 11647 $auto$alumacc.cc:484:replace_alu$22920[2]$2 .sym 11649 KEYBOARD.row_counter[1] .sym 11650 KEYBOARD.last_data[13] .sym 11651 $auto$rtlil.cc:1692:NotGate$60414$2 .sym 11652 KEYBOARD.row_counter[0] .sym 11654 $abc$60421$n860 .sym 11655 $abc$60421$n573 .sym 11656 $auto$simplemap.cc:250:simplemap_eqne$33831[0] .sym 11657 $abc$60421$n863 .sym 11659 $abc$60421$n548_1 .sym 11660 $abc$60421$n547 .sym 11661 $abc$60421$n546 .sym 11662 $abc$60421$n549 .sym 11664 $abc$60421$n1101 .sym 11665 $abc$60421$n1096 .sym 11666 $auto$alumacc.cc:484:replace_alu$22813[3] .sym 11667 $techmap\UART.$sub$uart.v:38$347_Y[0] .sym 11668 $auto$dff2dffe.cc:175:make_patterns_logic$49554 .sym 11669 CLK$2$2 .sym 11670 $eq$top.v:152$130_Y .sym 11671 $0\KBD_FREEZE[0:0] .sym 11673 $abc$60421$n554 .sym 11676 $auto$dff2dffe.cc:175:make_patterns_logic$57616 .sym 11677 $auto$alumacc.cc:470:replace_alu$22811.C[1] .sym 11678 KEYBOARD.last_data[0] .sym 11750 UART.tx_bit_counter[0] .sym 11751 UART.tx_bit_counter[1] .sym 11752 $false .sym 11753 $false .sym 11755 UART.tx_bit_counter[0] .sym 11756 UART.tx_bit_counter[1] .sym 11757 UART.tx_bit_counter[2] .sym 11758 UART.tx_bit_counter[3] .sym 11760 $auto$alumacc.cc:470:replace_alu$22811.B_buf[2] .sym 11761 $false .sym 11762 $false .sym 11763 $false .sym 11765 $false .sym 11766 UART.tx_bit_counter[3] .sym 11767 $true$2 .sym 11768 $auto$alumacc.cc:484:replace_alu$22920[2] .sym 11770 $auto$alumacc.cc:470:replace_alu$22811.B_buf[3] .sym 11771 $false .sym 11772 $false .sym 11773 $false .sym 11780 $auto$alumacc.cc:470:replace_alu$22811.B_buf[2] .sym 11781 $false .sym 11782 $false .sym 11783 $false .sym 11784 $auto$dff2dffe.cc:175:make_patterns_logic$49554 .sym 11785 CLK$2$2 .sym 11786 $eq$top.v:152$130_Y .sym 11861 $auto$dff2dffe.cc:175:make_patterns_logic$48057 .sym 11924 $true .sym 11961 $auto$alumacc.cc:483:replace_alu$22849[0]$3 .sym 11962 $false .sym 11963 $auto$alumacc.cc:483:replace_alu$22849[0] .sym 11964 $false .sym 11965 $false .sym 11966 $auto$alumacc.cc:484:replace_alu$22850[1] .sym 11968 $false .sym 11969 $0$memwr$\I2C_INPUT_DATA$top.v:63$1_ADDR[3:0]$8[1] .sym 11971 $auto$alumacc.cc:484:replace_alu$22850[2] .sym 11973 $true$2 .sym 11974 $sub$top.v:74$27_Y[2] .sym 11976 $auto$alumacc.cc:484:replace_alu$22850[3] .sym 11978 $true$2 .sym 11979 $auto$alumacc.cc:470:replace_alu$22837.BB[3] .sym 11981 $auto$alumacc.cc:484:replace_alu$22850[4] .sym 11983 $false .sym 11984 $auto$alumacc.cc:483:replace_alu$22849[4] .sym 11986 $auto$alumacc.cc:484:replace_alu$22850[5] .sym 11988 $false .sym 11989 $auto$alumacc.cc:483:replace_alu$22849[5] .sym 11991 $auto$alumacc.cc:484:replace_alu$22850[6] .sym 11993 $false .sym 11994 $auto$alumacc.cc:483:replace_alu$22849[6] .sym 11996 $auto$alumacc.cc:484:replace_alu$22850[7]$2 .sym 11998 $false .sym 11999 $auto$alumacc.cc:483:replace_alu$22849[7] .sym 12008 $auto$alumacc.cc:484:replace_alu$22839[7] .sym 12009 $abc$60421$n648 .sym 12010 $abc$60421$n659_1 .sym 12011 $abc$60421$n661 .sym 12012 I2C_INPUT_DATA[2][2] .sym 12013 I2C_INPUT_DATA[2][0] .sym 12014 I2C_INPUT_DATA[2][1] .sym 12015 I2C_INPUT_DATA[2][3] .sym 12121 $auto$alumacc.cc:484:replace_alu$22850[7]$2 .sym 12133 $abc$60421$n982 .sym 12134 $abc$60421$n1022 .sym 12135 I2C_INPUT_DATA[0][0] .sym 12136 I2C_INPUT_DATA[0][1] .sym 12138 $abc$60421$n982 .sym 12139 $abc$60421$n1022 .sym 12140 I2C_INPUT_DATA[0][0] .sym 12141 I2C_INPUT_DATA[0][1] .sym 12143 $abc$60421$n982 .sym 12144 $abc$60421$n1022 .sym 12145 I2C_INPUT_DATA[0][0] .sym 12146 I2C_INPUT_DATA[0][1] .sym 12148 I2C.byte_counter[2] .sym 12149 $false .sym 12150 $false .sym 12151 $false .sym 12160 $abc$60421$n639 .sym 12161 $abc$60421$n649 .sym 12162 $abc$60421$n1016 .sym 12163 $abc$60421$n1017 .sym 12164 $abc$60421$n656 .sym 12165 $abc$60421$n1019 .sym 12166 $abc$60421$n663 .sym 12167 I2C_INPUT_DATA[2][5] .sym 12239 $abc$60421$n1021 .sym 12240 $abc$60421$n1024 .sym 12241 $false .sym 12242 $false .sym 12244 $abc$60421$n1024 .sym 12245 $abc$60421$n1021 .sym 12246 I2C_OUTPUT_TYPE[0] .sym 12247 $abc$60421$n1023 .sym 12254 $abc$60421$n1020_1 .sym 12255 $abc$60421$n1016 .sym 12256 I2C_OUTPUT_TYPE[0] .sym 12257 $abc$60421$n671_1 .sym 12259 I2C.received_byte[4] .sym 12260 $false .sym 12261 $false .sym 12262 $false .sym 12273 $memory\I2C_INPUT_DATA$wren[0][0][0]$y$23284$2 .sym 12274 CLK$2$2 .sym 12275 $false .sym 12276 $abc$60421$n620 .sym 12277 $abc$60421$n634 .sym 12280 $auto$simplemap.cc:256:simplemap_eqne$23468 .sym 12283 I2C_INPUT_DATA[2][4] .sym 12350 $auto$simplemap.cc:250:simplemap_eqne$53186[5] .sym 12351 $auto$alumacc.cc:470:replace_alu$22821.AA[5] .sym 12352 $false .sym 12353 $false .sym 12355 I2C_OUTPUT_TYPE[1] .sym 12356 $abc$60421$n1028 .sym 12357 $abc$60421$n671_1 .sym 12358 $abc$60421$n1023 .sym 12365 $abc$60421$n671_1 .sym 12366 $abc$60421$n1031 .sym 12367 $abc$60421$n1016 .sym 12368 I2C_OUTPUT_TYPE[2] .sym 12370 I2C_OUTPUT_TYPE[1] .sym 12371 $abc$60421$n671_1 .sym 12372 $abc$60421$n1027 .sym 12373 $abc$60421$n1016 .sym 12375 $abc$60421$n1028 .sym 12376 $abc$60421$n1023 .sym 12377 $false .sym 12378 $false .sym 12385 $abc$60421$n1030 .sym 12386 $2\INT[0:0] .sym 12387 $false .sym 12388 $false .sym 12389 $auto$dff2dffe.cc:175:make_patterns_logic$48057$2 .sym 12390 CLK$2$2 .sym 12391 $0\KBD_FREEZE[0:0]$2 .sym 12392 $auto$dff2dffe.cc:175:make_patterns_logic$48057 .sym 12393 $abc$60421$n1146 .sym 12396 $abc$60421$n1135_1 .sym 12397 $abc$60421$n1143 .sym 12398 $auto$dff2dffe.cc:175:make_patterns_logic$45905 .sym 12399 INT .sym 12466 RESET .sym 12467 $abc$60421$n891 .sym 12468 I2C.wr .sym 12469 $false .sym 12471 I2C_OUTPUT_TYPE[0] .sym 12472 I2C_OUTPUT_TYPE[1] .sym 12473 I2C_HID_DESC.last_rd_request .sym 12474 $false .sym 12486 I2C.byte_counter[4] .sym 12487 I2C.byte_counter[5] .sym 12488 I2C.byte_counter[6] .sym 12489 I2C.byte_counter[7] .sym 12491 $abc$60421$n1026 .sym 12492 $abc$60421$n1030 .sym 12493 $abc$60421$n1015 .sym 12494 $2\INT[0:0] .sym 12496 I2C.byte_counter[1] .sym 12497 I2C.byte_counter[3] .sym 12498 I2C.byte_counter[2] .sym 12499 I2C.byte_counter[0] .sym 12501 I2C.wr .sym 12502 $false .sym 12503 $false .sym 12504 $false .sym 12505 $true .sym 12506 CLK$2$2 .sym 12507 $0\KBD_FREEZE[0:0]$2 .sym 12508 $abc$60421$n1199 .sym 12509 $abc$60421$n1144 .sym 12510 $abc$60421$n1198 .sym 12511 $abc$60421$n1171 .sym 12512 $abc$60421$n922_1 .sym 12513 $abc$60421$n1139 .sym 12514 $abc$60421$n1142 .sym 12515 KEYBOARD.isr .sym 12582 I2C.byte_counter[1] .sym 12583 I2C.byte_counter[3] .sym 12584 I2C.byte_counter[2] .sym 12585 I2C.byte_counter[0] .sym 12587 $abc$60421$n921 .sym 12588 $abc$60421$n924 .sym 12589 $false .sym 12590 $false .sym 12597 $abc$60421$n719 .sym 12598 $abc$60421$n729 .sym 12599 $abc$60421$n739 .sym 12600 $false .sym 12602 $abc$60421$n617 .sym 12603 I2C.is_read .sym 12604 $false .sym 12605 $false .sym 12607 $abc$60421$n617 .sym 12608 $abc$60421$n1200 .sym 12609 I2C.is_read .sym 12610 $auto$alumacc.cc:484:replace_alu$22850[7] .sym 12612 KEYBOARD.report[5] .sym 12613 $auto$simplemap.cc:250:simplemap_eqne$53186[5] .sym 12614 $abc$60421$n795 .sym 12615 $false .sym 12617 KEYBOARD.report[2] .sym 12618 $auto$simplemap.cc:250:simplemap_eqne$53186[5] .sym 12619 $abc$60421$n1120 .sym 12620 $false .sym 12621 $auto$dff2dffe.cc:175:make_patterns_logic$50377 .sym 12622 CLK$2$2 .sym 12623 $0\KBD_FREEZE[0:0]$2 .sym 12624 $abc$60421$n1175 .sym 12625 $abc$60421$n920 .sym 12626 $abc$60421$n1145 .sym 12627 $abc$60421$n1176 .sym 12628 $abc$60421$n1151 .sym 12629 $abc$60421$n1189 .sym 12630 $abc$60421$n1141 .sym 12631 $abc$60421$n1188 .sym 12698 KEYBOARD.report[21] .sym 12699 KEYBOARD.report[53] .sym 12700 I2C.byte_counter[2] .sym 12701 $false .sym 12703 $abc$60421$n920 .sym 12704 $abc$60421$n923 .sym 12705 $auto$alumacc.cc:484:replace_alu$22861[7] .sym 12706 $auto$alumacc.cc:484:replace_alu$22839[7] .sym 12708 KEYBOARD.report[5] .sym 12709 KEYBOARD.report[37] .sym 12710 I2C.byte_counter[2] .sym 12711 $false .sym 12713 $abc$60421$n960 .sym 12714 $abc$60421$n961 .sym 12715 $abc$60421$n957 .sym 12716 $sub$top.v:74$27_Y[0] .sym 12718 I2C.byte_counter[1] .sym 12719 I2C.byte_counter[3] .sym 12720 I2C.byte_counter[2] .sym 12721 I2C.byte_counter[0] .sym 12723 $abc$60421$n959 .sym 12724 $abc$60421$n958 .sym 12725 I2C.byte_counter[1] .sym 12726 $false .sym 12728 I2C.received_byte[4] .sym 12729 $false .sym 12730 $false .sym 12731 $false .sym 12733 I2C.received_byte[7] .sym 12734 $false .sym 12735 $false .sym 12736 $false .sym 12737 $auto$dff2dffe.cc:158:make_patterns_logic$44967 .sym 12738 CLK$2$2 .sym 12739 $false .sym 12740 $abc$60421$n1187 .sym 12741 $abc$60421$n1186 .sym 12742 $auto$rtlil.cc:1692:NotGate$60416 .sym 12743 $abc$60421$n1161_1 .sym 12744 $abc$60421$n1193 .sym 12745 $abc$60421$n1131 .sym 12746 I2C_OUTPUT_TYPE[1] .sym 12747 I2C_OUTPUT_TYPE[0] .sym 12814 I2C.byte_counter[1] .sym 12815 I2C.byte_counter[3] .sym 12816 I2C.byte_counter[2] .sym 12817 I2C.byte_counter[0] .sym 12819 I2C_TX_REPORT[1] .sym 12820 I2C_HID_DESC.VAL[1] .sym 12821 I2C_OUT_DESC_MASK[1] .sym 12822 $false .sym 12824 KEYBOARD.report[2] .sym 12825 KEYBOARD.report[34] .sym 12826 I2C.byte_counter[2] .sym 12827 $false .sym 12829 $abc$60421$n921 .sym 12830 $abc$60421$n1147_1 .sym 12831 $false .sym 12832 $false .sym 12834 $techmap\KEYBOARD.$procmux$4894_Y[5] .sym 12835 $false .sym 12836 $false .sym 12837 $false .sym 12839 $techmap\KEYBOARD.$procmux$4894_Y[2] .sym 12840 $false .sym 12841 $false .sym 12842 $false .sym 12844 $techmap\KEYBOARD.$procmux$4894_Y[6] .sym 12845 $false .sym 12846 $false .sym 12847 $false .sym 12849 $techmap\KEYBOARD.$procmux$4894_Y[7] .sym 12850 $false .sym 12851 $false .sym 12852 $false .sym 12853 $auto$dff2dffe.cc:175:make_patterns_logic$53084 .sym 12854 CLK$2$2 .sym 12855 $0\KBD_FREEZE[0:0]$2 .sym 12856 $abc$60421$n1089_1 .sym 12857 $abc$60421$n1090 .sym 12858 $abc$60421$n1010 .sym 12859 UART_TX_DATA[0] .sym 12860 UART_TX_DATA[4] .sym 12861 UART_TX_DATA[1] .sym 12862 UART_TX_DATA[6] .sym 12863 UART_TX_DATA[2] .sym 12930 KEYBOARD.report[8] .sym 12931 KEYBOARD.report[40] .sym 12932 I2C.byte_counter[1] .sym 12933 I2C.byte_counter[2] .sym 12935 I2C_TX_REPORT[5] .sym 12936 I2C_HID_DESC.VAL[5] .sym 12937 I2C_OUT_DESC_MASK[5] .sym 12938 $false .sym 12940 I2C_TX_REPORT[2] .sym 12941 I2C_HID_DESC.VAL[2] .sym 12942 I2C_OUT_DESC_MASK[2] .sym 12943 $false .sym 12945 KEYBOARD.report[7] .sym 12946 KEYBOARD.report[39] .sym 12947 I2C.byte_counter[2] .sym 12948 $false .sym 12950 $abc$60421$n973 .sym 12951 $abc$60421$n972 .sym 12952 I2C.byte_counter[1] .sym 12953 $false .sym 12955 I2C_TX_REPORT[4] .sym 12956 I2C_HID_DESC.VAL[4] .sym 12957 I2C_OUT_DESC_MASK[4] .sym 12958 $false .sym 12960 $abc$60421$n714 .sym 12961 $auto$dff2dffe.cc:175:make_patterns_logic$50051$2 .sym 12962 $auto$dff2dffe.cc:175:make_patterns_logic$50579 .sym 12963 $false .sym 12965 $2\I2C_OUT_DESC_MASK[7:0][7] .sym 12966 $false .sym 12967 $false .sym 12968 $false .sym 12969 $auto$dff2dffe.cc:175:make_patterns_logic$48057$2 .sym 12970 CLK$2$2 .sym 12971 $0\KBD_FREEZE[0:0]$2 .sym 12972 $abc$60421$n1101 .sym 12974 $abc$60421$n1102 .sym 12975 $abc$60421$n865 .sym 12976 $abc$60421$n1103 .sym 12977 $auto$dff2dffe.cc:175:make_patterns_logic$57905 .sym 12978 $abc$60421$n870 .sym 12979 KEYBOARD.last_data[3] .sym 13046 KEYBOARD.report[16] .sym 13047 KEYBOARD.report[48] .sym 13048 I2C.byte_counter[2] .sym 13049 $false .sym 13051 KEYBOARD.report[24] .sym 13052 KEYBOARD.report[56] .sym 13053 I2C.byte_counter[1] .sym 13054 I2C.byte_counter[2] .sym 13056 $abc$60421$n916 .sym 13057 $abc$60421$n915_1 .sym 13058 I2C.byte_counter[1] .sym 13059 $false .sym 13061 $abc$60421$n917 .sym 13062 $abc$60421$n918 .sym 13063 $abc$60421$n914 .sym 13064 $sub$top.v:74$27_Y[0] .sym 13066 $techmap\KEYBOARD.$procmux$4894_Y[7] .sym 13067 $false .sym 13068 $false .sym 13069 $false .sym 13071 $techmap\KEYBOARD.$procmux$4894_Y[0] .sym 13072 $false .sym 13073 $false .sym 13074 $false .sym 13076 $techmap\KEYBOARD.$procmux$4894_Y[6] .sym 13077 $false .sym 13078 $false .sym 13079 $false .sym 13081 $techmap\KEYBOARD.$procmux$4894_Y[5] .sym 13082 $false .sym 13083 $false .sym 13084 $false .sym 13085 $auto$dff2dffe.cc:175:make_patterns_logic$54691 .sym 13086 CLK$2$2 .sym 13087 $0\KBD_FREEZE[0:0]$2 .sym 13088 $abc$60421$n566 .sym 13089 $auto$dff2dffe.cc:175:make_patterns_logic$58649 .sym 13090 $abc$60421$n564 .sym 13091 $abc$60421$n883 .sym 13092 $abc$60421$n562 .sym 13093 $auto$dff2dffe.cc:175:make_patterns_logic$59021 .sym 13094 $abc$60421$n563 .sym 13095 KEYBOARD.last_data[15] .sym 13162 $abc$60421$n579 .sym 13163 $abc$60421$n594 .sym 13164 $abc$60421$n722 .sym 13165 $false .sym 13167 $auto$rtlil.cc:1692:NotGate$60414$2 .sym 13168 KEYBOARD.row_counter[0] .sym 13169 KEYBOARD.row_counter[1] .sym 13170 KEYBOARD.last_data[11] .sym 13172 $abc$60421$n714 .sym 13173 $abc$60421$n743 .sym 13174 $abc$60421$n718 .sym 13175 $auto$dff2dffe.cc:175:make_patterns_logic$50051$2 .sym 13177 $abc$60421$n974 .sym 13178 $abc$60421$n975 .sym 13179 $abc$60421$n971_1 .sym 13180 $sub$top.v:74$27_Y[0] .sym 13182 $abc$60421$n719 .sym 13183 $abc$60421$n729 .sym 13184 $abc$60421$n734 .sym 13185 $abc$60421$n739 .sym 13187 KEYBOARD.report[15] .sym 13188 KEYBOARD.report[47] .sym 13189 I2C.byte_counter[1] .sym 13190 I2C.byte_counter[2] .sym 13192 $auto$rtlil.cc:1692:NotGate$60414$2 .sym 13193 KEYBOARD.row_counter[0] .sym 13194 KEYBOARD.row_counter[1] .sym 13195 KEYBOARD.last_data[2] .sym 13197 $techmap\KEYBOARD.$procmux$3661_Y .sym 13198 $false .sym 13199 $false .sym 13200 $false .sym 13201 $auto$dff2dffe.cc:175:make_patterns_logic$58649 .sym 13202 CLK$2$2 .sym 13203 $0\KBD_FREEZE[0:0]$2 .sym 13204 $abc$60421$n724 .sym 13205 $abc$60421$n720 .sym 13206 $abc$60421$n719 .sym 13207 $abc$60421$n735 .sym 13208 $auto$dff2dffe.cc:175:make_patterns_logic$58277 .sym 13209 $abc$60421$n877 .sym 13210 $abc$60421$n725 .sym 13211 KEYBOARD.last_data[7] .sym 13278 $abc$60421$n579 .sym 13279 $abc$60421$n587_1 .sym 13280 $abc$60421$n722 .sym 13281 $false .sym 13283 $abc$60421$n744 .sym 13284 $abc$60421$n749 .sym 13285 $abc$60421$n752 .sym 13286 $false .sym 13288 $abc$60421$n544_1 .sym 13289 $abc$60421$n590 .sym 13290 $abc$60421$n555_1 .sym 13291 $false .sym 13293 $abc$60421$n735 .sym 13294 $abc$60421$n753 .sym 13295 $abc$60421$n754 .sym 13296 $abc$60421$n755 .sym 13298 $abc$60421$n919 .sym 13299 $abc$60421$n934 .sym 13300 $false .sym 13301 $false .sym 13303 $abc$60421$n919 .sym 13304 $abc$60421$n970 .sym 13305 $false .sym 13306 $false .sym 13308 $abc$60421$n919 .sym 13309 $abc$60421$n949 .sym 13310 $false .sym 13311 $false .sym 13313 $abc$60421$n913 .sym 13314 $abc$60421$n919 .sym 13315 $false .sym 13316 $false .sym 13317 $auto$dff2dffe.cc:175:make_patterns_logic$45135 .sym 13318 CLK$2$2 .sym 13319 $auto$simplemap.cc:256:simplemap_eqne$23468$2 .sym 13320 $auto$dff2dffe.cc:175:make_patterns_logic$58172 .sym 13321 $abc$60421$n881_1 .sym 13322 $abc$60421$n568 .sym 13323 $abc$60421$n766 .sym 13324 $abc$60421$n875 .sym 13325 $abc$60421$n887_1 .sym 13326 $auto$dff2dffe.cc:175:make_patterns_logic$58916 .sym 13327 KEYBOARD.last_data[14] .sym 13394 $abc$60421$n579 .sym 13395 $abc$60421$n587_1 .sym 13396 $abc$60421$n581 .sym 13397 $false .sym 13399 $abc$60421$n569 .sym 13400 $abc$60421$n568 .sym 13401 $abc$60421$n570 .sym 13402 $abc$60421$n571 .sym 13404 $abc$60421$n768_1 .sym 13405 $abc$60421$n764_1 .sym 13406 $abc$60421$n760 .sym 13407 $abc$60421$n714 .sym 13409 $abc$60421$n543_1 .sym 13410 $abc$60421$n611 .sym 13411 $abc$60421$n612 .sym 13412 $false .sym 13414 KEYBOARD.row_counter[1] .sym 13415 KEYBOARD.last_data[6] .sym 13416 $auto$rtlil.cc:1692:NotGate$60414$2 .sym 13417 KEYBOARD.row_counter[0] .sym 13419 $abc$60421$n561 .sym 13420 $abc$60421$n572_1 .sym 13421 $abc$60421$n574 .sym 13422 KEYBOARD.COLS_SHADOW[3] .sym 13424 $abc$60421$n573 .sym 13425 $abc$60421$n555_1 .sym 13426 $false .sym 13427 $false .sym 13429 $techmap\KEYBOARD.$procmux$3661_Y .sym 13430 $false .sym 13431 $false .sym 13432 $false .sym 13433 $auto$dff2dffe.cc:175:make_patterns_logic$58172 .sym 13434 CLK$2$2 .sym 13435 $0\KBD_FREEZE[0:0]$2 .sym 13436 $abc$60421$n855 .sym 13437 $abc$60421$n866 .sym 13438 $abc$60421$n580 .sym 13439 $abc$60421$n857_1 .sym 13440 $abc$60421$n593 .sym 13441 $abc$60421$n765 .sym 13442 $techmap\KEYBOARD.$procmux$3193_Y .sym 13443 KEYBOARD.last_data[4] .sym 13510 $abc$60421$n544_1 .sym 13511 KEYBOARD.is_pressed .sym 13512 $abc$60421$n762 .sym 13513 $abc$60421$n555_1 .sym 13515 $abc$60421$n561 .sym 13516 $abc$60421$n727 .sym 13517 KEYBOARD.COLS_SHADOW[3] .sym 13518 KEYBOARD.is_pressed .sym 13520 $abc$60421$n590 .sym 13521 $abc$60421$n550 .sym 13522 $abc$60421$n582 .sym 13523 KEYBOARD.COLS_SHADOW[0] .sym 13525 $abc$60421$n765 .sym 13526 $abc$60421$n767 .sym 13527 $false .sym 13528 $false .sym 13530 $abc$60421$n550 .sym 13531 KEYBOARD.is_pressed .sym 13532 KEYBOARD.COLS_SHADOW[0] .sym 13533 $abc$60421$n582 .sym 13535 $abc$60421$n555_1 .sym 13536 $abc$60421$n763 .sym 13537 $abc$60421$n761 .sym 13538 $abc$60421$n722 .sym 13540 $abc$60421$n768_1 .sym 13541 $abc$60421$n764_1 .sym 13542 $abc$60421$n760 .sym 13543 $false .sym 13545 I2C.FLT_SCL.out .sym 13546 $false .sym 13547 $false .sym 13548 $false .sym 13549 $true .sym 13550 CLK$2$2 .sym 13551 $false .sym 13552 $abc$60421$n861 .sym 13553 $abc$60421$n863 .sym 13554 $abc$60421$n859 .sym 13555 $abc$60421$n867 .sym 13556 $abc$60421$n872 .sym 13557 $auto$dff2dffe.cc:175:make_patterns_logic$58732 .sym 13558 $abc$60421$n854 .sym 13559 KEYBOARD.last_data[12] .sym 13626 $auto$rtlil.cc:1692:NotGate$60414$2 .sym 13627 KEYBOARD.row_counter[0] .sym 13628 KEYBOARD.row_counter[1] .sym 13629 KEYBOARD.last_data[5] .sym 13631 $auto$simplemap.cc:250:simplemap_eqne$33831[0] .sym 13632 $abc$60421$n582 .sym 13633 $abc$60421$n590 .sym 13634 $false .sym 13636 $false .sym 13637 $true$2 .sym 13638 $false .sym 13639 $false .sym 13641 $abc$60421$n860 .sym 13642 $abc$60421$n583 .sym 13643 $auto$simplemap.cc:250:simplemap_eqne$33831[0] .sym 13644 $abc$60421$n863 .sym 13646 $abc$60421$n550 .sym 13647 $abc$60421$n545 .sym 13648 $auto$simplemap.cc:250:simplemap_eqne$33831[0] .sym 13649 KEYBOARD.COLS_SHADOW[1] .sym 13651 $abc$60421$n545 .sym 13652 $abc$60421$n550 .sym 13653 $auto$simplemap.cc:250:simplemap_eqne$33831[0] .sym 13654 KEYBOARD.COLS_SHADOW[1] .sym 13656 $abc$60421$n555_1 .sym 13657 $auto$dff2dffe.cc:175:make_patterns_logic$50051$2 .sym 13658 $false .sym 13659 $false .sym 13661 KEYBOARD.COLS_SHADOW[1] .sym 13662 $false .sym 13663 $false .sym 13664 $false .sym 13665 $auto$dff2dffe.cc:175:make_patterns_logic$58068 .sym 13666 CLK$2$2 .sym 13667 $0\KBD_FREEZE[0:0]$2 .sym 13668 $abc$60421$n553 .sym 13669 $abc$60421$n552_1 .sym 13670 $abc$60421$n551 .sym 13671 $auto$dff2dffe.cc:175:make_patterns_logic$57988 .sym 13672 $abc$60421$n550 .sym 13674 $auto$dff2dffe.cc:175:make_patterns_logic$58360 .sym 13675 KEYBOARD.last_data[8] .sym 13742 RESET .sym 13743 $false .sym 13744 $false .sym 13745 $false .sym 13752 $auto$rtlil.cc:1692:NotGate$60414$2 .sym 13753 KEYBOARD.row_counter[0] .sym 13754 KEYBOARD.row_counter[1] .sym 13755 KEYBOARD.last_data[0] .sym 13767 $abc$60421$n859 .sym 13768 $abc$60421$n858 .sym 13769 $abc$60421$n854 .sym 13770 $false .sym 13772 $auto$alumacc.cc:470:replace_alu$22811.B_buf[0] .sym 13773 $false .sym 13774 $false .sym 13775 $false .sym 13777 $techmap\KEYBOARD.$procmux$3193_Y .sym 13778 $false .sym 13779 $false .sym 13780 $false .sym 13781 $auto$dff2dffe.cc:175:make_patterns_logic$57616 .sym 13782 CLK$2$2 .sym 13783 $0\KBD_FREEZE[0:0]$2 .sym 13828 $0\KBD_FREEZE[0:0] .sym 13858 $auto$simplemap.cc:256:simplemap_eqne$23468 .sym 13884 $auto$alumacc.cc:483:replace_alu$22849[4] .sym 13887 $auto$alumacc.cc:483:replace_alu$22849[5] .sym 13888 $auto$alumacc.cc:483:replace_alu$22849[6] .sym 13889 $0$memwr$\I2C_INPUT_DATA$top.v:63$1_ADDR[3:0]$8[1] .sym 13890 $add$top.v:47$12_Y[0] .sym 13891 rststate[0] .sym 13921 $true .sym 13958 $auto$alumacc.cc:483:replace_alu$22849[0]$2 .sym 13959 $false .sym 13960 $auto$alumacc.cc:483:replace_alu$22849[0] .sym 13961 $false .sym 13962 $false .sym 13963 $auto$alumacc.cc:470:replace_alu$22837.C[2] .sym 13965 $true$2 .sym 13966 $0$memwr$\I2C_INPUT_DATA$top.v:63$1_ADDR[3:0]$8[1] .sym 13968 $auto$alumacc.cc:470:replace_alu$22837.C[3] .sym 13970 $false .sym 13971 $sub$top.v:74$27_Y[2] .sym 13973 $auto$alumacc.cc:470:replace_alu$22837.C[4] .sym 13975 $false .sym 13976 $auto$alumacc.cc:470:replace_alu$22837.BB[3] .sym 13978 $auto$alumacc.cc:470:replace_alu$22837.C[5] .sym 13980 $false .sym 13981 $auto$alumacc.cc:483:replace_alu$22849[4] .sym 13983 $auto$alumacc.cc:470:replace_alu$22837.C[6] .sym 13985 $false .sym 13986 $auto$alumacc.cc:483:replace_alu$22849[5] .sym 13988 $auto$alumacc.cc:470:replace_alu$22837.C[7] .sym 13990 $false .sym 13991 $auto$alumacc.cc:483:replace_alu$22849[6] .sym 13993 $auto$alumacc.cc:484:replace_alu$22839[7]$2 .sym 13995 $false .sym 13996 $auto$alumacc.cc:483:replace_alu$22849[7] .sym 14005 $abc$60421$n641 .sym 14006 $abc$60421$n977_1 .sym 14007 $abc$60421$n658_1 .sym 14009 $abc$60421$n982 .sym 14010 $abc$60421$n640 .sym 14012 last_wr .sym 14118 $auto$alumacc.cc:484:replace_alu$22839[7]$2 .sym 14120 I2C_INPUT_DATA[2][1] .sym 14121 I2C_INPUT_DATA[2][0] .sym 14122 I2C_INPUT_DATA[2][2] .sym 14123 I2C_INPUT_DATA[2][3] .sym 14125 $abc$60421$n650 .sym 14126 $abc$60421$n660 .sym 14127 I2C_INPUT_DATA[2][2] .sym 14128 I2C_INPUT_DATA[2][3] .sym 14130 I2C_INPUT_DATA[2][1] .sym 14131 I2C_INPUT_DATA[3][0] .sym 14132 I2C_INPUT_DATA[3][1] .sym 14133 I2C_INPUT_DATA[2][0] .sym 14135 I2C.received_byte[2] .sym 14136 $false .sym 14137 $false .sym 14138 $false .sym 14140 I2C.received_byte[0] .sym 14141 $false .sym 14142 $false .sym 14143 $false .sym 14145 I2C.received_byte[1] .sym 14146 $false .sym 14147 $false .sym 14148 $false .sym 14150 I2C.received_byte[3] .sym 14151 $false .sym 14152 $false .sym 14153 $false .sym 14154 $auto$dff2dffe.cc:158:make_patterns_logic$49819 .sym 14155 CLK$2$2 .sym 14156 $false .sym 14157 $abc$60421$n978 .sym 14158 $abc$60421$n637 .sym 14159 $abc$60421$n979 .sym 14160 $abc$60421$n638 .sym 14161 $abc$60421$n980 .sym 14162 $abc$60421$n657 .sym 14163 $abc$60421$n662 .sym 14164 I2C_INPUT_DATA[3][0] .sym 14231 $abc$60421$n640 .sym 14232 $abc$60421$n649 .sym 14233 $abc$60421$n651 .sym 14234 $abc$60421$n656 .sym 14236 $abc$60421$n650 .sym 14237 I2C_INPUT_DATA[2][6] .sym 14238 I2C_INPUT_DATA[2][7] .sym 14239 $false .sym 14241 $abc$60421$n640 .sym 14242 $abc$60421$n1017 .sym 14243 $abc$60421$n1019 .sym 14244 I2C_INPUT_DATA[3][0] .sym 14246 $abc$60421$n651 .sym 14247 $abc$60421$n1018 .sym 14248 $false .sym 14249 $false .sym 14251 I2C_INPUT_DATA[2][5] .sym 14252 I2C_INPUT_DATA[3][0] .sym 14253 I2C_INPUT_DATA[2][4] .sym 14254 I2C_INPUT_DATA[3][1] .sym 14256 $abc$60421$n649 .sym 14257 I2C_INPUT_DATA[2][5] .sym 14258 I2C_INPUT_DATA[2][4] .sym 14259 I2C_INPUT_DATA[3][1] .sym 14261 I2C_INPUT_DATA[2][5] .sym 14262 I2C_INPUT_DATA[2][4] .sym 14263 I2C_INPUT_DATA[2][6] .sym 14264 I2C_INPUT_DATA[2][7] .sym 14266 I2C.received_byte[5] .sym 14267 $false .sym 14268 $false .sym 14269 $false .sym 14270 $auto$dff2dffe.cc:158:make_patterns_logic$49819 .sym 14271 CLK$2$2 .sym 14272 $false .sym 14273 $abc$60421$n680 .sym 14274 $abc$60421$n636 .sym 14275 $auto$rtlil.cc:1692:NotGate$60252 .sym 14276 $abc$60421$n625 .sym 14277 $abc$60421$n621 .sym 14278 $abc$60421$n632 .sym 14279 $abc$60421$n618 .sym 14280 $auto$dff2dffe.cc:175:make_patterns_logic$46377 .sym 14347 $abc$60421$n621 .sym 14348 $2\INT[0:0] .sym 14349 $false .sym 14350 $false .sym 14352 I2C_OUTPUT_TYPE[2] .sym 14353 I2C_OUTPUT_TYPE[0] .sym 14354 I2C_OUTPUT_TYPE[1] .sym 14355 $auto$alumacc.cc:484:replace_alu$22868[7] .sym 14367 I2C_OUTPUT_TYPE[2] .sym 14368 I2C_OUTPUT_TYPE[0] .sym 14369 I2C_OUTPUT_TYPE[1] .sym 14370 $false .sym 14382 I2C.received_byte[4] .sym 14383 $false .sym 14384 $false .sym 14385 $false .sym 14386 $auto$dff2dffe.cc:158:make_patterns_logic$49819 .sym 14387 CLK$2$2 .sym 14388 $false .sym 14389 $abc$60421$n630 .sym 14390 $abc$60421$n631 .sym 14391 $auto$simplemap.cc:127:simplemap_reduce$45588[1] .sym 14392 $auto$dff2dffe.cc:175:make_patterns_logic$45702 .sym 14393 $abc$60421$n629 .sym 14394 $abc$60421$n1210 .sym 14395 $abc$60421$n617 .sym 14396 I2C_INPUT_DATA[4][2] .sym 14463 I2C.is_read .sym 14464 $abc$60421$n620 .sym 14465 $abc$60421$n629 .sym 14466 $false .sym 14468 I2C.byte_counter[4] .sym 14469 I2C.byte_counter[5] .sym 14470 I2C.byte_counter[6] .sym 14471 I2C.byte_counter[7] .sym 14483 I2C.byte_counter[4] .sym 14484 I2C.byte_counter[6] .sym 14485 I2C.byte_counter[7] .sym 14486 $false .sym 14488 I2C.byte_counter[1] .sym 14489 I2C.byte_counter[3] .sym 14490 I2C.byte_counter[2] .sym 14491 I2C.byte_counter[0] .sym 14493 $abc$60421$n634 .sym 14494 I2C.is_read .sym 14495 $abc$60421$n620 .sym 14496 $abc$60421$n629 .sym 14498 $2\INT[0:0] .sym 14499 $false .sym 14500 $false .sym 14501 $false .sym 14502 $auto$dff2dffe.cc:175:make_patterns_logic$45905 .sym 14503 CLK$2$2 .sym 14504 $0\KBD_FREEZE[0:0]$2 .sym 14505 $abc$60421$n1209 .sym 14506 $abc$60421$n1153 .sym 14507 $abc$60421$n1200 .sym 14508 $abc$60421$n1170 .sym 14509 $abc$60421$n1197 .sym 14510 $abc$60421$n1206 .sym 14511 $abc$60421$n1205_1 .sym 14512 $abc$60421$n1181 .sym 14579 $abc$60421$n1146 .sym 14580 $abc$60421$n1139 .sym 14581 $abc$60421$n924 .sym 14582 $false .sym 14584 I2C.byte_counter[1] .sym 14585 I2C.byte_counter[3] .sym 14586 I2C.byte_counter[2] .sym 14587 I2C.byte_counter[0] .sym 14589 $abc$60421$n1144 .sym 14590 $abc$60421$n1134 .sym 14591 $abc$60421$n1199 .sym 14592 $false .sym 14594 $abc$60421$n1153 .sym 14595 I2C.byte_counter[5] .sym 14596 $abc$60421$n922_1 .sym 14597 $abc$60421$n1135_1 .sym 14599 I2C.byte_counter[1] .sym 14600 I2C.byte_counter[3] .sym 14601 I2C.byte_counter[2] .sym 14602 I2C.byte_counter[0] .sym 14604 $abc$60421$n1135_1 .sym 14605 I2C.byte_counter[5] .sym 14606 $false .sym 14607 $false .sym 14609 $abc$60421$n1143 .sym 14610 $abc$60421$n1144 .sym 14611 $false .sym 14612 $false .sym 14614 $auto$simplemap.cc:250:simplemap_eqne$53051[2] .sym 14615 $false .sym 14616 $false .sym 14617 $false .sym 14618 $auto$dff2dffe.cc:175:make_patterns_logic$50051$2 .sym 14619 CLK$2$2 .sym 14620 $false .sym 14621 $abc$60421$n1169 .sym 14622 $abc$60421$n1160 .sym 14623 $abc$60421$n1150 .sym 14624 $abc$60421$n1194_1 .sym 14625 $abc$60421$n1173 .sym 14626 $abc$60421$n1196 .sym 14627 $abc$60421$n1190 .sym 14628 I2C_HID_DESC.VAL[3] .sym 14695 $abc$60421$n1176 .sym 14696 $abc$60421$n1146 .sym 14697 $abc$60421$n1064 .sym 14698 $abc$60421$n1134 .sym 14700 $abc$60421$n921 .sym 14701 $abc$60421$n922_1 .sym 14702 $false .sym 14703 $false .sym 14705 $abc$60421$n1147_1 .sym 14706 $abc$60421$n1064 .sym 14707 $abc$60421$n1146 .sym 14708 $false .sym 14710 $abc$60421$n922_1 .sym 14711 $abc$60421$n1162 .sym 14712 $false .sym 14713 $false .sym 14715 $abc$60421$n1139 .sym 14716 $abc$60421$n921 .sym 14717 $false .sym 14718 $false .sym 14720 $abc$60421$n1146 .sym 14721 $abc$60421$n1158 .sym 14722 $abc$60421$n1162 .sym 14723 $abc$60421$n1134 .sym 14725 $abc$60421$n1146 .sym 14726 $abc$60421$n1142 .sym 14727 $auto$rtlil.cc:1692:NotGate$60416 .sym 14728 $abc$60421$n1145 .sym 14730 $abc$60421$n1158 .sym 14731 $abc$60421$n1151 .sym 14732 $auto$rtlil.cc:1692:NotGate$60416 .sym 14733 $abc$60421$n1145 .sym 14737 $abc$60421$n1149 .sym 14738 $abc$60421$n1202 .sym 14739 $abc$60421$n1185 .sym 14740 $abc$60421$n1168_1 .sym 14741 $abc$60421$n1192 .sym 14742 I2C_HID_DESC.VAL[4] .sym 14743 I2C_HID_DESC.VAL[1] .sym 14744 I2C_HID_DESC.VAL[2] .sym 14811 $abc$60421$n1143 .sym 14812 $abc$60421$n1139 .sym 14813 $abc$60421$n1179 .sym 14814 $false .sym 14816 $abc$60421$n1187 .sym 14817 $abc$60421$n1188 .sym 14818 $abc$60421$n1189 .sym 14819 $abc$60421$n1148 .sym 14821 I2C_OUTPUT_TYPE[0] .sym 14822 I2C_OUTPUT_TYPE[1] .sym 14823 $false .sym 14824 $false .sym 14826 $abc$60421$n1147_1 .sym 14827 $abc$60421$n1162 .sym 14828 $abc$60421$n1139 .sym 14829 $false .sym 14831 $abc$60421$n1187 .sym 14832 $abc$60421$n1161_1 .sym 14833 $abc$60421$n1148 .sym 14834 $auto$rtlil.cc:1692:NotGate$60416 .sym 14836 $abc$60421$n1132 .sym 14837 $abc$60421$n1141 .sym 14838 $abc$60421$n923 .sym 14839 $abc$60421$n1148 .sym 14841 $abc$60421$n1026 .sym 14842 $2\INT[0:0] .sym 14843 $false .sym 14844 $false .sym 14846 $abc$60421$n1015 .sym 14847 $2\INT[0:0] .sym 14848 $false .sym 14849 $false .sym 14850 $auto$dff2dffe.cc:175:make_patterns_logic$48057$2 .sym 14851 CLK$2$2 .sym 14852 $0\KBD_FREEZE[0:0]$2 .sym 14853 $abc$60421$n1177 .sym 14854 $abc$60421$n1159 .sym 14855 $abc$60421$n1178 .sym 14856 $abc$60421$n1204 .sym 14857 $abc$60421$n1208 .sym 14858 $abc$60421$n1130 .sym 14859 $abc$60421$n1179 .sym 14860 I2C_HID_DESC.VAL[6] .sym 14927 $abc$60421$n1006 .sym 14928 $abc$60421$n998 .sym 14929 $techmap\I2C.$sub$i2c_slave.v:142$207_Y[2] .sym 14930 $false .sym 14932 $abc$60421$n1010 .sym 14933 $abc$60421$n1002 .sym 14934 $techmap\I2C.$sub$i2c_slave.v:142$207_Y[2] .sym 14935 $false .sym 14937 I2C_TX_REPORT[6] .sym 14938 I2C_HID_DESC.VAL[6] .sym 14939 I2C_OUT_DESC_MASK[6] .sym 14940 $false .sym 14942 I2C.received_byte[0] .sym 14943 $abc$60421$n998 .sym 14944 I2C.is_read .sym 14945 $false .sym 14947 I2C.received_byte[4] .sym 14948 $abc$60421$n1006 .sym 14949 I2C.is_read .sym 14950 $false .sym 14952 I2C.received_byte[1] .sym 14953 $abc$60421$n1000 .sym 14954 I2C.is_read .sym 14955 $false .sym 14957 I2C.received_byte[6] .sym 14958 $abc$60421$n1010 .sym 14959 I2C.is_read .sym 14960 $false .sym 14962 I2C.received_byte[2] .sym 14963 $abc$60421$n1002 .sym 14964 I2C.is_read .sym 14965 $false .sym 14966 $auto$dff2dffe.cc:175:make_patterns_logic$45702 .sym 14967 CLK$2$2 .sym 14968 $auto$rtlil.cc:1692:NotGate$60252 .sym 14970 $abc$60421$n1099 .sym 14971 $abc$60421$n1004 .sym 14972 $memory\I2C_INPUT_DATA$wren[0][0][0]$y$23284 .sym 14973 $auto$simplemap.cc:127:simplemap_reduce$33820[0] .sym 14974 $abc$60421$n1096 .sym 14976 I2C.received_byte[1] .sym 15043 $abc$60421$n1103 .sym 15044 $abc$60421$n1102 .sym 15045 $abc$60421$n1097 .sym 15046 $false .sym 15053 UART_TX_DATA[4] .sym 15054 UART_TX_DATA[0] .sym 15055 $techmap\UART.$sub$uart.v:38$347_Y[2] .sym 15056 $false .sym 15058 $abc$60421$n590 .sym 15059 $auto$simplemap.cc:127:simplemap_reduce$33860[0] .sym 15060 $abc$60421$n868 .sym 15061 $abc$60421$n866 .sym 15063 UART_TX_DATA[6] .sym 15064 UART_TX_DATA[2] .sym 15065 $techmap\UART.$sub$uart.v:38$347_Y[2] .sym 15066 $false .sym 15068 $abc$60421$n590 .sym 15069 $auto$simplemap.cc:127:simplemap_reduce$33820[0] .sym 15070 $abc$60421$n856 .sym 15071 $abc$60421$n870 .sym 15073 $abc$60421$n590 .sym 15074 $auto$simplemap.cc:127:simplemap_reduce$33860[0] .sym 15075 $abc$60421$n868 .sym 15076 $abc$60421$n866 .sym 15078 $techmap\KEYBOARD.$procmux$3661_Y .sym 15079 $false .sym 15080 $false .sym 15081 $false .sym 15082 $auto$dff2dffe.cc:175:make_patterns_logic$57905 .sym 15083 CLK$2$2 .sym 15084 $0\KBD_FREEZE[0:0]$2 .sym 15085 $abc$60421$n889 .sym 15086 $abc$60421$n998 .sym 15087 $techmap\KEYBOARD.$procmux$3661_Y .sym 15088 $abc$60421$n1047 .sym 15089 $abc$60421$n750 .sym 15090 I2C_HID_DESC.VAL[7] .sym 15091 I2C_HID_DESC.VAL[5] .sym 15092 I2C_HID_DESC.VAL[0] .sym 15159 $auto$rtlil.cc:1692:NotGate$60414$2 .sym 15160 KEYBOARD.row_counter[0] .sym 15161 KEYBOARD.row_counter[1] .sym 15162 KEYBOARD.last_data[3] .sym 15164 $abc$60421$n594 .sym 15165 $auto$simplemap.cc:127:simplemap_reduce$33820[0] .sym 15166 $abc$60421$n856 .sym 15167 $abc$60421$n883 .sym 15169 KEYBOARD.row_counter[1] .sym 15170 KEYBOARD.last_data[7] .sym 15171 $auto$rtlil.cc:1692:NotGate$60414$2 .sym 15172 KEYBOARD.row_counter[0] .sym 15174 $abc$60421$n594 .sym 15175 $auto$simplemap.cc:127:simplemap_reduce$33860[0] .sym 15176 $abc$60421$n868 .sym 15177 $abc$60421$n866 .sym 15179 $abc$60421$n564 .sym 15180 $abc$60421$n563 .sym 15181 $abc$60421$n565 .sym 15182 $abc$60421$n566 .sym 15184 $abc$60421$n573 .sym 15185 $auto$simplemap.cc:127:simplemap_reduce$33820[0] .sym 15186 $abc$60421$n856 .sym 15187 $abc$60421$n889 .sym 15189 $auto$rtlil.cc:1692:NotGate$60414$2 .sym 15190 KEYBOARD.row_counter[0] .sym 15191 KEYBOARD.row_counter[1] .sym 15192 KEYBOARD.last_data[15] .sym 15194 $techmap\KEYBOARD.$procmux$3661_Y .sym 15195 $false .sym 15196 $false .sym 15197 $false .sym 15198 $auto$dff2dffe.cc:175:make_patterns_logic$59021 .sym 15199 CLK$2$2 .sym 15200 $0\KBD_FREEZE[0:0]$2 .sym 15201 $abc$60421$n721 .sym 15202 $abc$60421$n738 .sym 15203 $abc$60421$n736 .sym 15204 $abc$60421$n734 .sym 15205 $abc$60421$n751 .sym 15206 $abc$60421$n737 .sym 15207 $abc$60421$n749 .sym 15208 I2C.received_byte[2] .sym 15275 $abc$60421$n544_1 .sym 15276 $abc$60421$n594 .sym 15277 $abc$60421$n555_1 .sym 15278 $false .sym 15280 $abc$60421$n580 .sym 15281 $abc$60421$n590 .sym 15282 $abc$60421$n582 .sym 15283 $false .sym 15285 $abc$60421$n720 .sym 15286 $abc$60421$n721 .sym 15287 $abc$60421$n724 .sym 15288 $abc$60421$n725 .sym 15290 $abc$60421$n580 .sym 15291 $abc$60421$n583 .sym 15292 $abc$60421$n582 .sym 15293 $false .sym 15295 $abc$60421$n583 .sym 15296 $auto$simplemap.cc:127:simplemap_reduce$33820[0] .sym 15297 $abc$60421$n856 .sym 15298 $abc$60421$n877 .sym 15300 $abc$60421$n583 .sym 15301 $auto$simplemap.cc:127:simplemap_reduce$33860[0] .sym 15302 $abc$60421$n868 .sym 15303 $abc$60421$n866 .sym 15305 $abc$60421$n726 .sym 15306 $abc$60421$n587_1 .sym 15307 $abc$60421$n727 .sym 15308 $false .sym 15310 $techmap\KEYBOARD.$procmux$3661_Y .sym 15311 $false .sym 15312 $false .sym 15313 $false .sym 15314 $auto$dff2dffe.cc:175:make_patterns_logic$58277 .sym 15315 CLK$2$2 .sym 15316 $0\KBD_FREEZE[0:0]$2 .sym 15317 $abc$60421$n690 .sym 15318 $abc$60421$n579 .sym 15319 $abc$60421$n726 .sym 15320 I2C_TRANS .sym 15321 $abc$60421$n686 .sym 15322 $abc$60421$n561 .sym 15323 I2C.i2c_state_machine .sym 15391 $abc$60421$n583 .sym 15392 $auto$simplemap.cc:127:simplemap_reduce$33820[0] .sym 15393 $abc$60421$n856 .sym 15394 $abc$60421$n875 .sym 15396 $abc$60421$n594 .sym 15397 $auto$simplemap.cc:127:simplemap_reduce$33860[0] .sym 15398 $abc$60421$n868 .sym 15399 $abc$60421$n866 .sym 15401 $auto$rtlil.cc:1692:NotGate$60414$2 .sym 15402 KEYBOARD.row_counter[0] .sym 15403 KEYBOARD.row_counter[1] .sym 15404 KEYBOARD.last_data[14] .sym 15406 $abc$60421$n567_1 .sym 15407 $abc$60421$n562 .sym 15408 $auto$simplemap.cc:127:simplemap_reduce$33820[0] .sym 15409 KEYBOARD.COLS_SHADOW[2] .sym 15411 $abc$60421$n583 .sym 15412 $auto$simplemap.cc:127:simplemap_reduce$33860[0] .sym 15413 $abc$60421$n868 .sym 15414 $abc$60421$n866 .sym 15416 $abc$60421$n573 .sym 15417 $auto$simplemap.cc:127:simplemap_reduce$33860[0] .sym 15418 $abc$60421$n868 .sym 15419 $abc$60421$n866 .sym 15421 $abc$60421$n573 .sym 15422 $auto$simplemap.cc:127:simplemap_reduce$33820[0] .sym 15423 $abc$60421$n856 .sym 15424 $abc$60421$n887_1 .sym 15426 $techmap\KEYBOARD.$procmux$3661_Y .sym 15427 $false .sym 15428 $false .sym 15429 $false .sym 15430 $auto$dff2dffe.cc:175:make_patterns_logic$58916 .sym 15431 CLK$2$2 .sym 15432 $0\KBD_FREEZE[0:0]$2 .sym 15433 $abc$60421$n595 .sym 15434 $abc$60421$n597 .sym 15435 $abc$60421$n592 .sym 15436 $abc$60421$n596 .sym 15437 $techmap$auto$alumacc.cc:470:replace_alu$22821.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$32673_Y[3] .sym 15438 $abc$60421$n612 .sym 15439 $auto$dff2dffe.cc:158:make_patterns_logic$49447 .sym 15440 I2C.i2c_start_latency .sym 15507 $abc$60421$n856 .sym 15508 $abc$60421$n857_1 .sym 15509 $false .sym 15510 $false .sym 15512 $abc$60421$n727 .sym 15513 $abc$60421$n857_1 .sym 15514 $abc$60421$n867 .sym 15515 $false .sym 15517 $abc$60421$n550 .sym 15518 KEYBOARD.COLS_SHADOW[0] .sym 15519 $false .sym 15520 $false .sym 15522 $abc$60421$n555_1 .sym 15523 $abc$60421$n582 .sym 15524 $abc$60421$n722 .sym 15525 $auto$dff2dffe.cc:175:make_patterns_logic$50051$2 .sym 15527 $abc$60421$n550 .sym 15528 $abc$60421$n583 .sym 15529 $abc$60421$n582 .sym 15530 KEYBOARD.COLS_SHADOW[0] .sym 15532 KEYBOARD.is_pressed .sym 15533 $abc$60421$n579 .sym 15534 $abc$60421$n722 .sym 15535 $abc$60421$n766 .sym 15537 KEYBOARD.COLS_SHADOW[1] .sym 15538 KEYBOARD.COLS_SHADOW[0] .sym 15539 $abc$60421$n582 .sym 15540 $false .sym 15542 $techmap\KEYBOARD.$procmux$3193_Y .sym 15543 $false .sym 15544 $false .sym 15545 $false .sym 15546 $auto$dff2dffe.cc:175:make_patterns_logic$57988 .sym 15547 CLK$2$2 .sym 15548 $0\KBD_FREEZE[0:0]$2 .sym 15552 $auto$dff2dffe.cc:175:make_patterns_logic$49554 .sym 15553 $techmap\UART.$procmux$739_Y .sym 15555 $abc$60421$n573 .sym 15556 UART.tx_activity .sym 15623 $abc$60421$n582 .sym 15624 $auto$dff2dffe.cc:175:make_patterns_logic$50051$2 .sym 15625 $false .sym 15626 $false .sym 15628 $abc$60421$n855 .sym 15629 $abc$60421$n861 .sym 15630 $abc$60421$n756 .sym 15631 $false .sym 15633 $abc$60421$n860 .sym 15634 $abc$60421$n861 .sym 15635 $false .sym 15636 $false .sym 15638 $abc$60421$n860 .sym 15639 $abc$60421$n861 .sym 15640 $abc$60421$n756 .sym 15641 $false .sym 15643 $abc$60421$n860 .sym 15644 $auto$simplemap.cc:250:simplemap_eqne$33831[0] .sym 15645 $false .sym 15646 $false .sym 15648 $abc$60421$n872 .sym 15649 $abc$60421$n573 .sym 15650 $abc$60421$n859 .sym 15651 $abc$60421$n854 .sym 15653 $abc$60421$n855 .sym 15654 $abc$60421$n756 .sym 15655 $false .sym 15656 $false .sym 15658 $techmap\KEYBOARD.$procmux$3193_Y .sym 15659 $false .sym 15660 $false .sym 15661 $false .sym 15662 $auto$dff2dffe.cc:175:make_patterns_logic$58732 .sym 15663 CLK$2$2 .sym 15664 $0\KBD_FREEZE[0:0]$2 .sym 15667 $abc$60421$n1097 .sym 15668 $auto$alumacc.cc:470:replace_alu$22811.B_buf[0] .sym 15670 $auto$simplemap.cc:250:simplemap_eqne$33874[2] .sym 15671 UART.tx_bit_counter[0] .sym 15672 UART.tx_bit_counter[1] .sym 15739 $auto$rtlil.cc:1692:NotGate$60414$2 .sym 15740 KEYBOARD.row_counter[0] .sym 15741 KEYBOARD.row_counter[1] .sym 15742 KEYBOARD.last_data[8] .sym 15744 KEYBOARD.row_counter[1] .sym 15745 KEYBOARD.last_data[12] .sym 15746 $auto$rtlil.cc:1692:NotGate$60414$2 .sym 15747 KEYBOARD.row_counter[0] .sym 15749 $auto$rtlil.cc:1692:NotGate$60414$2 .sym 15750 KEYBOARD.row_counter[0] .sym 15751 KEYBOARD.row_counter[1] .sym 15752 KEYBOARD.last_data[4] .sym 15754 $abc$60421$n872 .sym 15755 $abc$60421$n583 .sym 15756 $abc$60421$n859 .sym 15757 $abc$60421$n854 .sym 15759 $abc$60421$n552_1 .sym 15760 $abc$60421$n551 .sym 15761 $abc$60421$n553 .sym 15762 $abc$60421$n554 .sym 15769 $abc$60421$n872 .sym 15770 $abc$60421$n594 .sym 15771 $abc$60421$n859 .sym 15772 $abc$60421$n854 .sym 15774 $techmap\KEYBOARD.$procmux$3193_Y .sym 15775 $false .sym 15776 $false .sym 15777 $false .sym 15778 $auto$dff2dffe.cc:175:make_patterns_logic$58360 .sym 15779 CLK$2$2 .sym 15780 $0\KBD_FREEZE[0:0]$2 .sym 15825 $memory\I2C_INPUT_DATA$wren[0][0][0]$y$23284 .sym 15883 $sub$top.v:60$17_Y[2] .sym 15884 $sub$top.v:60$17_Y[3] .sym 15885 $sub$top.v:60$17_Y[4] .sym 15886 $sub$top.v:60$17_Y[5] .sym 15887 $sub$top.v:60$17_Y[6] .sym 15888 $auto$alumacc.cc:484:replace_alu$22876[6] .sym 15956 I2C.byte_counter[4] .sym 15957 $false .sym 15958 $false .sym 15959 $false .sym 15971 I2C.byte_counter[5] .sym 15972 $false .sym 15973 $false .sym 15974 $false .sym 15976 I2C.byte_counter[6] .sym 15977 $false .sym 15978 $false .sym 15979 $false .sym 15981 I2C.byte_counter[1] .sym 15982 $false .sym 15983 $false .sym 15984 $false .sym 15986 $false .sym 15987 $0\KBD_FREEZE[0:0]$2 .sym 15988 rststate[0] .sym 15989 $false .sym 15991 $abc$60421$n977_1 .sym 15992 $add$top.v:47$12_Y[0] .sym 15993 $false .sym 15994 $false .sym 15995 $true .sym 15996 CLK$2$2 .sym 15997 $false .sym 16002 $sub$top.v:60$17_Y[7] .sym 16003 I2C_INPUT_LEN[6] .sym 16004 I2C_INPUT_LEN[5] .sym 16005 I2C_INPUT_LEN[2] .sym 16006 I2C_INPUT_LEN[3] .sym 16008 I2C_INPUT_LEN[4] .sym 16009 I2C_INPUT_LEN[7] .sym 16112 $abc$60421$n642 .sym 16113 $abc$60421$n645 .sym 16114 $abc$60421$n646_1 .sym 16115 $false .sym 16117 $abc$60421$n978 .sym 16118 $abc$60421$n982 .sym 16119 $abc$60421$n645 .sym 16120 $false .sym 16122 $abc$60421$n659_1 .sym 16123 $abc$60421$n646_1 .sym 16124 $abc$60421$n661 .sym 16125 $false .sym 16132 $abc$60421$n642 .sym 16133 $abc$60421$n646_1 .sym 16134 $false .sym 16135 $false .sym 16137 $abc$60421$n641 .sym 16138 $abc$60421$n647 .sym 16139 $abc$60421$n648 .sym 16140 $false .sym 16147 I2C.wr .sym 16148 $false .sym 16149 $false .sym 16150 $false .sym 16151 RESET .sym 16152 CLK$2$2 .sym 16153 $false .sym 16154 $sub$top.v:60$17_Y[0] .sym 16155 $auto$alumacc.cc:483:replace_alu$22867[6] .sym 16156 $abc$60421$n981_1 .sym 16157 $abc$60421$n669_1 .sym 16158 $abc$60421$n1018 .sym 16159 $abc$60421$n671_1 .sym 16160 I2C_INPUT_LEN[1] .sym 16161 I2C_INPUT_LEN[0] .sym 16228 $abc$60421$n979 .sym 16229 $abc$60421$n621 .sym 16230 $abc$60421$n662 .sym 16231 $abc$60421$n981_1 .sym 16233 $abc$60421$n638 .sym 16234 $abc$60421$n669_1 .sym 16235 $abc$60421$n671_1 .sym 16236 I2C.is_read .sym 16238 $abc$60421$n980 .sym 16239 $abc$60421$n665_1 .sym 16240 $abc$60421$n648 .sym 16241 $false .sym 16243 $abc$60421$n657 .sym 16244 $abc$60421$n667_1 .sym 16245 $abc$60421$n664 .sym 16246 $abc$60421$n639 .sym 16248 $2\INT[0:0] .sym 16249 I2C_INPUT_DATA[3][0] .sym 16250 I2C_INPUT_DATA[3][1] .sym 16251 I2C.is_read .sym 16253 $abc$60421$n658_1 .sym 16254 $abc$60421$n642 .sym 16255 $abc$60421$n662 .sym 16256 $false .sym 16258 $abc$60421$n647 .sym 16259 $abc$60421$n663 .sym 16260 $false .sym 16261 $false .sym 16263 I2C.received_byte[0] .sym 16264 $false .sym 16265 $false .sym 16266 $false .sym 16267 $auto$simplemap.cc:250:simplemap_eqne$49500 .sym 16268 CLK$2$2 .sym 16269 $false .sym 16270 $abc$60421$n675 .sym 16271 $abc$60421$n676_1 .sym 16272 $abc$60421$n673_1 .sym 16273 $auto$dff2dffe.cc:175:make_patterns_logic$48550 .sym 16274 $abc$60421$n674_1 .sym 16275 $auto$dff2dffe.cc:175:make_patterns_logic$46096 .sym 16276 $abc$60421$n672 .sym 16277 I2C_INPUT_DATA[5][3] .sym 16344 $abc$60421$n669_1 .sym 16345 I2C.is_read .sym 16346 $abc$60421$n620 .sym 16347 $abc$60421$n631 .sym 16349 $2\INT[0:0] .sym 16350 $abc$60421$n637 .sym 16351 $abc$60421$n625 .sym 16352 $false .sym 16354 I2C.wr .sym 16355 last_wr .sym 16356 $false .sym 16357 $false .sym 16359 $abc$60421$n621 .sym 16360 $0\uart_double_ff[0:0] .sym 16361 $false .sym 16362 $false .sym 16364 $abc$60421$n618 .sym 16365 $auto$rtlil.cc:1692:NotGate$60252 .sym 16366 $false .sym 16367 $false .sym 16369 $0\uart_double_ff[0:0] .sym 16370 $auto$rtlil.cc:1692:NotGate$60252 .sym 16371 $abc$60421$n618 .sym 16372 $false .sym 16374 last_wr .sym 16375 I2C.wr .sym 16376 RESET .sym 16377 $false .sym 16379 $2\INT[0:0] .sym 16380 $abc$60421$n627 .sym 16381 $abc$60421$n625 .sym 16382 $abc$60421$n632 .sym 16386 $techmap\UART.$sub$uart.v:30$342_Y[0] .sym 16387 $techmap\UART.$sub$uart.v:30$342_Y[3] .sym 16388 $auto$dff2dffe.cc:158:make_patterns_logic$49597 .sym 16389 $abc$60421$n707 .sym 16390 $abc$60421$n708 .sym 16391 UART.tx_clk_counter[3] .sym 16392 UART.tx_clk_counter[0] .sym 16393 UART.tx_clk_counter[2] .sym 16460 $abc$60421$n625 .sym 16461 $2\INT[0:0] .sym 16462 $false .sym 16463 $false .sym 16465 $abc$60421$n617 .sym 16466 $abc$60421$n632 .sym 16467 $false .sym 16468 $false .sym 16470 $abc$60421$n620 .sym 16471 $abc$60421$n617 .sym 16472 $false .sym 16473 $false .sym 16475 $2\INT[0:0] .sym 16476 $abc$60421$n627 .sym 16477 $abc$60421$n625 .sym 16478 $abc$60421$n618 .sym 16480 $abc$60421$n627 .sym 16481 $abc$60421$n633 .sym 16482 $abc$60421$n630 .sym 16483 $abc$60421$n631 .sym 16485 I2C.byte_counter[4] .sym 16486 I2C.byte_counter[5] .sym 16487 I2C.byte_counter[6] .sym 16488 I2C.byte_counter[7] .sym 16490 $abc$60421$n618 .sym 16491 RESET .sym 16492 $false .sym 16493 $false .sym 16495 I2C.received_byte[2] .sym 16496 $false .sym 16497 $false .sym 16498 $false .sym 16499 $memory\I2C_INPUT_DATA$wren[4][0][0]$y$23322$2 .sym 16500 CLK$2$2 .sym 16501 $false .sym 16502 $abc$60421$n1053_1 .sym 16503 $abc$60421$n1054 .sym 16504 $abc$60421$n633 .sym 16505 $abc$60421$n1152 .sym 16506 $abc$60421$n704 .sym 16507 $abc$60421$n1138 .sym 16508 UART.TX_sig_last .sym 16509 last_isr .sym 16576 $abc$60421$n1210 .sym 16577 $abc$60421$n1053_1 .sym 16578 $abc$60421$n1205_1 .sym 16579 $false .sym 16581 I2C.byte_counter[1] .sym 16582 I2C.byte_counter[3] .sym 16583 I2C.byte_counter[2] .sym 16584 I2C.byte_counter[0] .sym 16586 $abc$60421$n1138 .sym 16587 $abc$60421$n921 .sym 16588 $false .sym 16589 $false .sym 16591 $abc$60421$n1146 .sym 16592 $abc$60421$n1138 .sym 16593 $abc$60421$n1053_1 .sym 16594 $abc$60421$n1171 .sym 16596 $abc$60421$n921 .sym 16597 $abc$60421$n1152 .sym 16598 $abc$60421$n1198 .sym 16599 $false .sym 16601 I2C.byte_counter[1] .sym 16602 I2C.byte_counter[3] .sym 16603 I2C.byte_counter[2] .sym 16604 I2C.byte_counter[0] .sym 16606 $abc$60421$n1147_1 .sym 16607 $abc$60421$n1206 .sym 16608 $abc$60421$n921 .sym 16609 $false .sym 16611 $abc$60421$n921 .sym 16612 $abc$60421$n1153 .sym 16613 $abc$60421$n1053_1 .sym 16614 $abc$60421$n1134 .sym 16618 $abc$60421$n1167 .sym 16619 $abc$60421$n1172 .sym 16620 $abc$60421$n1163 .sym 16621 $abc$60421$n1166 .sym 16622 $abc$60421$n1164 .sym 16623 $abc$60421$n1137 .sym 16624 $abc$60421$n1165 .sym 16625 I2C.SDA_LAST .sym 16692 $abc$60421$n1152 .sym 16693 $abc$60421$n1139 .sym 16694 $abc$60421$n1172 .sym 16695 $abc$60421$n1170 .sym 16697 $abc$60421$n1146 .sym 16698 $abc$60421$n1136 .sym 16699 $abc$60421$n1151 .sym 16700 $abc$60421$n1138 .sym 16702 $abc$60421$n1152 .sym 16703 $abc$60421$n1146 .sym 16704 $abc$60421$n1151 .sym 16705 $abc$60421$n1153 .sym 16707 $abc$60421$n1176 .sym 16708 $abc$60421$n1134 .sym 16709 $abc$60421$n1172 .sym 16710 $auto$rtlil.cc:1692:NotGate$60416 .sym 16712 $abc$60421$n920 .sym 16713 $abc$60421$n1167 .sym 16714 $abc$60421$n1158 .sym 16715 $abc$60421$n1151 .sym 16717 $abc$60421$n1197 .sym 16718 $abc$60421$n1150 .sym 16719 $abc$60421$n1160 .sym 16720 $false .sym 16722 $abc$60421$n921 .sym 16723 $abc$60421$n1167 .sym 16724 $abc$60421$n1138 .sym 16725 $auto$rtlil.cc:1692:NotGate$60416 .sym 16727 $abc$60421$n1185 .sym 16728 $abc$60421$n1200 .sym 16729 $abc$60421$n1196 .sym 16730 $auto$rtlil.cc:1692:NotGate$60416 .sym 16731 $auto$dff2dffe.cc:175:make_patterns_logic$59498 .sym 16732 CLK$2$2 .sym 16733 $false .sym 16734 $abc$60421$n1132 .sym 16735 $abc$60421$n1154 .sym 16736 $abc$60421$n1155 .sym 16737 $abc$60421$n1052 .sym 16738 $abc$60421$n1174 .sym 16739 $abc$60421$n1157 .sym 16740 $abc$60421$n1156 .sym 16741 uart_double_ff .sym 16808 $abc$60421$n1158 .sym 16809 $abc$60421$n1134 .sym 16810 $abc$60421$n1150 .sym 16811 $abc$60421$n1154 .sym 16813 $abc$60421$n1163 .sym 16814 $abc$60421$n1169 .sym 16815 $abc$60421$n1150 .sym 16816 $false .sym 16818 $abc$60421$n1133 .sym 16819 $abc$60421$n920 .sym 16820 $abc$60421$n1180 .sym 16821 $false .sym 16823 $abc$60421$n1169 .sym 16824 $abc$60421$n1173 .sym 16825 $abc$60421$n1174 .sym 16826 $abc$60421$n1175 .sym 16828 $abc$60421$n1168_1 .sym 16829 $abc$60421$n1193 .sym 16830 $abc$60421$n1164 .sym 16831 $false .sym 16833 $abc$60421$n1185 .sym 16834 $abc$60421$n1202 .sym 16835 $auto$rtlil.cc:1692:NotGate$60416 .sym 16836 $false .sym 16838 $abc$60421$n1186 .sym 16839 $abc$60421$n1184 .sym 16840 $abc$60421$n1181 .sym 16841 $abc$60421$n1190 .sym 16843 $abc$60421$n1194_1 .sym 16844 $abc$60421$n1184 .sym 16845 $abc$60421$n1192 .sym 16846 $false .sym 16847 $auto$dff2dffe.cc:175:make_patterns_logic$59498 .sym 16848 CLK$2$2 .sym 16849 $false .sym 16851 $abc$60421$n1133 .sym 16852 $auto$dff2dffe.cc:158:make_patterns_logic$49819 .sym 16853 $0\uart_double_ff[0:0] .sym 16854 $auto$simplemap.cc:250:simplemap_eqne$49500 .sym 16855 $abc$60421$n1136 .sym 16856 $2\INT[0:0] .sym 16857 last_trans .sym 16924 $abc$60421$n1182_1 .sym 16925 $abc$60421$n1134 .sym 16926 $abc$60421$n1178 .sym 16927 $abc$60421$n1181 .sym 16929 $abc$60421$n1160 .sym 16930 $abc$60421$n1161_1 .sym 16931 $false .sym 16932 $false .sym 16934 $abc$60421$n1179 .sym 16935 $abc$60421$n1180 .sym 16936 $auto$rtlil.cc:1692:NotGate$60416 .sym 16937 $false .sym 16939 $abc$60421$n1159 .sym 16940 $abc$60421$n1170 .sym 16941 $abc$60421$n1174 .sym 16942 $false .sym 16944 $abc$60421$n1163 .sym 16945 $abc$60421$n1132 .sym 16946 $abc$60421$n1209 .sym 16947 $false .sym 16949 $abc$60421$n1131 .sym 16950 $abc$60421$n1149 .sym 16951 $abc$60421$n1159 .sym 16952 $abc$60421$n1163 .sym 16954 $abc$60421$n1156 .sym 16955 I2C.byte_counter[1] .sym 16956 I2C.byte_counter[0] .sym 16957 $false .sym 16959 $abc$60421$n1170 .sym 16960 $abc$60421$n1161_1 .sym 16961 $abc$60421$n1209 .sym 16962 $false .sym 16963 $auto$dff2dffe.cc:175:make_patterns_logic$59498 .sym 16964 CLK$2$2 .sym 16965 $auto$rtlil.cc:1692:NotGate$60416 .sym 16967 $auto$dff2dffe.cc:175:make_patterns_logic$49036 .sym 16968 $memory\I2C_INPUT_DATA$wren[4][0][0]$y$23322 .sym 16969 $auto$dff2dffe.cc:158:make_patterns_logic$44949 .sym 16970 $abc$60421$n1222 .sym 16971 $auto$dff2dffe.cc:158:make_patterns_logic$44967 .sym 16972 $abc$60421$n1217 .sym 16973 I2C.received_byte[0] .sym 17045 UART_TX_DATA[5] .sym 17046 UART_TX_DATA[1] .sym 17047 $techmap\UART.$sub$uart.v:38$347_Y[2] .sym 17048 $false .sym 17050 I2C_TX_REPORT[3] .sym 17051 I2C_HID_DESC.VAL[3] .sym 17052 I2C_OUT_DESC_MASK[3] .sym 17053 $false .sym 17055 $abc$60421$n1216 .sym 17056 $abc$60421$n1217 .sym 17057 I2C.byte_counter[2] .sym 17058 $0$memwr$\I2C_INPUT_DATA$top.v:63$1_ADDR[3:0]$8[3] .sym 17060 $false .sym 17061 $false .sym 17062 $false .sym 17063 $false .sym 17065 $abc$60421$n1100 .sym 17066 $abc$60421$n1099 .sym 17067 $abc$60421$n1097 .sym 17068 $false .sym 17075 I2C.FLT_SDA.out .sym 17076 $false .sym 17077 $false .sym 17078 $false .sym 17079 $auto$dff2dffe.cc:175:make_patterns_logic$49036 .sym 17080 CLK$2$2 .sym 17081 $false .sym 17082 $abc$60421$n1086 .sym 17083 $abc$60421$n1087 .sym 17084 $abc$60421$n1085 .sym 17085 $abc$60421$n1094 .sym 17086 $abc$60421$n1060 .sym 17087 $abc$60421$n1080 .sym 17088 $abc$60421$n1012 .sym 17089 I2C.is_read .sym 17156 $abc$60421$n573 .sym 17157 $auto$simplemap.cc:127:simplemap_reduce$33860[0] .sym 17158 $abc$60421$n868 .sym 17159 $abc$60421$n866 .sym 17161 I2C_TX_REPORT[0] .sym 17162 I2C_HID_DESC.VAL[0] .sym 17163 I2C_OUT_DESC_MASK[0] .sym 17164 $false .sym 17166 KEYBOARD.COLS_SHADOW[3] .sym 17167 KEYBOARD.COLS_SHADOW[2] .sym 17168 $abc$60421$n722 .sym 17169 $false .sym 17171 $abc$60421$n686 .sym 17172 $abc$60421$n690 .sym 17173 $auto$alumacc.cc:484:replace_alu$22885[7] .sym 17174 $false .sym 17176 $abc$60421$n579 .sym 17177 $abc$60421$n573 .sym 17178 $abc$60421$n722 .sym 17179 $false .sym 17181 $abc$60421$n1133 .sym 17182 $abc$60421$n1208 .sym 17183 $abc$60421$n1180 .sym 17184 $auto$rtlil.cc:1692:NotGate$60416 .sym 17186 $auto$rtlil.cc:1692:NotGate$60416 .sym 17187 $abc$60421$n1205_1 .sym 17188 $abc$60421$n1204 .sym 17189 $abc$60421$n1180 .sym 17191 $abc$60421$n1168_1 .sym 17192 $abc$60421$n1130 .sym 17193 $abc$60421$n1177 .sym 17194 $false .sym 17195 $auto$dff2dffe.cc:175:make_patterns_logic$59498 .sym 17196 CLK$2$2 .sym 17197 $false .sym 17198 $abc$60421$n1061 .sym 17199 LED1$2 .sym 17200 $abc$60421$n1042 .sym 17201 I2C_OUT_DESC_MASK[7] .sym 17202 I2C_OUT_DESC_MASK[0] .sym 17203 I2C_OUT_DESC_MASK[3] .sym 17205 I2C_OUT_DESC_MASK[6] .sym 17272 $abc$60421$n579 .sym 17273 $abc$60421$n573 .sym 17274 $abc$60421$n722 .sym 17275 $false .sym 17277 $abc$60421$n726 .sym 17278 $abc$60421$n573 .sym 17279 $abc$60421$n727 .sym 17280 $false .sym 17282 $abc$60421$n579 .sym 17283 $abc$60421$n594 .sym 17284 $abc$60421$n722 .sym 17285 $false .sym 17287 $abc$60421$n735 .sym 17288 $abc$60421$n736 .sym 17289 $abc$60421$n737 .sym 17290 $abc$60421$n738 .sym 17292 $abc$60421$n544_1 .sym 17293 $abc$60421$n573 .sym 17294 $abc$60421$n555_1 .sym 17295 $false .sym 17297 $abc$60421$n544_1 .sym 17298 $auto$simplemap.cc:250:simplemap_eqne$33874[2] .sym 17299 $abc$60421$n555_1 .sym 17300 $false .sym 17302 $abc$60421$n720 .sym 17303 $abc$60421$n750 .sym 17304 $abc$60421$n751 .sym 17305 $false .sym 17307 I2C.FLT_SDA.out .sym 17308 $false .sym 17309 $false .sym 17310 $false .sym 17311 $auto$dff2dffe.cc:175:make_patterns_logic$49103 .sym 17312 CLK$2$2 .sym 17313 $false .sym 17314 $abc$60421$n1044 .sym 17315 $abc$60421$n1043 .sym 17318 $abc$60421$n1083 .sym 17319 I2C.wr .sym 17388 I2C.FLT_SCL.out .sym 17389 I2C.FLT_SDA.out .sym 17390 I2C.SDA_LAST .sym 17391 I2C.i2c_state_machine .sym 17393 $abc$60421$n562 .sym 17394 $abc$60421$n567_1 .sym 17395 $auto$simplemap.cc:127:simplemap_reduce$33820[0] .sym 17396 KEYBOARD.COLS_SHADOW[2] .sym 17398 $abc$60421$n562 .sym 17399 $abc$60421$n567_1 .sym 17400 $auto$simplemap.cc:127:simplemap_reduce$33860[0] .sym 17401 KEYBOARD.COLS_SHADOW[3] .sym 17403 I2C.i2c_state_machine .sym 17404 I2C.i2c_start_latency .sym 17405 $false .sym 17406 $false .sym 17408 I2C.is_read .sym 17409 $techmap\I2C.$procmux$12628_Y .sym 17410 I2C.i2c_state_machine .sym 17411 I2C.i2c_start_latency .sym 17413 $abc$60421$n567_1 .sym 17414 $abc$60421$n562 .sym 17415 $auto$simplemap.cc:127:simplemap_reduce$33860[0] .sym 17416 $false .sym 17418 $abc$60421$n1083 .sym 17419 $abc$60421$n1082 .sym 17420 $abc$60421$n686 .sym 17421 $abc$60421$n690 .sym 17427 $true .sym 17428 CLK$2$2 .sym 17429 $0\KBD_FREEZE[0:0]$2 .sym 17432 $abc$60421$n1040 .sym 17435 $abc$60421$n1058 .sym 17437 I2C.is_ack .sym 17504 $abc$60421$n544_1 .sym 17505 $auto$simplemap.cc:250:simplemap_eqne$33874[2] .sym 17506 $abc$60421$n555_1 .sym 17507 $false .sym 17509 $abc$60421$n573 .sym 17510 $abc$60421$n555_1 .sym 17511 $false .sym 17512 $false .sym 17514 $abc$60421$n593 .sym 17515 $abc$60421$n579 .sym 17516 $abc$60421$n594 .sym 17517 $abc$60421$n581 .sym 17519 $abc$60421$n561 .sym 17520 $abc$60421$n597 .sym 17521 $abc$60421$n574 .sym 17522 KEYBOARD.COLS_SHADOW[3] .sym 17524 $abc$60421$n592 .sym 17525 $abc$60421$n595 .sym 17526 $abc$60421$n596 .sym 17527 $false .sym 17529 $abc$60421$n574 .sym 17530 $abc$60421$n561 .sym 17531 KEYBOARD.COLS_SHADOW[3] .sym 17532 $abc$60421$n593 .sym 17534 I2C.i2c_state_machine .sym 17535 I2C.i2c_start_latency .sym 17536 $techmap\I2C.$procmux$12628_Y .sym 17537 $false .sym 17539 $techmap\I2C.$procmux$12628_Y .sym 17540 $false .sym 17541 $false .sym 17542 $false .sym 17543 $auto$dff2dffe.cc:158:make_patterns_logic$49447 .sym 17544 CLK$2$2 .sym 17545 $false .sym 17546 I2C.FLT_SDA.out .sym 17635 UART.tx_activity .sym 17636 $abc$60421$n707 .sym 17637 RESET .sym 17638 $techmap\UART.$procmux$739_Y .sym 17640 $abc$60421$n704 .sym 17641 $abc$60421$n707 .sym 17642 $abc$60421$n709 .sym 17643 UART.tx_activity .sym 17650 $auto$simplemap.cc:250:simplemap_eqne$33874[2] .sym 17651 KEYBOARD.row_counter[1] .sym 17652 $false .sym 17653 $false .sym 17655 $techmap\UART.$procmux$739_Y .sym 17656 $false .sym 17657 $false .sym 17658 $false .sym 17659 RESET .sym 17660 CLK$2$2 .sym 17661 $false .sym 17663 $techmap$auto$alumacc.cc:470:replace_alu$22900.$xor$/usr/bin/../share/yosys/techmap.v:262$28020_Y[0] .sym 17666 KEYBOARD.ROWS_EN[2] .sym 17668 KEYBOARD.ROWS_EN[3] .sym 17746 $auto$alumacc.cc:470:replace_alu$22811.BB[1] .sym 17747 $auto$alumacc.cc:470:replace_alu$22811.B_buf[0] .sym 17748 $false .sym 17749 $false .sym 17751 $false .sym 17752 UART.tx_bit_counter[0] .sym 17753 $false .sym 17754 $true$2 .sym 17761 $auto$rtlil.cc:1692:NotGate$60414$2 .sym 17762 KEYBOARD.row_counter[0] .sym 17763 $false .sym 17764 $false .sym 17766 $auto$alumacc.cc:470:replace_alu$22811.B_buf[0] .sym 17767 $false .sym 17768 $false .sym 17769 $false .sym 17771 $auto$alumacc.cc:470:replace_alu$22811.BB[1] .sym 17772 $false .sym 17773 $false .sym 17774 $false .sym 17775 $auto$dff2dffe.cc:175:make_patterns_logic$49554 .sym 17776 CLK$2$2 .sym 17777 $eq$top.v:152$130_Y .sym 17914 $true .sym 17951 I2C.byte_counter[0]$2 .sym 17952 $false .sym 17953 I2C.byte_counter[0] .sym 17954 $false .sym 17955 $false .sym 17956 $auto$alumacc.cc:484:replace_alu$22876[1] .sym 17958 I2C.byte_counter[1] .sym 17959 $true$2 .sym 17961 $auto$alumacc.cc:484:replace_alu$22876[2] .sym 17962 $false .sym 17963 I2C.byte_counter[2] .sym 17964 $true$2 .sym 17965 $auto$alumacc.cc:484:replace_alu$22876[1] .sym 17966 $auto$alumacc.cc:484:replace_alu$22876[3] .sym 17967 $false .sym 17968 I2C.byte_counter[3] .sym 17969 $true$2 .sym 17970 $auto$alumacc.cc:484:replace_alu$22876[2] .sym 17971 $auto$alumacc.cc:484:replace_alu$22876[4] .sym 17972 $false .sym 17973 I2C.byte_counter[4] .sym 17974 $true$2 .sym 17975 $auto$alumacc.cc:484:replace_alu$22876[3] .sym 17976 $auto$alumacc.cc:484:replace_alu$22876[5] .sym 17977 $false .sym 17978 I2C.byte_counter[5] .sym 17979 $true$2 .sym 17980 $auto$alumacc.cc:484:replace_alu$22876[4] .sym 17981 $auto$alumacc.cc:484:replace_alu$22876[6]$2 .sym 17982 $false .sym 17983 I2C.byte_counter[6] .sym 17984 $true$2 .sym 17985 $auto$alumacc.cc:484:replace_alu$22876[5] .sym 17990 $auto$alumacc.cc:484:replace_alu$22876[6]$2 .sym 18108 $false .sym 18109 I2C.byte_counter[7] .sym 18110 $true$2 .sym 18111 $auto$alumacc.cc:484:replace_alu$22876[6] .sym 18113 I2C.wr .sym 18114 last_wr .sym 18115 $sub$top.v:60$17_Y[6] .sym 18116 $false .sym 18118 I2C.wr .sym 18119 last_wr .sym 18120 $sub$top.v:60$17_Y[5] .sym 18121 $false .sym 18123 I2C.wr .sym 18124 last_wr .sym 18125 $sub$top.v:60$17_Y[2] .sym 18126 $false .sym 18128 I2C.wr .sym 18129 last_wr .sym 18130 $sub$top.v:60$17_Y[3] .sym 18131 $false .sym 18138 I2C.wr .sym 18139 last_wr .sym 18140 $sub$top.v:60$17_Y[4] .sym 18141 $false .sym 18143 I2C.wr .sym 18144 last_wr .sym 18145 $sub$top.v:60$17_Y[7] .sym 18146 $false .sym 18147 $auto$dff2dffe.cc:175:make_patterns_logic$46377 .sym 18148 CLK$2$2 .sym 18149 $0\KBD_FREEZE[0:0]$2 .sym 18224 $false .sym 18225 I2C.byte_counter[0] .sym 18226 $false .sym 18227 $true$2 .sym 18229 I2C_INPUT_LEN[6] .sym 18230 $false .sym 18231 $false .sym 18232 $false .sym 18234 $abc$60421$n650 .sym 18235 $abc$60421$n668_1 .sym 18236 I2C_INPUT_LEN[0] .sym 18237 I2C_INPUT_LEN[1] .sym 18239 $abc$60421$n670 .sym 18240 I2C_INPUT_LEN[0] .sym 18241 I2C_INPUT_LEN[1] .sym 18242 $false .sym 18244 $abc$60421$n665_1 .sym 18245 $abc$60421$n668_1 .sym 18246 I2C_INPUT_LEN[0] .sym 18247 I2C_INPUT_LEN[1] .sym 18249 $abc$60421$n670 .sym 18250 I2C_INPUT_LEN[0] .sym 18251 I2C_INPUT_LEN[1] .sym 18252 $false .sym 18254 I2C.byte_counter[1] .sym 18255 I2C.byte_counter[0] .sym 18256 I2C.wr .sym 18257 last_wr .sym 18259 I2C.wr .sym 18260 last_wr .sym 18261 $sub$top.v:60$17_Y[0] .sym 18262 $false .sym 18263 $auto$dff2dffe.cc:175:make_patterns_logic$46377 .sym 18264 CLK$2$2 .sym 18265 $0\KBD_FREEZE[0:0]$2 .sym 18340 $abc$60421$n625 .sym 18341 $abc$60421$n676_1 .sym 18342 $abc$60421$n671_1 .sym 18343 I2C.is_read .sym 18345 $abc$60421$n669_1 .sym 18346 $2\INT[0:0] .sym 18347 $false .sym 18348 $false .sym 18350 $abc$60421$n625 .sym 18351 $abc$60421$n671_1 .sym 18352 $2\INT[0:0] .sym 18353 I2C.is_read .sym 18355 $abc$60421$n636 .sym 18356 $abc$60421$n674_1 .sym 18357 $abc$60421$n673_1 .sym 18358 $abc$60421$n680 .sym 18360 $abc$60421$n675 .sym 18361 $abc$60421$n664 .sym 18362 $abc$60421$n667_1 .sym 18363 $false .sym 18365 $abc$60421$n636 .sym 18366 $abc$60421$n672 .sym 18367 $abc$60421$n674_1 .sym 18368 $false .sym 18370 RESET .sym 18371 I2C.wr .sym 18372 last_wr .sym 18373 $abc$60421$n673_1 .sym 18375 I2C.received_byte[3] .sym 18376 $false .sym 18377 $false .sym 18378 $false .sym 18379 $auto$dff2dffe.cc:158:make_patterns_logic$44949 .sym 18380 CLK$2$2 .sym 18381 $false .sym 18456 $false .sym 18457 UART.tx_clk_counter[0] .sym 18458 $false .sym 18459 $true$2 .sym 18461 $false .sym 18462 UART.tx_clk_counter[3] .sym 18463 $true$2 .sym 18464 $auto$alumacc.cc:484:replace_alu$22917[2] .sym 18466 RESET .sym 18467 $abc$60421$n704 .sym 18468 UART.tx_activity .sym 18469 $false .sym 18471 $abc$60421$n708 .sym 18472 UART.tx_clk_counter[0] .sym 18473 UART.tx_clk_counter[1] .sym 18474 $false .sym 18476 $techmap\UART.$sub$uart.v:30$342_Y[0] .sym 18477 $techmap\UART.$sub$uart.v:30$342_Y[2] .sym 18478 $techmap\UART.$sub$uart.v:30$342_Y[3] .sym 18479 $false .sym 18481 $abc$60421$n707 .sym 18482 UART.tx_activity .sym 18483 $techmap\UART.$sub$uart.v:30$342_Y[3] .sym 18484 $false .sym 18486 $abc$60421$n707 .sym 18487 UART.tx_activity .sym 18488 $techmap\UART.$sub$uart.v:30$342_Y[0] .sym 18489 $false .sym 18491 $abc$60421$n707 .sym 18492 UART.tx_activity .sym 18493 $techmap\UART.$sub$uart.v:30$342_Y[2] .sym 18494 $false .sym 18495 $auto$dff2dffe.cc:158:make_patterns_logic$49597 .sym 18496 CLK$2$2 .sym 18497 $0\KBD_FREEZE[0:0]$2 .sym 18572 $abc$60421$n1054 .sym 18573 I2C.byte_counter[3] .sym 18574 I2C.byte_counter[2] .sym 18575 $false .sym 18577 I2C.byte_counter[1] .sym 18578 I2C.byte_counter[0] .sym 18579 $false .sym 18580 $false .sym 18582 UART_WR .sym 18583 KEYBOARD.isr .sym 18584 INT .sym 18585 last_isr .sym 18587 $abc$60421$n1054 .sym 18588 I2C.byte_counter[3] .sym 18589 I2C.byte_counter[2] .sym 18590 $false .sym 18592 UART_WR .sym 18593 UART.TX_sig_last .sym 18594 $false .sym 18595 $false .sym 18597 $abc$60421$n1054 .sym 18598 I2C.byte_counter[3] .sym 18599 I2C.byte_counter[2] .sym 18600 $false .sym 18602 UART_WR .sym 18603 $false .sym 18604 $false .sym 18605 $false .sym 18607 KEYBOARD.isr .sym 18608 $false .sym 18609 $false .sym 18610 $false .sym 18611 RESET .sym 18612 CLK$2$2 .sym 18613 $false .sym 18688 $abc$60421$n1054 .sym 18689 I2C.byte_counter[3] .sym 18690 I2C.byte_counter[2] .sym 18691 $false .sym 18693 $abc$60421$n921 .sym 18694 $abc$60421$n1140 .sym 18695 $false .sym 18696 $false .sym 18698 $abc$60421$n1146 .sym 18699 $abc$60421$n1167 .sym 18700 $abc$60421$n1140 .sym 18701 $abc$60421$n1164 .sym 18703 $abc$60421$n1152 .sym 18704 $abc$60421$n1167 .sym 18705 $abc$60421$n1140 .sym 18706 $abc$60421$n1134 .sym 18708 $abc$60421$n1165 .sym 18709 $abc$60421$n1166 .sym 18710 $false .sym 18711 $false .sym 18713 $abc$60421$n1139 .sym 18714 $abc$60421$n1140 .sym 18715 $abc$60421$n1138 .sym 18716 $abc$60421$n1134 .sym 18718 $abc$60421$n1146 .sym 18719 $abc$60421$n1153 .sym 18720 $abc$60421$n1053_1 .sym 18721 $abc$60421$n1139 .sym 18723 I2C.FLT_SDA.out .sym 18724 $false .sym 18725 $false .sym 18726 $false .sym 18727 $true .sym 18728 CLK$2$2 .sym 18729 $false .sym 18804 $abc$60421$n1133 .sym 18805 $abc$60421$n1137 .sym 18806 $false .sym 18807 $false .sym 18809 $abc$60421$n1157 .sym 18810 $abc$60421$n1134 .sym 18811 $abc$60421$n1155 .sym 18812 $false .sym 18814 I2C.byte_counter[0] .sym 18815 I2C.byte_counter[1] .sym 18816 $abc$60421$n1156 .sym 18817 $false .sym 18819 $abc$60421$n921 .sym 18820 $abc$60421$n1053_1 .sym 18821 $techmap\I2C.$procmux$12628_Y .sym 18822 $false .sym 18824 $abc$60421$n1139 .sym 18825 $abc$60421$n1136 .sym 18826 $abc$60421$n1053_1 .sym 18827 $abc$60421$n1134 .sym 18829 I2C.byte_counter[1] .sym 18830 I2C.byte_counter[3] .sym 18831 I2C.byte_counter[2] .sym 18832 I2C.byte_counter[0] .sym 18834 $abc$60421$n921 .sym 18835 I2C.byte_counter[3] .sym 18836 I2C.byte_counter[2] .sym 18837 $false .sym 18839 $0\uart_double_ff[0:0] .sym 18840 $false .sym 18841 $false .sym 18842 $false .sym 18843 $auto$dff2dffe.cc:175:make_patterns_logic$48902 .sym 18844 CLK$2$2 .sym 18845 $false .sym 18925 $abc$60421$n1134 .sym 18926 $abc$60421$n1136 .sym 18927 $false .sym 18928 $false .sym 18930 $abc$60421$n1216 .sym 18931 $abc$60421$n1222 .sym 18932 I2C.byte_counter[1] .sym 18933 $0$memwr$\I2C_INPUT_DATA$top.v:63$1_ADDR[3:0]$8[0] .sym 18935 I2C_TRANS .sym 18936 last_trans .sym 18937 $false .sym 18938 $false .sym 18940 $abc$60421$n1216 .sym 18941 $abc$60421$n1222 .sym 18942 I2C.byte_counter[1] .sym 18943 $0$memwr$\I2C_INPUT_DATA$top.v:63$1_ADDR[3:0]$8[0] .sym 18945 I2C.byte_counter[1] .sym 18946 I2C.byte_counter[3] .sym 18947 I2C.byte_counter[2] .sym 18948 I2C.byte_counter[0] .sym 18950 I2C_TRANS .sym 18951 last_trans .sym 18952 $false .sym 18953 $false .sym 18955 I2C_TRANS .sym 18956 $false .sym 18957 $false .sym 18958 $false .sym 18959 RESET .sym 18960 CLK$2$2 .sym 18961 $false .sym 19041 $abc$60421$n683 .sym 19042 $abc$60421$n691 .sym 19043 $techmap\I2C.$sub$i2c_slave.v:142$207_Y[0] .sym 19044 $false .sym 19046 $abc$60421$n1219 .sym 19047 $abc$60421$n1217 .sym 19048 $false .sym 19049 $false .sym 19051 $abc$60421$n1219 .sym 19052 I2C.byte_counter[1] .sym 19053 $0$memwr$\I2C_INPUT_DATA$top.v:63$1_ADDR[3:0]$8[0] .sym 19054 $false .sym 19056 I2C.byte_counter[1] .sym 19057 I2C.byte_counter[2] .sym 19058 $0$memwr$\I2C_INPUT_DATA$top.v:63$1_ADDR[3:0]$8[3] .sym 19059 $false .sym 19061 $abc$60421$n1216 .sym 19062 $abc$60421$n1222 .sym 19063 I2C.byte_counter[1] .sym 19064 $0$memwr$\I2C_INPUT_DATA$top.v:63$1_ADDR[3:0]$8[0] .sym 19066 I2C.byte_counter[1] .sym 19067 $0$memwr$\I2C_INPUT_DATA$top.v:63$1_ADDR[3:0]$8[0] .sym 19068 $false .sym 19069 $false .sym 19071 I2C.FLT_SDA.out .sym 19072 $false .sym 19073 $false .sym 19074 $false .sym 19075 $auto$dff2dffe.cc:175:make_patterns_logic$48969 .sym 19076 CLK$2$2 .sym 19077 $false .sym 19152 $abc$60421$n1055 .sym 19153 $abc$60421$n1046 .sym 19154 $abc$60421$n1087 .sym 19155 $auto$simplemap.cc:250:simplemap_eqne$49134[4] .sym 19157 $abc$60421$n1046 .sym 19158 $abc$60421$n1091 .sym 19159 $abc$60421$n1088 .sym 19160 $abc$60421$n1040 .sym 19162 $abc$60421$n1094 .sym 19163 $abc$60421$n1086 .sym 19164 $abc$60421$n686 .sym 19165 $false .sym 19167 $abc$60421$n1040 .sym 19168 $abc$60421$n1051 .sym 19169 $abc$60421$n1046 .sym 19170 $auto$simplemap.cc:250:simplemap_eqne$49134[4] .sym 19172 $abc$60421$n1061 .sym 19173 $abc$60421$n690 .sym 19174 $auto$simplemap.cc:250:simplemap_eqne$49134[4] .sym 19175 $false .sym 19177 $abc$60421$n1055 .sym 19178 $abc$60421$n690 .sym 19179 $auto$simplemap.cc:250:simplemap_eqne$49134[4] .sym 19180 I2C.received_byte[0] .sym 19182 I2C_TX_REPORT[7] .sym 19183 I2C_HID_DESC.VAL[7] .sym 19184 I2C_OUT_DESC_MASK[7] .sym 19185 $false .sym 19187 $abc$60421$n686 .sym 19188 $abc$60421$n1052 .sym 19189 $abc$60421$n1080 .sym 19190 $false .sym 19191 $true .sym 19192 CLK$2$2 .sym 19193 $false .sym 19268 $abc$60421$n1055 .sym 19269 $abc$60421$n1038 .sym 19270 $abc$60421$n686 .sym 19271 $false .sym 19273 INT .sym 19274 $false .sym 19275 $false .sym 19276 $false .sym 19278 I2C.FLT_SCL.out .sym 19279 I2C.FLT_SDA.out .sym 19280 I2C.SDA_LAST .sym 19281 I2C.wr .sym 19283 $2\I2C_OUT_DESC_MASK[7:0][7] .sym 19284 $false .sym 19285 $false .sym 19286 $false .sym 19288 $2\I2C_OUT_DESC_MASK[7:0][7] .sym 19289 $false .sym 19290 $false .sym 19291 $false .sym 19293 $2\I2C_OUT_DESC_MASK[7:0][7] .sym 19294 $false .sym 19295 $false .sym 19296 $false .sym 19303 $2\I2C_OUT_DESC_MASK[7:0][7] .sym 19304 $false .sym 19305 $false .sym 19306 $false .sym 19307 $auto$dff2dffe.cc:175:make_patterns_logic$48057$2 .sym 19308 CLK$2$2 .sym 19309 $0\KBD_FREEZE[0:0]$2 .sym 19384 $abc$60421$n1038 .sym 19385 $auto$simplemap.cc:250:simplemap_eqne$49134[4] .sym 19386 $false .sym 19387 $false .sym 19389 I2C.FLT_SDA.out .sym 19390 $abc$60421$n1046 .sym 19391 $abc$60421$n1044 .sym 19392 $abc$60421$n1045 .sym 19404 $abc$60421$n1044 .sym 19405 $abc$60421$n1046 .sym 19406 I2C.FLT_SDA.out .sym 19407 $false .sym 19409 $abc$60421$n1047 .sym 19410 $abc$60421$n1044 .sym 19411 $abc$60421$n1036 .sym 19412 $abc$60421$n1043 .sym 19423 $true .sym 19424 CLK$2$2 .sym 19425 $false .sym 19510 I2C.SCL_LAST .sym 19511 I2C.FLT_SCL.out .sym 19512 $false .sym 19513 $false .sym 19525 $auto$simplemap.cc:250:simplemap_eqne$49134[4] .sym 19526 $abc$60421$n1039 .sym 19527 $abc$60421$n1040 .sym 19528 $false .sym 19535 I2C.is_ack .sym 19536 $abc$60421$n1049 .sym 19537 $abc$60421$n690 .sym 19538 $false .sym 19539 $true .sym 19540 CLK$2$2 .sym 19541 $false .sym 19616 I2C.SDAF .sym 19617 $false .sym 19618 $false .sym 19619 $false .sym 19655 $auto$dff2dffe.cc:175:make_patterns_logic$59776 .sym 19656 CLK$2$2 .sym 19657 $0\KBD_FREEZE[0:0]$2 .sym 19737 KEYBOARD.row_counter[0] .sym 19738 $false .sym 19739 $false .sym 19740 $false .sym 19752 KEYBOARD.row_counter[0] .sym 19753 $false .sym 19754 $false .sym 19755 $false .sym 19762 $techmap$auto$alumacc.cc:470:replace_alu$22900.$xor$/usr/bin/../share/yosys/techmap.v:262$28020_Y[0] .sym 19763 $false .sym 19764 $false .sym 19765 $false .sym 19771 $auto$dff2dffe.cc:175:make_patterns_logic$50030 .sym 19772 CLK$2$2 .sym 19773 $auto$rtlil.cc:1692:NotGate$60420 .sym 19819 $false .sym 19821 KEYBOARD.ROWS_EN[0] .sym 19822 $false .sym 19824 KEYBOARD.ROWS_EN[1] .sym 19875 $add$top.v:47$12_Y[1] .sym 19876 $add$top.v:47$12_Y[2] .sym 19877 $auto$alumacc.cc:484:replace_alu$22873[2] .sym 19878 RESET .sym 19880 rststate[2] .sym 19881 rststate[1] .sym 19951 $auto$alumacc.cc:483:replace_alu$22849[7] .sym 19952 $auto$alumacc.cc:483:replace_alu$22867[5] .sym 19953 $auto$alumacc.cc:483:replace_alu$22867[3] .sym 19954 $abc$60421$n665_1 .sym 19956 $auto$alumacc.cc:483:replace_alu$22867[7] .sym 19957 I2C_INPUT_DATA[3][1] .sym 20088 $abc$60421$n670 .sym 20089 $abc$60421$n666 .sym 20090 $auto$alumacc.cc:483:replace_alu$22867[1] .sym 20091 $abc$60421$n664 .sym 20092 $abc$60421$n667_1 .sym 20093 $abc$60421$n668_1 .sym 20094 I2C_INPUT_DATA[2][7] .sym 20095 I2C_INPUT_DATA[2][6] .sym 20190 $abc$60421$n655 .sym 20192 $abc$60421$n651 .sym 20193 I2C_INPUT_DATA[5][5] .sym 20194 I2C_INPUT_DATA[5][0] .sym 20196 I2C_INPUT_DATA[5][6] .sym 20294 $abc$60421$n652 .sym 20296 UART.tx_clk_counter[1] .sym 20394 $abc$60421$n654_1 .sym 20395 I2C_INPUT_DATA[4][7] .sym 20396 I2C_INPUT_DATA[4][5] .sym 20397 I2C_INPUT_DATA[4][1] .sym 20398 I2C_INPUT_DATA[4][3] .sym 20399 I2C_INPUT_DATA[4][4] .sym 20400 I2C_INPUT_DATA[4][0] .sym 20401 I2C_INPUT_DATA[4][6] .sym 20502 $abc$60421$n1140 .sym 20503 UART_WR .sym 20598 $abc$60421$n1180 .sym 20599 $abc$60421$n627 .sym 20601 $auto$dff2dffe.cc:175:make_patterns_logic$48902 .sym 20602 $abc$60421$n1184 .sym 20603 $abc$60421$n1158 .sym 20605 I2C.received_byte[3] .sym 20700 $0$memwr$\I2C_INPUT_DATA$top.v:63$1_ADDR[3:0]$8[0] .sym 20701 $abc$60421$n1057 .sym 20702 $abc$60421$n1092 .sym 20703 $abc$60421$n1056 .sym 20704 $abc$60421$n1088 .sym 20705 KEYBOARD.report[45] .sym 20706 KEYBOARD.report[40] .sym 20707 KEYBOARD.report[42] .sym 20802 $memory\I2C_INPUT_DATA$wren[8][0][0]$y$23350 .sym 20803 $auto$dff2dffe.cc:175:make_patterns_logic$48969 .sym 20804 $abc$60421$n961 .sym 20805 $auto$dff2dffe.cc:175:make_patterns_logic$49170 .sym 20806 $abc$60421$n1100 .sym 20807 UART_TX_DATA[3] .sym 20808 UART_TX_DATA[5] .sym 20809 UART_TX_DATA[7] .sym 20904 $abc$60421$n1051 .sym 20905 $abc$60421$n683 .sym 20906 $abc$60421$n1091 .sym 20907 $abc$60421$n1093 .sym 20908 $auto$dff2dffe.cc:175:make_patterns_logic$49103 .sym 20909 LED2$2 .sym 20910 LED3$2 .sym 20911 LED4$2 .sym 21006 $abc$60421$n1037 .sym 21007 $abc$60421$n684 .sym 21008 $abc$60421$n1036 .sym 21009 $abc$60421$n1046 .sym 21010 $abc$60421$n1073 .sym 21011 $abc$60421$n868 .sym 21012 $techmap\I2C.$procmux$12628_Y .sym 21013 I2C.SDA_DIR .sym 21108 $abc$60421$n1041 .sym 21109 $abc$60421$n1055 .sym 21110 $abc$60421$n1045 .sym 21111 $abc$60421$n685 .sym 21112 $abc$60421$n1082 .sym 21113 $auto$simplemap.cc:250:simplemap_eqne$28997[4] .sym 21114 KEYBOARD.report[15] .sym 21115 KEYBOARD.report[13] .sym 21210 $abc$60421$n1039 .sym 21211 $abc$60421$n1049 .sym 21212 $abc$60421$n1075_1 .sym 21213 $abc$60421$n1050 .sym 21214 $abc$60421$n689 .sym 21215 $abc$60421$n1038 .sym 21216 $abc$60421$n688 .sym 21217 $abc$60421$n1074 .sym 21313 $auto$dff2dffe.cc:175:make_patterns_logic$59776 .sym 21314 $eq$top.v:152$130_Y .sym 21316 last_uart_active .sym 21415 $techmap$auto$alumacc.cc:470:replace_alu$22900.$xor$/usr/bin/../share/yosys/techmap.v:263$28021_Y[1] .sym 21417 $auto$dff2dffe.cc:175:make_patterns_logic$50030 .sym 21418 $auto$rtlil.cc:1692:NotGate$60420 .sym 21420 KEYBOARD.ROWS_EN[0] .sym 21421 KEYBOARD.ROWS_EN[1] .sym 21591 $false .sym 21593 KEYBOARD.ROWS_EN[2] .sym 21594 $false .sym 21596 KEYBOARD.ROWS_EN[3] .sym 21646 $add$top.v:47$12_Y[3] .sym 21647 rststate[3] .sym 21683 $false .sym 21720 $auto$alumacc.cc:484:replace_alu$22873[0] .sym 21722 $0\KBD_FREEZE[0:0]$2 .sym 21723 rststate[0] .sym 21725 $auto$alumacc.cc:484:replace_alu$22873[1] .sym 21726 $false .sym 21727 $false .sym 21728 rststate[1] .sym 21729 $auto$alumacc.cc:484:replace_alu$22873[0] .sym 21730 $auto$alumacc.cc:484:replace_alu$22873[2]$2 .sym 21731 $false .sym 21732 $false .sym 21733 rststate[2] .sym 21734 $auto$alumacc.cc:484:replace_alu$22873[1] .sym 21739 $auto$alumacc.cc:484:replace_alu$22873[2]$2 .sym 21741 rststate[3] .sym 21742 rststate[2] .sym 21743 rststate[1] .sym 21744 rststate[0] .sym 21751 $abc$60421$n977_1 .sym 21752 $add$top.v:47$12_Y[2] .sym 21753 $false .sym 21754 $false .sym 21756 $abc$60421$n977_1 .sym 21757 $add$top.v:47$12_Y[1] .sym 21758 $false .sym 21759 $false .sym 21760 $true .sym 21761 CLK$2$2 .sym 21762 $false .sym 21768 $auto$alumacc.cc:483:replace_alu$22867[2] .sym 21771 $auto$alumacc.cc:483:replace_alu$22867[4] .sym 21772 I2C_INPUT_DATA[0][1] .sym 21773 I2C_INPUT_DATA[0][0] .sym 21882 I2C.byte_counter[7] .sym 21883 $false .sym 21884 $false .sym 21885 $false .sym 21887 I2C_INPUT_LEN[5] .sym 21888 $false .sym 21889 $false .sym 21890 $false .sym 21892 I2C_INPUT_LEN[3] .sym 21893 $false .sym 21894 $false .sym 21895 $false .sym 21897 I2C_INPUT_LEN[4] .sym 21898 I2C_INPUT_LEN[5] .sym 21899 I2C_INPUT_LEN[6] .sym 21900 I2C_INPUT_LEN[7] .sym 21907 I2C_INPUT_LEN[7] .sym 21908 $false .sym 21909 $false .sym 21910 $false .sym 21912 I2C.received_byte[1] .sym 21913 $false .sym 21914 $false .sym 21915 $false .sym 21916 $auto$simplemap.cc:250:simplemap_eqne$49500 .sym 21917 CLK$2$2 .sym 21918 $false .sym 21926 $auto$alumacc.cc:484:replace_alu$22868[7] .sym 21993 $abc$60421$n665_1 .sym 21994 I2C_INPUT_LEN[2] .sym 21995 I2C_INPUT_LEN[3] .sym 21996 $false .sym 21998 I2C_INPUT_LEN[2] .sym 21999 I2C_INPUT_LEN[3] .sym 22000 I2C_INPUT_LEN[0] .sym 22001 I2C_INPUT_LEN[1] .sym 22003 I2C_INPUT_LEN[1] .sym 22004 $false .sym 22005 $false .sym 22006 $false .sym 22008 $abc$60421$n665_1 .sym 22009 $abc$60421$n666 .sym 22010 $false .sym 22011 $false .sym 22013 $abc$60421$n665_1 .sym 22014 $abc$60421$n668_1 .sym 22015 I2C_INPUT_LEN[0] .sym 22016 I2C_INPUT_LEN[1] .sym 22018 I2C_INPUT_LEN[2] .sym 22019 I2C_INPUT_LEN[3] .sym 22020 $false .sym 22021 $false .sym 22023 I2C.received_byte[7] .sym 22024 $false .sym 22025 $false .sym 22026 $false .sym 22028 I2C.received_byte[6] .sym 22029 $false .sym 22030 $false .sym 22031 $false .sym 22032 $auto$dff2dffe.cc:158:make_patterns_logic$49819 .sym 22033 CLK$2$2 .sym 22034 $false .sym 22035 $abc$60421$n653 .sym 22039 I2C_INPUT_DATA[5][7] .sym 22040 I2C_INPUT_DATA[5][1] .sym 22041 I2C_INPUT_DATA[5][4] .sym 22042 I2C_INPUT_DATA[5][2] .sym 22109 I2C_INPUT_DATA[5][0] .sym 22110 I2C_INPUT_DATA[5][3] .sym 22111 I2C_INPUT_DATA[5][5] .sym 22112 I2C_INPUT_DATA[5][6] .sym 22119 $abc$60421$n652 .sym 22120 $abc$60421$n653 .sym 22121 $abc$60421$n654_1 .sym 22122 $abc$60421$n655 .sym 22124 I2C.received_byte[5] .sym 22125 $false .sym 22126 $false .sym 22127 $false .sym 22129 I2C.received_byte[0] .sym 22130 $false .sym 22131 $false .sym 22132 $false .sym 22139 I2C.received_byte[6] .sym 22140 $false .sym 22141 $false .sym 22142 $false .sym 22148 $auto$dff2dffe.cc:158:make_patterns_logic$44949 .sym 22149 CLK$2$2 .sym 22150 $false .sym 22153 $techmap\UART.$sub$uart.v:30$342_Y[2] .sym 22154 $auto$alumacc.cc:484:replace_alu$22917[2] .sym 22155 I2C.received_byte[6] .sym 22235 I2C_INPUT_DATA[4][0] .sym 22236 I2C_INPUT_DATA[4][5] .sym 22237 I2C_INPUT_DATA[4][6] .sym 22238 I2C_INPUT_DATA[4][2] .sym 22245 UART.tx_activity .sym 22246 UART.tx_clk_counter[0] .sym 22247 UART.tx_clk_counter[1] .sym 22248 $false .sym 22264 $auto$dff2dffe.cc:158:make_patterns_logic$49597 .sym 22265 CLK$2$2 .sym 22266 $0\KBD_FREEZE[0:0]$2 .sym 22268 KEYBOARD.COLS_SHADOW[3] .sym 22269 KEYBOARD.COLS_SHADOW[1] .sym 22270 I2C.SDAF .sym 22271 KEYBOARD.COLS_SHADOW[0] .sym 22272 KEYBOARD.COLS_SHADOW[2] .sym 22273 I2C.SCLF .sym 22341 I2C_INPUT_DATA[4][3] .sym 22342 I2C_INPUT_DATA[4][4] .sym 22343 I2C_INPUT_DATA[4][7] .sym 22344 I2C_INPUT_DATA[4][1] .sym 22346 I2C.received_byte[7] .sym 22347 $false .sym 22348 $false .sym 22349 $false .sym 22351 I2C.received_byte[5] .sym 22352 $false .sym 22353 $false .sym 22354 $false .sym 22356 I2C.received_byte[1] .sym 22357 $false .sym 22358 $false .sym 22359 $false .sym 22361 I2C.received_byte[3] .sym 22362 $false .sym 22363 $false .sym 22364 $false .sym 22366 I2C.received_byte[4] .sym 22367 $false .sym 22368 $false .sym 22369 $false .sym 22371 I2C.received_byte[0] .sym 22372 $false .sym 22373 $false .sym 22374 $false .sym 22376 I2C.received_byte[6] .sym 22377 $false .sym 22378 $false .sym 22379 $false .sym 22380 $memory\I2C_INPUT_DATA$wren[4][0][0]$y$23322$2 .sym 22381 CLK$2$2 .sym 22382 $false .sym 22383 $abc$60421$n647 .sym 22384 $abc$60421$n650 .sym 22385 I2C_INPUT_DATA[3][7] .sym 22386 I2C_INPUT_DATA[3][5] .sym 22387 I2C_INPUT_DATA[3][4] .sym 22388 I2C_INPUT_DATA[3][3] .sym 22389 I2C_INPUT_DATA[3][2] .sym 22390 I2C_INPUT_DATA[3][6] .sym 22487 I2C.byte_counter[1] .sym 22488 I2C.byte_counter[3] .sym 22489 I2C.byte_counter[2] .sym 22490 I2C.byte_counter[0] .sym 22492 $0\uart_double_ff[0:0] .sym 22493 $auto$rtlil.cc:1692:NotGate$60252 .sym 22494 $abc$60421$n627 .sym 22495 $false .sym 22496 $auto$simplemap.cc:127:simplemap_reduce$45588[1] .sym 22497 CLK$2$2 .sym 22498 $0\KBD_FREEZE[0:0]$2 .sym 22506 I2C.received_byte[7] .sym 22573 $abc$60421$n921 .sym 22574 $abc$60421$n1136 .sym 22575 $false .sym 22576 $false .sym 22578 UART.tx_activity .sym 22579 last_uart_active .sym 22580 uart_double_ff .sym 22581 $false .sym 22588 RESET .sym 22589 $auto$rtlil.cc:1692:NotGate$60252 .sym 22590 $auto$dff2dffe.cc:175:make_patterns_logic$45702 .sym 22591 $false .sym 22593 $abc$60421$n1152 .sym 22594 $abc$60421$n1134 .sym 22595 $abc$60421$n1185 .sym 22596 $false .sym 22598 I2C.byte_counter[1] .sym 22599 I2C.byte_counter[3] .sym 22600 I2C.byte_counter[2] .sym 22601 I2C.byte_counter[0] .sym 22608 I2C.FLT_SDA.out .sym 22609 $false .sym 22610 $false .sym 22611 $false .sym 22612 $auto$dff2dffe.cc:175:make_patterns_logic$49170 .sym 22613 CLK$2$2 .sym 22614 $false .sym 22616 $auto$dff2dffe.cc:175:make_patterns_logic$49304 .sym 22620 $auto$dff2dffe.cc:175:make_patterns_logic$49371 .sym 22621 $auto$dff2dffe.cc:175:make_patterns_logic$49438 .sym 22622 I2C.received_byte[5] .sym 22689 $false .sym 22690 I2C.byte_counter[0] .sym 22691 $true$2 .sym 22692 $true$2 .sym 22694 I2C.received_byte[1] .sym 22695 I2C.received_byte[2] .sym 22696 I2C.received_byte[4] .sym 22697 I2C.received_byte[7] .sym 22699 $abc$60421$n1008_1 .sym 22700 $abc$60421$n1000 .sym 22701 $techmap\I2C.$sub$i2c_slave.v:142$207_Y[2] .sym 22702 $false .sym 22704 $abc$60421$n1057 .sym 22705 I2C.received_byte[3] .sym 22706 I2C.received_byte[5] .sym 22707 I2C.received_byte[6] .sym 22709 $abc$60421$n1090 .sym 22710 $abc$60421$n1089_1 .sym 22711 $abc$60421$n691 .sym 22712 $techmap\I2C.$sub$i2c_slave.v:142$207_Y[0] .sym 22714 $techmap\KEYBOARD.$procmux$4894_Y[5] .sym 22715 $false .sym 22716 $false .sym 22717 $false .sym 22719 $techmap\KEYBOARD.$procmux$4894_Y[0] .sym 22720 $false .sym 22721 $false .sym 22722 $false .sym 22724 $techmap\KEYBOARD.$procmux$4894_Y[2] .sym 22725 $false .sym 22726 $false .sym 22727 $false .sym 22728 $auto$dff2dffe.cc:175:make_patterns_logic$53393 .sym 22729 CLK$2$2 .sym 22730 $0\KBD_FREEZE[0:0]$2 .sym 22736 I2C_INPUT_DATA[8][1] .sym 22805 $abc$60421$n1216 .sym 22806 $abc$60421$n1217 .sym 22807 I2C.byte_counter[2] .sym 22808 $0$memwr$\I2C_INPUT_DATA$top.v:63$1_ADDR[3:0]$8[3] .sym 22810 $abc$60421$n683 .sym 22811 $abc$60421$n691 .sym 22812 $techmap\I2C.$sub$i2c_slave.v:142$207_Y[0] .sym 22813 $false .sym 22815 KEYBOARD.report[13] .sym 22816 KEYBOARD.report[45] .sym 22817 I2C.byte_counter[1] .sym 22818 I2C.byte_counter[2] .sym 22820 $abc$60421$n683 .sym 22821 $abc$60421$n691 .sym 22822 $techmap\I2C.$sub$i2c_slave.v:142$207_Y[0] .sym 22823 $false .sym 22825 UART_TX_DATA[7] .sym 22826 UART_TX_DATA[3] .sym 22827 $techmap\UART.$sub$uart.v:38$347_Y[2] .sym 22828 $false .sym 22830 I2C.received_byte[3] .sym 22831 $abc$60421$n1004 .sym 22832 I2C.is_read .sym 22833 $false .sym 22835 I2C.received_byte[5] .sym 22836 $abc$60421$n1008_1 .sym 22837 I2C.is_read .sym 22838 $false .sym 22840 I2C.received_byte[7] .sym 22841 $abc$60421$n1012 .sym 22842 I2C.is_read .sym 22843 $false .sym 22844 $auto$dff2dffe.cc:175:make_patterns_logic$45702 .sym 22845 CLK$2$2 .sym 22846 $auto$rtlil.cc:1692:NotGate$60252 .sym 22847 $abc$60421$n698 .sym 22848 $auto$simplemap.cc:127:simplemap_reduce$33860[0] .sym 22849 $techmap\I2C.$sub$i2c_slave.v:142$207_Y[0] .sym 22850 $techmap$auto$alumacc.cc:470:replace_alu$22891.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$27651_Y[0] .sym 22852 $auto$dff2dffe.cc:175:make_patterns_logic$49237 .sym 22853 I2C_INPUT_DATA[8][2] .sym 22854 I2C_INPUT_DATA[8][0] .sym 22921 $abc$60421$n1056 .sym 22922 $abc$60421$n1052 .sym 22923 $abc$60421$n1055 .sym 22924 $false .sym 22926 $abc$60421$n684 .sym 22927 $techmap\I2C.$sub$i2c_slave.v:142$207_Y[2] .sym 22928 $false .sym 22929 $false .sym 22931 $abc$60421$n1093 .sym 22932 $abc$60421$n1092 .sym 22933 $abc$60421$n691 .sym 22934 $techmap\I2C.$sub$i2c_slave.v:142$207_Y[0] .sym 22936 $abc$60421$n1012 .sym 22937 $abc$60421$n1004 .sym 22938 $techmap\I2C.$sub$i2c_slave.v:142$207_Y[2] .sym 22939 $false .sym 22941 $abc$60421$n683 .sym 22942 $abc$60421$n691 .sym 22943 $techmap\I2C.$sub$i2c_slave.v:142$207_Y[0] .sym 22944 $false .sym 22946 I2C_INPUT_DATA[8][0] .sym 22947 I2C_INPUT_DATA[4][0] .sym 22948 $abc$60421$n667_1 .sym 22949 $false .sym 22951 I2C_INPUT_DATA[8][1] .sym 22952 I2C_INPUT_DATA[4][1] .sym 22953 $abc$60421$n667_1 .sym 22954 $false .sym 22956 I2C_INPUT_DATA[8][2] .sym 22957 I2C_INPUT_DATA[4][2] .sym 22958 $abc$60421$n667_1 .sym 22959 $false .sym 22960 $auto$dff2dffe.cc:175:make_patterns_logic$48550 .sym 22961 CLK$2$2 .sym 22962 $0\KBD_FREEZE[0:0]$2 .sym 22963 $auto$alumacc.cc:470:replace_alu$22832.BB[3] .sym 22964 $auto$alumacc.cc:470:replace_alu$22832.B_buf[1] .sym 22965 $abc$60421$n691 .sym 22966 $auto$alumacc.cc:470:replace_alu$22832.B_buf[2] .sym 22967 I2C.i2c_bit_counter[1] .sym 22968 I2C.i2c_bit_counter[3] .sym 22969 I2C.i2c_bit_counter[2] .sym 22970 I2C.i2c_bit_counter[0] .sym 23037 $abc$60421$n1040 .sym 23038 $abc$60421$n1038 .sym 23039 $abc$60421$n686 .sym 23040 $auto$simplemap.cc:250:simplemap_eqne$49134[4] .sym 23042 $abc$60421$n685 .sym 23043 $abc$60421$n688 .sym 23044 $false .sym 23045 $false .sym 23047 $abc$60421$n1042 .sym 23048 $abc$60421$n1041 .sym 23049 $abc$60421$n690 .sym 23050 $abc$60421$n1037 .sym 23052 I2C.FLT_SCL.out .sym 23053 I2C.FLT_SDA.out .sym 23054 I2C.SDA_LAST .sym 23055 I2C.SDA_DIR .sym 23057 $abc$60421$n688 .sym 23058 $abc$60421$n1041 .sym 23059 $abc$60421$n690 .sym 23060 $abc$60421$n1037 .sym 23062 $abc$60421$n574 .sym 23063 $auto$dff2dffe.cc:175:make_patterns_logic$50051$2 .sym 23064 $false .sym 23065 $false .sym 23067 I2C.FLT_SCL.out .sym 23068 I2C.FLT_SDA.out .sym 23069 I2C.SDA_LAST .sym 23070 $false .sym 23072 $abc$60421$n1046 .sym 23073 $abc$60421$n1085 .sym 23074 $abc$60421$n690 .sym 23075 $false .sym 23076 $true .sym 23077 CLK$2$2 .sym 23078 $false .sym 23081 $techmap\I2C.$sub$i2c_slave.v:142$207_Y[2] .sym 23082 $auto$simplemap.cc:250:simplemap_eqne$28997[3] .sym 23083 $auto$alumacc.cc:484:replace_alu$22893[30] .sym 23084 $auto$alumacc.cc:470:replace_alu$22832.B_buf[3] .sym 23085 $auto$alumacc.cc:470:replace_alu$22832.BB[2] .sym 23086 I2C.received_byte[4] .sym 23153 $abc$60421$n1039 .sym 23154 $abc$60421$n1040 .sym 23155 $auto$simplemap.cc:250:simplemap_eqne$49134[4] .sym 23156 $abc$60421$n686 .sym 23158 $abc$60421$n1039 .sym 23159 $abc$60421$n1040 .sym 23160 $false .sym 23161 $false .sym 23163 $abc$60421$n686 .sym 23164 $abc$60421$n690 .sym 23165 $false .sym 23166 $false .sym 23168 $abc$60421$n686 .sym 23169 $auto$simplemap.cc:250:simplemap_eqne$28997[3] .sym 23170 $auto$simplemap.cc:250:simplemap_eqne$28997[4] .sym 23171 $auto$alumacc.cc:484:replace_alu$22893[30] .sym 23173 $abc$60421$n1051 .sym 23174 $abc$60421$n1055 .sym 23175 $auto$simplemap.cc:250:simplemap_eqne$49134[4] .sym 23176 $false .sym 23178 $false .sym 23179 $false .sym 23180 $true$2 .sym 23181 $auto$alumacc.cc:484:replace_alu$22893[30] .sym 23183 $false .sym 23184 $false .sym 23185 $false .sym 23186 $false .sym 23188 $false .sym 23189 $false .sym 23190 $false .sym 23191 $false .sym 23192 $auto$dff2dffe.cc:175:make_patterns_logic$50579 .sym 23193 CLK$2$2 .sym 23194 $false .sym 23199 $auto$simplemap.cc:250:simplemap_eqne$49134[4] .sym 23200 $auto$alumacc.cc:470:replace_alu$22832.BB[1] .sym 23202 $auto$alumacc.cc:470:replace_alu$22832.C[1] .sym 23269 $techmap\I2C.$procmux$12628_Y .sym 23270 I2C.is_ack .sym 23271 $false .sym 23272 $false .sym 23274 $abc$60421$n1058 .sym 23275 $abc$60421$n1050 .sym 23276 $abc$60421$n686 .sym 23277 $false .sym 23279 $abc$60421$n686 .sym 23280 I2C.SCL_LAST .sym 23281 I2C.FLT_SCL.out .sym 23282 $false .sym 23284 $abc$60421$n1040 .sym 23285 $abc$60421$n1039 .sym 23286 $abc$60421$n1051 .sym 23287 $auto$simplemap.cc:250:simplemap_eqne$49134[4] .sym 23289 I2C.SCL_LAST .sym 23290 I2C.FLT_SCL.out .sym 23291 $false .sym 23292 $false .sym 23294 $abc$60421$n1039 .sym 23295 $abc$60421$n689 .sym 23296 $false .sym 23297 $false .sym 23299 $abc$60421$n689 .sym 23300 $abc$60421$n690 .sym 23301 $auto$simplemap.cc:250:simplemap_eqne$49134[4] .sym 23302 $false .sym 23304 $abc$60421$n1075_1 .sym 23305 $abc$60421$n690 .sym 23306 $auto$simplemap.cc:250:simplemap_eqne$49134[4] .sym 23307 $false .sym 23311 $techmap\I2C.FLT_SDA.$procmux$979_Y[0] .sym 23312 $auto$dff2dffe.cc:158:make_patterns_logic$59791 .sym 23313 $abc$60421$n894_1 .sym 23314 $auto$wreduce.cc:310:run$22796[2] .sym 23315 $abc$60421$n895 .sym 23316 I2C.FLT_SDA.counter[2] .sym 23317 I2C.FLT_SDA.counter[0] .sym 23318 I2C.FLT_SDA.counter[1] .sym 23390 $techmap\I2C.FLT_SDA.$procmux$979_Y[0] .sym 23391 $abc$60421$n895 .sym 23392 $false .sym 23393 $false .sym 23395 UART.tx_activity .sym 23396 $false .sym 23397 $false .sym 23398 $false .sym 23405 UART.tx_activity .sym 23406 $false .sym 23407 $false .sym 23408 $false .sym 23424 RESET .sym 23425 CLK$2$2 .sym 23426 $false .sym 23429 $auto$alumacc.cc:484:replace_alu$22899[1] .sym 23432 $auto$wreduce.cc:310:run$22796[0] .sym 23433 $techmap\I2C.FLT_SDA.$procmux$979_Y[1] .sym 23506 KEYBOARD.row_counter[0] .sym 23507 KEYBOARD.row_counter[1] .sym 23508 $false .sym 23509 $false .sym 23516 $auto$rtlil.cc:1692:NotGate$60414$2 .sym 23517 $auto$dff2dffe.cc:175:make_patterns_logic$50051$2 .sym 23518 $false .sym 23519 $false .sym 23521 $techmap$auto$alumacc.cc:470:replace_alu$22900.$xor$/usr/bin/../share/yosys/techmap.v:263$28021_Y[1] .sym 23522 $false .sym 23523 $false .sym 23524 $false .sym 23531 KEYBOARD.row_counter[0] .sym 23532 $false .sym 23533 $false .sym 23534 $false .sym 23536 $techmap$auto$alumacc.cc:470:replace_alu$22900.$xor$/usr/bin/../share/yosys/techmap.v:262$28020_Y[0] .sym 23537 $false .sym 23538 $false .sym 23539 $false .sym 23540 $auto$dff2dffe.cc:175:make_patterns_logic$50030 .sym 23541 CLK$2$2 .sym 23542 $techmap$auto$alumacc.cc:470:replace_alu$22900.$xor$/usr/bin/../share/yosys/techmap.v:263$28021_Y[1] .sym 23710 $false .sym 23711 $false .sym 23712 rststate[3] .sym 23713 $auto$alumacc.cc:484:replace_alu$22873[2] .sym 23715 $abc$60421$n977_1 .sym 23716 $add$top.v:47$12_Y[3] .sym 23717 $false .sym 23718 $false .sym 23749 $true .sym 23750 CLK$2$2 .sym 23751 $false .sym 23875 I2C_INPUT_LEN[2] .sym 23876 $false .sym 23877 $false .sym 23878 $false .sym 23890 I2C_INPUT_LEN[4] .sym 23891 $false .sym 23892 $false .sym 23893 $false .sym 23895 I2C.received_byte[1] .sym 23896 $false .sym 23897 $false .sym 23898 $false .sym 23900 I2C.received_byte[0] .sym 23901 $false .sym 23902 $false .sym 23903 $false .sym 23909 $memory\I2C_INPUT_DATA$wren[0][0][0]$y$23284$2 .sym 23910 CLK$2$2 .sym 23911 $false .sym 23914 KBD_COLUMNS[0]$2 .sym 23980 $true .sym 24017 $auto$alumacc.cc:483:replace_alu$22867[1]$2 .sym 24018 $false .sym 24019 $auto$alumacc.cc:483:replace_alu$22867[1] .sym 24020 $false .sym 24021 $false .sym 24022 $auto$alumacc.cc:484:replace_alu$22868[2] .sym 24024 $false .sym 24025 $auto$alumacc.cc:483:replace_alu$22867[2] .sym 24027 $auto$alumacc.cc:484:replace_alu$22868[3] .sym 24029 $false .sym 24030 $auto$alumacc.cc:483:replace_alu$22867[3] .sym 24032 $auto$alumacc.cc:484:replace_alu$22868[4] .sym 24034 $false .sym 24035 $auto$alumacc.cc:483:replace_alu$22867[4] .sym 24037 $auto$alumacc.cc:484:replace_alu$22868[5] .sym 24039 $false .sym 24040 $auto$alumacc.cc:483:replace_alu$22867[5] .sym 24042 $auto$alumacc.cc:484:replace_alu$22868[6] .sym 24044 $false .sym 24045 $auto$alumacc.cc:483:replace_alu$22867[6] .sym 24047 $auto$alumacc.cc:484:replace_alu$22868[7]$2 .sym 24049 $false .sym 24050 $auto$alumacc.cc:483:replace_alu$22867[7] .sym 24056 $auto$alumacc.cc:484:replace_alu$22868[7]$2 .sym 24060 KBD_COLUMNS[1]$2 .sym 24062 KBD_COLUMNS[2]$2 .sym 24166 I2C_INPUT_DATA[5][1] .sym 24167 I2C_INPUT_DATA[5][2] .sym 24168 I2C_INPUT_DATA[5][4] .sym 24169 I2C_INPUT_DATA[5][7] .sym 24186 I2C.received_byte[7] .sym 24187 $false .sym 24188 $false .sym 24189 $false .sym 24191 I2C.received_byte[1] .sym 24192 $false .sym 24193 $false .sym 24194 $false .sym 24196 I2C.received_byte[4] .sym 24197 $false .sym 24198 $false .sym 24199 $false .sym 24201 I2C.received_byte[2] .sym 24202 $false .sym 24203 $false .sym 24204 $false .sym 24205 $auto$dff2dffe.cc:158:make_patterns_logic$44949 .sym 24206 CLK$2$2 .sym 24207 $false .sym 24276 $true .sym 24313 UART.tx_clk_counter[0]$2 .sym 24314 $false .sym 24315 UART.tx_clk_counter[0] .sym 24316 $false .sym 24317 $false .sym 24318 $auto$alumacc.cc:484:replace_alu$22917[1] .sym 24320 UART.tx_clk_counter[1] .sym 24321 $true$2 .sym 24323 $auto$alumacc.cc:484:replace_alu$22917[2]$2 .sym 24324 $false .sym 24325 UART.tx_clk_counter[2] .sym 24326 $true$2 .sym 24327 $auto$alumacc.cc:484:replace_alu$22917[1] .sym 24332 $auto$alumacc.cc:484:replace_alu$22917[2]$2 .sym 24334 I2C.FLT_SDA.out .sym 24335 $false .sym 24336 $false .sym 24337 $false .sym 24353 $auto$dff2dffe.cc:175:make_patterns_logic$49371 .sym 24354 CLK$2$2 .sym 24355 $false .sym 24356 KBD_COLUMNS[3]$2 .sym 24467 KBD_COLUMNS[3]$2 .sym 24468 $false .sym 24469 $false .sym 24470 $false .sym 24472 KBD_COLUMNS[1]$2 .sym 24473 $false .sym 24474 $false .sym 24475 $false .sym 24477 I2C.SDA_IN .sym 24478 $false .sym 24479 $false .sym 24480 $false .sym 24482 KBD_COLUMNS[0]$2 .sym 24483 $false .sym 24484 $false .sym 24485 $false .sym 24487 KBD_COLUMNS[2]$2 .sym 24488 $false .sym 24489 $false .sym 24490 $false .sym 24492 SCL$2 .sym 24493 $false .sym 24494 $false .sym 24495 $false .sym 24501 $true .sym 24502 CLK$2$2 .sym 24503 $false .sym 24506 SCL$2 .sym 24610 I2C_INPUT_DATA[3][4] .sym 24611 I2C_INPUT_DATA[3][5] .sym 24612 I2C_INPUT_DATA[3][6] .sym 24613 I2C_INPUT_DATA[3][7] .sym 24615 I2C_INPUT_DATA[3][2] .sym 24616 I2C_INPUT_DATA[3][3] .sym 24617 $false .sym 24618 $false .sym 24620 I2C.received_byte[7] .sym 24621 $false .sym 24622 $false .sym 24623 $false .sym 24625 I2C.received_byte[5] .sym 24626 $false .sym 24627 $false .sym 24628 $false .sym 24630 I2C.received_byte[4] .sym 24631 $false .sym 24632 $false .sym 24633 $false .sym 24635 I2C.received_byte[3] .sym 24636 $false .sym 24637 $false .sym 24638 $false .sym 24640 I2C.received_byte[2] .sym 24641 $false .sym 24642 $false .sym 24643 $false .sym 24645 I2C.received_byte[6] .sym 24646 $false .sym 24647 $false .sym 24648 $false .sym 24649 $auto$simplemap.cc:250:simplemap_eqne$49500 .sym 24650 CLK$2$2 .sym 24651 $false .sym 24652 I2C.SDA_IN .sym 24793 I2C.FLT_SDA.out .sym 24794 $false .sym 24795 $false .sym 24796 $false .sym 24797 $auto$dff2dffe.cc:175:make_patterns_logic$49438 .sym 24798 CLK$2$2 .sym 24799 $false .sym 24911 $abc$60421$n698 .sym 24912 $abc$60421$n691 .sym 24913 $techmap\I2C.$sub$i2c_slave.v:142$207_Y[0] .sym 24914 $false .sym 24931 $abc$60421$n698 .sym 24932 $abc$60421$n691 .sym 24933 $techmap\I2C.$sub$i2c_slave.v:142$207_Y[0] .sym 24934 $false .sym 24936 $abc$60421$n698 .sym 24937 $abc$60421$n691 .sym 24938 $techmap\I2C.$sub$i2c_slave.v:142$207_Y[0] .sym 24939 $false .sym 24941 I2C.FLT_SDA.out .sym 24942 $false .sym 24943 $false .sym 24944 $false .sym 24945 $auto$dff2dffe.cc:175:make_patterns_logic$49304 .sym 24946 CLK$2$2 .sym 24947 $false .sym 25079 I2C.received_byte[1] .sym 25080 $false .sym 25081 $false .sym 25082 $false .sym 25093 $memory\I2C_INPUT_DATA$wren[8][0][0]$y$23350 .sym 25094 CLK$2$2 .sym 25095 $false .sym 25202 $abc$60421$n684 .sym 25203 $techmap\I2C.$sub$i2c_slave.v:142$207_Y[2] .sym 25204 $false .sym 25205 $false .sym 25207 $false .sym 25208 $true$2 .sym 25209 $false .sym 25210 $false .sym 25212 $false .sym 25213 $techmap$auto$alumacc.cc:470:replace_alu$22891.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$27651_Y[0] .sym 25214 $false .sym 25215 $true$2 .sym 25217 $techmap\I2C.$procmux$12628_Y .sym 25218 I2C.i2c_bit_counter[0] .sym 25219 $false .sym 25220 $false .sym 25227 $abc$60421$n698 .sym 25228 $abc$60421$n691 .sym 25229 $techmap\I2C.$sub$i2c_slave.v:142$207_Y[0] .sym 25230 $false .sym 25232 I2C.received_byte[2] .sym 25233 $false .sym 25234 $false .sym 25235 $false .sym 25237 I2C.received_byte[0] .sym 25238 $false .sym 25239 $false .sym 25240 $false .sym 25241 $memory\I2C_INPUT_DATA$wren[8][0][0]$y$23350 .sym 25242 CLK$2$2 .sym 25243 $false .sym 25350 $techmap\I2C.$procmux$12628_Y .sym 25351 I2C.i2c_bit_counter[3] .sym 25352 $false .sym 25353 $false .sym 25355 $techmap\I2C.$procmux$12628_Y .sym 25356 I2C.i2c_bit_counter[1] .sym 25357 $false .sym 25358 $false .sym 25360 $auto$alumacc.cc:470:replace_alu$22832.B_buf[1] .sym 25361 $techmap$auto$alumacc.cc:470:replace_alu$22891.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$27651_Y[0] .sym 25362 $false .sym 25363 $false .sym 25365 $techmap\I2C.$procmux$12628_Y .sym 25366 I2C.i2c_bit_counter[2] .sym 25367 $false .sym 25368 $false .sym 25370 $abc$60421$n1074 .sym 25371 $abc$60421$n691 .sym 25372 $abc$60421$n1073 .sym 25373 $auto$alumacc.cc:470:replace_alu$22832.B_buf[1] .sym 25375 $abc$60421$n1074 .sym 25376 $auto$simplemap.cc:250:simplemap_eqne$28997[3] .sym 25377 $auto$alumacc.cc:470:replace_alu$22832.BB[3] .sym 25378 $abc$60421$n1073 .sym 25380 $abc$60421$n1074 .sym 25381 $techmap\I2C.$sub$i2c_slave.v:142$207_Y[2] .sym 25382 $auto$alumacc.cc:470:replace_alu$22832.B_buf[2] .sym 25383 $abc$60421$n1073 .sym 25385 $abc$60421$n1074 .sym 25386 $techmap\I2C.$sub$i2c_slave.v:142$207_Y[0] .sym 25387 $techmap$auto$alumacc.cc:470:replace_alu$22891.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$27651_Y[0] .sym 25388 $abc$60421$n1073 .sym 25389 $true .sym 25390 CLK$2$2 .sym 25391 $false .sym 25460 $true .sym 25497 $techmap$auto$alumacc.cc:470:replace_alu$22891.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$27651_Y[0]$2 .sym 25498 $false .sym 25499 $techmap$auto$alumacc.cc:470:replace_alu$22891.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$27651_Y[0] .sym 25500 $false .sym 25501 $false .sym 25502 $auto$alumacc.cc:484:replace_alu$22893[1] .sym 25504 $auto$alumacc.cc:470:replace_alu$22832.B_buf[1] .sym 25505 $true$2 .sym 25507 $auto$alumacc.cc:484:replace_alu$22893[2] .sym 25508 $false .sym 25509 $auto$alumacc.cc:470:replace_alu$22832.B_buf[2] .sym 25510 $true$2 .sym 25511 $auto$alumacc.cc:484:replace_alu$22893[1] .sym 25512 $auto$alumacc.cc:484:replace_alu$22893[30]$2 .sym 25513 $false .sym 25514 $auto$alumacc.cc:470:replace_alu$22832.B_buf[3] .sym 25515 $true$2 .sym 25516 $auto$alumacc.cc:484:replace_alu$22893[2] .sym 25521 $auto$alumacc.cc:484:replace_alu$22893[30]$2 .sym 25523 $auto$alumacc.cc:470:replace_alu$22832.BB[3] .sym 25524 $false .sym 25525 $false .sym 25526 $false .sym 25528 $auto$alumacc.cc:470:replace_alu$22832.B_buf[2] .sym 25529 $false .sym 25530 $false .sym 25531 $false .sym 25533 I2C.FLT_SDA.out .sym 25534 $false .sym 25535 $false .sym 25536 $false .sym 25537 $auto$dff2dffe.cc:175:make_patterns_logic$49237 .sym 25538 CLK$2$2 .sym 25539 $false .sym 25608 $true .sym 25645 $auto$alumacc.cc:470:replace_alu$22832.C[1]$2 .sym 25646 $false .sym 25647 $auto$alumacc.cc:470:replace_alu$22832.C[1] .sym 25648 $false .sym 25649 $false .sym 25650 $auto$alumacc.cc:470:replace_alu$22832.C[2] .sym 25652 $false .sym 25653 $auto$alumacc.cc:470:replace_alu$22832.BB[1] .sym 25655 $auto$alumacc.cc:470:replace_alu$22832.C[3] .sym 25657 $false .sym 25658 $auto$alumacc.cc:470:replace_alu$22832.BB[2] .sym 25660 $auto$simplemap.cc:250:simplemap_eqne$49134[4]$2 .sym 25662 $false .sym 25663 $auto$alumacc.cc:470:replace_alu$22832.BB[3] .sym 25669 $auto$simplemap.cc:250:simplemap_eqne$49134[4]$2 .sym 25671 $auto$alumacc.cc:470:replace_alu$22832.B_buf[1] .sym 25672 $false .sym 25673 $false .sym 25674 $false .sym 25681 $techmap$auto$alumacc.cc:470:replace_alu$22891.$xor$/usr/bin/../share/yosys/ice40/arith_map.v:68$27651_Y[0] .sym 25682 $false .sym 25683 $false .sym 25684 $false .sym 25794 $abc$60421$n894_1 .sym 25795 $auto$wreduce.cc:310:run$22796[0] .sym 25796 $false .sym 25797 $false .sym 25799 $abc$60421$n894_1 .sym 25800 I2C.FLT_SDA.out .sym 25801 I2C.SDAF .sym 25802 $false .sym 25804 I2C.FLT_SDA.counter[0] .sym 25805 I2C.FLT_SDA.counter[1] .sym 25806 I2C.FLT_SDA.counter[2] .sym 25807 $false .sym 25809 $false .sym 25810 I2C.FLT_SDA.counter[2] .sym 25811 $true$2 .sym 25812 $auto$alumacc.cc:484:replace_alu$22899[1] .sym 25814 $techmap\I2C.FLT_SDA.$procmux$979_Y[1] .sym 25815 $auto$wreduce.cc:310:run$22796[2] .sym 25816 I2C.FLT_SDA.out .sym 25817 I2C.SDAF .sym 25819 $abc$60421$n894_1 .sym 25820 $auto$wreduce.cc:310:run$22796[2] .sym 25821 $false .sym 25822 $false .sym 25824 $techmap\I2C.FLT_SDA.$procmux$979_Y[0] .sym 25825 $false .sym 25826 $false .sym 25827 $false .sym 25829 $techmap\I2C.FLT_SDA.$procmux$979_Y[1] .sym 25830 $false .sym 25831 $false .sym 25832 $false .sym 25833 $auto$dff2dffe.cc:158:make_patterns_logic$59791 .sym 25834 CLK$2$2 .sym 25835 $0\KBD_FREEZE[0:0]$2 .sym 25904 $true .sym 25941 I2C.FLT_SDA.counter[0]$2 .sym 25942 $false .sym 25943 I2C.FLT_SDA.counter[0] .sym 25944 $false .sym 25945 $false .sym 25946 $auto$alumacc.cc:484:replace_alu$22899[1]$2 .sym 25948 I2C.FLT_SDA.counter[1] .sym 25949 $true$2 .sym 25955 $auto$alumacc.cc:484:replace_alu$22899[1]$2 .sym 25967 $false .sym 25968 I2C.FLT_SDA.counter[0] .sym 25969 $false .sym 25970 $true$2 .sym 25972 I2C.FLT_SDA.counter[0] .sym 25973 I2C.FLT_SDA.counter[1] .sym 25974 $false .sym 25975 $false .sym 26280 INT .sym 26309 $memory\I2C_INPUT_DATA$wren[4][0][0]$y$23322 .sym 26310 $false .sym 26312 I2C.SDA_DIR .sym 26339 $auto$rtlil.cc:1692:NotGate$60414 .sym 26343 I2C_TRANS .sym 26399 LED4$2 .sym 26402 LED3$2 .sym 26429 LED2$2 .sym 26432 LED1$2