We spell out sub/dir/ in sub/dir/trace-events' comments pointing to source files. That's because when trace-events got split up, the comments were moved verbatim. Delete the sub/dir/ part from these comments. Gets rid of several misspellings. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190314180929.27722-3-armbru@redhat.com Message-Id: <20190314180929.27722-3-armbru@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>tags/v4.0.0-rc1
@@ -1,6 +1,6 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# audio/alsaaudio.c | |||
# alsaaudio.c | |||
alsa_revents(int revents) "revents = %d" | |||
alsa_pollout(int i, int fd) "i = %d fd = %d" | |||
alsa_set_handler(int events, int index, int fd, int err) "events=0x%x index=%d fd=%d err=%d" | |||
@@ -12,11 +12,11 @@ alsa_resume_out(void) "Resuming suspended output stream" | |||
alsa_resume_in(void) "Resuming suspended input stream" | |||
alsa_no_frames(int state) "No frames available and ALSA state is %d" | |||
# audio/ossaudio.c | |||
# ossaudio.c | |||
oss_version(int version) "OSS version = 0x%x" | |||
oss_invalid_available_size(int size, int bufsize) "Invalid available size, size=%d bufsize=%d" | |||
# audio/audio.c | |||
# audio.c | |||
audio_timer_start(int interval) "interval %d ms" | |||
audio_timer_stop(void) "" | |||
audio_timer_delayed(int interval) "interval %d ms" |
@@ -1,18 +1,18 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# authz/base.c | |||
# base.c | |||
qauthz_is_allowed(void *authz, const char *identity, bool allowed) "AuthZ %p check identity=%s allowed=%d" | |||
# auth/simple.c | |||
# simple.c | |||
qauthz_simple_is_allowed(void *authz, const char *wantidentity, const char *gotidentity) "AuthZ simple %p check want identity=%s got identity=%s" | |||
# auth/list.c | |||
# list.c | |||
qauthz_list_check_rule(void *authz, const char *identity, const char *rule, int format, int policy) "AuthZ list %p check rule=%s identity=%s format=%d policy=%d" | |||
qauthz_list_default_policy(void *authz, const char *identity, int policy) "AuthZ list %p default identity=%s policy=%d" | |||
# auth/listfile.c | |||
# listfile.c | |||
qauthz_list_file_load(void *authz, const char *filename) "AuthZ file %p load filename=%s" | |||
qauthz_list_file_refresh(void *authz, const char *filename, int success) "AuthZ file %p load filename=%s success=%d" | |||
# auth/pam.c | |||
# pam.c | |||
qauthz_pam_check(void *authz, const char *identity, const char *service) "AuthZ PAM %p identity=%s service=%s" |
@@ -1,16 +1,16 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# block.c | |||
# ../block.c | |||
bdrv_open_common(void *bs, const char *filename, int flags, const char *format_name) "bs %p filename \"%s\" flags 0x%x format_name \"%s\"" | |||
bdrv_lock_medium(void *bs, bool locked) "bs %p locked %d" | |||
# block/block-backend.c | |||
# block-backend.c | |||
blk_co_preadv(void *blk, void *bs, int64_t offset, unsigned int bytes, int flags) "blk %p bs %p offset %"PRId64" bytes %u flags 0x%x" | |||
blk_co_pwritev(void *blk, void *bs, int64_t offset, unsigned int bytes, int flags) "blk %p bs %p offset %"PRId64" bytes %u flags 0x%x" | |||
blk_root_attach(void *child, void *blk, void *bs) "child %p blk %p bs %p" | |||
blk_root_detach(void *child, void *blk, void *bs) "child %p blk %p bs %p" | |||
# block/io.c | |||
# io.c | |||
bdrv_co_preadv(void *bs, int64_t offset, int64_t nbytes, unsigned int flags) "bs %p offset %"PRId64" nbytes %"PRId64" flags 0x%x" | |||
bdrv_co_pwritev(void *bs, int64_t offset, int64_t nbytes, unsigned int flags) "bs %p offset %"PRId64" nbytes %"PRId64" flags 0x%x" | |||
bdrv_co_pwrite_zeroes(void *bs, int64_t offset, int count, int flags) "bs %p offset %"PRId64" count %d flags 0x%x" | |||
@@ -18,15 +18,15 @@ bdrv_co_do_copy_on_readv(void *bs, int64_t offset, unsigned int bytes, int64_t c | |||
bdrv_co_copy_range_from(void *src, uint64_t src_offset, void *dst, uint64_t dst_offset, uint64_t bytes, int read_flags, int write_flags) "src %p offset %"PRIu64" dst %p offset %"PRIu64" bytes %"PRIu64" rw flags 0x%x 0x%x" | |||
bdrv_co_copy_range_to(void *src, uint64_t src_offset, void *dst, uint64_t dst_offset, uint64_t bytes, int read_flags, int write_flags) "src %p offset %"PRIu64" dst %p offset %"PRIu64" bytes %"PRIu64" rw flags 0x%x 0x%x" | |||
# block/stream.c | |||
# stream.c | |||
stream_one_iteration(void *s, int64_t offset, uint64_t bytes, int is_allocated) "s %p offset %" PRId64 " bytes %" PRIu64 " is_allocated %d" | |||
stream_start(void *bs, void *base, void *s) "bs %p base %p s %p" | |||
# block/commit.c | |||
# commit.c | |||
commit_one_iteration(void *s, int64_t offset, uint64_t bytes, int is_allocated) "s %p offset %" PRId64 " bytes %" PRIu64 " is_allocated %d" | |||
commit_start(void *bs, void *base, void *top, void *s) "bs %p base %p top %p s %p" | |||
# block/mirror.c | |||
# mirror.c | |||
mirror_start(void *bs, void *s, void *opaque) "bs %p s %p opaque %p" | |||
mirror_restart_iter(void *s, int64_t cnt) "s %p dirty count %"PRId64 | |||
mirror_before_flush(void *s) "s %p" | |||
@@ -37,7 +37,7 @@ mirror_iteration_done(void *s, int64_t offset, uint64_t bytes, int ret) "s %p of | |||
mirror_yield(void *s, int64_t cnt, int buf_free_count, int in_flight) "s %p dirty count %"PRId64" free buffers %d in_flight %d" | |||
mirror_yield_in_flight(void *s, int64_t offset, int in_flight) "s %p offset %" PRId64 " in_flight %d" | |||
# block/backup.c | |||
# backup.c | |||
backup_do_cow_enter(void *job, int64_t start, int64_t offset, uint64_t bytes) "job %p start %" PRId64 " offset %" PRId64 " bytes %" PRIu64 | |||
backup_do_cow_return(void *job, int64_t offset, uint64_t bytes, int ret) "job %p offset %" PRId64 " bytes %" PRIu64 " ret %d" | |||
backup_do_cow_skip(void *job, int64_t start) "job %p start %"PRId64 | |||
@@ -46,7 +46,7 @@ backup_do_cow_read_fail(void *job, int64_t start, int ret) "job %p start %"PRId6 | |||
backup_do_cow_write_fail(void *job, int64_t start, int ret) "job %p start %"PRId64" ret %d" | |||
backup_do_cow_copy_range_fail(void *job, int64_t start, int ret) "job %p start %"PRId64" ret %d" | |||
# blockdev.c | |||
# ../blockdev.c | |||
qmp_block_job_cancel(void *job) "job %p" | |||
qmp_block_job_pause(void *job) "job %p" | |||
qmp_block_job_resume(void *job) "job %p" | |||
@@ -55,13 +55,13 @@ qmp_block_job_finalize(void *job) "job %p" | |||
qmp_block_job_dismiss(void *job) "job %p" | |||
qmp_block_stream(void *bs, void *job) "bs %p job %p" | |||
# block/file-win32.c | |||
# block/file-posix.c | |||
# file-posix.c | |||
# file-win32.c | |||
file_paio_submit_co(int64_t offset, int count, int type) "offset %"PRId64" count %d type %d" | |||
file_paio_submit(void *acb, void *opaque, int64_t offset, int count, int type) "acb %p opaque %p offset %"PRId64" count %d type %d" | |||
file_copy_file_range(void *bs, int src, int64_t src_off, int dst, int64_t dst_off, int64_t bytes, int flags, int64_t ret) "bs %p src_fd %d offset %"PRIu64" dst_fd %d offset %"PRIu64" bytes %"PRIu64" flags %d ret %"PRId64 | |||
# block/qcow2.c | |||
# qcow2.c | |||
qcow2_writev_start_req(void *co, int64_t offset, int bytes) "co %p offset 0x%" PRIx64 " bytes %d" | |||
qcow2_writev_done_req(void *co, int ret) "co %p ret %d" | |||
qcow2_writev_start_part(void *co) "co %p" | |||
@@ -70,7 +70,7 @@ qcow2_writev_data(void *co, uint64_t offset) "co %p offset 0x%" PRIx64 | |||
qcow2_pwrite_zeroes_start_req(void *co, int64_t offset, int count) "co %p offset 0x%" PRIx64 " count %d" | |||
qcow2_pwrite_zeroes(void *co, int64_t offset, int count) "co %p offset 0x%" PRIx64 " count %d" | |||
# block/qcow2-cluster.c | |||
# qcow2-cluster.c | |||
qcow2_alloc_clusters_offset(void *co, uint64_t offset, int bytes) "co %p offset 0x%" PRIx64 " bytes %d" | |||
qcow2_handle_copied(void *co, uint64_t guest_offset, uint64_t host_offset, uint64_t bytes) "co %p guest_offset 0x%" PRIx64 " host_offset 0x%" PRIx64 " bytes 0x%" PRIx64 | |||
qcow2_handle_alloc(void *co, uint64_t guest_offset, uint64_t host_offset, uint64_t bytes) "co %p guest_offset 0x%" PRIx64 " host_offset 0x%" PRIx64 " bytes 0x%" PRIx64 | |||
@@ -84,7 +84,7 @@ qcow2_l2_allocate_write_l2(void *bs, int l1_index) "bs %p l1_index %d" | |||
qcow2_l2_allocate_write_l1(void *bs, int l1_index) "bs %p l1_index %d" | |||
qcow2_l2_allocate_done(void *bs, int l1_index, int ret) "bs %p l1_index %d ret %d" | |||
# block/qcow2-cache.c | |||
# qcow2-cache.c | |||
qcow2_cache_get(void *co, int c, uint64_t offset, bool read_from_disk) "co %p is_l2_cache %d offset 0x%" PRIx64 " read_from_disk %d" | |||
qcow2_cache_get_replace_entry(void *co, int c, int i) "co %p is_l2_cache %d index %d" | |||
qcow2_cache_get_read(void *co, int c, int i) "co %p is_l2_cache %d index %d" | |||
@@ -92,18 +92,18 @@ qcow2_cache_get_done(void *co, int c, int i) "co %p is_l2_cache %d index %d" | |||
qcow2_cache_flush(void *co, int c) "co %p is_l2_cache %d" | |||
qcow2_cache_entry_flush(void *co, int c, int i) "co %p is_l2_cache %d index %d" | |||
# block/qed-l2-cache.c | |||
# qed-l2-cache.c | |||
qed_alloc_l2_cache_entry(void *l2_cache, void *entry) "l2_cache %p entry %p" | |||
qed_unref_l2_cache_entry(void *entry, int ref) "entry %p ref %d" | |||
qed_find_l2_cache_entry(void *l2_cache, void *entry, uint64_t offset, int ref) "l2_cache %p entry %p offset %"PRIu64" ref %d" | |||
# block/qed-table.c | |||
# qed-table.c | |||
qed_read_table(void *s, uint64_t offset, void *table) "s %p offset %"PRIu64" table %p" | |||
qed_read_table_cb(void *s, void *table, int ret) "s %p table %p ret %d" | |||
qed_write_table(void *s, uint64_t offset, void *table, unsigned int index, unsigned int n) "s %p offset %"PRIu64" table %p index %u n %u" | |||
qed_write_table_cb(void *s, void *table, int flush, int ret) "s %p table %p flush %d ret %d" | |||
# block/qed.c | |||
# qed.c | |||
qed_need_check_timer_cb(void *s) "s %p" | |||
qed_start_need_check_timer(void *s) "s %p" | |||
qed_cancel_need_check_timer(void *s) "s %p" | |||
@@ -116,7 +116,7 @@ qed_aio_write_prefill(void *s, void *acb, uint64_t start, size_t len, uint64_t o | |||
qed_aio_write_postfill(void *s, void *acb, uint64_t start, size_t len, uint64_t offset) "s %p acb %p start %"PRIu64" len %zu offset %"PRIu64 | |||
qed_aio_write_main(void *s, void *acb, int ret, uint64_t offset, size_t len) "s %p acb %p ret %d offset %"PRIu64" len %zu" | |||
# block/vxhs.c | |||
# vxhs.c | |||
vxhs_iio_callback(int error) "ctx is NULL: error %d" | |||
vxhs_iio_callback_chnfail(int err, int error) "QNIO channel failed, no i/o %d, %d" | |||
vxhs_iio_callback_unknwn(int opcode, int err) "unexpected opcode %d, errno %d" | |||
@@ -133,7 +133,7 @@ vxhs_parse_uri_hostinfo(char *host, int port) "Host: IP %s, Port %d" | |||
vxhs_close(char *vdisk_guid) "Closing vdisk %s" | |||
vxhs_get_creds(const char *cacert, const char *client_key, const char *client_cert) "cacert %s, client_key %s, client_cert %s" | |||
# block/nvme.c | |||
# nvme.c | |||
nvme_kick(void *s, int queue) "s %p queue %d" | |||
nvme_dma_flush_queue_wait(void *s) "s %p" | |||
nvme_error(int cmd_specific, int sq_head, int sqid, int cid, int status) "cmd_specific %d sq_head %d sqid %d cid %d status 0x%x" | |||
@@ -154,14 +154,14 @@ nvme_cmd_map_qiov(void *s, void *cmd, void *req, void *qiov, int entries) "s %p | |||
nvme_cmd_map_qiov_pages(void *s, int i, uint64_t page) "s %p page[%d] 0x%"PRIx64 | |||
nvme_cmd_map_qiov_iov(void *s, int i, void *page, int pages) "s %p iov[%d] %p pages %d" | |||
# block/iscsi.c | |||
# iscsi.c | |||
iscsi_xcopy(void *src_lun, uint64_t src_off, void *dst_lun, uint64_t dst_off, uint64_t bytes, int ret) "src_lun %p offset %"PRIu64" dst_lun %p offset %"PRIu64" bytes %"PRIu64" ret %d" | |||
# block/nbd-client.c | |||
# nbd-client.c | |||
nbd_read_reply_entry_fail(int ret, const char *err) "ret = %d, err: %s" | |||
nbd_co_request_fail(uint64_t from, uint32_t len, uint64_t handle, uint16_t flags, uint16_t type, const char *name, int ret, const char *err) "Request failed { .from = %" PRIu64", .len = %" PRIu32 ", .handle = %" PRIu64 ", .flags = 0x%" PRIx16 ", .type = %" PRIu16 " (%s) } ret = %d, err: %s" | |||
# block/ssh.c | |||
# ssh.c | |||
ssh_restart_coroutine(void *co) "co=%p" | |||
ssh_flush(void) "fsync" | |||
ssh_check_host_key_knownhosts(const char *key) "host key OK: %s" | |||
@@ -178,7 +178,7 @@ ssh_write_buf(void *buf, size_t size) "sftp_write buf=%p size=%zu" | |||
ssh_write_return(ssize_t ret) "sftp_write returned %zd" | |||
ssh_seek(int64_t offset) "seeking to offset=%" PRIi64 | |||
# block/curl.c | |||
# curl.c | |||
curl_timer_cb(long timeout_ms) "timer callback timeout_ms %ld" | |||
curl_sock_cb(int action, int fd) "sock action %d on fd %d" | |||
curl_read_cb(size_t realsize) "just reading %zu bytes" | |||
@@ -187,14 +187,14 @@ curl_open_size(uint64_t size) "size = %" PRIu64 | |||
curl_setup_preadv(uint64_t bytes, uint64_t start, const char *range) "reading %" PRIu64 " at %" PRIu64 " (%s)" | |||
curl_close(void) "close" | |||
# block/file-posix.c | |||
# file-posix.c | |||
file_xfs_write_zeroes(const char *error) "cannot write zero range (%s)" | |||
file_xfs_discard(const char *error) "cannot punch hole (%s)" | |||
file_FindEjectableOpticalMedia(const char *media) "Matching using %s" | |||
file_setup_cdrom(const char *partition) "Using %s as optical disc" | |||
file_hdev_is_sg(int type, int version) "SG device found: type=%d, version=%d" | |||
# block/sheepdog.c | |||
# sheepdog.c | |||
sheepdog_reconnect_to_sdog(void) "Wait for connection to be established" | |||
sheepdog_aio_read_response(void) "disable cache since the server doesn't support it" | |||
sheepdog_open(uint32_t vid) "0x%" PRIx32 " snapshot inode was open" |
@@ -1,6 +1,6 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# chardev/wctablet.c | |||
# wctablet.c | |||
wct_init(void) "" | |||
wct_cmd_re(void) "" | |||
wct_cmd_st(void) "" | |||
@@ -9,7 +9,7 @@ wct_cmd_ts(int input) "0x%02x" | |||
wct_cmd_other(const char *cmd) "%s" | |||
wct_speed(int speed) "%d" | |||
# chardev/spice.c | |||
# spice.c | |||
spice_chr_discard_write(int len) "spice chr write discarded %d" | |||
spice_vmc_write(ssize_t out, int len) "spice wrote %zd of requested %d" | |||
spice_vmc_read(int bytes, int len) "spice read %d of requested %d" |
@@ -1,16 +1,16 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# crypto/tlscreds.c | |||
# tlscreds.c | |||
qcrypto_tls_creds_load_dh(void *creds, const char *filename) "TLS creds load DH creds=%p filename=%s" | |||
qcrypto_tls_creds_get_path(void *creds, const char *filename, const char *path) "TLS creds path creds=%p filename=%s path=%s" | |||
# crypto/tlscredsanon.c | |||
# tlscredsanon.c | |||
qcrypto_tls_creds_anon_load(void *creds, const char *dir) "TLS creds anon load creds=%p dir=%s" | |||
# crypto/tlscredspsk.c | |||
# tlscredspsk.c | |||
qcrypto_tls_creds_psk_load(void *creds, const char *dir) "TLS creds psk load creds=%p dir=%s" | |||
# crypto/tlscredsx509.c | |||
# tlscredsx509.c | |||
qcrypto_tls_creds_x509_load(void *creds, const char *dir) "TLS creds x509 load creds=%p dir=%s" | |||
qcrypto_tls_creds_x509_check_basic_constraints(void *creds, const char *file, int status) "TLS creds x509 check basic constraints creds=%p file=%s status=%d" | |||
qcrypto_tls_creds_x509_check_key_usage(void *creds, const char *file, int status, int usage, int critical) "TLS creds x509 check key usage creds=%p file=%s status=%d usage=%d critical=%d" | |||
@@ -18,6 +18,6 @@ qcrypto_tls_creds_x509_check_key_purpose(void *creds, const char *file, int stat | |||
qcrypto_tls_creds_x509_load_cert(void *creds, int isServer, const char *file) "TLS creds x509 load cert creds=%p isServer=%d file=%s" | |||
qcrypto_tls_creds_x509_load_cert_list(void *creds, const char *file) "TLS creds x509 load cert list creds=%p file=%s" | |||
# crypto/tlssession.c | |||
# tlssession.c | |||
qcrypto_tls_session_new(void *session, void *creds, const char *hostname, const char *authzid, int endpoint) "TLS session new session=%p creds=%p hostname=%s authzid=%s endpoint=%d" | |||
qcrypto_tls_session_check_creds(void *session, const char *status) "TLS session check creds session=%p status=%s" |
@@ -1,6 +1,6 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/9pfs/virtio-9p.c | |||
# virtio-9p.c | |||
v9fs_rcancel(uint16_t tag, uint8_t id) "tag %d id %d" | |||
v9fs_rerror(uint16_t tag, uint8_t id, int err) "tag %d id %d err %d" | |||
v9fs_version(uint16_t tag, uint8_t id, int32_t msize, char* version) "tag %d id %d msize %d version %s" |
@@ -1,6 +1,6 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/acpi/memory_hotplug.c | |||
# memory_hotplug.c | |||
mhp_acpi_invalid_slot_selected(uint32_t slot) "0x%"PRIx32 | |||
mhp_acpi_ejecting_invalid_slot(uint32_t slot) "0x%"PRIx32 | |||
mhp_acpi_read_addr_lo(uint32_t slot, uint32_t addr) "slot[0x%"PRIx32"] addr lo: 0x%"PRIx32 | |||
@@ -17,7 +17,7 @@ mhp_acpi_clear_remove_evt(uint32_t slot) "slot[0x%"PRIx32"] clear remove event" | |||
mhp_acpi_pc_dimm_deleted(uint32_t slot) "slot[0x%"PRIx32"] pc-dimm deleted" | |||
mhp_acpi_pc_dimm_delete_failed(uint32_t slot) "slot[0x%"PRIx32"] pc-dimm delete failed" | |||
# hw/acpi/cpu.c | |||
# cpu.c | |||
cpuhp_acpi_invalid_idx_selected(uint32_t idx) "0x%"PRIx32 | |||
cpuhp_acpi_read_flags(uint32_t idx, uint8_t flags) "idx[0x%"PRIx32"] flags: 0x%"PRIx8 | |||
cpuhp_acpi_write_idx(uint32_t idx) "set active cpu idx: 0x%"PRIx32 | |||
@@ -31,6 +31,6 @@ cpuhp_acpi_ejecting_cpu(uint32_t idx) "0x%"PRIx32 | |||
cpuhp_acpi_write_ost_ev(uint32_t slot, uint32_t ev) "idx[0x%"PRIx32"] OST EVENT: 0x%"PRIx32 | |||
cpuhp_acpi_write_ost_status(uint32_t slot, uint32_t st) "idx[0x%"PRIx32"] OST STATUS: 0x%"PRIx32 | |||
# hw/acpi/tco.c | |||
# tco.c | |||
tco_timer_reload(int ticks, int msec) "ticks=%d (%d ms)" | |||
tco_timer_expired(int timeouts_no, bool strap, bool no_reboot) "timeouts_no=%d no_reboot=%d/%d" |
@@ -1,4 +1,4 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/alpha/pci.c | |||
# pci.c | |||
alpha_pci_iack_write(void) "" |
@@ -1,9 +1,9 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/arm/virt-acpi-build.c | |||
# virt-acpi-build.c | |||
virt_acpi_setup(void) "No fw cfg or ACPI disabled. Bailing out." | |||
# hw/arm/smmu-common.c | |||
# smmu-common.c | |||
smmu_add_mr(const char *name) "%s" | |||
smmu_page_walk(int stage, uint64_t baseaddr, int first_level, uint64_t start, uint64_t end) "stage=%d, baseaddr=0x%"PRIx64", first level=%d, start=0x%"PRIx64", end=0x%"PRIx64 | |||
smmu_lookup_table(int level, uint64_t baseaddr, int granule_sz, uint64_t start, uint64_t end, int flags, uint64_t subpage_size) "level=%d baseaddr=0x%"PRIx64" granule=%d, start=0x%"PRIx64" end=0x%"PRIx64" flags=%d subpage_size=0x%"PRIx64 | |||
@@ -19,7 +19,7 @@ smmu_iotlb_inv_asid(uint16_t asid) "IOTLB invalidate asid=%d" | |||
smmu_iotlb_inv_iova(uint16_t asid, uint64_t addr) "IOTLB invalidate asid=%d addr=0x%"PRIx64 | |||
smmu_inv_notifiers_mr(const char *name) "iommu mr=%s" | |||
#hw/arm/smmuv3.c | |||
# smmuv3.c | |||
smmuv3_read_mmio(uint64_t addr, uint64_t val, unsigned size, uint32_t r) "addr: 0x%"PRIx64" val:0x%"PRIx64" size: 0x%x(%d)" | |||
smmuv3_trigger_irq(int irq) "irq=%d" | |||
smmuv3_write_gerror(uint32_t toggled, uint32_t gerror) "toggled=0x%x, new GERROR=0x%x" |
@@ -1,12 +1,12 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/audio/cs4231.c | |||
# cs4231.c | |||
cs4231_mem_readl_dreg(uint32_t reg, uint32_t ret) "read dreg %d: 0x%02x" | |||
cs4231_mem_readl_reg(uint32_t reg, uint32_t ret) "read reg %d: 0x%08x" | |||
cs4231_mem_writel_reg(uint32_t reg, uint32_t old, uint32_t val) "write reg %d: 0x%08x -> 0x%08x" | |||
cs4231_mem_writel_dreg(uint32_t reg, uint32_t old, uint32_t val) "write dreg %d: 0x%02x -> 0x%02x" | |||
# hw/audio/milkymist-ac97.c | |||
# milkymist-ac97.c | |||
milkymist_ac97_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" | |||
milkymist_ac97_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" | |||
milkymist_ac97_pulse_irq_crrequest(void) "Pulse IRQ CR request" | |||
@@ -18,7 +18,7 @@ milkymist_ac97_in_cb_transferred(int transferred) "transferred %d" | |||
milkymist_ac97_out_cb(int free, uint32_t remaining) "free %d remaining %u" | |||
milkymist_ac97_out_cb_transferred(int transferred) "transferred %d" | |||
# hw/audio/hda-codec.c | |||
# hda-codec.c | |||
hda_audio_running(const char *stream, int nr, bool running) "st %s, nr %d, run %d" | |||
hda_audio_format(const char *stream, int chan, const char *fmt, int freq) "st %s, %d x %s @ %d Hz" | |||
hda_audio_adjust(const char *stream, int pos) "st %s, pos %d" |
@@ -1,5 +1,5 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/block/dataplane/virtio-blk.c | |||
# virtio-blk.c | |||
virtio_blk_data_plane_start(void *s) "dataplane %p" | |||
virtio_blk_data_plane_stop(void *s) "dataplane %p" |
@@ -1,10 +1,10 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/block/fdc.c | |||
# fdc.c | |||
fdc_ioport_read(uint8_t reg, uint8_t value) "read reg 0x%02x val 0x%02x" | |||
fdc_ioport_write(uint8_t reg, uint8_t value) "write reg 0x%02x val 0x%02x" | |||
# hw/block/pflash_cfi0?.c | |||
# pflash_cfi0?.c | |||
pflash_reset(void) "reset" | |||
pflash_read(uint64_t offset, uint8_t cmd, int width, uint8_t wcycle) "offset:0x%04"PRIx64" cmd:0x%02x width:%d wcycle:%u" | |||
pflash_write(uint64_t offset, uint32_t value, int width, uint8_t wcycle) "offset:0x%04"PRIx64" value:0x%03x width:%d wcycle:%u" | |||
@@ -17,18 +17,18 @@ pflash_manufacturer_id(uint16_t id) "Read Manufacturer ID: 0x%04x" | |||
pflash_device_id(uint16_t id) "Read Device ID: 0x%04x" | |||
pflash_device_info(uint64_t offset) "Read Device Information offset:0x%04"PRIx64 | |||
# hw/block/virtio-blk.c | |||
# virtio-blk.c | |||
virtio_blk_req_complete(void *vdev, void *req, int status) "vdev %p req %p status %d" | |||
virtio_blk_rw_complete(void *vdev, void *req, int ret) "vdev %p req %p ret %d" | |||
virtio_blk_handle_write(void *vdev, void *req, uint64_t sector, size_t nsectors) "vdev %p req %p sector %"PRIu64" nsectors %zu" | |||
virtio_blk_handle_read(void *vdev, void *req, uint64_t sector, size_t nsectors) "vdev %p req %p sector %"PRIu64" nsectors %zu" | |||
virtio_blk_submit_multireq(void *vdev, void *mrb, int start, int num_reqs, uint64_t offset, size_t size, bool is_write) "vdev %p mrb %p start %d num_reqs %d offset %"PRIu64" size %zu is_write %d" | |||
# hw/block/hd-geometry.c | |||
# hd-geometry.c | |||
hd_geometry_lchs_guess(void *blk, int cyls, int heads, int secs) "blk %p LCHS %d %d %d" | |||
hd_geometry_guess(void *blk, uint32_t cyls, uint32_t heads, uint32_t secs, int trans) "blk %p CHS %u %u %u trans %d" | |||
# hw/block/nvme.c | |||
# nvme.c | |||
# nvme traces for successful events | |||
nvme_irq_msix(uint32_t vector) "raising MSI-X IRQ vector %u" | |||
nvme_irq_pin(void) "pulsing IRQ pin" | |||
@@ -121,7 +121,7 @@ nvme_ub_db_wr_invalid_cqhead(uint32_t qid, uint16_t new_head) "completion queue | |||
nvme_ub_db_wr_invalid_sq(uint32_t qid) "submission queue doorbell write for nonexistent queue, sqid=%"PRIu32", ignoring" | |||
nvme_ub_db_wr_invalid_sqtail(uint32_t qid, uint16_t new_tail) "submission queue doorbell write value beyond queue size, sqid=%"PRIu32", new_head=%"PRIu16", ignoring" | |||
# hw/block/xen-block.c | |||
# xen-block.c | |||
xen_block_realize(const char *type, uint32_t disk, uint32_t partition) "%s d%up%u" | |||
xen_block_connect(const char *type, uint32_t disk, uint32_t partition) "%s d%up%u" | |||
xen_block_disconnect(const char *type, uint32_t disk, uint32_t partition) "%s d%up%u" |
@@ -1,47 +1,47 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/char/parallel.c | |||
# parallel.c | |||
parallel_ioport_read(const char *desc, uint16_t addr, uint8_t value) "read [%s] addr 0x%02x val 0x%02x" | |||
parallel_ioport_write(const char *desc, uint16_t addr, uint8_t value) "write [%s] addr 0x%02x val 0x%02x" | |||
# hw/char/serial.c | |||
# serial.c | |||
serial_ioport_read(uint16_t addr, uint8_t value) "read addr 0x%02x val 0x%02x" | |||
serial_ioport_write(uint16_t addr, uint8_t value) "write addr 0x%02x val 0x%02x" | |||
# hw/char/virtio-serial-bus.c | |||
# virtio-serial-bus.c | |||
virtio_serial_send_control_event(unsigned int port, uint16_t event, uint16_t value) "port %u, event %u, value %u" | |||
virtio_serial_throttle_port(unsigned int port, bool throttle) "port %u, throttle %d" | |||
virtio_serial_handle_control_message(uint16_t event, uint16_t value) "event %u, value %u" | |||
virtio_serial_handle_control_message_port(unsigned int port) "port %u" | |||
# hw/char/virtio-console.c | |||
# virtio-console.c | |||
virtio_console_flush_buf(unsigned int port, size_t len, ssize_t ret) "port %u, in_len %zu, out_len %zd" | |||
virtio_console_chr_read(unsigned int port, int size) "port %u, size %d" | |||
virtio_console_chr_event(unsigned int port, int event) "port %u, event %d" | |||
# hw/char/grlib_apbuart.c | |||
# grlib_apbuart.c | |||
grlib_apbuart_event(int event) "event:%d" | |||
grlib_apbuart_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x" | |||
grlib_apbuart_readl_unknown(uint64_t addr) "addr 0x%"PRIx64 | |||
# hw/char/lm32_juart.c | |||
# lm32_juart.c | |||
lm32_juart_get_jtx(uint32_t value) "jtx 0x%08x" | |||
lm32_juart_set_jtx(uint32_t value) "jtx 0x%08x" | |||
lm32_juart_get_jrx(uint32_t value) "jrx 0x%08x" | |||
lm32_juart_set_jrx(uint32_t value) "jrx 0x%08x" | |||
# hw/char/lm32_uart.c | |||
# lm32_uart.c | |||
lm32_uart_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" | |||
lm32_uart_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" | |||
lm32_uart_irq_state(int level) "irq state %d" | |||
# hw/char/milkymist-uart.c | |||
# milkymist-uart.c | |||
milkymist_uart_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" | |||
milkymist_uart_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" | |||
milkymist_uart_raise_irq(void) "Raise IRQ" | |||
milkymist_uart_lower_irq(void) "Lower IRQ" | |||
# hw/char/escc.c | |||
# escc.c | |||
escc_put_queue(char channel, int b) "channel %c put: 0x%02x" | |||
escc_get_queue(char channel, int val) "channel %c get 0x%02x" | |||
escc_update_irq(int irq) "IRQ = %d" | |||
@@ -56,7 +56,7 @@ escc_sunkbd_event_out(int ch) "Translated keycode 0x%2.2x" | |||
escc_kbd_command(int val) "Command %d" | |||
escc_sunmouse_event(int dx, int dy, int buttons_state) "dx=%d dy=%d buttons=0x%01x" | |||
# hw/char/pl011.c | |||
# pl011.c | |||
pl011_irq_state(int level) "irq state %d" | |||
pl011_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" | |||
pl011_read_fifo(int read_count) "FIFO read, read_count now %d" | |||
@@ -65,7 +65,7 @@ pl011_can_receive(uint32_t lcr, int read_count, int r) "LCR 0x%08x read_count %d | |||
pl011_put_fifo(uint32_t c, int read_count) "new char 0x%x read_count now %d" | |||
pl011_put_fifo_full(void) "FIFO now full, RXFF set" | |||
# hw/char/cmsdk_apb_uart.c | |||
# cmsdk_apb_uart.c | |||
cmsdk_apb_uart_read(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB UART read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |||
cmsdk_apb_uart_write(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB UART write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |||
cmsdk_apb_uart_reset(void) "CMSDK APB UART: reset" | |||
@@ -74,6 +74,6 @@ cmsdk_apb_uart_tx_pending(void) "CMSDK APB UART: character send to backend pendi | |||
cmsdk_apb_uart_tx(uint8_t c) "CMSDK APB UART: character 0x%x sent to backend" | |||
cmsdk_apb_uart_set_params(int speed) "CMSDK APB UART: params set to %d 8N1" | |||
# hw/char/nrf51_uart.c | |||
# nrf51_uart.c | |||
nrf51_uart_read(uint64_t addr, uint64_t r, unsigned int size) "addr 0x%" PRIx64 " value 0x%" PRIx64 " size %u" | |||
nrf51_uart_write(uint64_t addr, uint64_t value, unsigned int size) "addr 0x%" PRIx64 " value 0x%" PRIx64 " size %u" |
@@ -1,29 +1,29 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/display/jazz_led.c | |||
# jazz_led.c | |||
jazz_led_read(uint64_t addr, uint8_t val) "read addr=0x%"PRIx64": 0x%x" | |||
jazz_led_write(uint64_t addr, uint8_t new) "write addr=0x%"PRIx64": 0x%x" | |||
# hw/display/xenfb.c | |||
# xenfb.c | |||
xenfb_mouse_event(void *opaque, int dx, int dy, int dz, int button_state, int abs_pointer_wanted) "%p x %d y %d z %d bs 0x%x abs %d" | |||
xenfb_key_event(void *opaque, int scancode, int button_state) "%p scancode %d bs 0x%x" | |||
xenfb_input_connected(void *xendev, int abs_pointer_wanted) "%p abs %d" | |||
# hw/display/g364fb.c | |||
# g364fb.c | |||
g364fb_read(uint64_t addr, uint32_t val) "read addr=0x%"PRIx64": 0x%x" | |||
g364fb_write(uint64_t addr, uint32_t new) "write addr=0x%"PRIx64": 0x%x" | |||
# hw/display/milkymist-tmu2.c | |||
# milkymist-tmu2.c | |||
milkymist_tmu2_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" | |||
milkymist_tmu2_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" | |||
milkymist_tmu2_start(void) "Start TMU" | |||
milkymist_tmu2_pulse_irq(void) "Pulse IRQ" | |||
# hw/display/milkymist-vgafb.c | |||
# milkymist-vgafb.c | |||
milkymist_vgafb_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" | |||
milkymist_vgafb_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" | |||
# hw/display/vmware_vga.c | |||
# vmware_vga.c | |||
vmware_value_read(uint32_t index, uint32_t value) "index %d, value 0x%x" | |||
vmware_value_write(uint32_t index, uint32_t value) "index %d, value 0x%x" | |||
vmware_palette_read(uint32_t index, uint32_t value) "index %d, value 0x%x" | |||
@@ -32,7 +32,7 @@ vmware_scratch_read(uint32_t index, uint32_t value) "index %d, value 0x%x" | |||
vmware_scratch_write(uint32_t index, uint32_t value) "index %d, value 0x%x" | |||
vmware_setmode(uint32_t w, uint32_t h, uint32_t bpp) "%dx%d @ %d bpp" | |||
# hw/display/virtio-gpu.c | |||
# virtio-gpu.c | |||
virtio_gpu_features(bool virgl) "virgl %d" | |||
virtio_gpu_cmd_get_display_info(void) "" | |||
virtio_gpu_cmd_get_edid(uint32_t scanout) "scanout %d" | |||
@@ -55,7 +55,7 @@ virtio_gpu_update_cursor(uint32_t scanout, uint32_t x, uint32_t y, const char *t | |||
virtio_gpu_fence_ctrl(uint64_t fence, uint32_t type) "fence 0x%" PRIx64 ", type 0x%x" | |||
virtio_gpu_fence_resp(uint64_t fence) "fence 0x%" PRIx64 | |||
# hw/display/qxl.c | |||
# qxl.c | |||
disable qxl_interface_set_mm_time(int qid, uint32_t mm_time) "%d %d" | |||
disable qxl_io_write_vga(int qid, const char *mode, uint32_t addr, uint32_t val) "%d %s addr=%u val=%u" | |||
qxl_create_guest_primary(int qid, uint32_t width, uint32_t height, uint64_t mem, uint32_t format, uint32_t position) "%d %ux%u mem=0x%" PRIx64 " %u,%u" | |||
@@ -117,28 +117,28 @@ qxl_client_monitors_config_capped(int qid, int requested, int limit) "%d %d %d" | |||
qxl_client_monitors_config_crc(int qid, unsigned size, uint32_t crc32) "%d %u %u" | |||
qxl_set_client_capabilities_unsupported_by_revision(int qid, int revision) "%d revision=%d" | |||
# hw/display/qxl-render.c | |||
# qxl-render.c | |||
qxl_render_blit(int32_t stride, int32_t left, int32_t right, int32_t top, int32_t bottom) "stride=%d [%d, %d, %d, %d]" | |||
qxl_render_guest_primary_resized(int32_t width, int32_t height, int32_t stride, int32_t bytes_pp, int32_t bits_pp) "%dx%d, stride %d, bpp %d, depth %d" | |||
qxl_render_update_area_done(void *cookie) "%p" | |||
# hw/display/vga.c | |||
# vga.c | |||
vga_std_read_io(uint32_t addr, uint32_t val) "addr 0x%x, val 0x%x" | |||
vga_std_write_io(uint32_t addr, uint32_t val) "addr 0x%x, val 0x%x" | |||
vga_vbe_read(uint32_t index, uint32_t val) "index 0x%x, val 0x%x" | |||
vga_vbe_write(uint32_t index, uint32_t val) "index 0x%x, val 0x%x" | |||
# hw/display/cirrus_vga.c | |||
# cirrus_vga.c | |||
vga_cirrus_read_io(uint32_t addr, uint32_t val) "addr 0x%x, val 0x%x" | |||
vga_cirrus_write_io(uint32_t addr, uint32_t val) "addr 0x%x, val 0x%x" | |||
vga_cirrus_read_blt(uint32_t offset, uint32_t val) "offset 0x%x, val 0x%x" | |||
vga_cirrus_write_blt(uint32_t offset, uint32_t val) "offset 0x%x, val 0x%x" | |||
# hw/display/sii9022.c | |||
# sii9022.c | |||
sii9022_read_reg(uint8_t addr, uint8_t val) "addr 0x%02x, val 0x%02x" | |||
sii9022_write_reg(uint8_t addr, uint8_t val) "addr 0x%02x, val 0x%02x" | |||
sii9022_switch_mode(const char *mode) "mode: %s" | |||
# hw/display/ati*.c | |||
# ati*.c | |||
ati_mm_read(unsigned int size, uint64_t addr, const char *name, uint64_t val) "%u 0x%"PRIx64 " %s -> 0x%"PRIx64 | |||
ati_mm_write(unsigned int size, uint64_t addr, const char *name, uint64_t val) "%u 0x%"PRIx64 " %s <- 0x%"PRIx64 |
@@ -1,12 +1,12 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/dma/rc4030.c | |||
# rc4030.c | |||
jazzio_read(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x" | |||
jazzio_write(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x" | |||
rc4030_read(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x" | |||
rc4030_write(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x" | |||
# hw/dma/sparc32_dma.c | |||
# sparc32_dma.c | |||
ledma_memory_read(uint64_t addr, int len) "DMA read addr 0x%"PRIx64 " len %d" | |||
ledma_memory_write(uint64_t addr, int len) "DMA write addr 0x%"PRIx64 " len %d" | |||
sparc32_dma_set_irq_raise(void) "Raise IRQ" | |||
@@ -18,5 +18,5 @@ sparc32_dma_mem_writel(uint64_t addr, uint32_t old, uint32_t val) "write dmareg | |||
sparc32_dma_enable_raise(void) "Raise DMA enable" | |||
sparc32_dma_enable_lower(void) "Lower DMA enable" | |||
# hw/dma/i8257.c | |||
# i8257.c | |||
i8257_unregistered_dma(int nchan, int dma_pos, int dma_len) "unregistered DMA channel used nchan=%d dma_pos=%d dma_len=%d" |
@@ -1,6 +1,6 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/gpio/nrf51_gpio.c | |||
# nrf51_gpio.c | |||
nrf51_gpio_read(uint64_t offset, uint64_t r) "offset 0x%" PRIx64 " value 0x%" PRIx64 | |||
nrf51_gpio_write(uint64_t offset, uint64_t value) "offset 0x%" PRIx64 " value 0x%" PRIx64 | |||
nrf51_gpio_set(int64_t line, int64_t value) "line %" PRIi64 " value %" PRIi64 |
@@ -1,4 +1,4 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/hppa/pci.c | |||
# pci.c | |||
hppa_pci_iack_write(void) "" |
@@ -1,6 +1,6 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/i2c/core.c | |||
# core.c | |||
i2c_event(const char *event, uint8_t address) "%s(addr:0x%02x)" | |||
i2c_send(uint8_t address, uint8_t data) "send(addr:0x%02x) data:0x%02x" |
@@ -1,9 +1,9 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/i386/x86-iommu.c | |||
# x86-iommu.c | |||
x86_iommu_iec_notify(bool global, uint32_t index, uint32_t mask) "Notify IEC invalidation: global=%d index=%" PRIu32 " mask=%" PRIu32 | |||
# hw/i386/intel_iommu.c | |||
# intel_iommu.c | |||
vtd_inv_desc(const char *type, uint64_t hi, uint64_t lo) "invalidate desc type %s high 0x%"PRIx64" low 0x%"PRIx64 | |||
vtd_inv_desc_cc_domain(uint16_t domain) "context invalidate domain 0x%"PRIx16 | |||
vtd_inv_desc_cc_global(void) "context invalidate globally" | |||
@@ -67,7 +67,7 @@ vtd_warn_invalid_qi_tail(uint16_t tail) "tail 0x%"PRIx16 | |||
vtd_warn_ir_vector(uint16_t sid, int index, int vec, int target) "sid 0x%"PRIx16" index %d vec %d (should be: %d)" | |||
vtd_warn_ir_trigger(uint16_t sid, int index, int trig, int target) "sid 0x%"PRIx16" index %d trigger %d (should be: %d)" | |||
# hw/i386/amd_iommu.c | |||
# amd_iommu.c | |||
amdvi_evntlog_fail(uint64_t addr, uint32_t head) "error: fail to write at addr 0x%"PRIx64" + offset 0x%"PRIx32 | |||
amdvi_cache_update(uint16_t domid, uint8_t bus, uint8_t slot, uint8_t func, uint64_t gpa, uint64_t txaddr) " update iotlb domid 0x%"PRIx16" devid: %02x:%02x.%x gpa 0x%"PRIx64" hpa 0x%"PRIx64 | |||
amdvi_completion_wait_fail(uint64_t addr) "error: fail to write at address 0x%"PRIx64 | |||
@@ -110,6 +110,6 @@ amdvi_ir_generate_msi_message(uint8_t vector, uint8_t delivery_mode, uint8_t des | |||
amdvi_ir_irte_ga(uint64_t addr, uint64_t data) "addr 0x%"PRIx64" offset 0x%"PRIx64 | |||
amdvi_ir_irte_ga_val(uint64_t hi, uint64_t lo) "hi 0x%"PRIx64" lo 0x%"PRIx64 | |||
# hw/i386/vmport.c | |||
# vmport.c | |||
vmport_register(unsigned char command, void *func, void *opaque) "command: 0x%02x func: %p opaque: %p" | |||
vmport_command(unsigned char command) "command: 0x%02x" |
@@ -1,9 +1,9 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/i386/xen/xen_platform.c | |||
# xen_platform.c | |||
xen_platform_log(char *s) "xen platform: %s" | |||
# hw/i386/xen/xen_pvdevice.c | |||
# xen_pvdevice.c | |||
xen_pv_mmio_read(uint64_t addr) "WARNING: read from Xen PV Device MMIO space (address 0x%"PRIx64")" | |||
xen_pv_mmio_write(uint64_t addr) "WARNING: write to Xen PV Device MMIO space (address 0x%"PRIx64")" | |||
@@ -1,6 +1,6 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/ide/core.c | |||
# core.c | |||
# portio | |||
ide_ioport_read(uint32_t addr, const char *reg, uint32_t val, void *bus, void *s) "IDE PIO rd @ 0x%"PRIx32" (%s); val 0x%02"PRIx32"; bus %p IDEState %p" | |||
ide_ioport_write(uint32_t addr, const char *reg, uint32_t val, void *bus, void *s) "IDE PIO wr @ 0x%"PRIx32" (%s); val 0x%02"PRIx32"; bus %p IDEState %p" | |||
@@ -23,30 +23,30 @@ ide_dma_cb(void *s, int64_t sector_num, int n, const char *dma) "IDEState %p; se | |||
# BMDMA HBAs: | |||
# hw/ide/cmd646.c | |||
# cmd646.c | |||
bmdma_read_cmd646(uint64_t addr, uint32_t val) "bmdma: readb 0x%"PRIx64" : 0x%02x" | |||
bmdma_write_cmd646(uint64_t addr, uint64_t val) "bmdma: writeb 0x%"PRIx64" : 0x%02"PRIx64 | |||
# hw/ide/pci.c | |||
# pci.c | |||
bmdma_reset(void) "" | |||
bmdma_cmd_writeb(uint32_t val) "val: 0x%08x" | |||
bmdma_addr_read(uint64_t data) "data: 0x%016"PRIx64 | |||
bmdma_addr_write(uint64_t data) "data: 0x%016"PRIx64 | |||
# hw/ide/piix.c | |||
# piix.c | |||
bmdma_read(uint64_t addr, uint8_t val) "bmdma: readb 0x%"PRIx64" : 0x%02x" | |||
bmdma_write(uint64_t addr, uint64_t val) "bmdma: writeb 0x%"PRIx64" : 0x%02"PRIx64 | |||
# hw/ide/sii3112.c | |||
# sii3112.c | |||
sii3112_read(int size, uint64_t addr, uint64_t val) "bmdma: read (size %d) 0x%"PRIx64" : 0x%02"PRIx64 | |||
sii3112_write(int size, uint64_t addr, uint64_t val) "bmdma: write (size %d) 0x%"PRIx64" : 0x%02"PRIx64 | |||
sii3112_set_irq(int channel, int level) "channel %d level %d" | |||
# hw/ide/via.c | |||
# via.c | |||
bmdma_read_via(uint64_t addr, uint32_t val) "bmdma: readb 0x%"PRIx64" : 0x%02x" | |||
bmdma_write_via(uint64_t addr, uint64_t val) "bmdma: writeb 0x%"PRIx64" : 0x%02"PRIx64 | |||
# hw/ide/atapi.c | |||
# atapi.c | |||
cd_read_sector_sync(int lba) "lba=%d" | |||
cd_read_sector_cb(int lba, int ret) "lba=%d ret=%d" | |||
cd_read_sector(int lba) "lba=%d" | |||
@@ -62,7 +62,7 @@ ide_atapi_cmd_read_dma_cb_aio(void *s, int lba, int n) "IDEState: %p; aio read: | |||
# Warning: Verbose | |||
ide_atapi_cmd_packet(void *s, uint16_t limit, const char *packet) "IDEState: %p; limit=0x%x packet: %s" | |||
# hw/ide/ahci.c | |||
# ahci.c | |||
ahci_port_read(void *s, int port, const char *reg, int offset, uint32_t ret) "ahci(%p)[%d]: port read [reg:%s] @ 0x%x: 0x%08x" | |||
ahci_port_read_default(void *s, int port, const char *reg, int offset) "ahci(%p)[%d]: unimplemented port read [reg:%s] @ 0x%x" | |||
ahci_irq_raise(void *s) "ahci(%p): raise irq" |
@@ -1,27 +1,27 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/input/adb-kbd.c | |||
# adb-kbd.c | |||
adb_kbd_no_key(void) "Ignoring NO_KEY" | |||
adb_kbd_writereg(int reg, uint8_t val) "reg %d val 0x%2.2x" | |||
adb_kbd_readreg(int reg, uint8_t val0, uint8_t val1) "reg %d obuf[0] 0x%2.2x obuf[1] 0x%2.2x" | |||
adb_kbd_request_change_addr(int devaddr) "change addr to 0x%x" | |||
adb_kbd_request_change_addr_and_handler(int devaddr, int handler) "change addr and handler to 0x%x, 0x%x" | |||
# hw/input/adb-mouse.c | |||
# adb-mouse.c | |||
adb_mouse_flush(void) "flush" | |||
adb_mouse_writereg(int reg, uint8_t val) "reg %d val 0x%2.2x" | |||
adb_mouse_readreg(int reg, uint8_t val0, uint8_t val1) "reg %d obuf[0] 0x%2.2x obuf[1] 0x%2.2x" | |||
adb_mouse_request_change_addr(int devaddr) "change addr to 0x%x" | |||
adb_mouse_request_change_addr_and_handler(int devaddr, int handler) "change addr and handler to 0x%x, 0x%x" | |||
# hw/input/pckbd.c | |||
# pckbd.c | |||
pckbd_kbd_read_data(uint32_t val) "0x%02x" | |||
pckbd_kbd_read_status(int status) "0x%02x" | |||
pckbd_outport_write(uint32_t val) "0x%02x" | |||
pckbd_kbd_write_command(uint64_t val) "0x%02"PRIx64 | |||
pckbd_kbd_write_data(uint64_t val) "0x%02"PRIx64 | |||
# hw/input/ps2.c | |||
# ps2.c | |||
ps2_put_keycode(void *opaque, int keycode) "%p keycode 0x%02x" | |||
ps2_keyboard_event(void *opaque, int qcode, int down, unsigned int modifier, unsigned int modifiers) "%p qcode %d down %d modifier 0x%x modifiers 0x%x" | |||
ps2_read_data(void *opaque) "%p" | |||
@@ -37,19 +37,19 @@ ps2_mouse_reset(void *opaque) "%p" | |||
ps2_kbd_init(void *s) "%p" | |||
ps2_mouse_init(void *s) "%p" | |||
# hw/input/milkymist-softusb.c | |||
# milkymist-softusb.c | |||
milkymist_softusb_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" | |||
milkymist_softusb_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" | |||
milkymist_softusb_mevt(uint8_t m) "m %d" | |||
milkymist_softusb_kevt(uint8_t m) "m %d" | |||
milkymist_softusb_pulse_irq(void) "Pulse IRQ" | |||
# hw/input/hid.c | |||
# hid.c | |||
hid_kbd_queue_full(void) "queue full" | |||
hid_kbd_queue_empty(void) "queue empty" | |||
# hw/input/tsc2005.c | |||
# tsc2005.c | |||
tsc2005_sense(const char *state) "touchscreen sense %s" | |||
# hw/input/virtio | |||
# virtio | |||
virtio_input_queue_full(void) "queue full" |
@@ -1,13 +1,13 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/intc/i8259.c | |||
# i8259.c | |||
pic_update_irq(bool master, uint8_t imr, uint8_t irr, uint8_t padd) "master %d imr %"PRIu8" irr %"PRIu8" padd %"PRIu8 | |||
pic_set_irq(bool master, int irq, int level) "master %d irq %d level %d" | |||
pic_interrupt(int irq, int intno) "irq %d intno %d" | |||
pic_ioport_write(bool master, uint64_t addr, uint64_t val) "master %d addr 0x%"PRIx64" val 0x%"PRIx64 | |||
pic_ioport_read(bool master, uint64_t addr, int val) "master %d addr 0x%"PRIx64" val 0x%x" | |||
# hw/intc/apic_common.c | |||
# apic_common.c | |||
cpu_set_apic_base(uint64_t val) "0x%016"PRIx64 | |||
cpu_get_apic_base(uint64_t val) "0x%016"PRIx64 | |||
# coalescing | |||
@@ -15,13 +15,13 @@ apic_report_irq_delivered(int apic_irq_delivered) "coalescing %d" | |||
apic_reset_irq_delivered(int apic_irq_delivered) "old coalescing %d" | |||
apic_get_irq_delivered(int apic_irq_delivered) "returning coalescing %d" | |||
# hw/intc/apic.c | |||
# apic.c | |||
apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d" | |||
apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d trigger_mode %d" | |||
apic_mem_readl(uint64_t addr, uint32_t val) "0x%"PRIx64" = 0x%08x" | |||
apic_mem_writel(uint64_t addr, uint32_t val) "0x%"PRIx64" = 0x%08x" | |||
# hw/intc/ioapic.c | |||
# ioapic.c | |||
ioapic_set_remote_irr(int n) "set remote irr for pin %d" | |||
ioapic_clear_remote_irr(int n, int vector) "clear remote irr for pin %d vector %d" | |||
ioapic_eoi_broadcast(int vector) "EOI broadcast for vector %d" | |||
@@ -29,7 +29,7 @@ ioapic_mem_read(uint8_t addr, uint8_t regsel, uint8_t size, uint32_t val) "ioapi | |||
ioapic_mem_write(uint8_t addr, uint8_t regsel, uint8_t size, uint32_t val) "ioapic mem write addr 0x%"PRIx8" regsel: 0x%"PRIx8" size 0x%"PRIx8" val 0x%"PRIx32 | |||
ioapic_set_irq(int vector, int level) "vector: %d level: %d" | |||
# hw/intc/slavio_intctl.c | |||
# slavio_intctl.c | |||
slavio_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read cpu %d reg 0x%"PRIx64" = 0x%x" | |||
slavio_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write cpu %d reg 0x%"PRIx64" = 0x%x" | |||
slavio_intctl_mem_writel_clear(uint32_t cpu, uint32_t val, uint32_t intreg_pending) "Cleared cpu %d irq mask 0x%x, curmask 0x%x" | |||
@@ -43,14 +43,14 @@ slavio_check_interrupts(uint32_t pending, uint32_t intregm_disabled) "pending 0x | |||
slavio_set_irq(uint32_t target_cpu, int irq, uint32_t pil, int level) "Set cpu %d irq %d -> pil %d level %d" | |||
slavio_set_timer_irq_cpu(int cpu, int level) "Set cpu %d local timer level %d" | |||
# hw/intc/grlib_irqmp.c | |||
# grlib_irqmp.c | |||
grlib_irqmp_check_irqs(uint32_t pend, uint32_t force, uint32_t mask, uint32_t lvl1, uint32_t lvl2) "pend:0x%04x force:0x%04x mask:0x%04x lvl1:0x%04x lvl0:0x%04x" | |||
grlib_irqmp_ack(int intno) "interrupt:%d" | |||
grlib_irqmp_set_irq(int irq) "Raise CPU IRQ %d" | |||
grlib_irqmp_readl_unknown(uint64_t addr) "addr 0x%"PRIx64 | |||
grlib_irqmp_writel_unknown(uint64_t addr, uint32_t value) "addr 0x%"PRIx64" value 0x%x" | |||
# hw/intc/lm32_pic.c | |||
# lm32_pic.c | |||
lm32_pic_raise_irq(void) "Raise CPU interrupt" | |||
lm32_pic_lower_irq(void) "Lower CPU interrupt" | |||
lm32_pic_interrupt(int irq, int level) "Set IRQ%d %d" | |||
@@ -59,7 +59,7 @@ lm32_pic_set_ip(uint32_t ip) "ip 0x%08x" | |||
lm32_pic_get_im(uint32_t im) "im 0x%08x" | |||
lm32_pic_get_ip(uint32_t ip) "ip 0x%08x" | |||
# hw/intc/xics.c | |||
# xics.c | |||
xics_icp_check_ipi(int server, uint8_t mfrr) "CPU %d can take IPI mfrr=0x%x" | |||
xics_icp_accept(uint32_t old_xirr, uint32_t new_xirr) "icp_accept: XIRR 0x%"PRIx32"->0x%"PRIx32 | |||
xics_icp_eoi(int server, uint32_t xirr, uint32_t new_xirr) "icp_eoi: server %d given XIRR 0x%"PRIx32" new XIRR 0x%"PRIx32 | |||
@@ -72,23 +72,23 @@ xics_ics_simple_write_xive(int nr, int srcno, int server, uint8_t priority) "ics | |||
xics_ics_simple_reject(int nr, int srcno) "reject irq 0x%x [src %d]" | |||
xics_ics_simple_eoi(int nr) "ics_eoi: irq 0x%x" | |||
# hw/intc/s390_flic_kvm.c | |||
# s390_flic_kvm.c | |||
flic_create_device(int err) "flic: create device failed %d" | |||
flic_no_device_api(int err) "flic: no Device Contral API support %d" | |||
flic_reset_failed(int err) "flic: reset failed %d" | |||
# hw/intc/s390_flic.c | |||
# s390_flic.c | |||
qemu_s390_airq_suppressed(uint8_t type, uint8_t isc) "flic: adapter I/O interrupt suppressed (type 0x%x isc 0x%x)" | |||
qemu_s390_suppress_airq(uint8_t isc, const char *from, const char *to) "flic: for isc 0x%x, suppress airq by modifying ais mode from %s to %s" | |||
# hw/intc/aspeed_vic.c | |||
# aspeed_vic.c | |||
aspeed_vic_set_irq(int irq, int level) "Enabling IRQ %d: %d" | |||
aspeed_vic_update_fiq(int flags) "Raising FIQ: %d" | |||
aspeed_vic_update_irq(int flags) "Raising IRQ: %d" | |||
aspeed_vic_read(uint64_t offset, unsigned size, uint32_t value) "From 0x%" PRIx64 " of size %u: 0x%" PRIx32 | |||
aspeed_vic_write(uint64_t offset, unsigned size, uint32_t data) "To 0x%" PRIx64 " of size %u: 0x%" PRIx32 | |||
# hw/intc/arm_gic.c | |||
# arm_gic.c | |||
gic_enable_irq(int irq) "irq %d enabled" | |||
gic_disable_irq(int irq) "irq %d disabled" | |||
gic_set_irq(int irq, int level, int cpumask, int target) "irq %d level %d cpumask 0x%x target 0x%x" | |||
@@ -104,7 +104,7 @@ gic_dist_write(int addr, unsigned int size, uint32_t val) "dist write at 0x%08x | |||
gic_lr_entry(int cpu, int entry, uint32_t val) "cpu %d: new lr entry %d: 0x%08" PRIx32 | |||
gic_update_maintenance_irq(int cpu, int val) "cpu %d: maintenance = %d" | |||
# hw/intc/arm_gicv3_cpuif.c | |||
# arm_gicv3_cpuif.c | |||
gicv3_icc_pmr_read(uint32_t cpu, uint64_t val) "GICv3 ICC_PMR read cpu 0x%x value 0x%" PRIx64 | |||
gicv3_icc_pmr_write(uint32_t cpu, uint64_t val) "GICv3 ICC_PMR write cpu 0x%x value 0x%" PRIx64 | |||
gicv3_icc_bpr_read(int grp, uint32_t cpu, uint64_t val) "GICv3 ICC_BPR%d read cpu 0x%x value 0x%" PRIx64 | |||
@@ -163,14 +163,14 @@ gicv3_icv_eoir_write(int grp, uint32_t cpu, uint64_t val) "GICv3 ICV_EOIR%d writ | |||
gicv3_cpuif_virt_update(uint32_t cpuid, int idx) "GICv3 CPU i/f 0x%x virt HPPI update LR index %d" | |||
gicv3_cpuif_virt_set_irqs(uint32_t cpuid, int fiqlevel, int irqlevel, int maintlevel) "GICv3 CPU i/f 0x%x virt HPPI update: setting FIQ %d IRQ %d maintenance-irq %d" | |||
# hw/intc/arm_gicv3_dist.c | |||
# arm_gicv3_dist.c | |||
gicv3_dist_read(uint64_t offset, uint64_t data, unsigned size, bool secure) "GICv3 distributor read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d" | |||
gicv3_dist_badread(uint64_t offset, unsigned size, bool secure) "GICv3 distributor read: offset 0x%" PRIx64 " size %u secure %d: error" | |||
gicv3_dist_write(uint64_t offset, uint64_t data, unsigned size, bool secure) "GICv3 distributor write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d" | |||
gicv3_dist_badwrite(uint64_t offset, uint64_t data, unsigned size, bool secure) "GICv3 distributor write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d: error" | |||
gicv3_dist_set_irq(int irq, int level) "GICv3 distributor interrupt %d level changed to %d" | |||
# hw/intc/arm_gicv3_redist.c | |||
# arm_gicv3_redist.c | |||
gicv3_redist_read(uint32_t cpu, uint64_t offset, uint64_t data, unsigned size, bool secure) "GICv3 redistributor 0x%x read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d" | |||
gicv3_redist_badread(uint32_t cpu, uint64_t offset, unsigned size, bool secure) "GICv3 redistributor 0x%x read: offset 0x%" PRIx64 " size %u secure %d: error" | |||
gicv3_redist_write(uint32_t cpu, uint64_t offset, uint64_t data, unsigned size, bool secure) "GICv3 redistributor 0x%x write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d" | |||
@@ -178,7 +178,7 @@ gicv3_redist_badwrite(uint32_t cpu, uint64_t offset, uint64_t data, unsigned siz | |||
gicv3_redist_set_irq(uint32_t cpu, int irq, int level) "GICv3 redistributor 0x%x interrupt %d level changed to %d" | |||
gicv3_redist_send_sgi(uint32_t cpu, int irq) "GICv3 redistributor 0x%x pending SGI %d" | |||
# hw/intc/armv7m_nvic.c | |||
# armv7m_nvic.c | |||
nvic_recompute_state(int vectpending, int vectpending_prio, int exception_prio) "NVIC state recomputed: vectpending %d vectpending_prio %d exception_prio %d" | |||
nvic_recompute_state_secure(int vectpending, bool vectpending_is_s_banked, int vectpending_prio, int exception_prio) "NVIC state recomputed: vectpending %d is_s_banked %d vectpending_prio %d exception_prio %d" | |||
nvic_set_prio(int irq, bool secure, uint8_t prio) "NVIC set irq %d secure-bank %d priority %d" | |||
@@ -196,7 +196,7 @@ nvic_set_nmi_level(int level) "NVIC external NMI level set to %d" | |||
nvic_sysreg_read(uint64_t addr, uint32_t value, unsigned size) "NVIC sysreg read addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u" | |||
nvic_sysreg_write(uint64_t addr, uint32_t value, unsigned size) "NVIC sysreg write addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u" | |||
# hw/intc/heathrow_pic.c | |||
# heathrow_pic.c | |||
heathrow_write(uint64_t addr, unsigned int n, uint64_t value) "0x%"PRIx64" %u: 0x%"PRIx64 | |||
heathrow_read(uint64_t addr, unsigned int n, uint64_t value) "0x%"PRIx64" %u: 0x%"PRIx64 | |||
heathrow_set_irq(int num, int level) "set_irq: num=0x%02x level=%d" |
@@ -1,11 +1,11 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/isa/isa-superio.c | |||
# isa-superio.c | |||
superio_create_parallel(int id, uint16_t base, unsigned int irq) "id=%d, base 0x%03x, irq %u" | |||
superio_create_serial(int id, uint16_t base, unsigned int irq) "id=%d, base 0x%03x, irq %u" | |||
superio_create_floppy(int id, uint16_t base, unsigned int irq) "id=%d, base 0x%03x, irq %u" | |||
superio_create_ide(int id, uint16_t base, unsigned int irq) "id=%d, base 0x%03x, irq %u" | |||
# hw/isa/pc87312.c | |||
# pc87312.c | |||
pc87312_io_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x" | |||
pc87312_io_write(uint32_t addr, uint32_t val) "write addr=0x%x val=0x%x" |
@@ -1,8 +1,8 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/mem/pc-dimm.c | |||
# pc-dimm.c | |||
mhp_pc_dimm_assigned_slot(int slot) "%d" | |||
# hw/mem/memory-device.c | |||
# memory-device.c | |||
memory_device_pre_plug(const char *id, uint64_t addr) "id=%s addr=0x%"PRIx64 | |||
memory_device_plug(const char *id, uint64_t addr) "id=%s addr=0x%"PRIx64 | |||
memory_device_unplug(const char *id, uint64_t addr) "id=%s addr=0x%"PRIx64 |
@@ -1,6 +1,6 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/misc/macio/cuda.c | |||
# cuda.c | |||
cuda_delay_set_sr_int(void) "" | |||
cuda_data_send(uint8_t data) "send: 0x%02x" | |||
cuda_data_recv(uint8_t data) "recv: 0x%02x" | |||
@@ -10,18 +10,18 @@ cuda_packet_receive_data(int i, const uint8_t data) "[%d] 0x%02x" | |||
cuda_packet_send(int len) "length %d" | |||
cuda_packet_send_data(int i, const uint8_t data) "[%d] 0x%02x" | |||
# hw/misc/macio/macio.c | |||
# macio.c | |||
macio_timer_write(uint64_t addr, unsigned len, uint64_t val) "write addr 0x%"PRIx64 " len %d val 0x%"PRIx64 | |||
macio_timer_read(uint64_t addr, unsigned len, uint32_t val) "read addr 0x%"PRIx64 " len %d val 0x%"PRIx32 | |||
# hw/misc/macio/gpio.c | |||
# gpio.c | |||
macio_set_gpio(int gpio, bool state) "setting GPIO %d to %d" | |||
macio_gpio_irq_assert(int gpio) "asserting GPIO %d" | |||
macio_gpio_irq_deassert(int gpio) "deasserting GPIO %d" | |||
macio_gpio_write(uint64_t addr, uint64_t val) "addr: 0x%"PRIx64" value: 0x%"PRIx64 | |||
macio_gpio_read(uint64_t addr, uint64_t val) "addr: 0x%"PRIx64" value: 0x%"PRIx64 | |||
# hw/misc/macio/pmu.c | |||
# pmu.c | |||
pmu_adb_poll(int olen) "ADB autopoll, olen=%d" | |||
pmu_one_sec_timer(void) "PMU one sec..." | |||
pmu_cmd_set_int_mask(int intmask) "Setting PMU int mask to 0x%02x" |
@@ -1,6 +1,6 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/misc/eccmemctl.c | |||
# eccmemctl.c | |||
ecc_mem_writel_mer(uint32_t val) "Write memory enable 0x%08x" | |||
ecc_mem_writel_mdr(uint32_t val) "Write memory delay 0x%08x" | |||
ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status 0x%08x" | |||
@@ -20,7 +20,7 @@ ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 0x%08x" | |||
ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = 0x%02x" | |||
ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= 0x%02x" | |||
# hw/misc/slavio_misc.c | |||
# slavio_misc.c | |||
slavio_misc_update_irq_raise(void) "Raise IRQ" | |||
slavio_misc_update_irq_lower(void) "Lower IRQ" | |||
slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d" | |||
@@ -41,20 +41,20 @@ slavio_sysctrl_mem_readl(uint32_t ret) "Read system control 0x%08x" | |||
slavio_led_mem_writew(uint32_t val) "Write diagnostic LED 0x%04x" | |||
slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED 0x%04x" | |||
# hw/misc/milkymist-hpdmc.c | |||
# milkymist-hpdmc.c | |||
milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=0x%08x value=0x%08x" | |||
milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=0x%08x value=0x%08x" | |||
# hw/misc/milkymist-pfpu.c | |||
# milkymist-pfpu.c | |||
milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" | |||
milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" | |||
milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a 0x%08x b 0x%08x dma_ptr 0x%08x" | |||
milkymist_pfpu_pulse_irq(void) "Pulse IRQ" | |||
# hw/misc/aspeed_scu.c | |||
# aspeed_scu.c | |||
aspeed_scu_write(uint64_t offset, unsigned size, uint32_t data) "To 0x%" PRIx64 " of size %u: 0x%" PRIx32 | |||
# hw/misc/mps2_scc.c | |||
# mps2_scc.c | |||
mps2_scc_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |||
mps2_scc_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |||
mps2_scc_reset(void) "MPS2 SCC: reset" | |||
@@ -62,29 +62,29 @@ mps2_scc_leds(char led7, char led6, char led5, char led4, char led3, char led2, | |||
mps2_scc_cfg_write(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config write: function %d device %d data 0x%" PRIx32 | |||
mps2_scc_cfg_read(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config read: function %d device %d data 0x%" PRIx32 | |||
# hw/misc/mps2_fpgaio.c | |||
# mps2_fpgaio.c | |||
mps2_fpgaio_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 FPGAIO read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |||
mps2_fpgaio_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 FPGAIO write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |||
mps2_fpgaio_reset(void) "MPS2 FPGAIO: reset" | |||
mps2_fpgaio_leds(char led1, char led0) "MPS2 FPGAIO LEDs: %c%c" | |||
# hw/misc/msf2-sysreg.c | |||
# msf2-sysreg.c | |||
msf2_sysreg_write(uint64_t offset, uint32_t val, uint32_t prev) "msf2-sysreg write: addr 0x%08" PRIx64 " data 0x%" PRIx32 " prev 0x%" PRIx32 | |||
msf2_sysreg_read(uint64_t offset, uint32_t val) "msf2-sysreg read: addr 0x%08" PRIx64 " data 0x%08" PRIx32 | |||
msf2_sysreg_write_pll_status(void) "Invalid write to read only PLL status register" | |||
#hw/misc/imx7_gpr.c | |||
# imx7_gpr.c | |||
imx7_gpr_read(uint64_t offset) "addr 0x%08" PRIx64 | |||
imx7_gpr_write(uint64_t offset, uint64_t value) "addr 0x%08" PRIx64 "value 0x%08" PRIx64 | |||
# hw/misc/mos6522.c | |||
# mos6522.c | |||
mos6522_set_counter(int index, unsigned int val) "T%d.counter=%d" | |||
mos6522_get_next_irq_time(uint16_t latch, int64_t d, int64_t delta) "latch=%d counter=0x%"PRId64 " delta_next=0x%"PRId64 | |||
mos6522_set_sr_int(void) "set sr_int" | |||
mos6522_write(uint64_t addr, uint64_t val) "reg=0x%"PRIx64 " val=0x%"PRIx64 | |||
mos6522_read(uint64_t addr, unsigned val) "reg=0x%"PRIx64 " val=0x%x" | |||
# hw/misc/tz-mpc.c | |||
# tz-mpc.c | |||
tz_mpc_reg_read(uint32_t offset, uint64_t data, unsigned size) "TZ MPC regs read: offset 0x%x data 0x%" PRIx64 " size %u" | |||
tz_mpc_reg_write(uint32_t offset, uint64_t data, unsigned size) "TZ MPC regs write: offset 0x%x data 0x%" PRIx64 " size %u" | |||
tz_mpc_mem_blocked_read(uint64_t addr, unsigned size, bool secure) "TZ MPC blocked read: offset 0x%" PRIx64 " size %u secure %d" | |||
@@ -92,7 +92,7 @@ tz_mpc_mem_blocked_write(uint64_t addr, uint64_t data, unsigned size, bool secur | |||
tz_mpc_translate(uint64_t addr, int flags, const char *idx, const char *res) "TZ MPC translate: addr 0x%" PRIx64 " flags 0x%x iommu_idx %s: %s" | |||
tz_mpc_iommu_notify(uint64_t addr) "TZ MPC iommu: notifying UNMAP/MAP for 0x%" PRIx64 | |||
# hw/misc/tz-msc.c | |||
# tz-msc.c | |||
tz_msc_reset(void) "TZ MSC: reset" | |||
tz_msc_cfg_nonsec(int level) "TZ MSC: cfg_nonsec = %d" | |||
tz_msc_cfg_sec_resp(int level) "TZ MSC: cfg_sec_resp = %d" | |||
@@ -101,7 +101,7 @@ tz_msc_irq_clear(int level) "TZ MSC: int_clear = %d" | |||
tz_msc_update_irq(int level) "TZ MSC: setting irq line to %d" | |||
tz_msc_access_blocked(uint64_t offset) "TZ MSC: offset 0x%" PRIx64 " access blocked" | |||
# hw/misc/tz-ppc.c | |||
# tz-ppc.c | |||
tz_ppc_reset(void) "TZ PPC: reset" | |||
tz_ppc_cfg_nonsec(int n, int level) "TZ PPC: cfg_nonsec[%d] = %d" | |||
tz_ppc_cfg_ap(int n, int level) "TZ PPC: cfg_ap[%d] = %d" | |||
@@ -112,31 +112,31 @@ tz_ppc_update_irq(int level) "TZ PPC: setting irq line to %d" | |||
tz_ppc_read_blocked(int n, uint64_t offset, bool secure, bool user) "TZ PPC: port %d offset 0x%" PRIx64 " read (secure %d user %d) blocked" | |||
tz_ppc_write_blocked(int n, uint64_t offset, bool secure, bool user) "TZ PPC: port %d offset 0x%" PRIx64 " write (secure %d user %d) blocked" | |||
# hw/misc/iotkit-secctl.c | |||
# iotkit-secctl.c | |||
iotkit_secctl_s_read(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl S regs read: offset 0x%x data 0x%" PRIx64 " size %u" | |||
iotkit_secctl_s_write(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl S regs write: offset 0x%x data 0x%" PRIx64 " size %u" | |||
iotkit_secctl_ns_read(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl NS regs read: offset 0x%x data 0x%" PRIx64 " size %u" | |||
iotkit_secctl_ns_write(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl NS regs write: offset 0x%x data 0x%" PRIx64 " size %u" | |||
iotkit_secctl_reset(void) "IoTKit SecCtl: reset" | |||
# hw/misc/imx6ul_ccm.c | |||
# imx6ul_ccm.c | |||
ccm_entry(void) "\n" | |||
ccm_freq(uint32_t freq) "freq = %d\n" | |||
ccm_clock_freq(uint32_t clock, uint32_t freq) "(Clock = %d) = %d\n" | |||
ccm_read_reg(const char *reg_name, uint32_t value) "reg[%s] <= 0x%" PRIx32 "\n" | |||
ccm_write_reg(const char *reg_name, uint32_t value) "reg[%s] => 0x%" PRIx32 "\n" | |||
# hw/misc/iotkit-sysctl.c | |||
# iotkit-sysctl.c | |||
iotkit_sysinfo_read(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysInfo read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |||
iotkit_sysinfo_write(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysInfo write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |||
iotkit_sysctl_read(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysCtl read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |||
iotkit_sysctl_write(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysCtl write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |||
iotkit_sysctl_reset(void) "IoTKit SysCtl: reset" | |||
# hw/misc/armsse-cpuid.c | |||
# armsse-cpuid.c | |||
armsse_cpuid_read(uint64_t offset, uint64_t data, unsigned size) "SSE-200 CPU_IDENTITY read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |||
armsse_cpuid_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 CPU_IDENTITY write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |||
# hw/misc/armsse-mhu.c | |||
# armsse-mhu.c | |||
armsse_mhu_read(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |||
armsse_mhu_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" |
@@ -1,15 +1,15 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/net/etraxfs_eth.c | |||
# etraxfs_eth.c | |||
mdio_phy_read(int regnum, uint16_t value) "read phy_reg:%d value:0x%04x" | |||
mdio_phy_write(int regnum, uint16_t value) "write phy_reg:%d value:0x%04x" | |||
mdio_bitbang(bool mdc, bool mdio, int state, uint16_t cnt, unsigned int drive) "bitbang mdc=%u mdio=%u state=%d cnt=%u drv=%d" | |||
# hw/net/lance.c | |||
# lance.c | |||
lance_mem_readw(uint64_t addr, uint32_t ret) "addr=0x%"PRIx64"val=0x%04x" | |||
lance_mem_writew(uint64_t addr, uint32_t val) "addr=0x%"PRIx64"val=0x%04x" | |||
# hw/net/milkymist-minimac2.c | |||
# milkymist-minimac2.c | |||
milkymist_minimac2_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" | |||
milkymist_minimac2_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" | |||
milkymist_minimac2_mdio_write(uint8_t phy_addr, uint8_t addr, uint16_t value) "phy_addr 0x%02x addr 0x%02x value 0x%04x" | |||
@@ -21,20 +21,20 @@ milkymist_minimac2_raise_irq_rx(void) "Raise IRQ RX" | |||
milkymist_minimac2_lower_irq_rx(void) "Lower IRQ RX" | |||
milkymist_minimac2_pulse_irq_tx(void) "Pulse IRQ TX" | |||
# hw/net/mipsnet.c | |||
# mipsnet.c | |||
mipsnet_send(uint32_t size) "sending len=%u" | |||
mipsnet_receive(uint32_t size) "receiving len=%u" | |||
mipsnet_read(uint64_t addr, uint32_t val) "read addr=0x%" PRIx64 " val=0x%x" | |||
mipsnet_write(uint64_t addr, uint64_t val) "write addr=0x%" PRIx64 " val=0x%" PRIx64 | |||
mipsnet_irq(uint32_t isr, uint32_t intctl) "set irq to %d (0x%02x)" | |||
# hw/net/ne2000.c | |||
# ne2000.c | |||
ne2000_read(uint64_t addr, uint64_t val) "read addr=0x%" PRIx64 " val=0x%" PRIx64 | |||
ne2000_write(uint64_t addr, uint64_t val) "write addr=0x%" PRIx64 " val=0x%" PRIx64 | |||
ne2000_ioport_read(uint64_t addr, uint64_t val) "io read addr=0x%02" PRIx64 " val=0x%02" PRIx64 | |||
ne2000_ioport_write(uint64_t addr, uint64_t val) "io write addr=0x%02" PRIx64 " val=0x%02" PRIx64 | |||
# hw/net/opencores_eth.c | |||
# opencores_eth.c | |||
open_eth_mii_write(unsigned idx, uint16_t v) "MII[0x%02x] <- 0x%04x" | |||
open_eth_mii_read(unsigned idx, uint16_t v) "MII[0x%02x] -> 0x%04x" | |||
open_eth_update_irq(uint32_t v) "IRQ <- 0x%x" | |||
@@ -48,7 +48,7 @@ open_eth_reg_write(uint32_t addr, uint32_t v) "MAC[0x%02x] <- 0x%08x" | |||
open_eth_desc_read(uint32_t addr, uint32_t v) "DESC[0x%04x] -> 0x%08x" | |||
open_eth_desc_write(uint32_t addr, uint32_t v) "DESC[0x%04x] <- 0x%08x" | |||
# hw/net/pcnet.c | |||
# pcnet.c | |||
pcnet_s_reset(void *s) "s=%p" | |||
pcnet_user_int(void *s) "s=%p" | |||
pcnet_isr_change(void *s, uint32_t isr, uint32_t isr_old) "s=%p INTA=%d<=%d" | |||
@@ -56,13 +56,13 @@ pcnet_init(void *s, uint64_t init_addr) "s=%p init_addr=0x%"PRIx64 | |||
pcnet_rlen_tlen(void *s, uint32_t rlen, uint32_t tlen) "s=%p rlen=%d tlen=%d" | |||
pcnet_ss32_rdra_tdra(void *s, uint32_t ss32, uint32_t rdra, uint32_t rcvrl, uint32_t tdra, uint32_t xmtrl) "s=%p ss32=%d rdra=0x%08x[%d] tdra=0x%08x[%d]" | |||
# hw/net/pcnet-pci.c | |||
# pcnet-pci.c | |||
pcnet_aprom_writeb(void *opaque, uint32_t addr, uint32_t val) "opaque=%p addr=0x%08x val=0x%02x" | |||
pcnet_aprom_readb(void *opaque, uint32_t addr, uint32_t val) "opaque=%p addr=0x%08x val=0x%02x" | |||
pcnet_ioport_read(void *opaque, uint64_t addr, unsigned size) "opaque=%p addr=0x%"PRIx64" size=%d" | |||
pcnet_ioport_write(void *opaque, uint64_t addr, uint64_t data, unsigned size) "opaque=%p addr=0x%"PRIx64" data=0x%"PRIx64" size=%d" | |||
# hw/net/net_rx_pkt.c | |||
# net_rx_pkt.c | |||
net_rx_pkt_parsed(bool ip4, bool ip6, bool udp, bool tcp, size_t l3o, size_t l4o, size_t l5o) "RX packet parsed: ip4: %d, ip6: %d, udp: %d, tcp: %d, l3 offset: %zu, l4 offset: %zu, l5 offset: %zu" | |||
net_rx_pkt_l4_csum_validate_entry(void) "Starting L4 checksum validation" | |||
net_rx_pkt_l4_csum_validate_not_xxp(void) "Not a TCP/UDP packet" | |||
@@ -98,10 +98,10 @@ net_rx_pkt_rss_ip6_ex(void) "Calculating IPv6/EX RSS hash" | |||
net_rx_pkt_rss_hash(size_t rss_length, uint32_t rss_hash) "RSS hash for %zu bytes: 0x%X" | |||
net_rx_pkt_rss_add_chunk(void* ptr, size_t size, size_t input_offset) "Add RSS chunk %p, %zu bytes, RSS input offset %zu bytes" | |||
# hw/net/e1000.c | |||
# e1000.c | |||
e1000_receiver_overrun(size_t s, uint32_t rdh, uint32_t rdt) "Receiver overrun: dropped packet of %zu bytes, RDH=%u, RDT=%u" | |||
# hw/net/e1000x_common.c | |||
# e1000x_common.c | |||
e1000x_rx_can_recv_disabled(bool link_up, bool rx_enabled, bool pci_master) "link_up: %d, rx_enabled %d, pci_master %d" | |||
e1000x_vlan_is_vlan_pkt(bool is_vlan_pkt, uint16_t eth_proto, uint16_t vet) "Is VLAN packet: %d, ETH proto: 0x%X, VET: 0x%X" | |||
e1000x_rx_flt_ucast_match(uint32_t idx, uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) "unicast match[%d]: %02x:%02x:%02x:%02x:%02x:%02x" | |||
@@ -114,7 +114,7 @@ e1000x_mac_indicate(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, | |||
e1000x_link_negotiation_start(void) "Start link auto negotiation" | |||
e1000x_link_negotiation_done(void) "Auto negotiation is completed" | |||
# hw/net/e1000e_core.c | |||
# e1000e_core.c | |||
e1000e_core_write(uint64_t index, uint32_t size, uint64_t val) "Write to register 0x%"PRIx64", %d byte(s), value: 0x%"PRIx64 | |||
e1000e_core_read(uint64_t index, uint32_t size, uint64_t val) "Read from register 0x%"PRIx64", %d byte(s), value: 0x%"PRIx64 | |||
e1000e_core_mdic_read(uint8_t page, uint32_t addr, uint32_t data) "MDIC READ: PHY[%u][%u] = 0x%x" | |||
@@ -245,7 +245,7 @@ e1000e_wrn_msix_invalid(uint32_t cause, uint32_t cfg) "Invalid entry for cause 0 | |||
e1000e_mac_set_permanent(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) "Set permanent MAC: %02x:%02x:%02x:%02x:%02x:%02x" | |||
e1000e_mac_set_sw(uint8_t b0, uint8_t b1, uint8_t b2, uint8_t b3, uint8_t b4, uint8_t b5) "Set SW MAC: %02x:%02x:%02x:%02x:%02x:%02x" | |||
# hw/net/e1000e.c | |||
# e1000e.c | |||
e1000e_cb_pci_realize(void) "E1000E PCI realize entry" | |||
e1000e_cb_pci_uninit(void) "E1000E PCI unit entry" | |||
e1000e_cb_qdev_reset(void) "E1000E qdev reset entry" | |||
@@ -271,7 +271,7 @@ e1000e_cfg_support_virtio(bool support) "Virtio header supported: %d" | |||
e1000e_vm_state_running(void) "VM state is running" | |||
e1000e_vm_state_stopped(void) "VM state is stopped" | |||
# hw/net/spapr_llan.c | |||
# spapr_llan.c | |||
spapr_vlan_get_rx_bd_from_pool_found(int pool, int32_t count, uint32_t rx_bufs) "pool=%d count=%"PRId32" rxbufs=%"PRIu32 | |||
spapr_vlan_get_rx_bd_from_page(int buf_ptr, uint64_t bd) "use_buf_ptr=%d bd=0x%016"PRIx64 | |||
spapr_vlan_get_rx_bd_from_page_found(uint32_t use_buf_ptr, uint32_t rx_bufs) "ptr=%"PRIu32" rxbufs=%"PRIu32 | |||
@@ -287,7 +287,7 @@ spapr_vlan_h_send_logical_lan_rxbufs(uint32_t rx_bufs) "rxbufs = %"PRIu32 | |||
spapr_vlan_h_send_logical_lan_buf_desc(uint64_t buf) " buf desc: 0x%"PRIx64 | |||
spapr_vlan_h_send_logical_lan_total(int nbufs, unsigned total_len) "%d buffers, total length 0x%x" | |||
# hw/net/sungem.c | |||
# sungem.c | |||
sungem_tx_checksum(uint16_t start, uint16_t off) "TX checksumming from byte %d, inserting at %d" | |||
sungem_tx_checksum_oob(void) "TX checksum out of packet bounds" | |||
sungem_tx_unfinished(void) "TX packet started without finishing the previous one" | |||
@@ -331,7 +331,7 @@ sungem_mmio_mif_read(uint64_t addr, uint64_t val) "MMIO mif read from 0x%"PRIx64 | |||
sungem_mmio_pcs_write(uint64_t addr, uint64_t val) "MMIO pcs write to 0x%"PRIx64" val=0x%"PRIx64 | |||
sungem_mmio_pcs_read(uint64_t addr, uint64_t val) "MMIO pcs read from 0x%"PRIx64" val=0x%"PRIx64 | |||
# hw/net/sunhme.c | |||
# sunhme.c | |||
sunhme_seb_write(uint64_t addr, uint64_t value) "addr 0x%"PRIx64" value 0x%"PRIx64 | |||
sunhme_seb_read(uint64_t addr, uint64_t value) "addr 0x%"PRIx64" value 0x%"PRIx64 | |||
sunhme_etx_write(uint64_t addr, uint64_t value) "addr 0x%"PRIx64" value 0x%"PRIx64 | |||
@@ -360,7 +360,7 @@ sunhme_rx_filter_accept(void) "accepting incoming frame" | |||
sunhme_rx_desc(uint32_t addr, int offset, uint32_t status, int len, int cr, int nr) "addr 0x%"PRIx32"(+0x%x) status 0x%"PRIx32 " len %d (ring %d/%d)" | |||
sunhme_rx_xsum_calc(uint16_t xsum) "calculated incoming xsum as 0x%x" | |||
# hw/net/virtio-net.c | |||
# virtio-net.c | |||
virtio_net_announce_notify(void) "" | |||
virtio_net_announce_timer(int round) "%d" | |||
virtio_net_handle_announce(int round) "%d" |
@@ -1,10 +1,10 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/nvram/ds1225y.c | |||
# ds1225y.c | |||
nvram_read(uint32_t addr, uint32_t ret) "read addr %d: 0x%02x" | |||
nvram_write(uint32_t addr, uint32_t old, uint32_t val) "write addr %d: 0x%02x -> 0x%02x" | |||
# hw/nvram/fw_cfg.c | |||
# fw_cfg.c | |||
fw_cfg_select(void *s, uint16_t key, int ret) "%p key %d = %d" | |||
fw_cfg_read(void *s, uint64_t ret) "%p = 0x%"PRIx64 | |||
fw_cfg_add_file(void *s, int index, char *name, size_t len) "%p #%d: %s (%zd bytes)" |
@@ -1,9 +1,9 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/pci-host/grackle.c | |||
# grackle.c | |||
grackle_set_irq(int irq_num, int level) "set_irq num %d level %d" | |||
# hw/pci-host/sabre.c | |||
# sabre.c | |||
sabre_set_request(int irq_num) "request irq %d" | |||
sabre_clear_request(int irq_num) "clear request irq %d" | |||
sabre_config_write(uint64_t addr, uint64_t val) "addr 0x%"PRIx64" val 0x%"PRIx64 | |||
@@ -13,7 +13,7 @@ sabre_pci_config_read(uint64_t addr, uint64_t val) "addr 0x%"PRIx64" val 0x%"PRI | |||
sabre_pci_set_irq(int irq_num, int level) "set irq_in %d level %d" | |||
sabre_pci_set_obio_irq(int irq_num, int level) "set irq %d level %d" | |||
# hw/pci-host/uninorth.c | |||
# uninorth.c | |||
unin_set_irq(int irq_num, int level) "setting INT %d = %d" | |||
unin_get_config_reg(uint32_t reg, uint32_t addr, uint32_t retval) "converted config space accessor 0x%"PRIx32 "/0x%"PRIx32 " -> 0x%"PRIx32 | |||
unin_data_write(uint64_t addr, unsigned len, uint64_t val) "write addr 0x%"PRIx64 " len %d val 0x%"PRIx64 |
@@ -1,12 +1,12 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/pci/pci.c | |||
# pci.c | |||
pci_update_mappings_del(void *d, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) "d=%p %02x:%02x.%x %d,0x%"PRIx64"+0x%"PRIx64 | |||
pci_update_mappings_add(void *d, uint32_t bus, uint32_t slot, uint32_t func, int bar, uint64_t addr, uint64_t size) "d=%p %02x:%02x.%x %d,0x%"PRIx64"+0x%"PRIx64 | |||
# hw/pci/pci_host.c | |||
# pci_host.c | |||
pci_cfg_read(const char *dev, unsigned devid, unsigned fnid, unsigned offs, unsigned val) "%s %02u:%u @0x%x -> 0x%x" | |||
pci_cfg_write(const char *dev, unsigned devid, unsigned fnid, unsigned offs, unsigned val) "%s %02u:%u @0x%x <- 0x%x" | |||
# hw/pci/msix.c | |||
# msix.c | |||
msix_write_config(char *name, bool enabled, bool masked) "dev %s enabled %d masked %d" |
@@ -1,6 +1,6 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/ppc/spapr_pci.c | |||
# spapr_pci.c | |||
spapr_pci_msi(const char *msg, uint32_t ca) "%s (cfg=0x%x)" | |||
spapr_pci_msi_setup(const char *name, unsigned vector, uint64_t addr) "dev\"%s\" vector %u, addr=0x%"PRIx64 | |||
spapr_pci_rtas_ibm_change_msi(unsigned cfg, unsigned func, unsigned req, unsigned first) "cfgaddr 0x%x func %u, requested %u, first irq %u" | |||
@@ -9,7 +9,7 @@ spapr_pci_msi_write(uint64_t addr, uint64_t data, uint32_t dt_irq) "@0x%"PRIx64" | |||
spapr_pci_lsi_set(const char *busname, int pin, uint32_t irq) "%s PIN%d IRQ %u" | |||
spapr_pci_msi_retry(unsigned config_addr, unsigned req_num, unsigned max_irqs) "Guest device at 0x%x asked %u, have only %u" | |||
# hw/ppc/spapr.c | |||
# spapr.c | |||
spapr_cas_failed(unsigned long n) "DT diff buffer is too small: %ld bytes" | |||
spapr_cas_continue(unsigned long n) "Copy changes to the guest: %ld bytes" | |||
spapr_irq_alloc(int irq) "irq %d" | |||
@@ -17,7 +17,7 @@ spapr_irq_alloc_block(int first, int num, bool lsi, int align) "first irq %d, %d | |||
spapr_irq_free(int src, int irq, int num) "Source#%d, first irq %d, %d irqs" | |||
spapr_irq_free_warn(int src, int irq) "Source#%d, irq %d is already free" | |||
# hw/ppc/spapr_hcall.c | |||
# spapr_hcall.c | |||
spapr_cas_pvr_try(uint32_t pvr) "0x%x" | |||
spapr_cas_pvr(uint32_t cur_pvr, bool explicit_match, uint32_t new_pvr) "current=0x%x, explicit_match=%u, new=0x%x" | |||
spapr_h_resize_hpt_prepare(uint64_t flags, uint64_t shift) "flags=0x%"PRIx64", shift=%"PRIu64 | |||
@@ -26,7 +26,7 @@ spapr_update_dt(unsigned cb) "New blob %u bytes" | |||
spapr_update_dt_failed_size(unsigned cbold, unsigned cbnew, unsigned magic) "Old blob %u bytes, new blob %u bytes, magic 0x%x" | |||
spapr_update_dt_failed_check(unsigned cbold, unsigned cbnew, unsigned magic) "Old blob %u bytes, new blob %u bytes, magic 0x%x" | |||
# hw/ppc/spapr_iommu.c | |||
# spapr_iommu.c | |||
spapr_iommu_put(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t ret) "liobn=0x%"PRIx64" ioba=0x%"PRIx64" tce=0x%"PRIx64" ret=%"PRId64 | |||
spapr_iommu_get(uint64_t liobn, uint64_t ioba, uint64_t ret, uint64_t tce) "liobn=0x%"PRIx64" ioba=0x%"PRIx64" ret=%"PRId64" tce=0x%"PRIx64 | |||
spapr_iommu_indirect(uint64_t liobn, uint64_t ioba, uint64_t tce, uint64_t iobaN, uint64_t tceN, uint64_t ret) "liobn=0x%"PRIx64" ioba=0x%"PRIx64" tcelist=0x%"PRIx64" iobaN=0x%"PRIx64" tceN=0x%"PRIx64" ret=%"PRId64 | |||
@@ -44,7 +44,7 @@ spapr_iommu_ddw_create(uint64_t buid, uint32_t cfgaddr, uint64_t pg_size, uint64 | |||
spapr_iommu_ddw_remove(uint32_t liobn) "liobn=0x%"PRIx32 | |||
spapr_iommu_ddw_reset(uint64_t buid, uint32_t cfgaddr) "buid=0x%"PRIx64" addr=0x%"PRIx32 | |||
# hw/ppc/spapr_drc.c | |||
# spapr_drc.c | |||
spapr_drc_set_isolation_state(uint32_t index, int state) "drc: 0x%"PRIx32", state: 0x%"PRIx32 | |||
spapr_drc_set_isolation_state_finalizing(uint32_t index) "drc: 0x%"PRIx32 | |||
spapr_drc_set_isolation_state_deferring(uint32_t index) "drc: 0x%"PRIx32 | |||
@@ -63,43 +63,43 @@ spapr_drc_realize_child(uint32_t index, char *childname) "drc: 0x%"PRIx32", chil | |||
spapr_drc_realize_complete(uint32_t index) "drc: 0x%"PRIx32 | |||
spapr_drc_unrealize(uint32_t index) "drc: 0x%"PRIx32 | |||
# hw/ppc/spapr_ovec.c | |||
# spapr_ovec.c | |||
spapr_ovec_parse_vector(int vector, int byte, uint16_t vec_len, uint8_t entry) "read guest vector %2d, byte %3d / %3d: 0x%.2x" | |||
spapr_ovec_populate_dt(int byte, uint16_t vec_len, uint8_t entry) "encoding guest vector byte %3d / %3d: 0x%.2x" | |||
# hw/ppc/spapr_rtas.c | |||
# spapr_rtas.c | |||
spapr_rtas_get_sensor_state_not_supported(uint32_t index, uint32_t type) "sensor index: 0x%"PRIx32", type: %"PRIu32 | |||
spapr_rtas_get_sensor_state_invalid(uint32_t index) "sensor index: 0x%"PRIx32 | |||
spapr_rtas_ibm_configure_connector_invalid(uint32_t index) "DRC index: 0x%"PRIx32 | |||
spapr_rtas_ibm_configure_connector_missing_fdt(uint32_t index) "DRC index: 0x%"PRIx32 | |||
# hw/ppc/spapr_vio.c | |||
# spapr_vio.c | |||
spapr_vio_h_reg_crq(uint64_t reg, uint64_t queue_addr, uint64_t queue_len) "CRQ for dev 0x%" PRIx64 " registered at 0x%" PRIx64 "/0x%" PRIx64 | |||
spapr_vio_free_crq(uint32_t reg) "CRQ for dev 0x%" PRIx32 " freed" | |||
# hw/ppc/ppc.c | |||
# ppc.c | |||
ppc_tb_adjust(uint64_t offs1, uint64_t offs2, int64_t diff, int64_t seconds) "adjusted from 0x%"PRIx64" to 0x%"PRIx64", diff %"PRId64" (%"PRId64"s)" | |||
# hw/ppc/prep.c | |||
# prep.c | |||
prep_io_800_writeb(uint32_t addr, uint32_t val) "0x%08" PRIx32 " => 0x%02" PRIx32 | |||
prep_io_800_readb(uint32_t addr, uint32_t retval) "0x%08" PRIx32 " <= 0x%02" PRIx32 | |||
# hw/ppc/prep_systemio.c | |||
# prep_systemio.c | |||
prep_systemio_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x" | |||
prep_systemio_write(uint32_t addr, uint32_t val) "write addr=0x%x val=0x%x" | |||
# hw/ppc/rs6000_mc.c | |||
# rs6000_mc.c | |||
rs6000mc_id_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x" | |||
rs6000mc_presence_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x" | |||
rs6000mc_size_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x" | |||
rs6000mc_size_write(uint32_t addr, uint32_t val) "write addr=0x%x val=0x%x" | |||
rs6000mc_parity_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x" | |||
# hw/ppc/ppc4xx_pci.c | |||
# ppc4xx_pci.c | |||
ppc4xx_pci_map_irq(int32_t devfn, int irq_num, int slot) "devfn 0x%x irq %d -> %d" | |||
ppc4xx_pci_set_irq(int irq_num) "PCI irq %d" | |||
# hw/ppc/ppc440_pcix.c | |||
# ppc440_pcix.c | |||
ppc440_pcix_map_irq(int32_t devfn, int irq_num, int slot) "devfn 0x%x irq %d -> %d" | |||
ppc440_pcix_set_irq(int irq_num) "PCI irq %d" | |||
ppc440_pcix_update_pim(int idx, uint64_t size, uint64_t la) "Added window %d of size=0x%" PRIx64 " to CPU=0x%" PRIx64 |
@@ -1,6 +1,6 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/rdma/rdma_backend.c | |||
# rdma_backend.c | |||
rdma_check_dev_attr(const char *name, int max_bk, int max_fe) "%s: be=%d, fe=%d" | |||
rdma_create_ah_cache_hit(uint64_t subnet, uint64_t if_id) "subnet=0x%"PRIx64",if_id=0x%"PRIx64 | |||
rdma_create_ah_cache_miss(uint64_t subnet, uint64_t if_id) "subnet=0x%"PRIx64",if_id=0x%"PRIx64 | |||
@@ -17,7 +17,7 @@ rdma_backend_ud_qp_state_rts(uint32_t qpn, uint32_t sq_psn, uint32_t qkey) "UD Q | |||
rdma_backend_get_gid_index(uint64_t subnet, uint64_t ifid, int gid_idx) "subnet=0x%"PRIx64", ifid=0x%"PRIx64 ", gid_idx=%d" | |||
rdma_backend_gid_change(const char *op, uint64_t subnet, uint64_t ifid) "%s subnet=0x%"PRIx64", ifid=0x%"PRIx64 | |||
# hw/rdma/rdma_rm.c | |||
# rdma_rm.c | |||
rdma_res_tbl_get(char *name, uint32_t handle) "tbl %s, handle %d" | |||
rdma_res_tbl_alloc(char *name, uint32_t handle) "tbl %s, handle %d" | |||
rdma_res_tbl_dealloc(char *name, uint32_t handle) "tbl %s, handle %d" | |||
@@ -26,6 +26,6 @@ rdma_rm_dealloc_mr(uint32_t mr_handle, uint64_t guest_start) "mr_handle=%d, gues | |||
rdma_rm_alloc_qp(uint32_t rm_qpn, uint32_t backend_qpn, uint8_t qp_type) "rm_qpn=%d, backend_qpn=0x%x, qp_type=%d" | |||
rdma_rm_modify_qp(uint32_t qpn, uint32_t attr_mask, int qp_state, uint8_t sgid_idx) "qpn=0x%x, attr_mask=0x%x, qp_state=%d, sgid_idx=%d" | |||
# hw/rdma/rdma_utils.c | |||
# rdma_utils.c | |||
rdma_pci_dma_map(uint64_t addr, void *vaddr, uint64_t len) "0x%"PRIx64" -> %p (len=%" PRId64")" | |||
rdma_pci_dma_unmap(void *vaddr) "%p" |
@@ -1,17 +1,17 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/rdma/vmw/pvrdma_main.c | |||
# pvrdma_main.c | |||
pvrdma_regs_read(uint64_t addr, uint64_t val) "pvrdma.regs[0x%"PRIx64"]=0x%"PRIx64 | |||
pvrdma_regs_write(uint64_t addr, uint64_t val, const char *reg_name, const char *val_name) "pvrdma.regs[0x%"PRIx64"]=0x%"PRIx64" (%s %s)" | |||
pvrdma_uar_write(uint64_t addr, uint64_t val, const char *reg_name, const char *val_name, int val1, int val2) "uar[0x%"PRIx64"]=0x%"PRIx64" (cls=%s, op=%s, obj=%d, val=%d)" | |||
# hw/rdma/vmw/pvrdma_cmd.c | |||
# pvrdma_cmd.c | |||
pvrdma_map_to_pdir_host_virt(void *vfirst, void *vremaped) "mremap %p -> %p" | |||
pvrdma_map_to_pdir_next_page(int page_idx, void *vnext, void *vremaped) "mremap [%d] %p -> %p" | |||
pvrdma_exec_cmd(int cmd, int err) "cmd=%d, err=%d" | |||
# hw/rdma/vmw/pvrdma_dev_ring.c | |||
# pvrdma_dev_ring.c | |||
pvrdma_ring_next_elem_read_no_data(char *ring_name) "pvrdma_ring %s is empty" | |||
# hw/rdma/vmw/pvrdma_qp_ops.c | |||
# pvrdma_qp_ops.c | |||
pvrdma_post_cqe(uint32_t cq_handle, int notify, uint64_t wr_id, uint64_t qpn, uint32_t op_code, uint32_t status, uint32_t byte_len, uint32_t src_qp, uint32_t wc_flags, uint32_t vendor_err) "cq_handle=%d, notify=%d, wr_id=0x%"PRIx64", qpn=0x%"PRIx64", opcode=%d, status=%d, byte_len=%d, src_qp=%d, wc_flags=%d, vendor_err=%d" |
@@ -1,6 +1,6 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/s390x/css.c | |||
# css.c | |||
css_enable_facility(const char *facility) "CSS: enable %s" | |||
css_crw(uint8_t rsc, uint8_t erc, uint16_t rsid, const char *chained) "CSS: queueing crw: rsc=0x%x, erc=0x%x, rsid=0x%x %s" | |||
css_chpid_add(uint8_t cssid, uint8_t chpid, uint8_t type) "CSS: add chpid %x.%02x (type 0x%02x)" | |||
@@ -10,7 +10,7 @@ css_io_interrupt(int cssid, int ssid, int schid, uint32_t intparm, uint8_t isc, | |||
css_adapter_interrupt(uint8_t isc) "CSS: adapter I/O interrupt (isc 0x%x)" | |||
css_do_sic(uint16_t mode, uint8_t isc) "CSS: set interruption mode 0x%x on isc 0x%x" | |||
# hw/s390x/virtio-ccw.c | |||
# virtio-ccw.c | |||
virtio_ccw_interpret_ccw(int cssid, int ssid, int schid, int cmd_code) "VIRTIO-CCW: %x.%x.%04x: interpret command 0x%x" | |||
virtio_ccw_new_device(int cssid, int ssid, int schid, int devno, const char *devno_mode) "VIRTIO-CCW: add subchannel %x.%x.%04x, devno 0x%04x (%s)" | |||
virtio_ccw_set_ind(uint64_t ind_loc, uint8_t ind_old, uint8_t ind_new) "VIRTIO-CCW: indicator at %" PRIu64 ": 0x%x->0x%x" |
@@ -1,6 +1,6 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/scsi/scsi-bus.c | |||
# scsi-bus.c | |||
scsi_req_alloc(int target, int lun, int tag) "target %d lun %d tag %d" | |||
scsi_req_cancel(int target, int lun, int tag) "target %d lun %d tag %d" | |||
scsi_req_data(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d" | |||
@@ -18,7 +18,7 @@ scsi_inquiry(int target, int lun, int tag, int cdb1, int cdb2) "target %d lun %d | |||
scsi_test_unit_ready(int target, int lun, int tag) "target %d lun %d tag %d" | |||
scsi_request_sense(int target, int lun, int tag) "target %d lun %d tag %d" | |||
# hw/scsi/mptsas.c | |||
# mptsas.c | |||
mptsas_command_complete(void *dev, uint32_t ctx, uint32_t status, uint32_t resid) "dev %p context 0x%08x status 0x%x resid %d" | |||
mptsas_diag_read(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%08x value 0x%08x" | |||
mptsas_diag_write(void *dev, uint32_t addr, uint32_t val) "dev %p addr 0x%08x value 0x%08x" | |||
@@ -36,11 +36,11 @@ mptsas_sgl_overflow(void *dev, uint32_t ctx, uint64_t req, uint64_t found) "dev | |||
mptsas_unhandled_cmd(void *dev, uint32_t ctx, uint8_t msg_cmd) "dev %p context 0x%08x: Unhandled cmd 0x%x" | |||
mptsas_unhandled_doorbell_cmd(void *dev, int cmd) "dev %p value 0x%08x" | |||
# hw/scsi/mptconfig.c | |||
# mptconfig.c | |||
mptsas_config_sas_device(void *dev, int address, int port, int phy_handle, int dev_handle, int page) "dev %p address %d (port %d, handles: phy %d dev %d) page %d" | |||
mptsas_config_sas_phy(void *dev, int address, int port, int phy_handle, int dev_handle, int page) "dev %p address %d (port %d, handles: phy %d dev %d) page %d" | |||
# hw/scsi/megasas.c | |||
# megasas.c | |||
megasas_init_firmware(uint64_t pa) "pa 0x%" PRIx64 " " | |||
megasas_init_queue(uint64_t queue_pa, int queue_len, uint64_t head, uint64_t tail, uint32_t flags) "queue at 0x%" PRIx64 " len %d head 0x%" PRIx64 " tail 0x%" PRIx64 " flags 0x%x" | |||
megasas_initq_map_failed(int frame) "scmd %d: failed to map queue" | |||
@@ -118,7 +118,7 @@ megasas_mmio_invalid_readl(unsigned long addr) "addr 0x%lx" | |||
megasas_mmio_writel(const char *reg, uint32_t val) "reg %s: 0x%x" | |||
megasas_mmio_invalid_writel(uint32_t addr, uint32_t val) "addr 0x%x: 0x%x" | |||
# hw/scsi/vmw_pvscsi.c | |||
# vmw_pvscsi.c | |||
pvscsi_ring_init_data(uint32_t txr_len_log2, uint32_t rxr_len_log2) "TX/RX rings logarithms set to %d/%d" | |||
pvscsi_ring_init_msg(uint32_t len_log2) "MSG ring logarithm set to %d" | |||
pvscsi_ring_flush_cmp(uint64_t filled_cmp_ptr) "new production counter of completion ring is 0x%"PRIx64 | |||
@@ -153,7 +153,7 @@ pvscsi_state(const char* state) "starting %s ..." | |||
pvscsi_tx_rings_ppn(const char* label, uint64_t ppn) "%s page: 0x%"PRIx64 | |||
pvscsi_tx_rings_num_pages(const char* label, uint32_t num) "Number of %s pages: %u" | |||
# hw/scsi/esp.c | |||
# esp.c | |||
esp_error_fifo_overrun(void) "FIFO overrun" | |||
esp_error_unhandled_command(uint32_t val) "unhandled command (0x%2.2x)" | |||
esp_error_invalid_write(uint32_t val, uint32_t addr) "invalid write of 0x%02x at [0x%x]" | |||
@@ -190,7 +190,7 @@ esp_mem_writeb_cmd_selatns(uint32_t val) "Select with ATN & stop (0x%2.2x)" | |||
esp_mem_writeb_cmd_ensel(uint32_t val) "Enable selection (0x%2.2x)" | |||
esp_mem_writeb_cmd_dissel(uint32_t val) "Disable selection (0x%2.2x)" | |||
# hw/scsi/esp-pci.c | |||
# esp-pci.c | |||
esp_pci_error_invalid_dma_direction(void) "invalid DMA transfer direction" | |||
esp_pci_error_invalid_read(uint32_t reg) "read access outside bounds (reg 0x%x)" | |||
esp_pci_error_invalid_write(uint32_t reg) "write access outside bounds (reg 0x%x)" | |||
@@ -204,7 +204,7 @@ esp_pci_dma_start(uint32_t val) "START (0x%.8x)" | |||
esp_pci_sbac_read(uint32_t reg) "sbac: 0x%8.8x" | |||
esp_pci_sbac_write(uint32_t reg, uint32_t val) "sbac: 0x%8.8x -> 0x%8.8x" | |||
# hw/scsi/spapr_vscsi.c | |||
# spapr_vscsi.c | |||
spapr_vscsi_send_rsp(uint8_t status, int32_t res_in, int32_t res_out) "status: 0x%x, res_in: %"PRId32", res_out: %"PRId32 | |||
spapr_vscsi_fetch_desc_no_data(void) "no data descriptor" | |||
spapr_vscsi_fetch_desc_direct(void) "direct segment" | |||
@@ -231,7 +231,7 @@ spapr_vscsi_queue_cmd_no_drive(uint64_t lun) "Command for lun 0x%08" PRIx64 " wi | |||
spapr_vscsi_queue_cmd(uint32_t qtag, unsigned cdb, const char *cmd, int lun, int ret) "Queued command tag 0x%"PRIx32" CMD 0x%x=%s LUN %d ret: %d" | |||
spapr_vscsi_do_crq(unsigned c0, unsigned c1) "crq: %02x %02x ..." | |||
# hw/scsi/lsi53c895a.c | |||
# lsi53c895a.c | |||
lsi_reset(void) "Reset" | |||
lsi_update_irq(int level, uint8_t dstat, uint8_t sist1, uint8_t sist0) "Update IRQ level %d dstat 0x%02x sist 0x%02x0x%02x" | |||
lsi_update_irq_disconnected(void) "Handled IRQs & disconnected, looking for pending processes" | |||
@@ -293,7 +293,7 @@ lsi_awoken(void) "Woken by SIGP" | |||
lsi_reg_read(const char *name, int offset, uint8_t ret) "Read reg %s 0x%x = 0x%02x" | |||
lsi_reg_write(const char *name, int offset, uint8_t val) "Write reg %s 0x%x = 0x%02x" | |||
# hw/scsi/scsi-disk.c | |||
# scsi-disk.c | |||
scsi_disk_check_condition(uint32_t tag, uint8_t key, uint8_t asc, uint8_t ascq) "Command complete tag=0x%x sense=%d/%d/%d" | |||
scsi_disk_read_complete(uint32_t tag, size_t size) "Data ready tag=0x%x len=%zd" | |||
scsi_disk_read_data_count(uint32_t sector_count) "Read sector_count=%d" | |||
@@ -322,7 +322,7 @@ scsi_disk_dma_command_READ(uint64_t lba, uint32_t len) "Read (sector %" PRId64 " | |||
scsi_disk_dma_command_WRITE(const char *cmd, uint64_t lba, int len) "Write %s(sector %" PRId64 ", count %u)" | |||
scsi_disk_new_request(uint32_t lun, uint32_t tag, const char *line) "Command: lun=%d tag=0x%x data=%s" | |||
# hw/scsi/scsi-generic.c | |||
# scsi-generic.c | |||
scsi_generic_command_complete_noio(void *req, uint32_t tag, int statuc) "Command complete %p tag=0x%x status=%d" | |||
scsi_generic_read_complete(uint32_t tag, int len) "Data ready tag=0x%x len=%d" | |||
scsi_generic_read_data(uint32_t tag) "scsi_read_data tag=0x%x" |
@@ -1,12 +1,12 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/sd/bcm2835_sdhost.c | |||
# bcm2835_sdhost.c | |||
bcm2835_sdhost_read(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |||
bcm2835_sdhost_write(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |||
bcm2835_sdhost_edm_change(const char *why, uint32_t edm) "(%s) EDM now 0x%x" | |||
bcm2835_sdhost_update_irq(uint32_t irq) "IRQ bits 0x%x\n" | |||
# hw/sd/core.c | |||
# core.c | |||
sdbus_command(const char *bus_name, uint8_t cmd, uint32_t arg) "@%s CMD%02d arg 0x%08x" | |||
sdbus_read(const char *bus_name, uint8_t value) "@%s value 0x%02x" | |||
sdbus_write(const char *bus_name, uint8_t value) "@%s value 0x%02x" | |||
@@ -14,7 +14,7 @@ sdbus_set_voltage(const char *bus_name, uint16_t millivolts) "@%s %u (mV)" | |||
sdbus_get_dat_lines(const char *bus_name, uint8_t dat_lines) "@%s dat_lines: %u" | |||
sdbus_get_cmd_line(const char *bus_name, bool cmd_line) "@%s cmd_line: %u" | |||
# hw/sd/sdhci.c | |||
# sdhci.c | |||
sdhci_set_inserted(const char *level) "card state changed: %s" | |||
sdhci_send_command(uint8_t cmd, uint32_t arg) "CMD%02u ARG[0x%08x]" | |||
sdhci_error(const char *msg) "%s" | |||
@@ -29,7 +29,7 @@ sdhci_read_dataport(uint16_t data_count) "all %u bytes of data have been read fr | |||
sdhci_write_dataport(uint16_t data_count) "write buffer filled with %u bytes of data" | |||
sdhci_capareg(const char *desc, uint16_t val) "%s: %u" | |||
# hw/sd/sd.c | |||
# sd.c | |||
sdcard_normal_command(const char *proto, const char *cmd_desc, uint8_t cmd, uint32_t arg, const char *state) "%s %20s/ CMD%02d arg 0x%08x (state %s)" | |||
sdcard_app_command(const char *proto, const char *acmd_desc, uint8_t acmd, uint32_t arg, const char *state) "%s %23s/ACMD%02d arg 0x%08x (state %s)" | |||
sdcard_response(const char *rspdesc, int rsplen) "%s (sz:%d)" | |||
@@ -49,10 +49,10 @@ sdcard_write_data(const char *proto, const char *cmd_desc, uint8_t cmd, uint8_t | |||
sdcard_read_data(const char *proto, const char *cmd_desc, uint8_t cmd, int length) "%s %20s/ CMD%02d len %d" | |||
sdcard_set_voltage(uint16_t millivolts) "%u mV" | |||
# hw/sd/milkymist-memcard.c | |||
# milkymist-memcard.c | |||
milkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" | |||
milkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" | |||
# hw/sd/pxa2xx_mmci.c | |||
# pxa2xx_mmci.c | |||
pxa2xx_mmci_read(uint8_t size, uint32_t addr, uint32_t value) "size %d addr 0x%02x value 0x%08x" | |||
pxa2xx_mmci_write(uint8_t size, uint32_t addr, uint32_t value) "size %d addr 0x%02x value 0x%08x" |
@@ -1,12 +1,12 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/sparc/sun4m.c | |||
# sun4m.c | |||
sun4m_cpu_interrupt(unsigned int level) "Set CPU IRQ %d" | |||
sun4m_cpu_reset_interrupt(unsigned int level) "Reset CPU IRQ %d" | |||
sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d" | |||
sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d" | |||
# hw/sparc/sun4m_iommu.c | |||
# sun4m_iommu.c | |||
sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x" | |||
sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x" | |||
sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = 0x%"PRIx64 | |||
@@ -16,6 +16,6 @@ sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags | |||
sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva 0x%"PRIx64" => pa 0x%"PRIx64" iopte = 0x%x" | |||
sun4m_iommu_bad_addr(uint64_t addr) "bad addr 0x%"PRIx64 | |||
# hw/sparc/leon3.c | |||
# leon3.c | |||
leon3_set_irq(int intno) "Set CPU IRQ %d" | |||
leon3_reset_irq(int intno) "Reset CPU IRQ %d" |
@@ -1,14 +1,14 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/sparc64/sun4u.c | |||
# sun4u.c | |||
ebus_isa_irq_handler(int n, int level) "Set ISA IRQ %d level %d" | |||
# hw/sparc64/sun4u_iommu.c | |||
# sun4u_iommu.c | |||
sun4u_iommu_mem_read(uint64_t addr, uint64_t val, int size) "addr: 0x%"PRIx64" val: 0x%"PRIx64" size: %d" | |||
sun4u_iommu_mem_write(uint64_t addr, uint64_t val, int size) "addr: 0x%"PRIx64" val: 0x%"PRIx64" size: %d" | |||
sun4u_iommu_translate(uint64_t addr, uint64_t trans_addr, uint64_t tte) "xlate 0x%"PRIx64" => pa 0x%"PRIx64" tte: 0x%"PRIx64 | |||
# hw/sparc64/sparc64.c | |||
# sparc64.c | |||
sparc64_cpu_check_irqs_reset_irq(int intno) "Reset CPU IRQ (current interrupt 0x%x)" | |||
sparc64_cpu_check_irqs_noset_irq(uint32_t tl, uint32_t tt, int intno) "Not setting CPU IRQ: TL=%d current 0x%x >= pending 0x%x" | |||
sparc64_cpu_check_irqs_set_irq(unsigned int i, int old, int new) "Set CPU IRQ %d old=0x%x new=0x%x" |
@@ -1,6 +1,6 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/timer/slavio_timer.c | |||
# slavio_timer.c | |||
slavio_timer_get_out(uint64_t limit, uint32_t counthigh, uint32_t count) "limit 0x%"PRIx64" count 0x%x0x%08x" | |||
slavio_timer_irq(uint32_t counthigh, uint32_t count) "callback: count 0x%x0x%08x" | |||
slavio_timer_mem_readl_invalid(uint64_t addr) "invalid read address 0x%"PRIx64 | |||
@@ -15,7 +15,7 @@ slavio_timer_mem_writel_mode_counter(unsigned int timer_index) "processor %d cha | |||
slavio_timer_mem_writel_mode_invalid(void) "not system timer" | |||
slavio_timer_mem_writel_invalid(uint64_t addr) "invalid write address 0x%"PRIx64 | |||
# hw/timer/grlib_gptimer.c | |||
# grlib_gptimer.c | |||
grlib_gptimer_enable(int id, uint32_t count) "timer:%d set count 0x%x and run" | |||
grlib_gptimer_disabled(int id, uint32_t config) "timer:%d Timer disable config 0x%x" | |||
grlib_gptimer_restart(int id, uint32_t reload) "timer:%d reload val: 0x%x" | |||
@@ -24,13 +24,13 @@ grlib_gptimer_hit(int id) "timer:%d HIT" | |||
grlib_gptimer_readl(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x" | |||
grlib_gptimer_writel(int id, uint64_t addr, uint32_t val) "timer:%d addr 0x%"PRIx64" 0x%x" | |||
# hw/timer/lm32_timer.c | |||
# lm32_timer.c | |||
lm32_timer_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" | |||
lm32_timer_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" | |||
lm32_timer_hit(void) "timer hit" | |||
lm32_timer_irq_state(int level) "irq state %d" | |||
# hw/timer/milkymist-sysctl.c | |||
# milkymist-sysctl.c | |||
milkymist_sysctl_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" | |||
milkymist_sysctl_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" | |||
milkymist_sysctl_icap_write(uint32_t value) "value 0x%08x" | |||
@@ -41,7 +41,7 @@ milkymist_sysctl_stop_timer1(void) "Stop timer1" | |||
milkymist_sysctl_pulse_irq_timer0(void) "Pulse IRQ Timer0" | |||
milkymist_sysctl_pulse_irq_timer1(void) "Pulse IRQ Timer1" | |||
# hw/timer/aspeed_timer.c | |||
# aspeed_timer.c | |||
aspeed_timer_ctrl_enable(uint8_t i, bool enable) "Timer %" PRIu8 ": %d" | |||
aspeed_timer_ctrl_external_clock(uint8_t i, bool enable) "Timer %" PRIu8 ": %d" | |||
aspeed_timer_ctrl_overflow_interrupt(uint8_t i, bool enable) "Timer %" PRIu8 ": %d" | |||
@@ -50,34 +50,34 @@ aspeed_timer_set_ctrl2(uint32_t value) "Value: 0x%" PRIx32 | |||
aspeed_timer_set_value(int timer, int reg, uint32_t value) "Timer %d register %d: 0x%" PRIx32 | |||
aspeed_timer_read(uint64_t offset, unsigned size, uint64_t value) "From 0x%" PRIx64 ": of size %u: 0x%" PRIx64 | |||
# hw/timer/armv7m_systick.c | |||
# armv7m_systick.c | |||
systick_reload(void) "systick reload" | |||
systick_timer_tick(void) "systick reload" | |||
systick_read(uint64_t addr, uint32_t value, unsigned size) "systick read addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u" | |||
systick_write(uint64_t addr, uint32_t value, unsigned size) "systick write addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u" | |||
# hw/timer/cmsdk_apb_timer.c | |||
# cmsdk_apb_timer.c | |||
cmsdk_apb_timer_read(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB timer read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |||
cmsdk_apb_timer_write(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB timer write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |||
cmsdk_apb_timer_reset(void) "CMSDK APB timer: reset" | |||
# hw/timer/cmsdk_apb_dualtimer.c | |||
# cmsdk_apb_dualtimer.c | |||
cmsdk_apb_dualtimer_read(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB dualtimer read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |||
cmsdk_apb_dualtimer_write(uint64_t offset, uint64_t data, unsigned size) "CMSDK APB dualtimer write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |||
cmsdk_apb_dualtimer_reset(void) "CMSDK APB dualtimer: reset" | |||
# hw/timer/sun4v-rtc.c | |||
# sun4v-rtc.c | |||
sun4v_rtc_read(uint64_t addr, uint64_t value) "read: addr 0x%" PRIx64 " value 0x%" PRIx64 | |||
sun4v_rtc_write(uint64_t addr, uint64_t value) "write: addr 0x%" PRIx64 " value 0x%" PRIx64 | |||
# hw/timer/xlnx-zynqmp-rtc.c | |||
# xlnx-zynqmp-rtc.c | |||
xlnx_zynqmp_rtc_gettime(int year, int month, int day, int hour, int min, int sec) "Get time from host: %d-%d-%d %2d:%02d:%02d" | |||
# hw/timer/nrf51_timer.c | |||
# nrf51_timer.c | |||
nrf51_timer_read(uint64_t addr, uint32_t value, unsigned size) "read addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u" | |||
nrf51_timer_write(uint64_t addr, uint32_t value, unsigned size) "write addr 0x%" PRIx64 " data 0x%" PRIx32 " size %u" | |||
# hw/timer/pl031.c | |||
# pl031.c | |||
pl031_irq_state(int level) "irq state %d" | |||
pl031_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" | |||
pl031_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" |
@@ -1,21 +1,21 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/tpm/tpm_crb.c | |||
# tpm_crb.c | |||
tpm_crb_mmio_read(uint64_t addr, unsigned size, uint32_t val) "CRB read 0x" TARGET_FMT_plx " len:%u val: 0x%" PRIx32 | |||
tpm_crb_mmio_write(uint64_t addr, unsigned size, uint32_t val) "CRB write 0x" TARGET_FMT_plx " len:%u val: 0x%" PRIx32 | |||
# hw/tpm/tpm_passthrough.c | |||
# tpm_passthrough.c | |||
tpm_passthrough_handle_request(void *cmd) "processing command %p" | |||
tpm_passthrough_reset(void) "reset" | |||
# hw/tpm/tpm_util.c | |||
# tpm_util.c | |||
tpm_util_get_buffer_size_hdr_len(uint32_t len, size_t expected) "tpm_resp->hdr.len = %u, expected = %zu" | |||
tpm_util_get_buffer_size_len(uint32_t len, size_t expected) "tpm_resp->len = %u, expected = %zu" | |||
tpm_util_get_buffer_size_hdr_len2(uint32_t len, size_t expected) "tpm2_resp->hdr.len = %u, expected = %zu" | |||
tpm_util_get_buffer_size_len2(uint32_t len, size_t expected) "tpm2_resp->len = %u, expected = %zu" | |||
tpm_util_get_buffer_size(size_t len) "buffersize of device: %zu" | |||
# hw/tpm/tpm_emulator.c | |||
# tpm_emulator.c | |||
tpm_emulator_set_locality(uint8_t locty) "setting locality to %d" | |||
tpm_emulator_handle_request(void) "processing TPM command" | |||
tpm_emulator_probe_caps(uint64_t caps) "capabilities: 0x%"PRIx64 | |||
@@ -35,7 +35,7 @@ tpm_emulator_set_state_blobs_done(void) "Done setting state blobs" | |||
tpm_emulator_pre_save(void) "" | |||
tpm_emulator_inst_init(void) "" | |||
# hw/tpm/tpm_tis.c | |||
# tpm_tis.c | |||
tpm_tis_show_buffer(const char *direction, size_t len, const char *buf) "direction: %s len: %zu\nbuf: %s" | |||
tpm_tis_raise_irq(uint32_t irqmask) "Raising IRQ for flag 0x%08x" | |||
tpm_tis_new_active_locality(uint8_t locty) "Active locality is now %d" | |||
@@ -53,5 +53,5 @@ tpm_tis_mmio_write_lowering_irq(void) "Lowering IRQ" | |||
tpm_tis_mmio_write_data2send(uint32_t value, unsigned size) "Data to send to TPM: 0x%08x (size=%d)" | |||
tpm_tis_pre_save(uint8_t locty, uint32_t rw_offset) "locty: %d, rw_offset = %u" | |||
# hw/tpm/tpm_ppi.c | |||
# tpm_ppi.c | |||
tpm_ppi_memset(uint8_t *ptr, size_t size) "memset: %p %zu" |
@@ -1,16 +1,16 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/usb/core.c | |||
# core.c | |||
usb_packet_state_change(int bus, const char *port, int ep, void *p, const char *o, const char *n) "bus %d, port %s, ep %d, packet %p, state %s -> %s" | |||
usb_packet_state_fault(int bus, const char *port, int ep, void *p, const char *o, const char *n) "bus %d, port %s, ep %d, packet %p, state %s, expected %s" | |||
# hw/usb/bus.c | |||
# bus.c | |||
usb_port_claim(int bus, const char *port) "bus %d, port %s" | |||
usb_port_attach(int bus, const char *port, const char *devspeed, const char *portspeed) "bus %d, port %s, devspeed %s, portspeed %s" | |||
usb_port_detach(int bus, const char *port) "bus %d, port %s" | |||
usb_port_release(int bus, const char *port) "bus %d, port %s" | |||
# hw/usb/hcd-ohci.c | |||
# hcd-ohci.c | |||
usb_ohci_iso_td_read_failed(uint32_t addr) "ISO_TD read error at 0x%x" | |||
usb_ohci_iso_td_head(uint32_t head, uint32_t tail, uint32_t flags, uint32_t bp, uint32_t next, uint32_t be, uint32_t framenum, uint32_t startframe, uint32_t framecount, int rel_frame_num) "ISO_TD ED head 0x%.8x tailp 0x%.8x\n0x%.8x 0x%.8x 0x%.8x 0x%.8x\nframe_number 0x%.8x starting_frame 0x%.8x\nframe_count 0x%.8x relative %d" | |||
usb_ohci_iso_td_head_offset(uint32_t o0, uint32_t o1, uint32_t o2, uint32_t o3, uint32_t o4, uint32_t o5, uint32_t o6, uint32_t o7) "0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x" | |||
@@ -67,7 +67,7 @@ usb_ohci_init_time(int64_t frametime, int64_t bittime) "usb_bit_time=%" PRId64 " | |||
usb_ohci_die(void) "" | |||
usb_ohci_async_complete(void) "" | |||
# hw/usb/hcd-ehci.c | |||
# hcd-ehci.c | |||
usb_ehci_reset(void) "=== RESET ===" | |||
usb_ehci_unrealize(void) "=== UNREALIZE ===" | |||
usb_ehci_opreg_read(uint32_t addr, const char *str, uint32_t val) "rd mmio 0x%04x [%s] = 0x%x" | |||
@@ -100,7 +100,7 @@ usb_ehci_doorbell_ring(void) "" | |||
usb_ehci_doorbell_ack(void) "" | |||
usb_ehci_dma_error(void) "" | |||
# hw/usb/hcd-uhci.c | |||
# hcd-uhci.c | |||
usb_uhci_reset(void) "=== RESET ===" | |||
usb_uhci_exit(void) "=== EXIT ===" | |||
usb_uhci_schedule_start(void) "" | |||
@@ -130,7 +130,7 @@ usb_uhci_td_nextqh(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x" | |||
usb_uhci_td_async(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x" | |||
usb_uhci_td_complete(uint32_t qh, uint32_t td) "qh 0x%x, td 0x%x" | |||
# hw/usb/hcd-xhci.c | |||
# hcd-xhci.c | |||
usb_xhci_reset(void) "=== RESET ===" | |||
usb_xhci_exit(void) "=== EXIT ===" | |||
usb_xhci_run(void) "" | |||
@@ -176,7 +176,7 @@ usb_xhci_xfer_error(void *xfer, uint32_t ret) "%p: ret %d" | |||
usb_xhci_unimplemented(const char *item, int nr) "%s (0x%x)" | |||
usb_xhci_enforced_limit(const char *item) "%s" | |||
# hw/usb/desc.c | |||
# desc.c | |||
usb_desc_device(int addr, int len, int ret) "dev %d query device, len %d, ret %d" | |||
usb_desc_device_qualifier(int addr, int len, int ret) "dev %d query device qualifier, len %d, ret %d" | |||
usb_desc_config(int addr, int index, int len, int ret) "dev %d query config %d, len %d, ret %d" | |||
@@ -190,7 +190,7 @@ usb_set_interface(int addr, int iface, int alt, int ret) "dev %d, interface %d, | |||
usb_clear_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d" | |||
usb_set_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d" | |||
# hw/usb/dev-hub.c | |||
# dev-hub.c | |||
usb_hub_reset(int addr) "dev %d" | |||
usb_hub_control(int addr, int request, int value, int index, int length) "dev %d, req 0x%x, value %d, index %d, langth %d" | |||
usb_hub_get_port_status(int addr, int nr, int status, int changed) "dev %d, port %d, status 0x%x, changed 0x%x" | |||
@@ -200,7 +200,7 @@ usb_hub_attach(int addr, int nr) "dev %d, port %d" | |||
usb_hub_detach(int addr, int nr) "dev %d, port %d" | |||
usb_hub_status_report(int addr, int status) "dev %d, status 0x%x" | |||
# hw/usb/dev-uas.c | |||
# dev-uas.c | |||
usb_uas_reset(int addr) "dev %d" | |||
usb_uas_command(int addr, uint16_t tag, int lun, uint32_t lun64_1, uint32_t lun64_2) "dev %d, tag 0x%x, lun %d, lun64 0x%08x-0x%08x" | |||
usb_uas_response(int addr, uint16_t tag, uint8_t code) "dev %d, tag 0x%x, code 0x%x" | |||
@@ -214,7 +214,7 @@ usb_uas_tmf_abort_task(int addr, uint16_t tag, uint16_t task_tag) "dev %d, tag 0 | |||
usb_uas_tmf_logical_unit_reset(int addr, uint16_t tag, int lun) "dev %d, tag 0x%x, lun %d" | |||
usb_uas_tmf_unsupported(int addr, uint16_t tag, uint32_t function) "dev %d, tag 0x%x, function 0x%x" | |||
# hw/usb/dev-mtp.c | |||
# dev-mtp.c | |||
usb_mtp_reset(int addr) "dev %d" | |||
usb_mtp_command(int dev, uint16_t code, uint32_t trans, uint32_t arg0, uint32_t arg1, uint32_t arg2, uint32_t arg3, uint32_t arg4) "dev %d, code 0x%x, trans 0x%x, args 0x%x, 0x%x, 0x%x, 0x%x, 0x%x" | |||
usb_mtp_success(int dev, uint32_t trans, uint32_t arg0, uint32_t arg1) "dev %d, trans 0x%x, args 0x%x, 0x%x" | |||
@@ -239,7 +239,7 @@ usb_mtp_object_free(int dev, uint32_t handle, const char *path) "dev %d, handle | |||
usb_mtp_add_child(int dev, uint32_t handle, const char *path) "dev %d, handle 0x%x, path %s" | |||
usb_mtp_file_monitor_event(int dev, const char *path, const char *s) "dev %d, path %s event %s" | |||
# hw/usb/host-libusb.c | |||
# host-libusb.c | |||
usb_host_open_started(int bus, int addr) "dev %d:%d" | |||
usb_host_open_success(int bus, int addr) "dev %d:%d" | |||
usb_host_open_failure(int bus, int addr) "dev %d:%d" |
@@ -1,6 +1,6 @@ | |||
# See docs/devel/tracing.txt for syntax documentation. | |||
# hw/vfio/pci.c | |||
# pci.c | |||
vfio_intx_interrupt(const char *name, char line) " (%s) Pin %c" | |||
vfio_intx_eoi(const char *name) " (%s) EOI" | |||
vfio_intx_enable_kvm(const char *name) " (%s) KVM INTx accel enabled" | |||
@@ -49,7 +49,7 @@ vfio_pci_emulated_device_id(const char *name, uint16_t val) "%s 0x%04x" | |||
vfio_pci_emulated_sub_vendor_id(const char *name, uint16_t val) "%s 0x%04x" | |||
vfio_pci_emulated_sub_device_id(const char *name, uint16_t val) "%s 0x%04x" | |||