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dma-helpers.c 7.9KB

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  1. /*
  2. * DMA helper functions
  3. *
  4. * Copyright (c) 2009 Red Hat
  5. *
  6. * This work is licensed under the terms of the GNU General Public License
  7. * (GNU GPL), version 2 or later.
  8. */
  9. #include "qemu/osdep.h"
  10. #include "sysemu/block-backend.h"
  11. #include "sysemu/dma.h"
  12. #include "trace-root.h"
  13. #include "qemu/thread.h"
  14. #include "qemu/main-loop.h"
  15. /* #define DEBUG_IOMMU */
  16. int dma_memory_set(AddressSpace *as, dma_addr_t addr, uint8_t c, dma_addr_t len)
  17. {
  18. dma_barrier(as, DMA_DIRECTION_FROM_DEVICE);
  19. #define FILLBUF_SIZE 512
  20. uint8_t fillbuf[FILLBUF_SIZE];
  21. int l;
  22. bool error = false;
  23. memset(fillbuf, c, FILLBUF_SIZE);
  24. while (len > 0) {
  25. l = len < FILLBUF_SIZE ? len : FILLBUF_SIZE;
  26. error |= address_space_rw(as, addr, MEMTXATTRS_UNSPECIFIED,
  27. fillbuf, l, true);
  28. len -= l;
  29. addr += l;
  30. }
  31. return error;
  32. }
  33. void qemu_sglist_init(QEMUSGList *qsg, DeviceState *dev, int alloc_hint,
  34. AddressSpace *as)
  35. {
  36. qsg->sg = g_malloc(alloc_hint * sizeof(ScatterGatherEntry));
  37. qsg->nsg = 0;
  38. qsg->nalloc = alloc_hint;
  39. qsg->size = 0;
  40. qsg->as = as;
  41. qsg->dev = dev;
  42. object_ref(OBJECT(dev));
  43. }
  44. void qemu_sglist_add(QEMUSGList *qsg, dma_addr_t base, dma_addr_t len)
  45. {
  46. if (qsg->nsg == qsg->nalloc) {
  47. qsg->nalloc = 2 * qsg->nalloc + 1;
  48. qsg->sg = g_realloc(qsg->sg, qsg->nalloc * sizeof(ScatterGatherEntry));
  49. }
  50. qsg->sg[qsg->nsg].base = base;
  51. qsg->sg[qsg->nsg].len = len;
  52. qsg->size += len;
  53. ++qsg->nsg;
  54. }
  55. void qemu_sglist_destroy(QEMUSGList *qsg)
  56. {
  57. object_unref(OBJECT(qsg->dev));
  58. g_free(qsg->sg);
  59. memset(qsg, 0, sizeof(*qsg));
  60. }
  61. typedef struct {
  62. BlockAIOCB common;
  63. AioContext *ctx;
  64. BlockAIOCB *acb;
  65. QEMUSGList *sg;
  66. uint32_t align;
  67. uint64_t offset;
  68. DMADirection dir;
  69. int sg_cur_index;
  70. dma_addr_t sg_cur_byte;
  71. QEMUIOVector iov;
  72. QEMUBH *bh;
  73. DMAIOFunc *io_func;
  74. void *io_func_opaque;
  75. } DMAAIOCB;
  76. static void dma_blk_cb(void *opaque, int ret);
  77. static void reschedule_dma(void *opaque)
  78. {
  79. DMAAIOCB *dbs = (DMAAIOCB *)opaque;
  80. qemu_bh_delete(dbs->bh);
  81. dbs->bh = NULL;
  82. dma_blk_cb(dbs, 0);
  83. }
  84. static void dma_blk_unmap(DMAAIOCB *dbs)
  85. {
  86. int i;
  87. for (i = 0; i < dbs->iov.niov; ++i) {
  88. dma_memory_unmap(dbs->sg->as, dbs->iov.iov[i].iov_base,
  89. dbs->iov.iov[i].iov_len, dbs->dir,
  90. dbs->iov.iov[i].iov_len);
  91. }
  92. qemu_iovec_reset(&dbs->iov);
  93. }
  94. static void dma_complete(DMAAIOCB *dbs, int ret)
  95. {
  96. trace_dma_complete(dbs, ret, dbs->common.cb);
  97. dma_blk_unmap(dbs);
  98. if (dbs->common.cb) {
  99. dbs->common.cb(dbs->common.opaque, ret);
  100. }
  101. qemu_iovec_destroy(&dbs->iov);
  102. if (dbs->bh) {
  103. qemu_bh_delete(dbs->bh);
  104. dbs->bh = NULL;
  105. }
  106. qemu_aio_unref(dbs);
  107. }
  108. static void dma_blk_cb(void *opaque, int ret)
  109. {
  110. DMAAIOCB *dbs = (DMAAIOCB *)opaque;
  111. dma_addr_t cur_addr, cur_len;
  112. void *mem;
  113. trace_dma_blk_cb(dbs, ret);
  114. dbs->acb = NULL;
  115. dbs->offset += dbs->iov.size;
  116. if (dbs->sg_cur_index == dbs->sg->nsg || ret < 0) {
  117. dma_complete(dbs, ret);
  118. return;
  119. }
  120. dma_blk_unmap(dbs);
  121. while (dbs->sg_cur_index < dbs->sg->nsg) {
  122. cur_addr = dbs->sg->sg[dbs->sg_cur_index].base + dbs->sg_cur_byte;
  123. cur_len = dbs->sg->sg[dbs->sg_cur_index].len - dbs->sg_cur_byte;
  124. mem = dma_memory_map(dbs->sg->as, cur_addr, &cur_len, dbs->dir);
  125. if (!mem)
  126. break;
  127. qemu_iovec_add(&dbs->iov, mem, cur_len);
  128. dbs->sg_cur_byte += cur_len;
  129. if (dbs->sg_cur_byte == dbs->sg->sg[dbs->sg_cur_index].len) {
  130. dbs->sg_cur_byte = 0;
  131. ++dbs->sg_cur_index;
  132. }
  133. }
  134. if (dbs->iov.size == 0) {
  135. trace_dma_map_wait(dbs);
  136. dbs->bh = aio_bh_new(dbs->ctx, reschedule_dma, dbs);
  137. cpu_register_map_client(dbs->bh);
  138. return;
  139. }
  140. if (!QEMU_IS_ALIGNED(dbs->iov.size, dbs->align)) {
  141. qemu_iovec_discard_back(&dbs->iov,
  142. QEMU_ALIGN_DOWN(dbs->iov.size, dbs->align));
  143. }
  144. aio_context_acquire(dbs->ctx);
  145. dbs->acb = dbs->io_func(dbs->offset, &dbs->iov,
  146. dma_blk_cb, dbs, dbs->io_func_opaque);
  147. aio_context_release(dbs->ctx);
  148. assert(dbs->acb);
  149. }
  150. static void dma_aio_cancel(BlockAIOCB *acb)
  151. {
  152. DMAAIOCB *dbs = container_of(acb, DMAAIOCB, common);
  153. trace_dma_aio_cancel(dbs);
  154. if (dbs->acb) {
  155. blk_aio_cancel_async(dbs->acb);
  156. }
  157. if (dbs->bh) {
  158. cpu_unregister_map_client(dbs->bh);
  159. qemu_bh_delete(dbs->bh);
  160. dbs->bh = NULL;
  161. }
  162. }
  163. static AioContext *dma_get_aio_context(BlockAIOCB *acb)
  164. {
  165. DMAAIOCB *dbs = container_of(acb, DMAAIOCB, common);
  166. return dbs->ctx;
  167. }
  168. static const AIOCBInfo dma_aiocb_info = {
  169. .aiocb_size = sizeof(DMAAIOCB),
  170. .cancel_async = dma_aio_cancel,
  171. .get_aio_context = dma_get_aio_context,
  172. };
  173. BlockAIOCB *dma_blk_io(AioContext *ctx,
  174. QEMUSGList *sg, uint64_t offset, uint32_t align,
  175. DMAIOFunc *io_func, void *io_func_opaque,
  176. BlockCompletionFunc *cb,
  177. void *opaque, DMADirection dir)
  178. {
  179. DMAAIOCB *dbs = qemu_aio_get(&dma_aiocb_info, NULL, cb, opaque);
  180. trace_dma_blk_io(dbs, io_func_opaque, offset, (dir == DMA_DIRECTION_TO_DEVICE));
  181. dbs->acb = NULL;
  182. dbs->sg = sg;
  183. dbs->ctx = ctx;
  184. dbs->offset = offset;
  185. dbs->align = align;
  186. dbs->sg_cur_index = 0;
  187. dbs->sg_cur_byte = 0;
  188. dbs->dir = dir;
  189. dbs->io_func = io_func;
  190. dbs->io_func_opaque = io_func_opaque;
  191. dbs->bh = NULL;
  192. qemu_iovec_init(&dbs->iov, sg->nsg);
  193. dma_blk_cb(dbs, 0);
  194. return &dbs->common;
  195. }
  196. static
  197. BlockAIOCB *dma_blk_read_io_func(int64_t offset, QEMUIOVector *iov,
  198. BlockCompletionFunc *cb, void *cb_opaque,
  199. void *opaque)
  200. {
  201. BlockBackend *blk = opaque;
  202. return blk_aio_preadv(blk, offset, iov, 0, cb, cb_opaque);
  203. }
  204. BlockAIOCB *dma_blk_read(BlockBackend *blk,
  205. QEMUSGList *sg, uint64_t offset, uint32_t align,
  206. void (*cb)(void *opaque, int ret), void *opaque)
  207. {
  208. return dma_blk_io(blk_get_aio_context(blk), sg, offset, align,
  209. dma_blk_read_io_func, blk, cb, opaque,
  210. DMA_DIRECTION_FROM_DEVICE);
  211. }
  212. static
  213. BlockAIOCB *dma_blk_write_io_func(int64_t offset, QEMUIOVector *iov,
  214. BlockCompletionFunc *cb, void *cb_opaque,
  215. void *opaque)
  216. {
  217. BlockBackend *blk = opaque;
  218. return blk_aio_pwritev(blk, offset, iov, 0, cb, cb_opaque);
  219. }
  220. BlockAIOCB *dma_blk_write(BlockBackend *blk,
  221. QEMUSGList *sg, uint64_t offset, uint32_t align,
  222. void (*cb)(void *opaque, int ret), void *opaque)
  223. {
  224. return dma_blk_io(blk_get_aio_context(blk), sg, offset, align,
  225. dma_blk_write_io_func, blk, cb, opaque,
  226. DMA_DIRECTION_TO_DEVICE);
  227. }
  228. static uint64_t dma_buf_rw(uint8_t *ptr, int32_t len, QEMUSGList *sg,
  229. DMADirection dir)
  230. {
  231. uint64_t resid;
  232. int sg_cur_index;
  233. resid = sg->size;
  234. sg_cur_index = 0;
  235. len = MIN(len, resid);
  236. while (len > 0) {
  237. ScatterGatherEntry entry = sg->sg[sg_cur_index++];
  238. int32_t xfer = MIN(len, entry.len);
  239. dma_memory_rw(sg->as, entry.base, ptr, xfer, dir);
  240. ptr += xfer;
  241. len -= xfer;
  242. resid -= xfer;
  243. }
  244. return resid;
  245. }
  246. uint64_t dma_buf_read(uint8_t *ptr, int32_t len, QEMUSGList *sg)
  247. {
  248. return dma_buf_rw(ptr, len, sg, DMA_DIRECTION_FROM_DEVICE);
  249. }
  250. uint64_t dma_buf_write(uint8_t *ptr, int32_t len, QEMUSGList *sg)
  251. {
  252. return dma_buf_rw(ptr, len, sg, DMA_DIRECTION_TO_DEVICE);
  253. }
  254. void dma_acct_start(BlockBackend *blk, BlockAcctCookie *cookie,
  255. QEMUSGList *sg, enum BlockAcctType type)
  256. {
  257. block_acct_start(blk_get_stats(blk), cookie, sg->size, type);
  258. }