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memory.c 101KB

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  1. /*
  2. * Physical memory management
  3. *
  4. * Copyright 2011 Red Hat, Inc. and/or its affiliates
  5. *
  6. * Authors:
  7. * Avi Kivity <avi@redhat.com>
  8. *
  9. * This work is licensed under the terms of the GNU GPL, version 2. See
  10. * the COPYING file in the top-level directory.
  11. *
  12. * Contributions after 2012-01-13 are licensed under the terms of the
  13. * GNU GPL, version 2 or (at your option) any later version.
  14. */
  15. #include "qemu/osdep.h"
  16. #include "qapi/error.h"
  17. #include "cpu.h"
  18. #include "exec/memory.h"
  19. #include "exec/address-spaces.h"
  20. #include "qapi/visitor.h"
  21. #include "qemu/bitops.h"
  22. #include "qemu/error-report.h"
  23. #include "qemu/main-loop.h"
  24. #include "qemu/qemu-print.h"
  25. #include "qom/object.h"
  26. #include "trace-root.h"
  27. #include "exec/memory-internal.h"
  28. #include "exec/ram_addr.h"
  29. #include "sysemu/kvm.h"
  30. #include "sysemu/runstate.h"
  31. #include "sysemu/tcg.h"
  32. #include "sysemu/accel.h"
  33. #include "hw/boards.h"
  34. #include "migration/vmstate.h"
  35. //#define DEBUG_UNASSIGNED
  36. static unsigned memory_region_transaction_depth;
  37. static bool memory_region_update_pending;
  38. static bool ioeventfd_update_pending;
  39. bool global_dirty_log;
  40. static QTAILQ_HEAD(, MemoryListener) memory_listeners
  41. = QTAILQ_HEAD_INITIALIZER(memory_listeners);
  42. static QTAILQ_HEAD(, AddressSpace) address_spaces
  43. = QTAILQ_HEAD_INITIALIZER(address_spaces);
  44. static GHashTable *flat_views;
  45. typedef struct AddrRange AddrRange;
  46. /*
  47. * Note that signed integers are needed for negative offsetting in aliases
  48. * (large MemoryRegion::alias_offset).
  49. */
  50. struct AddrRange {
  51. Int128 start;
  52. Int128 size;
  53. };
  54. static AddrRange addrrange_make(Int128 start, Int128 size)
  55. {
  56. return (AddrRange) { start, size };
  57. }
  58. static bool addrrange_equal(AddrRange r1, AddrRange r2)
  59. {
  60. return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
  61. }
  62. static Int128 addrrange_end(AddrRange r)
  63. {
  64. return int128_add(r.start, r.size);
  65. }
  66. static AddrRange addrrange_shift(AddrRange range, Int128 delta)
  67. {
  68. int128_addto(&range.start, delta);
  69. return range;
  70. }
  71. static bool addrrange_contains(AddrRange range, Int128 addr)
  72. {
  73. return int128_ge(addr, range.start)
  74. && int128_lt(addr, addrrange_end(range));
  75. }
  76. static bool addrrange_intersects(AddrRange r1, AddrRange r2)
  77. {
  78. return addrrange_contains(r1, r2.start)
  79. || addrrange_contains(r2, r1.start);
  80. }
  81. static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
  82. {
  83. Int128 start = int128_max(r1.start, r2.start);
  84. Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
  85. return addrrange_make(start, int128_sub(end, start));
  86. }
  87. enum ListenerDirection { Forward, Reverse };
  88. #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
  89. do { \
  90. MemoryListener *_listener; \
  91. \
  92. switch (_direction) { \
  93. case Forward: \
  94. QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
  95. if (_listener->_callback) { \
  96. _listener->_callback(_listener, ##_args); \
  97. } \
  98. } \
  99. break; \
  100. case Reverse: \
  101. QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, link) { \
  102. if (_listener->_callback) { \
  103. _listener->_callback(_listener, ##_args); \
  104. } \
  105. } \
  106. break; \
  107. default: \
  108. abort(); \
  109. } \
  110. } while (0)
  111. #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
  112. do { \
  113. MemoryListener *_listener; \
  114. \
  115. switch (_direction) { \
  116. case Forward: \
  117. QTAILQ_FOREACH(_listener, &(_as)->listeners, link_as) { \
  118. if (_listener->_callback) { \
  119. _listener->_callback(_listener, _section, ##_args); \
  120. } \
  121. } \
  122. break; \
  123. case Reverse: \
  124. QTAILQ_FOREACH_REVERSE(_listener, &(_as)->listeners, link_as) { \
  125. if (_listener->_callback) { \
  126. _listener->_callback(_listener, _section, ##_args); \
  127. } \
  128. } \
  129. break; \
  130. default: \
  131. abort(); \
  132. } \
  133. } while (0)
  134. /* No need to ref/unref .mr, the FlatRange keeps it alive. */
  135. #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
  136. do { \
  137. MemoryRegionSection mrs = section_from_flat_range(fr, \
  138. address_space_to_flatview(as)); \
  139. MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
  140. } while(0)
  141. struct CoalescedMemoryRange {
  142. AddrRange addr;
  143. QTAILQ_ENTRY(CoalescedMemoryRange) link;
  144. };
  145. struct MemoryRegionIoeventfd {
  146. AddrRange addr;
  147. bool match_data;
  148. uint64_t data;
  149. EventNotifier *e;
  150. };
  151. static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd *a,
  152. MemoryRegionIoeventfd *b)
  153. {
  154. if (int128_lt(a->addr.start, b->addr.start)) {
  155. return true;
  156. } else if (int128_gt(a->addr.start, b->addr.start)) {
  157. return false;
  158. } else if (int128_lt(a->addr.size, b->addr.size)) {
  159. return true;
  160. } else if (int128_gt(a->addr.size, b->addr.size)) {
  161. return false;
  162. } else if (a->match_data < b->match_data) {
  163. return true;
  164. } else if (a->match_data > b->match_data) {
  165. return false;
  166. } else if (a->match_data) {
  167. if (a->data < b->data) {
  168. return true;
  169. } else if (a->data > b->data) {
  170. return false;
  171. }
  172. }
  173. if (a->e < b->e) {
  174. return true;
  175. } else if (a->e > b->e) {
  176. return false;
  177. }
  178. return false;
  179. }
  180. static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd *a,
  181. MemoryRegionIoeventfd *b)
  182. {
  183. return !memory_region_ioeventfd_before(a, b)
  184. && !memory_region_ioeventfd_before(b, a);
  185. }
  186. /* Range of memory in the global map. Addresses are absolute. */
  187. struct FlatRange {
  188. MemoryRegion *mr;
  189. hwaddr offset_in_region;
  190. AddrRange addr;
  191. uint8_t dirty_log_mask;
  192. bool romd_mode;
  193. bool readonly;
  194. bool nonvolatile;
  195. };
  196. #define FOR_EACH_FLAT_RANGE(var, view) \
  197. for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
  198. static inline MemoryRegionSection
  199. section_from_flat_range(FlatRange *fr, FlatView *fv)
  200. {
  201. return (MemoryRegionSection) {
  202. .mr = fr->mr,
  203. .fv = fv,
  204. .offset_within_region = fr->offset_in_region,
  205. .size = fr->addr.size,
  206. .offset_within_address_space = int128_get64(fr->addr.start),
  207. .readonly = fr->readonly,
  208. .nonvolatile = fr->nonvolatile,
  209. };
  210. }
  211. static bool flatrange_equal(FlatRange *a, FlatRange *b)
  212. {
  213. return a->mr == b->mr
  214. && addrrange_equal(a->addr, b->addr)
  215. && a->offset_in_region == b->offset_in_region
  216. && a->romd_mode == b->romd_mode
  217. && a->readonly == b->readonly
  218. && a->nonvolatile == b->nonvolatile;
  219. }
  220. static FlatView *flatview_new(MemoryRegion *mr_root)
  221. {
  222. FlatView *view;
  223. view = g_new0(FlatView, 1);
  224. view->ref = 1;
  225. view->root = mr_root;
  226. memory_region_ref(mr_root);
  227. trace_flatview_new(view, mr_root);
  228. return view;
  229. }
  230. /* Insert a range into a given position. Caller is responsible for maintaining
  231. * sorting order.
  232. */
  233. static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
  234. {
  235. if (view->nr == view->nr_allocated) {
  236. view->nr_allocated = MAX(2 * view->nr, 10);
  237. view->ranges = g_realloc(view->ranges,
  238. view->nr_allocated * sizeof(*view->ranges));
  239. }
  240. memmove(view->ranges + pos + 1, view->ranges + pos,
  241. (view->nr - pos) * sizeof(FlatRange));
  242. view->ranges[pos] = *range;
  243. memory_region_ref(range->mr);
  244. ++view->nr;
  245. }
  246. static void flatview_destroy(FlatView *view)
  247. {
  248. int i;
  249. trace_flatview_destroy(view, view->root);
  250. if (view->dispatch) {
  251. address_space_dispatch_free(view->dispatch);
  252. }
  253. for (i = 0; i < view->nr; i++) {
  254. memory_region_unref(view->ranges[i].mr);
  255. }
  256. g_free(view->ranges);
  257. memory_region_unref(view->root);
  258. g_free(view);
  259. }
  260. static bool flatview_ref(FlatView *view)
  261. {
  262. return atomic_fetch_inc_nonzero(&view->ref) > 0;
  263. }
  264. void flatview_unref(FlatView *view)
  265. {
  266. if (atomic_fetch_dec(&view->ref) == 1) {
  267. trace_flatview_destroy_rcu(view, view->root);
  268. assert(view->root);
  269. call_rcu(view, flatview_destroy, rcu);
  270. }
  271. }
  272. static bool can_merge(FlatRange *r1, FlatRange *r2)
  273. {
  274. return int128_eq(addrrange_end(r1->addr), r2->addr.start)
  275. && r1->mr == r2->mr
  276. && int128_eq(int128_add(int128_make64(r1->offset_in_region),
  277. r1->addr.size),
  278. int128_make64(r2->offset_in_region))
  279. && r1->dirty_log_mask == r2->dirty_log_mask
  280. && r1->romd_mode == r2->romd_mode
  281. && r1->readonly == r2->readonly
  282. && r1->nonvolatile == r2->nonvolatile;
  283. }
  284. /* Attempt to simplify a view by merging adjacent ranges */
  285. static void flatview_simplify(FlatView *view)
  286. {
  287. unsigned i, j, k;
  288. i = 0;
  289. while (i < view->nr) {
  290. j = i + 1;
  291. while (j < view->nr
  292. && can_merge(&view->ranges[j-1], &view->ranges[j])) {
  293. int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
  294. ++j;
  295. }
  296. ++i;
  297. for (k = i; k < j; k++) {
  298. memory_region_unref(view->ranges[k].mr);
  299. }
  300. memmove(&view->ranges[i], &view->ranges[j],
  301. (view->nr - j) * sizeof(view->ranges[j]));
  302. view->nr -= j - i;
  303. }
  304. }
  305. static bool memory_region_big_endian(MemoryRegion *mr)
  306. {
  307. #ifdef TARGET_WORDS_BIGENDIAN
  308. return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
  309. #else
  310. return mr->ops->endianness == DEVICE_BIG_ENDIAN;
  311. #endif
  312. }
  313. static void adjust_endianness(MemoryRegion *mr, uint64_t *data, MemOp op)
  314. {
  315. if ((op & MO_BSWAP) != devend_memop(mr->ops->endianness)) {
  316. switch (op & MO_SIZE) {
  317. case MO_8:
  318. break;
  319. case MO_16:
  320. *data = bswap16(*data);
  321. break;
  322. case MO_32:
  323. *data = bswap32(*data);
  324. break;
  325. case MO_64:
  326. *data = bswap64(*data);
  327. break;
  328. default:
  329. g_assert_not_reached();
  330. }
  331. }
  332. }
  333. static inline void memory_region_shift_read_access(uint64_t *value,
  334. signed shift,
  335. uint64_t mask,
  336. uint64_t tmp)
  337. {
  338. if (shift >= 0) {
  339. *value |= (tmp & mask) << shift;
  340. } else {
  341. *value |= (tmp & mask) >> -shift;
  342. }
  343. }
  344. static inline uint64_t memory_region_shift_write_access(uint64_t *value,
  345. signed shift,
  346. uint64_t mask)
  347. {
  348. uint64_t tmp;
  349. if (shift >= 0) {
  350. tmp = (*value >> shift) & mask;
  351. } else {
  352. tmp = (*value << -shift) & mask;
  353. }
  354. return tmp;
  355. }
  356. static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
  357. {
  358. MemoryRegion *root;
  359. hwaddr abs_addr = offset;
  360. abs_addr += mr->addr;
  361. for (root = mr; root->container; ) {
  362. root = root->container;
  363. abs_addr += root->addr;
  364. }
  365. return abs_addr;
  366. }
  367. static int get_cpu_index(void)
  368. {
  369. if (current_cpu) {
  370. return current_cpu->cpu_index;
  371. }
  372. return -1;
  373. }
  374. static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
  375. hwaddr addr,
  376. uint64_t *value,
  377. unsigned size,
  378. signed shift,
  379. uint64_t mask,
  380. MemTxAttrs attrs)
  381. {
  382. uint64_t tmp;
  383. tmp = mr->ops->read(mr->opaque, addr, size);
  384. if (mr->subpage) {
  385. trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
  386. } else if (mr == &io_mem_notdirty) {
  387. /* Accesses to code which has previously been translated into a TB show
  388. * up in the MMIO path, as accesses to the io_mem_notdirty
  389. * MemoryRegion. */
  390. trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
  391. } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
  392. hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
  393. trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
  394. }
  395. memory_region_shift_read_access(value, shift, mask, tmp);
  396. return MEMTX_OK;
  397. }
  398. static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
  399. hwaddr addr,
  400. uint64_t *value,
  401. unsigned size,
  402. signed shift,
  403. uint64_t mask,
  404. MemTxAttrs attrs)
  405. {
  406. uint64_t tmp = 0;
  407. MemTxResult r;
  408. r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
  409. if (mr->subpage) {
  410. trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
  411. } else if (mr == &io_mem_notdirty) {
  412. /* Accesses to code which has previously been translated into a TB show
  413. * up in the MMIO path, as accesses to the io_mem_notdirty
  414. * MemoryRegion. */
  415. trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
  416. } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
  417. hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
  418. trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
  419. }
  420. memory_region_shift_read_access(value, shift, mask, tmp);
  421. return r;
  422. }
  423. static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
  424. hwaddr addr,
  425. uint64_t *value,
  426. unsigned size,
  427. signed shift,
  428. uint64_t mask,
  429. MemTxAttrs attrs)
  430. {
  431. uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
  432. if (mr->subpage) {
  433. trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
  434. } else if (mr == &io_mem_notdirty) {
  435. /* Accesses to code which has previously been translated into a TB show
  436. * up in the MMIO path, as accesses to the io_mem_notdirty
  437. * MemoryRegion. */
  438. trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
  439. } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
  440. hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
  441. trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
  442. }
  443. mr->ops->write(mr->opaque, addr, tmp, size);
  444. return MEMTX_OK;
  445. }
  446. static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
  447. hwaddr addr,
  448. uint64_t *value,
  449. unsigned size,
  450. signed shift,
  451. uint64_t mask,
  452. MemTxAttrs attrs)
  453. {
  454. uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
  455. if (mr->subpage) {
  456. trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
  457. } else if (mr == &io_mem_notdirty) {
  458. /* Accesses to code which has previously been translated into a TB show
  459. * up in the MMIO path, as accesses to the io_mem_notdirty
  460. * MemoryRegion. */
  461. trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
  462. } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
  463. hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
  464. trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
  465. }
  466. return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
  467. }
  468. static MemTxResult access_with_adjusted_size(hwaddr addr,
  469. uint64_t *value,
  470. unsigned size,
  471. unsigned access_size_min,
  472. unsigned access_size_max,
  473. MemTxResult (*access_fn)
  474. (MemoryRegion *mr,
  475. hwaddr addr,
  476. uint64_t *value,
  477. unsigned size,
  478. signed shift,
  479. uint64_t mask,
  480. MemTxAttrs attrs),
  481. MemoryRegion *mr,
  482. MemTxAttrs attrs)
  483. {
  484. uint64_t access_mask;
  485. unsigned access_size;
  486. unsigned i;
  487. MemTxResult r = MEMTX_OK;
  488. if (!access_size_min) {
  489. access_size_min = 1;
  490. }
  491. if (!access_size_max) {
  492. access_size_max = 4;
  493. }
  494. /* FIXME: support unaligned access? */
  495. access_size = MAX(MIN(size, access_size_max), access_size_min);
  496. access_mask = MAKE_64BIT_MASK(0, access_size * 8);
  497. if (memory_region_big_endian(mr)) {
  498. for (i = 0; i < size; i += access_size) {
  499. r |= access_fn(mr, addr + i, value, access_size,
  500. (size - access_size - i) * 8, access_mask, attrs);
  501. }
  502. } else {
  503. for (i = 0; i < size; i += access_size) {
  504. r |= access_fn(mr, addr + i, value, access_size, i * 8,
  505. access_mask, attrs);
  506. }
  507. }
  508. return r;
  509. }
  510. static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
  511. {
  512. AddressSpace *as;
  513. while (mr->container) {
  514. mr = mr->container;
  515. }
  516. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  517. if (mr == as->root) {
  518. return as;
  519. }
  520. }
  521. return NULL;
  522. }
  523. /* Render a memory region into the global view. Ranges in @view obscure
  524. * ranges in @mr.
  525. */
  526. static void render_memory_region(FlatView *view,
  527. MemoryRegion *mr,
  528. Int128 base,
  529. AddrRange clip,
  530. bool readonly,
  531. bool nonvolatile)
  532. {
  533. MemoryRegion *subregion;
  534. unsigned i;
  535. hwaddr offset_in_region;
  536. Int128 remain;
  537. Int128 now;
  538. FlatRange fr;
  539. AddrRange tmp;
  540. if (!mr->enabled) {
  541. return;
  542. }
  543. int128_addto(&base, int128_make64(mr->addr));
  544. readonly |= mr->readonly;
  545. nonvolatile |= mr->nonvolatile;
  546. tmp = addrrange_make(base, mr->size);
  547. if (!addrrange_intersects(tmp, clip)) {
  548. return;
  549. }
  550. clip = addrrange_intersection(tmp, clip);
  551. if (mr->alias) {
  552. int128_subfrom(&base, int128_make64(mr->alias->addr));
  553. int128_subfrom(&base, int128_make64(mr->alias_offset));
  554. render_memory_region(view, mr->alias, base, clip,
  555. readonly, nonvolatile);
  556. return;
  557. }
  558. /* Render subregions in priority order. */
  559. QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
  560. render_memory_region(view, subregion, base, clip,
  561. readonly, nonvolatile);
  562. }
  563. if (!mr->terminates) {
  564. return;
  565. }
  566. offset_in_region = int128_get64(int128_sub(clip.start, base));
  567. base = clip.start;
  568. remain = clip.size;
  569. fr.mr = mr;
  570. fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
  571. fr.romd_mode = mr->romd_mode;
  572. fr.readonly = readonly;
  573. fr.nonvolatile = nonvolatile;
  574. /* Render the region itself into any gaps left by the current view. */
  575. for (i = 0; i < view->nr && int128_nz(remain); ++i) {
  576. if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
  577. continue;
  578. }
  579. if (int128_lt(base, view->ranges[i].addr.start)) {
  580. now = int128_min(remain,
  581. int128_sub(view->ranges[i].addr.start, base));
  582. fr.offset_in_region = offset_in_region;
  583. fr.addr = addrrange_make(base, now);
  584. flatview_insert(view, i, &fr);
  585. ++i;
  586. int128_addto(&base, now);
  587. offset_in_region += int128_get64(now);
  588. int128_subfrom(&remain, now);
  589. }
  590. now = int128_sub(int128_min(int128_add(base, remain),
  591. addrrange_end(view->ranges[i].addr)),
  592. base);
  593. int128_addto(&base, now);
  594. offset_in_region += int128_get64(now);
  595. int128_subfrom(&remain, now);
  596. }
  597. if (int128_nz(remain)) {
  598. fr.offset_in_region = offset_in_region;
  599. fr.addr = addrrange_make(base, remain);
  600. flatview_insert(view, i, &fr);
  601. }
  602. }
  603. static MemoryRegion *memory_region_get_flatview_root(MemoryRegion *mr)
  604. {
  605. while (mr->enabled) {
  606. if (mr->alias) {
  607. if (!mr->alias_offset && int128_ge(mr->size, mr->alias->size)) {
  608. /* The alias is included in its entirety. Use it as
  609. * the "real" root, so that we can share more FlatViews.
  610. */
  611. mr = mr->alias;
  612. continue;
  613. }
  614. } else if (!mr->terminates) {
  615. unsigned int found = 0;
  616. MemoryRegion *child, *next = NULL;
  617. QTAILQ_FOREACH(child, &mr->subregions, subregions_link) {
  618. if (child->enabled) {
  619. if (++found > 1) {
  620. next = NULL;
  621. break;
  622. }
  623. if (!child->addr && int128_ge(mr->size, child->size)) {
  624. /* A child is included in its entirety. If it's the only
  625. * enabled one, use it in the hope of finding an alias down the
  626. * way. This will also let us share FlatViews.
  627. */
  628. next = child;
  629. }
  630. }
  631. }
  632. if (found == 0) {
  633. return NULL;
  634. }
  635. if (next) {
  636. mr = next;
  637. continue;
  638. }
  639. }
  640. return mr;
  641. }
  642. return NULL;
  643. }
  644. /* Render a memory topology into a list of disjoint absolute ranges. */
  645. static FlatView *generate_memory_topology(MemoryRegion *mr)
  646. {
  647. int i;
  648. FlatView *view;
  649. view = flatview_new(mr);
  650. if (mr) {
  651. render_memory_region(view, mr, int128_zero(),
  652. addrrange_make(int128_zero(), int128_2_64()),
  653. false, false);
  654. }
  655. flatview_simplify(view);
  656. view->dispatch = address_space_dispatch_new(view);
  657. for (i = 0; i < view->nr; i++) {
  658. MemoryRegionSection mrs =
  659. section_from_flat_range(&view->ranges[i], view);
  660. flatview_add_to_dispatch(view, &mrs);
  661. }
  662. address_space_dispatch_compact(view->dispatch);
  663. g_hash_table_replace(flat_views, mr, view);
  664. return view;
  665. }
  666. static void address_space_add_del_ioeventfds(AddressSpace *as,
  667. MemoryRegionIoeventfd *fds_new,
  668. unsigned fds_new_nb,
  669. MemoryRegionIoeventfd *fds_old,
  670. unsigned fds_old_nb)
  671. {
  672. unsigned iold, inew;
  673. MemoryRegionIoeventfd *fd;
  674. MemoryRegionSection section;
  675. /* Generate a symmetric difference of the old and new fd sets, adding
  676. * and deleting as necessary.
  677. */
  678. iold = inew = 0;
  679. while (iold < fds_old_nb || inew < fds_new_nb) {
  680. if (iold < fds_old_nb
  681. && (inew == fds_new_nb
  682. || memory_region_ioeventfd_before(&fds_old[iold],
  683. &fds_new[inew]))) {
  684. fd = &fds_old[iold];
  685. section = (MemoryRegionSection) {
  686. .fv = address_space_to_flatview(as),
  687. .offset_within_address_space = int128_get64(fd->addr.start),
  688. .size = fd->addr.size,
  689. };
  690. MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
  691. fd->match_data, fd->data, fd->e);
  692. ++iold;
  693. } else if (inew < fds_new_nb
  694. && (iold == fds_old_nb
  695. || memory_region_ioeventfd_before(&fds_new[inew],
  696. &fds_old[iold]))) {
  697. fd = &fds_new[inew];
  698. section = (MemoryRegionSection) {
  699. .fv = address_space_to_flatview(as),
  700. .offset_within_address_space = int128_get64(fd->addr.start),
  701. .size = fd->addr.size,
  702. };
  703. MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
  704. fd->match_data, fd->data, fd->e);
  705. ++inew;
  706. } else {
  707. ++iold;
  708. ++inew;
  709. }
  710. }
  711. }
  712. FlatView *address_space_get_flatview(AddressSpace *as)
  713. {
  714. FlatView *view;
  715. rcu_read_lock();
  716. do {
  717. view = address_space_to_flatview(as);
  718. /* If somebody has replaced as->current_map concurrently,
  719. * flatview_ref returns false.
  720. */
  721. } while (!flatview_ref(view));
  722. rcu_read_unlock();
  723. return view;
  724. }
  725. static void address_space_update_ioeventfds(AddressSpace *as)
  726. {
  727. FlatView *view;
  728. FlatRange *fr;
  729. unsigned ioeventfd_nb = 0;
  730. MemoryRegionIoeventfd *ioeventfds = NULL;
  731. AddrRange tmp;
  732. unsigned i;
  733. view = address_space_get_flatview(as);
  734. FOR_EACH_FLAT_RANGE(fr, view) {
  735. for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
  736. tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
  737. int128_sub(fr->addr.start,
  738. int128_make64(fr->offset_in_region)));
  739. if (addrrange_intersects(fr->addr, tmp)) {
  740. ++ioeventfd_nb;
  741. ioeventfds = g_realloc(ioeventfds,
  742. ioeventfd_nb * sizeof(*ioeventfds));
  743. ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
  744. ioeventfds[ioeventfd_nb-1].addr = tmp;
  745. }
  746. }
  747. }
  748. address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
  749. as->ioeventfds, as->ioeventfd_nb);
  750. g_free(as->ioeventfds);
  751. as->ioeventfds = ioeventfds;
  752. as->ioeventfd_nb = ioeventfd_nb;
  753. flatview_unref(view);
  754. }
  755. /*
  756. * Notify the memory listeners about the coalesced IO change events of
  757. * range `cmr'. Only the part that has intersection of the specified
  758. * FlatRange will be sent.
  759. */
  760. static void flat_range_coalesced_io_notify(FlatRange *fr, AddressSpace *as,
  761. CoalescedMemoryRange *cmr, bool add)
  762. {
  763. AddrRange tmp;
  764. tmp = addrrange_shift(cmr->addr,
  765. int128_sub(fr->addr.start,
  766. int128_make64(fr->offset_in_region)));
  767. if (!addrrange_intersects(tmp, fr->addr)) {
  768. return;
  769. }
  770. tmp = addrrange_intersection(tmp, fr->addr);
  771. if (add) {
  772. MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, coalesced_io_add,
  773. int128_get64(tmp.start),
  774. int128_get64(tmp.size));
  775. } else {
  776. MEMORY_LISTENER_UPDATE_REGION(fr, as, Reverse, coalesced_io_del,
  777. int128_get64(tmp.start),
  778. int128_get64(tmp.size));
  779. }
  780. }
  781. static void flat_range_coalesced_io_del(FlatRange *fr, AddressSpace *as)
  782. {
  783. CoalescedMemoryRange *cmr;
  784. QTAILQ_FOREACH(cmr, &fr->mr->coalesced, link) {
  785. flat_range_coalesced_io_notify(fr, as, cmr, false);
  786. }
  787. }
  788. static void flat_range_coalesced_io_add(FlatRange *fr, AddressSpace *as)
  789. {
  790. MemoryRegion *mr = fr->mr;
  791. CoalescedMemoryRange *cmr;
  792. if (QTAILQ_EMPTY(&mr->coalesced)) {
  793. return;
  794. }
  795. QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
  796. flat_range_coalesced_io_notify(fr, as, cmr, true);
  797. }
  798. }
  799. static void address_space_update_topology_pass(AddressSpace *as,
  800. const FlatView *old_view,
  801. const FlatView *new_view,
  802. bool adding)
  803. {
  804. unsigned iold, inew;
  805. FlatRange *frold, *frnew;
  806. /* Generate a symmetric difference of the old and new memory maps.
  807. * Kill ranges in the old map, and instantiate ranges in the new map.
  808. */
  809. iold = inew = 0;
  810. while (iold < old_view->nr || inew < new_view->nr) {
  811. if (iold < old_view->nr) {
  812. frold = &old_view->ranges[iold];
  813. } else {
  814. frold = NULL;
  815. }
  816. if (inew < new_view->nr) {
  817. frnew = &new_view->ranges[inew];
  818. } else {
  819. frnew = NULL;
  820. }
  821. if (frold
  822. && (!frnew
  823. || int128_lt(frold->addr.start, frnew->addr.start)
  824. || (int128_eq(frold->addr.start, frnew->addr.start)
  825. && !flatrange_equal(frold, frnew)))) {
  826. /* In old but not in new, or in both but attributes changed. */
  827. if (!adding) {
  828. flat_range_coalesced_io_del(frold, as);
  829. MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
  830. }
  831. ++iold;
  832. } else if (frold && frnew && flatrange_equal(frold, frnew)) {
  833. /* In both and unchanged (except logging may have changed) */
  834. if (adding) {
  835. MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
  836. if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
  837. MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
  838. frold->dirty_log_mask,
  839. frnew->dirty_log_mask);
  840. }
  841. if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
  842. MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
  843. frold->dirty_log_mask,
  844. frnew->dirty_log_mask);
  845. }
  846. }
  847. ++iold;
  848. ++inew;
  849. } else {
  850. /* In new */
  851. if (adding) {
  852. MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
  853. flat_range_coalesced_io_add(frnew, as);
  854. }
  855. ++inew;
  856. }
  857. }
  858. }
  859. static void flatviews_init(void)
  860. {
  861. static FlatView *empty_view;
  862. if (flat_views) {
  863. return;
  864. }
  865. flat_views = g_hash_table_new_full(g_direct_hash, g_direct_equal, NULL,
  866. (GDestroyNotify) flatview_unref);
  867. if (!empty_view) {
  868. empty_view = generate_memory_topology(NULL);
  869. /* We keep it alive forever in the global variable. */
  870. flatview_ref(empty_view);
  871. } else {
  872. g_hash_table_replace(flat_views, NULL, empty_view);
  873. flatview_ref(empty_view);
  874. }
  875. }
  876. static void flatviews_reset(void)
  877. {
  878. AddressSpace *as;
  879. if (flat_views) {
  880. g_hash_table_unref(flat_views);
  881. flat_views = NULL;
  882. }
  883. flatviews_init();
  884. /* Render unique FVs */
  885. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  886. MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
  887. if (g_hash_table_lookup(flat_views, physmr)) {
  888. continue;
  889. }
  890. generate_memory_topology(physmr);
  891. }
  892. }
  893. static void address_space_set_flatview(AddressSpace *as)
  894. {
  895. FlatView *old_view = address_space_to_flatview(as);
  896. MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
  897. FlatView *new_view = g_hash_table_lookup(flat_views, physmr);
  898. assert(new_view);
  899. if (old_view == new_view) {
  900. return;
  901. }
  902. if (old_view) {
  903. flatview_ref(old_view);
  904. }
  905. flatview_ref(new_view);
  906. if (!QTAILQ_EMPTY(&as->listeners)) {
  907. FlatView tmpview = { .nr = 0 }, *old_view2 = old_view;
  908. if (!old_view2) {
  909. old_view2 = &tmpview;
  910. }
  911. address_space_update_topology_pass(as, old_view2, new_view, false);
  912. address_space_update_topology_pass(as, old_view2, new_view, true);
  913. }
  914. /* Writes are protected by the BQL. */
  915. atomic_rcu_set(&as->current_map, new_view);
  916. if (old_view) {
  917. flatview_unref(old_view);
  918. }
  919. /* Note that all the old MemoryRegions are still alive up to this
  920. * point. This relieves most MemoryListeners from the need to
  921. * ref/unref the MemoryRegions they get---unless they use them
  922. * outside the iothread mutex, in which case precise reference
  923. * counting is necessary.
  924. */
  925. if (old_view) {
  926. flatview_unref(old_view);
  927. }
  928. }
  929. static void address_space_update_topology(AddressSpace *as)
  930. {
  931. MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
  932. flatviews_init();
  933. if (!g_hash_table_lookup(flat_views, physmr)) {
  934. generate_memory_topology(physmr);
  935. }
  936. address_space_set_flatview(as);
  937. }
  938. void memory_region_transaction_begin(void)
  939. {
  940. qemu_flush_coalesced_mmio_buffer();
  941. ++memory_region_transaction_depth;
  942. }
  943. void memory_region_transaction_commit(void)
  944. {
  945. AddressSpace *as;
  946. assert(memory_region_transaction_depth);
  947. assert(qemu_mutex_iothread_locked());
  948. --memory_region_transaction_depth;
  949. if (!memory_region_transaction_depth) {
  950. if (memory_region_update_pending) {
  951. flatviews_reset();
  952. MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
  953. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  954. address_space_set_flatview(as);
  955. address_space_update_ioeventfds(as);
  956. }
  957. memory_region_update_pending = false;
  958. ioeventfd_update_pending = false;
  959. MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
  960. } else if (ioeventfd_update_pending) {
  961. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  962. address_space_update_ioeventfds(as);
  963. }
  964. ioeventfd_update_pending = false;
  965. }
  966. }
  967. }
  968. static void memory_region_destructor_none(MemoryRegion *mr)
  969. {
  970. }
  971. static void memory_region_destructor_ram(MemoryRegion *mr)
  972. {
  973. qemu_ram_free(mr->ram_block);
  974. }
  975. static bool memory_region_need_escape(char c)
  976. {
  977. return c == '/' || c == '[' || c == '\\' || c == ']';
  978. }
  979. static char *memory_region_escape_name(const char *name)
  980. {
  981. const char *p;
  982. char *escaped, *q;
  983. uint8_t c;
  984. size_t bytes = 0;
  985. for (p = name; *p; p++) {
  986. bytes += memory_region_need_escape(*p) ? 4 : 1;
  987. }
  988. if (bytes == p - name) {
  989. return g_memdup(name, bytes + 1);
  990. }
  991. escaped = g_malloc(bytes + 1);
  992. for (p = name, q = escaped; *p; p++) {
  993. c = *p;
  994. if (unlikely(memory_region_need_escape(c))) {
  995. *q++ = '\\';
  996. *q++ = 'x';
  997. *q++ = "0123456789abcdef"[c >> 4];
  998. c = "0123456789abcdef"[c & 15];
  999. }
  1000. *q++ = c;
  1001. }
  1002. *q = 0;
  1003. return escaped;
  1004. }
  1005. static void memory_region_do_init(MemoryRegion *mr,
  1006. Object *owner,
  1007. const char *name,
  1008. uint64_t size)
  1009. {
  1010. mr->size = int128_make64(size);
  1011. if (size == UINT64_MAX) {
  1012. mr->size = int128_2_64();
  1013. }
  1014. mr->name = g_strdup(name);
  1015. mr->owner = owner;
  1016. mr->ram_block = NULL;
  1017. if (name) {
  1018. char *escaped_name = memory_region_escape_name(name);
  1019. char *name_array = g_strdup_printf("%s[*]", escaped_name);
  1020. if (!owner) {
  1021. owner = container_get(qdev_get_machine(), "/unattached");
  1022. }
  1023. object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
  1024. object_unref(OBJECT(mr));
  1025. g_free(name_array);
  1026. g_free(escaped_name);
  1027. }
  1028. }
  1029. void memory_region_init(MemoryRegion *mr,
  1030. Object *owner,
  1031. const char *name,
  1032. uint64_t size)
  1033. {
  1034. object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
  1035. memory_region_do_init(mr, owner, name, size);
  1036. }
  1037. static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
  1038. void *opaque, Error **errp)
  1039. {
  1040. MemoryRegion *mr = MEMORY_REGION(obj);
  1041. uint64_t value = mr->addr;
  1042. visit_type_uint64(v, name, &value, errp);
  1043. }
  1044. static void memory_region_get_container(Object *obj, Visitor *v,
  1045. const char *name, void *opaque,
  1046. Error **errp)
  1047. {
  1048. MemoryRegion *mr = MEMORY_REGION(obj);
  1049. gchar *path = (gchar *)"";
  1050. if (mr->container) {
  1051. path = object_get_canonical_path(OBJECT(mr->container));
  1052. }
  1053. visit_type_str(v, name, &path, errp);
  1054. if (mr->container) {
  1055. g_free(path);
  1056. }
  1057. }
  1058. static Object *memory_region_resolve_container(Object *obj, void *opaque,
  1059. const char *part)
  1060. {
  1061. MemoryRegion *mr = MEMORY_REGION(obj);
  1062. return OBJECT(mr->container);
  1063. }
  1064. static void memory_region_get_priority(Object *obj, Visitor *v,
  1065. const char *name, void *opaque,
  1066. Error **errp)
  1067. {
  1068. MemoryRegion *mr = MEMORY_REGION(obj);
  1069. int32_t value = mr->priority;
  1070. visit_type_int32(v, name, &value, errp);
  1071. }
  1072. static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
  1073. void *opaque, Error **errp)
  1074. {
  1075. MemoryRegion *mr = MEMORY_REGION(obj);
  1076. uint64_t value = memory_region_size(mr);
  1077. visit_type_uint64(v, name, &value, errp);
  1078. }
  1079. static void memory_region_initfn(Object *obj)
  1080. {
  1081. MemoryRegion *mr = MEMORY_REGION(obj);
  1082. ObjectProperty *op;
  1083. mr->ops = &unassigned_mem_ops;
  1084. mr->enabled = true;
  1085. mr->romd_mode = true;
  1086. mr->global_locking = true;
  1087. mr->destructor = memory_region_destructor_none;
  1088. QTAILQ_INIT(&mr->subregions);
  1089. QTAILQ_INIT(&mr->coalesced);
  1090. op = object_property_add(OBJECT(mr), "container",
  1091. "link<" TYPE_MEMORY_REGION ">",
  1092. memory_region_get_container,
  1093. NULL, /* memory_region_set_container */
  1094. NULL, NULL, &error_abort);
  1095. op->resolve = memory_region_resolve_container;
  1096. object_property_add(OBJECT(mr), "addr", "uint64",
  1097. memory_region_get_addr,
  1098. NULL, /* memory_region_set_addr */
  1099. NULL, NULL, &error_abort);
  1100. object_property_add(OBJECT(mr), "priority", "uint32",
  1101. memory_region_get_priority,
  1102. NULL, /* memory_region_set_priority */
  1103. NULL, NULL, &error_abort);
  1104. object_property_add(OBJECT(mr), "size", "uint64",
  1105. memory_region_get_size,
  1106. NULL, /* memory_region_set_size, */
  1107. NULL, NULL, &error_abort);
  1108. }
  1109. static void iommu_memory_region_initfn(Object *obj)
  1110. {
  1111. MemoryRegion *mr = MEMORY_REGION(obj);
  1112. mr->is_iommu = true;
  1113. }
  1114. static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
  1115. unsigned size)
  1116. {
  1117. #ifdef DEBUG_UNASSIGNED
  1118. printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
  1119. #endif
  1120. if (current_cpu != NULL) {
  1121. bool is_exec = current_cpu->mem_io_access_type == MMU_INST_FETCH;
  1122. cpu_unassigned_access(current_cpu, addr, false, is_exec, 0, size);
  1123. }
  1124. return 0;
  1125. }
  1126. static void unassigned_mem_write(void *opaque, hwaddr addr,
  1127. uint64_t val, unsigned size)
  1128. {
  1129. #ifdef DEBUG_UNASSIGNED
  1130. printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
  1131. #endif
  1132. if (current_cpu != NULL) {
  1133. cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
  1134. }
  1135. }
  1136. static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
  1137. unsigned size, bool is_write,
  1138. MemTxAttrs attrs)
  1139. {
  1140. return false;
  1141. }
  1142. const MemoryRegionOps unassigned_mem_ops = {
  1143. .valid.accepts = unassigned_mem_accepts,
  1144. .endianness = DEVICE_NATIVE_ENDIAN,
  1145. };
  1146. static uint64_t memory_region_ram_device_read(void *opaque,
  1147. hwaddr addr, unsigned size)
  1148. {
  1149. MemoryRegion *mr = opaque;
  1150. uint64_t data = (uint64_t)~0;
  1151. switch (size) {
  1152. case 1:
  1153. data = *(uint8_t *)(mr->ram_block->host + addr);
  1154. break;
  1155. case 2:
  1156. data = *(uint16_t *)(mr->ram_block->host + addr);
  1157. break;
  1158. case 4:
  1159. data = *(uint32_t *)(mr->ram_block->host + addr);
  1160. break;
  1161. case 8:
  1162. data = *(uint64_t *)(mr->ram_block->host + addr);
  1163. break;
  1164. }
  1165. trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
  1166. return data;
  1167. }
  1168. static void memory_region_ram_device_write(void *opaque, hwaddr addr,
  1169. uint64_t data, unsigned size)
  1170. {
  1171. MemoryRegion *mr = opaque;
  1172. trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
  1173. switch (size) {
  1174. case 1:
  1175. *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
  1176. break;
  1177. case 2:
  1178. *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
  1179. break;
  1180. case 4:
  1181. *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
  1182. break;
  1183. case 8:
  1184. *(uint64_t *)(mr->ram_block->host + addr) = data;
  1185. break;
  1186. }
  1187. }
  1188. static const MemoryRegionOps ram_device_mem_ops = {
  1189. .read = memory_region_ram_device_read,
  1190. .write = memory_region_ram_device_write,
  1191. .endianness = DEVICE_HOST_ENDIAN,
  1192. .valid = {
  1193. .min_access_size = 1,
  1194. .max_access_size = 8,
  1195. .unaligned = true,
  1196. },
  1197. .impl = {
  1198. .min_access_size = 1,
  1199. .max_access_size = 8,
  1200. .unaligned = true,
  1201. },
  1202. };
  1203. bool memory_region_access_valid(MemoryRegion *mr,
  1204. hwaddr addr,
  1205. unsigned size,
  1206. bool is_write,
  1207. MemTxAttrs attrs)
  1208. {
  1209. int access_size_min, access_size_max;
  1210. int access_size, i;
  1211. if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
  1212. return false;
  1213. }
  1214. if (!mr->ops->valid.accepts) {
  1215. return true;
  1216. }
  1217. access_size_min = mr->ops->valid.min_access_size;
  1218. if (!mr->ops->valid.min_access_size) {
  1219. access_size_min = 1;
  1220. }
  1221. access_size_max = mr->ops->valid.max_access_size;
  1222. if (!mr->ops->valid.max_access_size) {
  1223. access_size_max = 4;
  1224. }
  1225. access_size = MAX(MIN(size, access_size_max), access_size_min);
  1226. for (i = 0; i < size; i += access_size) {
  1227. if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
  1228. is_write, attrs)) {
  1229. return false;
  1230. }
  1231. }
  1232. return true;
  1233. }
  1234. static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
  1235. hwaddr addr,
  1236. uint64_t *pval,
  1237. unsigned size,
  1238. MemTxAttrs attrs)
  1239. {
  1240. *pval = 0;
  1241. if (mr->ops->read) {
  1242. return access_with_adjusted_size(addr, pval, size,
  1243. mr->ops->impl.min_access_size,
  1244. mr->ops->impl.max_access_size,
  1245. memory_region_read_accessor,
  1246. mr, attrs);
  1247. } else {
  1248. return access_with_adjusted_size(addr, pval, size,
  1249. mr->ops->impl.min_access_size,
  1250. mr->ops->impl.max_access_size,
  1251. memory_region_read_with_attrs_accessor,
  1252. mr, attrs);
  1253. }
  1254. }
  1255. MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
  1256. hwaddr addr,
  1257. uint64_t *pval,
  1258. MemOp op,
  1259. MemTxAttrs attrs)
  1260. {
  1261. unsigned size = memop_size(op);
  1262. MemTxResult r;
  1263. if (!memory_region_access_valid(mr, addr, size, false, attrs)) {
  1264. *pval = unassigned_mem_read(mr, addr, size);
  1265. return MEMTX_DECODE_ERROR;
  1266. }
  1267. r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
  1268. adjust_endianness(mr, pval, op);
  1269. return r;
  1270. }
  1271. /* Return true if an eventfd was signalled */
  1272. static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
  1273. hwaddr addr,
  1274. uint64_t data,
  1275. unsigned size,
  1276. MemTxAttrs attrs)
  1277. {
  1278. MemoryRegionIoeventfd ioeventfd = {
  1279. .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
  1280. .data = data,
  1281. };
  1282. unsigned i;
  1283. for (i = 0; i < mr->ioeventfd_nb; i++) {
  1284. ioeventfd.match_data = mr->ioeventfds[i].match_data;
  1285. ioeventfd.e = mr->ioeventfds[i].e;
  1286. if (memory_region_ioeventfd_equal(&ioeventfd, &mr->ioeventfds[i])) {
  1287. event_notifier_set(ioeventfd.e);
  1288. return true;
  1289. }
  1290. }
  1291. return false;
  1292. }
  1293. MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
  1294. hwaddr addr,
  1295. uint64_t data,
  1296. MemOp op,
  1297. MemTxAttrs attrs)
  1298. {
  1299. unsigned size = memop_size(op);
  1300. if (!memory_region_access_valid(mr, addr, size, true, attrs)) {
  1301. unassigned_mem_write(mr, addr, data, size);
  1302. return MEMTX_DECODE_ERROR;
  1303. }
  1304. adjust_endianness(mr, &data, op);
  1305. if ((!kvm_eventfds_enabled()) &&
  1306. memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
  1307. return MEMTX_OK;
  1308. }
  1309. if (mr->ops->write) {
  1310. return access_with_adjusted_size(addr, &data, size,
  1311. mr->ops->impl.min_access_size,
  1312. mr->ops->impl.max_access_size,
  1313. memory_region_write_accessor, mr,
  1314. attrs);
  1315. } else {
  1316. return
  1317. access_with_adjusted_size(addr, &data, size,
  1318. mr->ops->impl.min_access_size,
  1319. mr->ops->impl.max_access_size,
  1320. memory_region_write_with_attrs_accessor,
  1321. mr, attrs);
  1322. }
  1323. }
  1324. void memory_region_init_io(MemoryRegion *mr,
  1325. Object *owner,
  1326. const MemoryRegionOps *ops,
  1327. void *opaque,
  1328. const char *name,
  1329. uint64_t size)
  1330. {
  1331. memory_region_init(mr, owner, name, size);
  1332. mr->ops = ops ? ops : &unassigned_mem_ops;
  1333. mr->opaque = opaque;
  1334. mr->terminates = true;
  1335. }
  1336. void memory_region_init_ram_nomigrate(MemoryRegion *mr,
  1337. Object *owner,
  1338. const char *name,
  1339. uint64_t size,
  1340. Error **errp)
  1341. {
  1342. memory_region_init_ram_shared_nomigrate(mr, owner, name, size, false, errp);
  1343. }
  1344. void memory_region_init_ram_shared_nomigrate(MemoryRegion *mr,
  1345. Object *owner,
  1346. const char *name,
  1347. uint64_t size,
  1348. bool share,
  1349. Error **errp)
  1350. {
  1351. Error *err = NULL;
  1352. memory_region_init(mr, owner, name, size);
  1353. mr->ram = true;
  1354. mr->terminates = true;
  1355. mr->destructor = memory_region_destructor_ram;
  1356. mr->ram_block = qemu_ram_alloc(size, share, mr, &err);
  1357. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1358. if (err) {
  1359. mr->size = int128_zero();
  1360. object_unparent(OBJECT(mr));
  1361. error_propagate(errp, err);
  1362. }
  1363. }
  1364. void memory_region_init_resizeable_ram(MemoryRegion *mr,
  1365. Object *owner,
  1366. const char *name,
  1367. uint64_t size,
  1368. uint64_t max_size,
  1369. void (*resized)(const char*,
  1370. uint64_t length,
  1371. void *host),
  1372. Error **errp)
  1373. {
  1374. Error *err = NULL;
  1375. memory_region_init(mr, owner, name, size);
  1376. mr->ram = true;
  1377. mr->terminates = true;
  1378. mr->destructor = memory_region_destructor_ram;
  1379. mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
  1380. mr, &err);
  1381. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1382. if (err) {
  1383. mr->size = int128_zero();
  1384. object_unparent(OBJECT(mr));
  1385. error_propagate(errp, err);
  1386. }
  1387. }
  1388. #ifdef CONFIG_POSIX
  1389. void memory_region_init_ram_from_file(MemoryRegion *mr,
  1390. struct Object *owner,
  1391. const char *name,
  1392. uint64_t size,
  1393. uint64_t align,
  1394. uint32_t ram_flags,
  1395. const char *path,
  1396. Error **errp)
  1397. {
  1398. Error *err = NULL;
  1399. memory_region_init(mr, owner, name, size);
  1400. mr->ram = true;
  1401. mr->terminates = true;
  1402. mr->destructor = memory_region_destructor_ram;
  1403. mr->align = align;
  1404. mr->ram_block = qemu_ram_alloc_from_file(size, mr, ram_flags, path, &err);
  1405. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1406. if (err) {
  1407. mr->size = int128_zero();
  1408. object_unparent(OBJECT(mr));
  1409. error_propagate(errp, err);
  1410. }
  1411. }
  1412. void memory_region_init_ram_from_fd(MemoryRegion *mr,
  1413. struct Object *owner,
  1414. const char *name,
  1415. uint64_t size,
  1416. bool share,
  1417. int fd,
  1418. Error **errp)
  1419. {
  1420. Error *err = NULL;
  1421. memory_region_init(mr, owner, name, size);
  1422. mr->ram = true;
  1423. mr->terminates = true;
  1424. mr->destructor = memory_region_destructor_ram;
  1425. mr->ram_block = qemu_ram_alloc_from_fd(size, mr,
  1426. share ? RAM_SHARED : 0,
  1427. fd, &err);
  1428. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1429. if (err) {
  1430. mr->size = int128_zero();
  1431. object_unparent(OBJECT(mr));
  1432. error_propagate(errp, err);
  1433. }
  1434. }
  1435. #endif
  1436. void memory_region_init_ram_ptr(MemoryRegion *mr,
  1437. Object *owner,
  1438. const char *name,
  1439. uint64_t size,
  1440. void *ptr)
  1441. {
  1442. memory_region_init(mr, owner, name, size);
  1443. mr->ram = true;
  1444. mr->terminates = true;
  1445. mr->destructor = memory_region_destructor_ram;
  1446. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1447. /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
  1448. assert(ptr != NULL);
  1449. mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
  1450. }
  1451. void memory_region_init_ram_device_ptr(MemoryRegion *mr,
  1452. Object *owner,
  1453. const char *name,
  1454. uint64_t size,
  1455. void *ptr)
  1456. {
  1457. memory_region_init(mr, owner, name, size);
  1458. mr->ram = true;
  1459. mr->terminates = true;
  1460. mr->ram_device = true;
  1461. mr->ops = &ram_device_mem_ops;
  1462. mr->opaque = mr;
  1463. mr->destructor = memory_region_destructor_ram;
  1464. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1465. /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
  1466. assert(ptr != NULL);
  1467. mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
  1468. }
  1469. void memory_region_init_alias(MemoryRegion *mr,
  1470. Object *owner,
  1471. const char *name,
  1472. MemoryRegion *orig,
  1473. hwaddr offset,
  1474. uint64_t size)
  1475. {
  1476. memory_region_init(mr, owner, name, size);
  1477. mr->alias = orig;
  1478. mr->alias_offset = offset;
  1479. }
  1480. void memory_region_init_rom_nomigrate(MemoryRegion *mr,
  1481. struct Object *owner,
  1482. const char *name,
  1483. uint64_t size,
  1484. Error **errp)
  1485. {
  1486. Error *err = NULL;
  1487. memory_region_init(mr, owner, name, size);
  1488. mr->ram = true;
  1489. mr->readonly = true;
  1490. mr->terminates = true;
  1491. mr->destructor = memory_region_destructor_ram;
  1492. mr->ram_block = qemu_ram_alloc(size, false, mr, &err);
  1493. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1494. if (err) {
  1495. mr->size = int128_zero();
  1496. object_unparent(OBJECT(mr));
  1497. error_propagate(errp, err);
  1498. }
  1499. }
  1500. void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
  1501. Object *owner,
  1502. const MemoryRegionOps *ops,
  1503. void *opaque,
  1504. const char *name,
  1505. uint64_t size,
  1506. Error **errp)
  1507. {
  1508. Error *err = NULL;
  1509. assert(ops);
  1510. memory_region_init(mr, owner, name, size);
  1511. mr->ops = ops;
  1512. mr->opaque = opaque;
  1513. mr->terminates = true;
  1514. mr->rom_device = true;
  1515. mr->destructor = memory_region_destructor_ram;
  1516. mr->ram_block = qemu_ram_alloc(size, false, mr, &err);
  1517. if (err) {
  1518. mr->size = int128_zero();
  1519. object_unparent(OBJECT(mr));
  1520. error_propagate(errp, err);
  1521. }
  1522. }
  1523. void memory_region_init_iommu(void *_iommu_mr,
  1524. size_t instance_size,
  1525. const char *mrtypename,
  1526. Object *owner,
  1527. const char *name,
  1528. uint64_t size)
  1529. {
  1530. struct IOMMUMemoryRegion *iommu_mr;
  1531. struct MemoryRegion *mr;
  1532. object_initialize(_iommu_mr, instance_size, mrtypename);
  1533. mr = MEMORY_REGION(_iommu_mr);
  1534. memory_region_do_init(mr, owner, name, size);
  1535. iommu_mr = IOMMU_MEMORY_REGION(mr);
  1536. mr->terminates = true; /* then re-forwards */
  1537. QLIST_INIT(&iommu_mr->iommu_notify);
  1538. iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
  1539. }
  1540. static void memory_region_finalize(Object *obj)
  1541. {
  1542. MemoryRegion *mr = MEMORY_REGION(obj);
  1543. assert(!mr->container);
  1544. /* We know the region is not visible in any address space (it
  1545. * does not have a container and cannot be a root either because
  1546. * it has no references, so we can blindly clear mr->enabled.
  1547. * memory_region_set_enabled instead could trigger a transaction
  1548. * and cause an infinite loop.
  1549. */
  1550. mr->enabled = false;
  1551. memory_region_transaction_begin();
  1552. while (!QTAILQ_EMPTY(&mr->subregions)) {
  1553. MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
  1554. memory_region_del_subregion(mr, subregion);
  1555. }
  1556. memory_region_transaction_commit();
  1557. mr->destructor(mr);
  1558. memory_region_clear_coalescing(mr);
  1559. g_free((char *)mr->name);
  1560. g_free(mr->ioeventfds);
  1561. }
  1562. Object *memory_region_owner(MemoryRegion *mr)
  1563. {
  1564. Object *obj = OBJECT(mr);
  1565. return obj->parent;
  1566. }
  1567. void memory_region_ref(MemoryRegion *mr)
  1568. {
  1569. /* MMIO callbacks most likely will access data that belongs
  1570. * to the owner, hence the need to ref/unref the owner whenever
  1571. * the memory region is in use.
  1572. *
  1573. * The memory region is a child of its owner. As long as the
  1574. * owner doesn't call unparent itself on the memory region,
  1575. * ref-ing the owner will also keep the memory region alive.
  1576. * Memory regions without an owner are supposed to never go away;
  1577. * we do not ref/unref them because it slows down DMA sensibly.
  1578. */
  1579. if (mr && mr->owner) {
  1580. object_ref(mr->owner);
  1581. }
  1582. }
  1583. void memory_region_unref(MemoryRegion *mr)
  1584. {
  1585. if (mr && mr->owner) {
  1586. object_unref(mr->owner);
  1587. }
  1588. }
  1589. uint64_t memory_region_size(MemoryRegion *mr)
  1590. {
  1591. if (int128_eq(mr->size, int128_2_64())) {
  1592. return UINT64_MAX;
  1593. }
  1594. return int128_get64(mr->size);
  1595. }
  1596. const char *memory_region_name(const MemoryRegion *mr)
  1597. {
  1598. if (!mr->name) {
  1599. ((MemoryRegion *)mr)->name =
  1600. object_get_canonical_path_component(OBJECT(mr));
  1601. }
  1602. return mr->name;
  1603. }
  1604. bool memory_region_is_ram_device(MemoryRegion *mr)
  1605. {
  1606. return mr->ram_device;
  1607. }
  1608. uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
  1609. {
  1610. uint8_t mask = mr->dirty_log_mask;
  1611. if (global_dirty_log && mr->ram_block) {
  1612. mask |= (1 << DIRTY_MEMORY_MIGRATION);
  1613. }
  1614. return mask;
  1615. }
  1616. bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
  1617. {
  1618. return memory_region_get_dirty_log_mask(mr) & (1 << client);
  1619. }
  1620. static void memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr)
  1621. {
  1622. IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
  1623. IOMMUNotifier *iommu_notifier;
  1624. IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
  1625. IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
  1626. flags |= iommu_notifier->notifier_flags;
  1627. }
  1628. if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) {
  1629. imrc->notify_flag_changed(iommu_mr,
  1630. iommu_mr->iommu_notify_flags,
  1631. flags);
  1632. }
  1633. iommu_mr->iommu_notify_flags = flags;
  1634. }
  1635. void memory_region_register_iommu_notifier(MemoryRegion *mr,
  1636. IOMMUNotifier *n)
  1637. {
  1638. IOMMUMemoryRegion *iommu_mr;
  1639. if (mr->alias) {
  1640. memory_region_register_iommu_notifier(mr->alias, n);
  1641. return;
  1642. }
  1643. /* We need to register for at least one bitfield */
  1644. iommu_mr = IOMMU_MEMORY_REGION(mr);
  1645. assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
  1646. assert(n->start <= n->end);
  1647. assert(n->iommu_idx >= 0 &&
  1648. n->iommu_idx < memory_region_iommu_num_indexes(iommu_mr));
  1649. QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node);
  1650. memory_region_update_iommu_notify_flags(iommu_mr);
  1651. }
  1652. uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr)
  1653. {
  1654. IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
  1655. if (imrc->get_min_page_size) {
  1656. return imrc->get_min_page_size(iommu_mr);
  1657. }
  1658. return TARGET_PAGE_SIZE;
  1659. }
  1660. void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
  1661. {
  1662. MemoryRegion *mr = MEMORY_REGION(iommu_mr);
  1663. IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
  1664. hwaddr addr, granularity;
  1665. IOMMUTLBEntry iotlb;
  1666. /* If the IOMMU has its own replay callback, override */
  1667. if (imrc->replay) {
  1668. imrc->replay(iommu_mr, n);
  1669. return;
  1670. }
  1671. granularity = memory_region_iommu_get_min_page_size(iommu_mr);
  1672. for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
  1673. iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, n->iommu_idx);
  1674. if (iotlb.perm != IOMMU_NONE) {
  1675. n->notify(n, &iotlb);
  1676. }
  1677. /* if (2^64 - MR size) < granularity, it's possible to get an
  1678. * infinite loop here. This should catch such a wraparound */
  1679. if ((addr + granularity) < addr) {
  1680. break;
  1681. }
  1682. }
  1683. }
  1684. void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
  1685. IOMMUNotifier *n)
  1686. {
  1687. IOMMUMemoryRegion *iommu_mr;
  1688. if (mr->alias) {
  1689. memory_region_unregister_iommu_notifier(mr->alias, n);
  1690. return;
  1691. }
  1692. QLIST_REMOVE(n, node);
  1693. iommu_mr = IOMMU_MEMORY_REGION(mr);
  1694. memory_region_update_iommu_notify_flags(iommu_mr);
  1695. }
  1696. void memory_region_notify_one(IOMMUNotifier *notifier,
  1697. IOMMUTLBEntry *entry)
  1698. {
  1699. IOMMUNotifierFlag request_flags;
  1700. hwaddr entry_end = entry->iova + entry->addr_mask;
  1701. /*
  1702. * Skip the notification if the notification does not overlap
  1703. * with registered range.
  1704. */
  1705. if (notifier->start > entry_end || notifier->end < entry->iova) {
  1706. return;
  1707. }
  1708. assert(entry->iova >= notifier->start && entry_end <= notifier->end);
  1709. if (entry->perm & IOMMU_RW) {
  1710. request_flags = IOMMU_NOTIFIER_MAP;
  1711. } else {
  1712. request_flags = IOMMU_NOTIFIER_UNMAP;
  1713. }
  1714. if (notifier->notifier_flags & request_flags) {
  1715. notifier->notify(notifier, entry);
  1716. }
  1717. }
  1718. void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr,
  1719. int iommu_idx,
  1720. IOMMUTLBEntry entry)
  1721. {
  1722. IOMMUNotifier *iommu_notifier;
  1723. assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr)));
  1724. IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
  1725. if (iommu_notifier->iommu_idx == iommu_idx) {
  1726. memory_region_notify_one(iommu_notifier, &entry);
  1727. }
  1728. }
  1729. }
  1730. int memory_region_iommu_get_attr(IOMMUMemoryRegion *iommu_mr,
  1731. enum IOMMUMemoryRegionAttr attr,
  1732. void *data)
  1733. {
  1734. IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
  1735. if (!imrc->get_attr) {
  1736. return -EINVAL;
  1737. }
  1738. return imrc->get_attr(iommu_mr, attr, data);
  1739. }
  1740. int memory_region_iommu_attrs_to_index(IOMMUMemoryRegion *iommu_mr,
  1741. MemTxAttrs attrs)
  1742. {
  1743. IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
  1744. if (!imrc->attrs_to_index) {
  1745. return 0;
  1746. }
  1747. return imrc->attrs_to_index(iommu_mr, attrs);
  1748. }
  1749. int memory_region_iommu_num_indexes(IOMMUMemoryRegion *iommu_mr)
  1750. {
  1751. IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
  1752. if (!imrc->num_indexes) {
  1753. return 1;
  1754. }
  1755. return imrc->num_indexes(iommu_mr);
  1756. }
  1757. void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
  1758. {
  1759. uint8_t mask = 1 << client;
  1760. uint8_t old_logging;
  1761. assert(client == DIRTY_MEMORY_VGA);
  1762. old_logging = mr->vga_logging_count;
  1763. mr->vga_logging_count += log ? 1 : -1;
  1764. if (!!old_logging == !!mr->vga_logging_count) {
  1765. return;
  1766. }
  1767. memory_region_transaction_begin();
  1768. mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
  1769. memory_region_update_pending |= mr->enabled;
  1770. memory_region_transaction_commit();
  1771. }
  1772. void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
  1773. hwaddr size)
  1774. {
  1775. assert(mr->ram_block);
  1776. cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
  1777. size,
  1778. memory_region_get_dirty_log_mask(mr));
  1779. }
  1780. static void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
  1781. {
  1782. MemoryListener *listener;
  1783. AddressSpace *as;
  1784. FlatView *view;
  1785. FlatRange *fr;
  1786. /* If the same address space has multiple log_sync listeners, we
  1787. * visit that address space's FlatView multiple times. But because
  1788. * log_sync listeners are rare, it's still cheaper than walking each
  1789. * address space once.
  1790. */
  1791. QTAILQ_FOREACH(listener, &memory_listeners, link) {
  1792. if (!listener->log_sync) {
  1793. continue;
  1794. }
  1795. as = listener->address_space;
  1796. view = address_space_get_flatview(as);
  1797. FOR_EACH_FLAT_RANGE(fr, view) {
  1798. if (fr->dirty_log_mask && (!mr || fr->mr == mr)) {
  1799. MemoryRegionSection mrs = section_from_flat_range(fr, view);
  1800. listener->log_sync(listener, &mrs);
  1801. }
  1802. }
  1803. flatview_unref(view);
  1804. }
  1805. }
  1806. void memory_region_clear_dirty_bitmap(MemoryRegion *mr, hwaddr start,
  1807. hwaddr len)
  1808. {
  1809. MemoryRegionSection mrs;
  1810. MemoryListener *listener;
  1811. AddressSpace *as;
  1812. FlatView *view;
  1813. FlatRange *fr;
  1814. hwaddr sec_start, sec_end, sec_size;
  1815. QTAILQ_FOREACH(listener, &memory_listeners, link) {
  1816. if (!listener->log_clear) {
  1817. continue;
  1818. }
  1819. as = listener->address_space;
  1820. view = address_space_get_flatview(as);
  1821. FOR_EACH_FLAT_RANGE(fr, view) {
  1822. if (!fr->dirty_log_mask || fr->mr != mr) {
  1823. /*
  1824. * Clear dirty bitmap operation only applies to those
  1825. * regions whose dirty logging is at least enabled
  1826. */
  1827. continue;
  1828. }
  1829. mrs = section_from_flat_range(fr, view);
  1830. sec_start = MAX(mrs.offset_within_region, start);
  1831. sec_end = mrs.offset_within_region + int128_get64(mrs.size);
  1832. sec_end = MIN(sec_end, start + len);
  1833. if (sec_start >= sec_end) {
  1834. /*
  1835. * If this memory region section has no intersection
  1836. * with the requested range, skip.
  1837. */
  1838. continue;
  1839. }
  1840. /* Valid case; shrink the section if needed */
  1841. mrs.offset_within_address_space +=
  1842. sec_start - mrs.offset_within_region;
  1843. mrs.offset_within_region = sec_start;
  1844. sec_size = sec_end - sec_start;
  1845. mrs.size = int128_make64(sec_size);
  1846. listener->log_clear(listener, &mrs);
  1847. }
  1848. flatview_unref(view);
  1849. }
  1850. }
  1851. DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
  1852. hwaddr addr,
  1853. hwaddr size,
  1854. unsigned client)
  1855. {
  1856. DirtyBitmapSnapshot *snapshot;
  1857. assert(mr->ram_block);
  1858. memory_region_sync_dirty_bitmap(mr);
  1859. snapshot = cpu_physical_memory_snapshot_and_clear_dirty(mr, addr, size, client);
  1860. memory_global_after_dirty_log_sync();
  1861. return snapshot;
  1862. }
  1863. bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
  1864. hwaddr addr, hwaddr size)
  1865. {
  1866. assert(mr->ram_block);
  1867. return cpu_physical_memory_snapshot_get_dirty(snap,
  1868. memory_region_get_ram_addr(mr) + addr, size);
  1869. }
  1870. void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
  1871. {
  1872. if (mr->readonly != readonly) {
  1873. memory_region_transaction_begin();
  1874. mr->readonly = readonly;
  1875. memory_region_update_pending |= mr->enabled;
  1876. memory_region_transaction_commit();
  1877. }
  1878. }
  1879. void memory_region_set_nonvolatile(MemoryRegion *mr, bool nonvolatile)
  1880. {
  1881. if (mr->nonvolatile != nonvolatile) {
  1882. memory_region_transaction_begin();
  1883. mr->nonvolatile = nonvolatile;
  1884. memory_region_update_pending |= mr->enabled;
  1885. memory_region_transaction_commit();
  1886. }
  1887. }
  1888. void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
  1889. {
  1890. if (mr->romd_mode != romd_mode) {
  1891. memory_region_transaction_begin();
  1892. mr->romd_mode = romd_mode;
  1893. memory_region_update_pending |= mr->enabled;
  1894. memory_region_transaction_commit();
  1895. }
  1896. }
  1897. void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
  1898. hwaddr size, unsigned client)
  1899. {
  1900. assert(mr->ram_block);
  1901. cpu_physical_memory_test_and_clear_dirty(
  1902. memory_region_get_ram_addr(mr) + addr, size, client);
  1903. }
  1904. int memory_region_get_fd(MemoryRegion *mr)
  1905. {
  1906. int fd;
  1907. rcu_read_lock();
  1908. while (mr->alias) {
  1909. mr = mr->alias;
  1910. }
  1911. fd = mr->ram_block->fd;
  1912. rcu_read_unlock();
  1913. return fd;
  1914. }
  1915. void *memory_region_get_ram_ptr(MemoryRegion *mr)
  1916. {
  1917. void *ptr;
  1918. uint64_t offset = 0;
  1919. rcu_read_lock();
  1920. while (mr->alias) {
  1921. offset += mr->alias_offset;
  1922. mr = mr->alias;
  1923. }
  1924. assert(mr->ram_block);
  1925. ptr = qemu_map_ram_ptr(mr->ram_block, offset);
  1926. rcu_read_unlock();
  1927. return ptr;
  1928. }
  1929. MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
  1930. {
  1931. RAMBlock *block;
  1932. block = qemu_ram_block_from_host(ptr, false, offset);
  1933. if (!block) {
  1934. return NULL;
  1935. }
  1936. return block->mr;
  1937. }
  1938. ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
  1939. {
  1940. return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
  1941. }
  1942. void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
  1943. {
  1944. assert(mr->ram_block);
  1945. qemu_ram_resize(mr->ram_block, newsize, errp);
  1946. }
  1947. /*
  1948. * Call proper memory listeners about the change on the newly
  1949. * added/removed CoalescedMemoryRange.
  1950. */
  1951. static void memory_region_update_coalesced_range(MemoryRegion *mr,
  1952. CoalescedMemoryRange *cmr,
  1953. bool add)
  1954. {
  1955. AddressSpace *as;
  1956. FlatView *view;
  1957. FlatRange *fr;
  1958. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  1959. view = address_space_get_flatview(as);
  1960. FOR_EACH_FLAT_RANGE(fr, view) {
  1961. if (fr->mr == mr) {
  1962. flat_range_coalesced_io_notify(fr, as, cmr, add);
  1963. }
  1964. }
  1965. flatview_unref(view);
  1966. }
  1967. }
  1968. void memory_region_set_coalescing(MemoryRegion *mr)
  1969. {
  1970. memory_region_clear_coalescing(mr);
  1971. memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
  1972. }
  1973. void memory_region_add_coalescing(MemoryRegion *mr,
  1974. hwaddr offset,
  1975. uint64_t size)
  1976. {
  1977. CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
  1978. cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
  1979. QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
  1980. memory_region_update_coalesced_range(mr, cmr, true);
  1981. memory_region_set_flush_coalesced(mr);
  1982. }
  1983. void memory_region_clear_coalescing(MemoryRegion *mr)
  1984. {
  1985. CoalescedMemoryRange *cmr;
  1986. if (QTAILQ_EMPTY(&mr->coalesced)) {
  1987. return;
  1988. }
  1989. qemu_flush_coalesced_mmio_buffer();
  1990. mr->flush_coalesced_mmio = false;
  1991. while (!QTAILQ_EMPTY(&mr->coalesced)) {
  1992. cmr = QTAILQ_FIRST(&mr->coalesced);
  1993. QTAILQ_REMOVE(&mr->coalesced, cmr, link);
  1994. memory_region_update_coalesced_range(mr, cmr, false);
  1995. g_free(cmr);
  1996. }
  1997. }
  1998. void memory_region_set_flush_coalesced(MemoryRegion *mr)
  1999. {
  2000. mr->flush_coalesced_mmio = true;
  2001. }
  2002. void memory_region_clear_flush_coalesced(MemoryRegion *mr)
  2003. {
  2004. qemu_flush_coalesced_mmio_buffer();
  2005. if (QTAILQ_EMPTY(&mr->coalesced)) {
  2006. mr->flush_coalesced_mmio = false;
  2007. }
  2008. }
  2009. void memory_region_clear_global_locking(MemoryRegion *mr)
  2010. {
  2011. mr->global_locking = false;
  2012. }
  2013. static bool userspace_eventfd_warning;
  2014. void memory_region_add_eventfd(MemoryRegion *mr,
  2015. hwaddr addr,
  2016. unsigned size,
  2017. bool match_data,
  2018. uint64_t data,
  2019. EventNotifier *e)
  2020. {
  2021. MemoryRegionIoeventfd mrfd = {
  2022. .addr.start = int128_make64(addr),
  2023. .addr.size = int128_make64(size),
  2024. .match_data = match_data,
  2025. .data = data,
  2026. .e = e,
  2027. };
  2028. unsigned i;
  2029. if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
  2030. userspace_eventfd_warning))) {
  2031. userspace_eventfd_warning = true;
  2032. error_report("Using eventfd without MMIO binding in KVM. "
  2033. "Suboptimal performance expected");
  2034. }
  2035. if (size) {
  2036. adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
  2037. }
  2038. memory_region_transaction_begin();
  2039. for (i = 0; i < mr->ioeventfd_nb; ++i) {
  2040. if (memory_region_ioeventfd_before(&mrfd, &mr->ioeventfds[i])) {
  2041. break;
  2042. }
  2043. }
  2044. ++mr->ioeventfd_nb;
  2045. mr->ioeventfds = g_realloc(mr->ioeventfds,
  2046. sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
  2047. memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
  2048. sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
  2049. mr->ioeventfds[i] = mrfd;
  2050. ioeventfd_update_pending |= mr->enabled;
  2051. memory_region_transaction_commit();
  2052. }
  2053. void memory_region_del_eventfd(MemoryRegion *mr,
  2054. hwaddr addr,
  2055. unsigned size,
  2056. bool match_data,
  2057. uint64_t data,
  2058. EventNotifier *e)
  2059. {
  2060. MemoryRegionIoeventfd mrfd = {
  2061. .addr.start = int128_make64(addr),
  2062. .addr.size = int128_make64(size),
  2063. .match_data = match_data,
  2064. .data = data,
  2065. .e = e,
  2066. };
  2067. unsigned i;
  2068. if (size) {
  2069. adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
  2070. }
  2071. memory_region_transaction_begin();
  2072. for (i = 0; i < mr->ioeventfd_nb; ++i) {
  2073. if (memory_region_ioeventfd_equal(&mrfd, &mr->ioeventfds[i])) {
  2074. break;
  2075. }
  2076. }
  2077. assert(i != mr->ioeventfd_nb);
  2078. memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
  2079. sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
  2080. --mr->ioeventfd_nb;
  2081. mr->ioeventfds = g_realloc(mr->ioeventfds,
  2082. sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
  2083. ioeventfd_update_pending |= mr->enabled;
  2084. memory_region_transaction_commit();
  2085. }
  2086. static void memory_region_update_container_subregions(MemoryRegion *subregion)
  2087. {
  2088. MemoryRegion *mr = subregion->container;
  2089. MemoryRegion *other;
  2090. memory_region_transaction_begin();
  2091. memory_region_ref(subregion);
  2092. QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
  2093. if (subregion->priority >= other->priority) {
  2094. QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
  2095. goto done;
  2096. }
  2097. }
  2098. QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
  2099. done:
  2100. memory_region_update_pending |= mr->enabled && subregion->enabled;
  2101. memory_region_transaction_commit();
  2102. }
  2103. static void memory_region_add_subregion_common(MemoryRegion *mr,
  2104. hwaddr offset,
  2105. MemoryRegion *subregion)
  2106. {
  2107. assert(!subregion->container);
  2108. subregion->container = mr;
  2109. subregion->addr = offset;
  2110. memory_region_update_container_subregions(subregion);
  2111. }
  2112. void memory_region_add_subregion(MemoryRegion *mr,
  2113. hwaddr offset,
  2114. MemoryRegion *subregion)
  2115. {
  2116. subregion->priority = 0;
  2117. memory_region_add_subregion_common(mr, offset, subregion);
  2118. }
  2119. void memory_region_add_subregion_overlap(MemoryRegion *mr,
  2120. hwaddr offset,
  2121. MemoryRegion *subregion,
  2122. int priority)
  2123. {
  2124. subregion->priority = priority;
  2125. memory_region_add_subregion_common(mr, offset, subregion);
  2126. }
  2127. void memory_region_del_subregion(MemoryRegion *mr,
  2128. MemoryRegion *subregion)
  2129. {
  2130. memory_region_transaction_begin();
  2131. assert(subregion->container == mr);
  2132. subregion->container = NULL;
  2133. QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
  2134. memory_region_unref(subregion);
  2135. memory_region_update_pending |= mr->enabled && subregion->enabled;
  2136. memory_region_transaction_commit();
  2137. }
  2138. void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
  2139. {
  2140. if (enabled == mr->enabled) {
  2141. return;
  2142. }
  2143. memory_region_transaction_begin();
  2144. mr->enabled = enabled;
  2145. memory_region_update_pending = true;
  2146. memory_region_transaction_commit();
  2147. }
  2148. void memory_region_set_size(MemoryRegion *mr, uint64_t size)
  2149. {
  2150. Int128 s = int128_make64(size);
  2151. if (size == UINT64_MAX) {
  2152. s = int128_2_64();
  2153. }
  2154. if (int128_eq(s, mr->size)) {
  2155. return;
  2156. }
  2157. memory_region_transaction_begin();
  2158. mr->size = s;
  2159. memory_region_update_pending = true;
  2160. memory_region_transaction_commit();
  2161. }
  2162. static void memory_region_readd_subregion(MemoryRegion *mr)
  2163. {
  2164. MemoryRegion *container = mr->container;
  2165. if (container) {
  2166. memory_region_transaction_begin();
  2167. memory_region_ref(mr);
  2168. memory_region_del_subregion(container, mr);
  2169. mr->container = container;
  2170. memory_region_update_container_subregions(mr);
  2171. memory_region_unref(mr);
  2172. memory_region_transaction_commit();
  2173. }
  2174. }
  2175. void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
  2176. {
  2177. if (addr != mr->addr) {
  2178. mr->addr = addr;
  2179. memory_region_readd_subregion(mr);
  2180. }
  2181. }
  2182. void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
  2183. {
  2184. assert(mr->alias);
  2185. if (offset == mr->alias_offset) {
  2186. return;
  2187. }
  2188. memory_region_transaction_begin();
  2189. mr->alias_offset = offset;
  2190. memory_region_update_pending |= mr->enabled;
  2191. memory_region_transaction_commit();
  2192. }
  2193. uint64_t memory_region_get_alignment(const MemoryRegion *mr)
  2194. {
  2195. return mr->align;
  2196. }
  2197. static int cmp_flatrange_addr(const void *addr_, const void *fr_)
  2198. {
  2199. const AddrRange *addr = addr_;
  2200. const FlatRange *fr = fr_;
  2201. if (int128_le(addrrange_end(*addr), fr->addr.start)) {
  2202. return -1;
  2203. } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
  2204. return 1;
  2205. }
  2206. return 0;
  2207. }
  2208. static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
  2209. {
  2210. return bsearch(&addr, view->ranges, view->nr,
  2211. sizeof(FlatRange), cmp_flatrange_addr);
  2212. }
  2213. bool memory_region_is_mapped(MemoryRegion *mr)
  2214. {
  2215. return mr->container ? true : false;
  2216. }
  2217. /* Same as memory_region_find, but it does not add a reference to the
  2218. * returned region. It must be called from an RCU critical section.
  2219. */
  2220. static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
  2221. hwaddr addr, uint64_t size)
  2222. {
  2223. MemoryRegionSection ret = { .mr = NULL };
  2224. MemoryRegion *root;
  2225. AddressSpace *as;
  2226. AddrRange range;
  2227. FlatView *view;
  2228. FlatRange *fr;
  2229. addr += mr->addr;
  2230. for (root = mr; root->container; ) {
  2231. root = root->container;
  2232. addr += root->addr;
  2233. }
  2234. as = memory_region_to_address_space(root);
  2235. if (!as) {
  2236. return ret;
  2237. }
  2238. range = addrrange_make(int128_make64(addr), int128_make64(size));
  2239. view = address_space_to_flatview(as);
  2240. fr = flatview_lookup(view, range);
  2241. if (!fr) {
  2242. return ret;
  2243. }
  2244. while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
  2245. --fr;
  2246. }
  2247. ret.mr = fr->mr;
  2248. ret.fv = view;
  2249. range = addrrange_intersection(range, fr->addr);
  2250. ret.offset_within_region = fr->offset_in_region;
  2251. ret.offset_within_region += int128_get64(int128_sub(range.start,
  2252. fr->addr.start));
  2253. ret.size = range.size;
  2254. ret.offset_within_address_space = int128_get64(range.start);
  2255. ret.readonly = fr->readonly;
  2256. ret.nonvolatile = fr->nonvolatile;
  2257. return ret;
  2258. }
  2259. MemoryRegionSection memory_region_find(MemoryRegion *mr,
  2260. hwaddr addr, uint64_t size)
  2261. {
  2262. MemoryRegionSection ret;
  2263. rcu_read_lock();
  2264. ret = memory_region_find_rcu(mr, addr, size);
  2265. if (ret.mr) {
  2266. memory_region_ref(ret.mr);
  2267. }
  2268. rcu_read_unlock();
  2269. return ret;
  2270. }
  2271. bool memory_region_present(MemoryRegion *container, hwaddr addr)
  2272. {
  2273. MemoryRegion *mr;
  2274. rcu_read_lock();
  2275. mr = memory_region_find_rcu(container, addr, 1).mr;
  2276. rcu_read_unlock();
  2277. return mr && mr != container;
  2278. }
  2279. void memory_global_dirty_log_sync(void)
  2280. {
  2281. memory_region_sync_dirty_bitmap(NULL);
  2282. }
  2283. void memory_global_after_dirty_log_sync(void)
  2284. {
  2285. MEMORY_LISTENER_CALL_GLOBAL(log_global_after_sync, Forward);
  2286. }
  2287. static VMChangeStateEntry *vmstate_change;
  2288. void memory_global_dirty_log_start(void)
  2289. {
  2290. if (vmstate_change) {
  2291. qemu_del_vm_change_state_handler(vmstate_change);
  2292. vmstate_change = NULL;
  2293. }
  2294. global_dirty_log = true;
  2295. MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
  2296. /* Refresh DIRTY_MEMORY_MIGRATION bit. */
  2297. memory_region_transaction_begin();
  2298. memory_region_update_pending = true;
  2299. memory_region_transaction_commit();
  2300. }
  2301. static void memory_global_dirty_log_do_stop(void)
  2302. {
  2303. global_dirty_log = false;
  2304. /* Refresh DIRTY_MEMORY_MIGRATION bit. */
  2305. memory_region_transaction_begin();
  2306. memory_region_update_pending = true;
  2307. memory_region_transaction_commit();
  2308. MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
  2309. }
  2310. static void memory_vm_change_state_handler(void *opaque, int running,
  2311. RunState state)
  2312. {
  2313. if (running) {
  2314. memory_global_dirty_log_do_stop();
  2315. if (vmstate_change) {
  2316. qemu_del_vm_change_state_handler(vmstate_change);
  2317. vmstate_change = NULL;
  2318. }
  2319. }
  2320. }
  2321. void memory_global_dirty_log_stop(void)
  2322. {
  2323. if (!runstate_is_running()) {
  2324. if (vmstate_change) {
  2325. return;
  2326. }
  2327. vmstate_change = qemu_add_vm_change_state_handler(
  2328. memory_vm_change_state_handler, NULL);
  2329. return;
  2330. }
  2331. memory_global_dirty_log_do_stop();
  2332. }
  2333. static void listener_add_address_space(MemoryListener *listener,
  2334. AddressSpace *as)
  2335. {
  2336. FlatView *view;
  2337. FlatRange *fr;
  2338. if (listener->begin) {
  2339. listener->begin(listener);
  2340. }
  2341. if (global_dirty_log) {
  2342. if (listener->log_global_start) {
  2343. listener->log_global_start(listener);
  2344. }
  2345. }
  2346. view = address_space_get_flatview(as);
  2347. FOR_EACH_FLAT_RANGE(fr, view) {
  2348. MemoryRegionSection section = section_from_flat_range(fr, view);
  2349. if (listener->region_add) {
  2350. listener->region_add(listener, &section);
  2351. }
  2352. if (fr->dirty_log_mask && listener->log_start) {
  2353. listener->log_start(listener, &section, 0, fr->dirty_log_mask);
  2354. }
  2355. }
  2356. if (listener->commit) {
  2357. listener->commit(listener);
  2358. }
  2359. flatview_unref(view);
  2360. }
  2361. static void listener_del_address_space(MemoryListener *listener,
  2362. AddressSpace *as)
  2363. {
  2364. FlatView *view;
  2365. FlatRange *fr;
  2366. if (listener->begin) {
  2367. listener->begin(listener);
  2368. }
  2369. view = address_space_get_flatview(as);
  2370. FOR_EACH_FLAT_RANGE(fr, view) {
  2371. MemoryRegionSection section = section_from_flat_range(fr, view);
  2372. if (fr->dirty_log_mask && listener->log_stop) {
  2373. listener->log_stop(listener, &section, fr->dirty_log_mask, 0);
  2374. }
  2375. if (listener->region_del) {
  2376. listener->region_del(listener, &section);
  2377. }
  2378. }
  2379. if (listener->commit) {
  2380. listener->commit(listener);
  2381. }
  2382. flatview_unref(view);
  2383. }
  2384. void memory_listener_register(MemoryListener *listener, AddressSpace *as)
  2385. {
  2386. MemoryListener *other = NULL;
  2387. listener->address_space = as;
  2388. if (QTAILQ_EMPTY(&memory_listeners)
  2389. || listener->priority >= QTAILQ_LAST(&memory_listeners)->priority) {
  2390. QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
  2391. } else {
  2392. QTAILQ_FOREACH(other, &memory_listeners, link) {
  2393. if (listener->priority < other->priority) {
  2394. break;
  2395. }
  2396. }
  2397. QTAILQ_INSERT_BEFORE(other, listener, link);
  2398. }
  2399. if (QTAILQ_EMPTY(&as->listeners)
  2400. || listener->priority >= QTAILQ_LAST(&as->listeners)->priority) {
  2401. QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
  2402. } else {
  2403. QTAILQ_FOREACH(other, &as->listeners, link_as) {
  2404. if (listener->priority < other->priority) {
  2405. break;
  2406. }
  2407. }
  2408. QTAILQ_INSERT_BEFORE(other, listener, link_as);
  2409. }
  2410. listener_add_address_space(listener, as);
  2411. }
  2412. void memory_listener_unregister(MemoryListener *listener)
  2413. {
  2414. if (!listener->address_space) {
  2415. return;
  2416. }
  2417. listener_del_address_space(listener, listener->address_space);
  2418. QTAILQ_REMOVE(&memory_listeners, listener, link);
  2419. QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
  2420. listener->address_space = NULL;
  2421. }
  2422. void address_space_remove_listeners(AddressSpace *as)
  2423. {
  2424. while (!QTAILQ_EMPTY(&as->listeners)) {
  2425. memory_listener_unregister(QTAILQ_FIRST(&as->listeners));
  2426. }
  2427. }
  2428. void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
  2429. {
  2430. memory_region_ref(root);
  2431. as->root = root;
  2432. as->current_map = NULL;
  2433. as->ioeventfd_nb = 0;
  2434. as->ioeventfds = NULL;
  2435. QTAILQ_INIT(&as->listeners);
  2436. QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
  2437. as->name = g_strdup(name ? name : "anonymous");
  2438. address_space_update_topology(as);
  2439. address_space_update_ioeventfds(as);
  2440. }
  2441. static void do_address_space_destroy(AddressSpace *as)
  2442. {
  2443. assert(QTAILQ_EMPTY(&as->listeners));
  2444. flatview_unref(as->current_map);
  2445. g_free(as->name);
  2446. g_free(as->ioeventfds);
  2447. memory_region_unref(as->root);
  2448. }
  2449. void address_space_destroy(AddressSpace *as)
  2450. {
  2451. MemoryRegion *root = as->root;
  2452. /* Flush out anything from MemoryListeners listening in on this */
  2453. memory_region_transaction_begin();
  2454. as->root = NULL;
  2455. memory_region_transaction_commit();
  2456. QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
  2457. /* At this point, as->dispatch and as->current_map are dummy
  2458. * entries that the guest should never use. Wait for the old
  2459. * values to expire before freeing the data.
  2460. */
  2461. as->root = root;
  2462. call_rcu(as, do_address_space_destroy, rcu);
  2463. }
  2464. static const char *memory_region_type(MemoryRegion *mr)
  2465. {
  2466. if (memory_region_is_ram_device(mr)) {
  2467. return "ramd";
  2468. } else if (memory_region_is_romd(mr)) {
  2469. return "romd";
  2470. } else if (memory_region_is_rom(mr)) {
  2471. return "rom";
  2472. } else if (memory_region_is_ram(mr)) {
  2473. return "ram";
  2474. } else {
  2475. return "i/o";
  2476. }
  2477. }
  2478. typedef struct MemoryRegionList MemoryRegionList;
  2479. struct MemoryRegionList {
  2480. const MemoryRegion *mr;
  2481. QTAILQ_ENTRY(MemoryRegionList) mrqueue;
  2482. };
  2483. typedef QTAILQ_HEAD(, MemoryRegionList) MemoryRegionListHead;
  2484. #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
  2485. int128_sub((size), int128_one())) : 0)
  2486. #define MTREE_INDENT " "
  2487. static void mtree_expand_owner(const char *label, Object *obj)
  2488. {
  2489. DeviceState *dev = (DeviceState *) object_dynamic_cast(obj, TYPE_DEVICE);
  2490. qemu_printf(" %s:{%s", label, dev ? "dev" : "obj");
  2491. if (dev && dev->id) {
  2492. qemu_printf(" id=%s", dev->id);
  2493. } else {
  2494. gchar *canonical_path = object_get_canonical_path(obj);
  2495. if (canonical_path) {
  2496. qemu_printf(" path=%s", canonical_path);
  2497. g_free(canonical_path);
  2498. } else {
  2499. qemu_printf(" type=%s", object_get_typename(obj));
  2500. }
  2501. }
  2502. qemu_printf("}");
  2503. }
  2504. static void mtree_print_mr_owner(const MemoryRegion *mr)
  2505. {
  2506. Object *owner = mr->owner;
  2507. Object *parent = memory_region_owner((MemoryRegion *)mr);
  2508. if (!owner && !parent) {
  2509. qemu_printf(" orphan");
  2510. return;
  2511. }
  2512. if (owner) {
  2513. mtree_expand_owner("owner", owner);
  2514. }
  2515. if (parent && parent != owner) {
  2516. mtree_expand_owner("parent", parent);
  2517. }
  2518. }
  2519. static void mtree_print_mr(const MemoryRegion *mr, unsigned int level,
  2520. hwaddr base,
  2521. MemoryRegionListHead *alias_print_queue,
  2522. bool owner)
  2523. {
  2524. MemoryRegionList *new_ml, *ml, *next_ml;
  2525. MemoryRegionListHead submr_print_queue;
  2526. const MemoryRegion *submr;
  2527. unsigned int i;
  2528. hwaddr cur_start, cur_end;
  2529. if (!mr) {
  2530. return;
  2531. }
  2532. for (i = 0; i < level; i++) {
  2533. qemu_printf(MTREE_INDENT);
  2534. }
  2535. cur_start = base + mr->addr;
  2536. cur_end = cur_start + MR_SIZE(mr->size);
  2537. /*
  2538. * Try to detect overflow of memory region. This should never
  2539. * happen normally. When it happens, we dump something to warn the
  2540. * user who is observing this.
  2541. */
  2542. if (cur_start < base || cur_end < cur_start) {
  2543. qemu_printf("[DETECTED OVERFLOW!] ");
  2544. }
  2545. if (mr->alias) {
  2546. MemoryRegionList *ml;
  2547. bool found = false;
  2548. /* check if the alias is already in the queue */
  2549. QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) {
  2550. if (ml->mr == mr->alias) {
  2551. found = true;
  2552. }
  2553. }
  2554. if (!found) {
  2555. ml = g_new(MemoryRegionList, 1);
  2556. ml->mr = mr->alias;
  2557. QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue);
  2558. }
  2559. qemu_printf(TARGET_FMT_plx "-" TARGET_FMT_plx
  2560. " (prio %d, %s%s): alias %s @%s " TARGET_FMT_plx
  2561. "-" TARGET_FMT_plx "%s",
  2562. cur_start, cur_end,
  2563. mr->priority,
  2564. mr->nonvolatile ? "nv-" : "",
  2565. memory_region_type((MemoryRegion *)mr),
  2566. memory_region_name(mr),
  2567. memory_region_name(mr->alias),
  2568. mr->alias_offset,
  2569. mr->alias_offset + MR_SIZE(mr->size),
  2570. mr->enabled ? "" : " [disabled]");
  2571. if (owner) {
  2572. mtree_print_mr_owner(mr);
  2573. }
  2574. } else {
  2575. qemu_printf(TARGET_FMT_plx "-" TARGET_FMT_plx
  2576. " (prio %d, %s%s): %s%s",
  2577. cur_start, cur_end,
  2578. mr->priority,
  2579. mr->nonvolatile ? "nv-" : "",
  2580. memory_region_type((MemoryRegion *)mr),
  2581. memory_region_name(mr),
  2582. mr->enabled ? "" : " [disabled]");
  2583. if (owner) {
  2584. mtree_print_mr_owner(mr);
  2585. }
  2586. }
  2587. qemu_printf("\n");
  2588. QTAILQ_INIT(&submr_print_queue);
  2589. QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
  2590. new_ml = g_new(MemoryRegionList, 1);
  2591. new_ml->mr = submr;
  2592. QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
  2593. if (new_ml->mr->addr < ml->mr->addr ||
  2594. (new_ml->mr->addr == ml->mr->addr &&
  2595. new_ml->mr->priority > ml->mr->priority)) {
  2596. QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue);
  2597. new_ml = NULL;
  2598. break;
  2599. }
  2600. }
  2601. if (new_ml) {
  2602. QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue);
  2603. }
  2604. }
  2605. QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
  2606. mtree_print_mr(ml->mr, level + 1, cur_start,
  2607. alias_print_queue, owner);
  2608. }
  2609. QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) {
  2610. g_free(ml);
  2611. }
  2612. }
  2613. struct FlatViewInfo {
  2614. int counter;
  2615. bool dispatch_tree;
  2616. bool owner;
  2617. AccelClass *ac;
  2618. const char *ac_name;
  2619. };
  2620. static void mtree_print_flatview(gpointer key, gpointer value,
  2621. gpointer user_data)
  2622. {
  2623. FlatView *view = key;
  2624. GArray *fv_address_spaces = value;
  2625. struct FlatViewInfo *fvi = user_data;
  2626. FlatRange *range = &view->ranges[0];
  2627. MemoryRegion *mr;
  2628. int n = view->nr;
  2629. int i;
  2630. AddressSpace *as;
  2631. qemu_printf("FlatView #%d\n", fvi->counter);
  2632. ++fvi->counter;
  2633. for (i = 0; i < fv_address_spaces->len; ++i) {
  2634. as = g_array_index(fv_address_spaces, AddressSpace*, i);
  2635. qemu_printf(" AS \"%s\", root: %s",
  2636. as->name, memory_region_name(as->root));
  2637. if (as->root->alias) {
  2638. qemu_printf(", alias %s", memory_region_name(as->root->alias));
  2639. }
  2640. qemu_printf("\n");
  2641. }
  2642. qemu_printf(" Root memory region: %s\n",
  2643. view->root ? memory_region_name(view->root) : "(none)");
  2644. if (n <= 0) {
  2645. qemu_printf(MTREE_INDENT "No rendered FlatView\n\n");
  2646. return;
  2647. }
  2648. while (n--) {
  2649. mr = range->mr;
  2650. if (range->offset_in_region) {
  2651. qemu_printf(MTREE_INDENT TARGET_FMT_plx "-" TARGET_FMT_plx
  2652. " (prio %d, %s%s): %s @" TARGET_FMT_plx,
  2653. int128_get64(range->addr.start),
  2654. int128_get64(range->addr.start)
  2655. + MR_SIZE(range->addr.size),
  2656. mr->priority,
  2657. range->nonvolatile ? "nv-" : "",
  2658. range->readonly ? "rom" : memory_region_type(mr),
  2659. memory_region_name(mr),
  2660. range->offset_in_region);
  2661. } else {
  2662. qemu_printf(MTREE_INDENT TARGET_FMT_plx "-" TARGET_FMT_plx
  2663. " (prio %d, %s%s): %s",
  2664. int128_get64(range->addr.start),
  2665. int128_get64(range->addr.start)
  2666. + MR_SIZE(range->addr.size),
  2667. mr->priority,
  2668. range->nonvolatile ? "nv-" : "",
  2669. range->readonly ? "rom" : memory_region_type(mr),
  2670. memory_region_name(mr));
  2671. }
  2672. if (fvi->owner) {
  2673. mtree_print_mr_owner(mr);
  2674. }
  2675. if (fvi->ac) {
  2676. for (i = 0; i < fv_address_spaces->len; ++i) {
  2677. as = g_array_index(fv_address_spaces, AddressSpace*, i);
  2678. if (fvi->ac->has_memory(current_machine, as,
  2679. int128_get64(range->addr.start),
  2680. MR_SIZE(range->addr.size) + 1)) {
  2681. qemu_printf(" %s", fvi->ac_name);
  2682. }
  2683. }
  2684. }
  2685. qemu_printf("\n");
  2686. range++;
  2687. }
  2688. #if !defined(CONFIG_USER_ONLY)
  2689. if (fvi->dispatch_tree && view->root) {
  2690. mtree_print_dispatch(view->dispatch, view->root);
  2691. }
  2692. #endif
  2693. qemu_printf("\n");
  2694. }
  2695. static gboolean mtree_info_flatview_free(gpointer key, gpointer value,
  2696. gpointer user_data)
  2697. {
  2698. FlatView *view = key;
  2699. GArray *fv_address_spaces = value;
  2700. g_array_unref(fv_address_spaces);
  2701. flatview_unref(view);
  2702. return true;
  2703. }
  2704. void mtree_info(bool flatview, bool dispatch_tree, bool owner)
  2705. {
  2706. MemoryRegionListHead ml_head;
  2707. MemoryRegionList *ml, *ml2;
  2708. AddressSpace *as;
  2709. if (flatview) {
  2710. FlatView *view;
  2711. struct FlatViewInfo fvi = {
  2712. .counter = 0,
  2713. .dispatch_tree = dispatch_tree,
  2714. .owner = owner,
  2715. };
  2716. GArray *fv_address_spaces;
  2717. GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
  2718. AccelClass *ac = ACCEL_GET_CLASS(current_machine->accelerator);
  2719. if (ac->has_memory) {
  2720. fvi.ac = ac;
  2721. fvi.ac_name = current_machine->accel ? current_machine->accel :
  2722. object_class_get_name(OBJECT_CLASS(ac));
  2723. }
  2724. /* Gather all FVs in one table */
  2725. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  2726. view = address_space_get_flatview(as);
  2727. fv_address_spaces = g_hash_table_lookup(views, view);
  2728. if (!fv_address_spaces) {
  2729. fv_address_spaces = g_array_new(false, false, sizeof(as));
  2730. g_hash_table_insert(views, view, fv_address_spaces);
  2731. }
  2732. g_array_append_val(fv_address_spaces, as);
  2733. }
  2734. /* Print */
  2735. g_hash_table_foreach(views, mtree_print_flatview, &fvi);
  2736. /* Free */
  2737. g_hash_table_foreach_remove(views, mtree_info_flatview_free, 0);
  2738. g_hash_table_unref(views);
  2739. return;
  2740. }
  2741. QTAILQ_INIT(&ml_head);
  2742. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  2743. qemu_printf("address-space: %s\n", as->name);
  2744. mtree_print_mr(as->root, 1, 0, &ml_head, owner);
  2745. qemu_printf("\n");
  2746. }
  2747. /* print aliased regions */
  2748. QTAILQ_FOREACH(ml, &ml_head, mrqueue) {
  2749. qemu_printf("memory-region: %s\n", memory_region_name(ml->mr));
  2750. mtree_print_mr(ml->mr, 1, 0, &ml_head, owner);
  2751. qemu_printf("\n");
  2752. }
  2753. QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) {
  2754. g_free(ml);
  2755. }
  2756. }
  2757. void memory_region_init_ram(MemoryRegion *mr,
  2758. struct Object *owner,
  2759. const char *name,
  2760. uint64_t size,
  2761. Error **errp)
  2762. {
  2763. DeviceState *owner_dev;
  2764. Error *err = NULL;
  2765. memory_region_init_ram_nomigrate(mr, owner, name, size, &err);
  2766. if (err) {
  2767. error_propagate(errp, err);
  2768. return;
  2769. }
  2770. /* This will assert if owner is neither NULL nor a DeviceState.
  2771. * We only want the owner here for the purposes of defining a
  2772. * unique name for migration. TODO: Ideally we should implement
  2773. * a naming scheme for Objects which are not DeviceStates, in
  2774. * which case we can relax this restriction.
  2775. */
  2776. owner_dev = DEVICE(owner);
  2777. vmstate_register_ram(mr, owner_dev);
  2778. }
  2779. void memory_region_init_rom(MemoryRegion *mr,
  2780. struct Object *owner,
  2781. const char *name,
  2782. uint64_t size,
  2783. Error **errp)
  2784. {
  2785. DeviceState *owner_dev;
  2786. Error *err = NULL;
  2787. memory_region_init_rom_nomigrate(mr, owner, name, size, &err);
  2788. if (err) {
  2789. error_propagate(errp, err);
  2790. return;
  2791. }
  2792. /* This will assert if owner is neither NULL nor a DeviceState.
  2793. * We only want the owner here for the purposes of defining a
  2794. * unique name for migration. TODO: Ideally we should implement
  2795. * a naming scheme for Objects which are not DeviceStates, in
  2796. * which case we can relax this restriction.
  2797. */
  2798. owner_dev = DEVICE(owner);
  2799. vmstate_register_ram(mr, owner_dev);
  2800. }
  2801. void memory_region_init_rom_device(MemoryRegion *mr,
  2802. struct Object *owner,
  2803. const MemoryRegionOps *ops,
  2804. void *opaque,
  2805. const char *name,
  2806. uint64_t size,
  2807. Error **errp)
  2808. {
  2809. DeviceState *owner_dev;
  2810. Error *err = NULL;
  2811. memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
  2812. name, size, &err);
  2813. if (err) {
  2814. error_propagate(errp, err);
  2815. return;
  2816. }
  2817. /* This will assert if owner is neither NULL nor a DeviceState.
  2818. * We only want the owner here for the purposes of defining a
  2819. * unique name for migration. TODO: Ideally we should implement
  2820. * a naming scheme for Objects which are not DeviceStates, in
  2821. * which case we can relax this restriction.
  2822. */
  2823. owner_dev = DEVICE(owner);
  2824. vmstate_register_ram(mr, owner_dev);
  2825. }
  2826. static const TypeInfo memory_region_info = {
  2827. .parent = TYPE_OBJECT,
  2828. .name = TYPE_MEMORY_REGION,
  2829. .class_size = sizeof(MemoryRegionClass),
  2830. .instance_size = sizeof(MemoryRegion),
  2831. .instance_init = memory_region_initfn,
  2832. .instance_finalize = memory_region_finalize,
  2833. };
  2834. static const TypeInfo iommu_memory_region_info = {
  2835. .parent = TYPE_MEMORY_REGION,
  2836. .name = TYPE_IOMMU_MEMORY_REGION,
  2837. .class_size = sizeof(IOMMUMemoryRegionClass),
  2838. .instance_size = sizeof(IOMMUMemoryRegion),
  2839. .instance_init = iommu_memory_region_initfn,
  2840. .abstract = true,
  2841. };
  2842. static void memory_register_types(void)
  2843. {
  2844. type_register_static(&memory_region_info);
  2845. type_register_static(&iommu_memory_region_info);
  2846. }
  2847. type_init(memory_register_types)