You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.

qtest.c 21KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781
  1. /*
  2. * Test Server
  3. *
  4. * Copyright IBM, Corp. 2011
  5. *
  6. * Authors:
  7. * Anthony Liguori <aliguori@us.ibm.com>
  8. *
  9. * This work is licensed under the terms of the GNU GPL, version 2 or later.
  10. * See the COPYING file in the top-level directory.
  11. *
  12. */
  13. #include "qemu/osdep.h"
  14. #include "qapi/error.h"
  15. #include "cpu.h"
  16. #include "sysemu/qtest.h"
  17. #include "sysemu/runstate.h"
  18. #include "chardev/char-fe.h"
  19. #include "exec/ioport.h"
  20. #include "exec/memory.h"
  21. #include "hw/irq.h"
  22. #include "sysemu/accel.h"
  23. #include "sysemu/cpus.h"
  24. #include "qemu/config-file.h"
  25. #include "qemu/option.h"
  26. #include "qemu/error-report.h"
  27. #include "qemu/module.h"
  28. #include "qemu/cutils.h"
  29. #ifdef TARGET_PPC64
  30. #include "hw/ppc/spapr_rtas.h"
  31. #endif
  32. #define MAX_IRQ 256
  33. bool qtest_allowed;
  34. static DeviceState *irq_intercept_dev;
  35. static FILE *qtest_log_fp;
  36. static CharBackend qtest_chr;
  37. static GString *inbuf;
  38. static int irq_levels[MAX_IRQ];
  39. static qemu_timeval start_time;
  40. static bool qtest_opened;
  41. #define FMT_timeval "%ld.%06ld"
  42. /**
  43. * QTest Protocol
  44. *
  45. * Line based protocol, request/response based. Server can send async messages
  46. * so clients should always handle many async messages before the response
  47. * comes in.
  48. *
  49. * Valid requests
  50. *
  51. * Clock management:
  52. *
  53. * The qtest client is completely in charge of the QEMU_CLOCK_VIRTUAL. qtest commands
  54. * let you adjust the value of the clock (monotonically). All the commands
  55. * return the current value of the clock in nanoseconds.
  56. *
  57. * > clock_step
  58. * < OK VALUE
  59. *
  60. * Advance the clock to the next deadline. Useful when waiting for
  61. * asynchronous events.
  62. *
  63. * > clock_step NS
  64. * < OK VALUE
  65. *
  66. * Advance the clock by NS nanoseconds.
  67. *
  68. * > clock_set NS
  69. * < OK VALUE
  70. *
  71. * Advance the clock to NS nanoseconds (do nothing if it's already past).
  72. *
  73. * PIO and memory access:
  74. *
  75. * > outb ADDR VALUE
  76. * < OK
  77. *
  78. * > outw ADDR VALUE
  79. * < OK
  80. *
  81. * > outl ADDR VALUE
  82. * < OK
  83. *
  84. * > inb ADDR
  85. * < OK VALUE
  86. *
  87. * > inw ADDR
  88. * < OK VALUE
  89. *
  90. * > inl ADDR
  91. * < OK VALUE
  92. *
  93. * > writeb ADDR VALUE
  94. * < OK
  95. *
  96. * > writew ADDR VALUE
  97. * < OK
  98. *
  99. * > writel ADDR VALUE
  100. * < OK
  101. *
  102. * > writeq ADDR VALUE
  103. * < OK
  104. *
  105. * > readb ADDR
  106. * < OK VALUE
  107. *
  108. * > readw ADDR
  109. * < OK VALUE
  110. *
  111. * > readl ADDR
  112. * < OK VALUE
  113. *
  114. * > readq ADDR
  115. * < OK VALUE
  116. *
  117. * > read ADDR SIZE
  118. * < OK DATA
  119. *
  120. * > write ADDR SIZE DATA
  121. * < OK
  122. *
  123. * > b64read ADDR SIZE
  124. * < OK B64_DATA
  125. *
  126. * > b64write ADDR SIZE B64_DATA
  127. * < OK
  128. *
  129. * > memset ADDR SIZE VALUE
  130. * < OK
  131. *
  132. * ADDR, SIZE, VALUE are all integers parsed with strtoul() with a base of 0.
  133. * For 'memset' a zero size is permitted and does nothing.
  134. *
  135. * DATA is an arbitrarily long hex number prefixed with '0x'. If it's smaller
  136. * than the expected size, the value will be zero filled at the end of the data
  137. * sequence.
  138. *
  139. * B64_DATA is an arbitrarily long base64 encoded string.
  140. * If the sizes do not match, the data will be truncated.
  141. *
  142. * IRQ management:
  143. *
  144. * > irq_intercept_in QOM-PATH
  145. * < OK
  146. *
  147. * > irq_intercept_out QOM-PATH
  148. * < OK
  149. *
  150. * Attach to the gpio-in (resp. gpio-out) pins exported by the device at
  151. * QOM-PATH. When the pin is triggered, one of the following async messages
  152. * will be printed to the qtest stream:
  153. *
  154. * IRQ raise NUM
  155. * IRQ lower NUM
  156. *
  157. * where NUM is an IRQ number. For the PC, interrupts can be intercepted
  158. * simply with "irq_intercept_in ioapic" (note that IRQ0 comes out with
  159. * NUM=0 even though it is remapped to GSI 2).
  160. *
  161. * Setting interrupt level:
  162. *
  163. * > set_irq_in QOM-PATH NAME NUM LEVEL
  164. * < OK
  165. *
  166. * where NAME is the name of the irq/gpio list, NUM is an IRQ number and
  167. * LEVEL is an signed integer IRQ level.
  168. *
  169. * Forcibly set the given interrupt pin to the given level.
  170. *
  171. */
  172. static int hex2nib(char ch)
  173. {
  174. if (ch >= '0' && ch <= '9') {
  175. return ch - '0';
  176. } else if (ch >= 'a' && ch <= 'f') {
  177. return 10 + (ch - 'a');
  178. } else if (ch >= 'A' && ch <= 'F') {
  179. return 10 + (ch - 'A');
  180. } else {
  181. return -1;
  182. }
  183. }
  184. static void qtest_get_time(qemu_timeval *tv)
  185. {
  186. qemu_gettimeofday(tv);
  187. tv->tv_sec -= start_time.tv_sec;
  188. tv->tv_usec -= start_time.tv_usec;
  189. if (tv->tv_usec < 0) {
  190. tv->tv_usec += 1000000;
  191. tv->tv_sec -= 1;
  192. }
  193. }
  194. static void qtest_send_prefix(CharBackend *chr)
  195. {
  196. qemu_timeval tv;
  197. if (!qtest_log_fp || !qtest_opened) {
  198. return;
  199. }
  200. qtest_get_time(&tv);
  201. fprintf(qtest_log_fp, "[S +" FMT_timeval "] ",
  202. (long) tv.tv_sec, (long) tv.tv_usec);
  203. }
  204. static void GCC_FMT_ATTR(1, 2) qtest_log_send(const char *fmt, ...)
  205. {
  206. va_list ap;
  207. if (!qtest_log_fp || !qtest_opened) {
  208. return;
  209. }
  210. qtest_send_prefix(NULL);
  211. va_start(ap, fmt);
  212. vfprintf(qtest_log_fp, fmt, ap);
  213. va_end(ap);
  214. }
  215. static void do_qtest_send(CharBackend *chr, const char *str, size_t len)
  216. {
  217. qemu_chr_fe_write_all(chr, (uint8_t *)str, len);
  218. if (qtest_log_fp && qtest_opened) {
  219. fprintf(qtest_log_fp, "%s", str);
  220. }
  221. }
  222. static void qtest_send(CharBackend *chr, const char *str)
  223. {
  224. do_qtest_send(chr, str, strlen(str));
  225. }
  226. static void GCC_FMT_ATTR(2, 3) qtest_sendf(CharBackend *chr,
  227. const char *fmt, ...)
  228. {
  229. va_list ap;
  230. gchar *buffer;
  231. va_start(ap, fmt);
  232. buffer = g_strdup_vprintf(fmt, ap);
  233. qtest_send(chr, buffer);
  234. g_free(buffer);
  235. va_end(ap);
  236. }
  237. static void qtest_irq_handler(void *opaque, int n, int level)
  238. {
  239. qemu_irq old_irq = *(qemu_irq *)opaque;
  240. qemu_set_irq(old_irq, level);
  241. if (irq_levels[n] != level) {
  242. CharBackend *chr = &qtest_chr;
  243. irq_levels[n] = level;
  244. qtest_send_prefix(chr);
  245. qtest_sendf(chr, "IRQ %s %d\n",
  246. level ? "raise" : "lower", n);
  247. }
  248. }
  249. static void qtest_process_command(CharBackend *chr, gchar **words)
  250. {
  251. const gchar *command;
  252. g_assert(words);
  253. command = words[0];
  254. if (qtest_log_fp) {
  255. qemu_timeval tv;
  256. int i;
  257. qtest_get_time(&tv);
  258. fprintf(qtest_log_fp, "[R +" FMT_timeval "]",
  259. (long) tv.tv_sec, (long) tv.tv_usec);
  260. for (i = 0; words[i]; i++) {
  261. fprintf(qtest_log_fp, " %s", words[i]);
  262. }
  263. fprintf(qtest_log_fp, "\n");
  264. }
  265. g_assert(command);
  266. if (strcmp(words[0], "irq_intercept_out") == 0
  267. || strcmp(words[0], "irq_intercept_in") == 0) {
  268. DeviceState *dev;
  269. NamedGPIOList *ngl;
  270. g_assert(words[1]);
  271. dev = DEVICE(object_resolve_path(words[1], NULL));
  272. if (!dev) {
  273. qtest_send_prefix(chr);
  274. qtest_send(chr, "FAIL Unknown device\n");
  275. return;
  276. }
  277. if (irq_intercept_dev) {
  278. qtest_send_prefix(chr);
  279. if (irq_intercept_dev != dev) {
  280. qtest_send(chr, "FAIL IRQ intercept already enabled\n");
  281. } else {
  282. qtest_send(chr, "OK\n");
  283. }
  284. return;
  285. }
  286. QLIST_FOREACH(ngl, &dev->gpios, node) {
  287. /* We don't support intercept of named GPIOs yet */
  288. if (ngl->name) {
  289. continue;
  290. }
  291. if (words[0][14] == 'o') {
  292. int i;
  293. for (i = 0; i < ngl->num_out; ++i) {
  294. qemu_irq *disconnected = g_new0(qemu_irq, 1);
  295. qemu_irq icpt = qemu_allocate_irq(qtest_irq_handler,
  296. disconnected, i);
  297. *disconnected = qdev_intercept_gpio_out(dev, icpt,
  298. ngl->name, i);
  299. }
  300. } else {
  301. qemu_irq_intercept_in(ngl->in, qtest_irq_handler,
  302. ngl->num_in);
  303. }
  304. }
  305. irq_intercept_dev = dev;
  306. qtest_send_prefix(chr);
  307. qtest_send(chr, "OK\n");
  308. } else if (strcmp(words[0], "set_irq_in") == 0) {
  309. DeviceState *dev;
  310. qemu_irq irq;
  311. char *name;
  312. int ret;
  313. int num;
  314. int level;
  315. g_assert(words[1] && words[2] && words[3] && words[4]);
  316. dev = DEVICE(object_resolve_path(words[1], NULL));
  317. if (!dev) {
  318. qtest_send_prefix(chr);
  319. qtest_send(chr, "FAIL Unknown device\n");
  320. return;
  321. }
  322. if (strcmp(words[2], "unnamed-gpio-in") == 0) {
  323. name = NULL;
  324. } else {
  325. name = words[2];
  326. }
  327. ret = qemu_strtoi(words[3], NULL, 0, &num);
  328. g_assert(!ret);
  329. ret = qemu_strtoi(words[4], NULL, 0, &level);
  330. g_assert(!ret);
  331. irq = qdev_get_gpio_in_named(dev, name, num);
  332. qemu_set_irq(irq, level);
  333. qtest_send_prefix(chr);
  334. qtest_send(chr, "OK\n");
  335. } else if (strcmp(words[0], "outb") == 0 ||
  336. strcmp(words[0], "outw") == 0 ||
  337. strcmp(words[0], "outl") == 0) {
  338. unsigned long addr;
  339. unsigned long value;
  340. int ret;
  341. g_assert(words[1] && words[2]);
  342. ret = qemu_strtoul(words[1], NULL, 0, &addr);
  343. g_assert(ret == 0);
  344. ret = qemu_strtoul(words[2], NULL, 0, &value);
  345. g_assert(ret == 0);
  346. g_assert(addr <= 0xffff);
  347. if (words[0][3] == 'b') {
  348. cpu_outb(addr, value);
  349. } else if (words[0][3] == 'w') {
  350. cpu_outw(addr, value);
  351. } else if (words[0][3] == 'l') {
  352. cpu_outl(addr, value);
  353. }
  354. qtest_send_prefix(chr);
  355. qtest_send(chr, "OK\n");
  356. } else if (strcmp(words[0], "inb") == 0 ||
  357. strcmp(words[0], "inw") == 0 ||
  358. strcmp(words[0], "inl") == 0) {
  359. unsigned long addr;
  360. uint32_t value = -1U;
  361. int ret;
  362. g_assert(words[1]);
  363. ret = qemu_strtoul(words[1], NULL, 0, &addr);
  364. g_assert(ret == 0);
  365. g_assert(addr <= 0xffff);
  366. if (words[0][2] == 'b') {
  367. value = cpu_inb(addr);
  368. } else if (words[0][2] == 'w') {
  369. value = cpu_inw(addr);
  370. } else if (words[0][2] == 'l') {
  371. value = cpu_inl(addr);
  372. }
  373. qtest_send_prefix(chr);
  374. qtest_sendf(chr, "OK 0x%04x\n", value);
  375. } else if (strcmp(words[0], "writeb") == 0 ||
  376. strcmp(words[0], "writew") == 0 ||
  377. strcmp(words[0], "writel") == 0 ||
  378. strcmp(words[0], "writeq") == 0) {
  379. uint64_t addr;
  380. uint64_t value;
  381. int ret;
  382. g_assert(words[1] && words[2]);
  383. ret = qemu_strtou64(words[1], NULL, 0, &addr);
  384. g_assert(ret == 0);
  385. ret = qemu_strtou64(words[2], NULL, 0, &value);
  386. g_assert(ret == 0);
  387. if (words[0][5] == 'b') {
  388. uint8_t data = value;
  389. address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
  390. &data, 1, true);
  391. } else if (words[0][5] == 'w') {
  392. uint16_t data = value;
  393. tswap16s(&data);
  394. address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
  395. (uint8_t *) &data, 2, true);
  396. } else if (words[0][5] == 'l') {
  397. uint32_t data = value;
  398. tswap32s(&data);
  399. address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
  400. (uint8_t *) &data, 4, true);
  401. } else if (words[0][5] == 'q') {
  402. uint64_t data = value;
  403. tswap64s(&data);
  404. address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
  405. (uint8_t *) &data, 8, true);
  406. }
  407. qtest_send_prefix(chr);
  408. qtest_send(chr, "OK\n");
  409. } else if (strcmp(words[0], "readb") == 0 ||
  410. strcmp(words[0], "readw") == 0 ||
  411. strcmp(words[0], "readl") == 0 ||
  412. strcmp(words[0], "readq") == 0) {
  413. uint64_t addr;
  414. uint64_t value = UINT64_C(-1);
  415. int ret;
  416. g_assert(words[1]);
  417. ret = qemu_strtou64(words[1], NULL, 0, &addr);
  418. g_assert(ret == 0);
  419. if (words[0][4] == 'b') {
  420. uint8_t data;
  421. address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
  422. &data, 1, false);
  423. value = data;
  424. } else if (words[0][4] == 'w') {
  425. uint16_t data;
  426. address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
  427. (uint8_t *) &data, 2, false);
  428. value = tswap16(data);
  429. } else if (words[0][4] == 'l') {
  430. uint32_t data;
  431. address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
  432. (uint8_t *) &data, 4, false);
  433. value = tswap32(data);
  434. } else if (words[0][4] == 'q') {
  435. address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
  436. (uint8_t *) &value, 8, false);
  437. tswap64s(&value);
  438. }
  439. qtest_send_prefix(chr);
  440. qtest_sendf(chr, "OK 0x%016" PRIx64 "\n", value);
  441. } else if (strcmp(words[0], "read") == 0) {
  442. uint64_t addr, len, i;
  443. uint8_t *data;
  444. char *enc;
  445. int ret;
  446. g_assert(words[1] && words[2]);
  447. ret = qemu_strtou64(words[1], NULL, 0, &addr);
  448. g_assert(ret == 0);
  449. ret = qemu_strtou64(words[2], NULL, 0, &len);
  450. g_assert(ret == 0);
  451. /* We'd send garbage to libqtest if len is 0 */
  452. g_assert(len);
  453. data = g_malloc(len);
  454. address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
  455. data, len, false);
  456. enc = g_malloc(2 * len + 1);
  457. for (i = 0; i < len; i++) {
  458. sprintf(&enc[i * 2], "%02x", data[i]);
  459. }
  460. qtest_send_prefix(chr);
  461. qtest_sendf(chr, "OK 0x%s\n", enc);
  462. g_free(data);
  463. g_free(enc);
  464. } else if (strcmp(words[0], "b64read") == 0) {
  465. uint64_t addr, len;
  466. uint8_t *data;
  467. gchar *b64_data;
  468. int ret;
  469. g_assert(words[1] && words[2]);
  470. ret = qemu_strtou64(words[1], NULL, 0, &addr);
  471. g_assert(ret == 0);
  472. ret = qemu_strtou64(words[2], NULL, 0, &len);
  473. g_assert(ret == 0);
  474. data = g_malloc(len);
  475. address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
  476. data, len, false);
  477. b64_data = g_base64_encode(data, len);
  478. qtest_send_prefix(chr);
  479. qtest_sendf(chr, "OK %s\n", b64_data);
  480. g_free(data);
  481. g_free(b64_data);
  482. } else if (strcmp(words[0], "write") == 0) {
  483. uint64_t addr, len, i;
  484. uint8_t *data;
  485. size_t data_len;
  486. int ret;
  487. g_assert(words[1] && words[2] && words[3]);
  488. ret = qemu_strtou64(words[1], NULL, 0, &addr);
  489. g_assert(ret == 0);
  490. ret = qemu_strtou64(words[2], NULL, 0, &len);
  491. g_assert(ret == 0);
  492. data_len = strlen(words[3]);
  493. if (data_len < 3) {
  494. qtest_send(chr, "ERR invalid argument size\n");
  495. return;
  496. }
  497. data = g_malloc(len);
  498. for (i = 0; i < len; i++) {
  499. if ((i * 2 + 4) <= data_len) {
  500. data[i] = hex2nib(words[3][i * 2 + 2]) << 4;
  501. data[i] |= hex2nib(words[3][i * 2 + 3]);
  502. } else {
  503. data[i] = 0;
  504. }
  505. }
  506. address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
  507. data, len, true);
  508. g_free(data);
  509. qtest_send_prefix(chr);
  510. qtest_send(chr, "OK\n");
  511. } else if (strcmp(words[0], "memset") == 0) {
  512. uint64_t addr, len;
  513. uint8_t *data;
  514. unsigned long pattern;
  515. int ret;
  516. g_assert(words[1] && words[2] && words[3]);
  517. ret = qemu_strtou64(words[1], NULL, 0, &addr);
  518. g_assert(ret == 0);
  519. ret = qemu_strtou64(words[2], NULL, 0, &len);
  520. g_assert(ret == 0);
  521. ret = qemu_strtoul(words[3], NULL, 0, &pattern);
  522. g_assert(ret == 0);
  523. if (len) {
  524. data = g_malloc(len);
  525. memset(data, pattern, len);
  526. address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
  527. data, len, true);
  528. g_free(data);
  529. }
  530. qtest_send_prefix(chr);
  531. qtest_send(chr, "OK\n");
  532. } else if (strcmp(words[0], "b64write") == 0) {
  533. uint64_t addr, len;
  534. uint8_t *data;
  535. size_t data_len;
  536. gsize out_len;
  537. int ret;
  538. g_assert(words[1] && words[2] && words[3]);
  539. ret = qemu_strtou64(words[1], NULL, 0, &addr);
  540. g_assert(ret == 0);
  541. ret = qemu_strtou64(words[2], NULL, 0, &len);
  542. g_assert(ret == 0);
  543. data_len = strlen(words[3]);
  544. if (data_len < 3) {
  545. qtest_send(chr, "ERR invalid argument size\n");
  546. return;
  547. }
  548. data = g_base64_decode_inplace(words[3], &out_len);
  549. if (out_len != len) {
  550. qtest_log_send("b64write: data length mismatch (told %"PRIu64", "
  551. "found %zu)\n",
  552. len, out_len);
  553. out_len = MIN(out_len, len);
  554. }
  555. address_space_rw(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED,
  556. data, len, true);
  557. qtest_send_prefix(chr);
  558. qtest_send(chr, "OK\n");
  559. } else if (strcmp(words[0], "endianness") == 0) {
  560. qtest_send_prefix(chr);
  561. #if defined(TARGET_WORDS_BIGENDIAN)
  562. qtest_sendf(chr, "OK big\n");
  563. #else
  564. qtest_sendf(chr, "OK little\n");
  565. #endif
  566. #ifdef TARGET_PPC64
  567. } else if (strcmp(words[0], "rtas") == 0) {
  568. uint64_t res, args, ret;
  569. unsigned long nargs, nret;
  570. int rc;
  571. rc = qemu_strtoul(words[2], NULL, 0, &nargs);
  572. g_assert(rc == 0);
  573. rc = qemu_strtou64(words[3], NULL, 0, &args);
  574. g_assert(rc == 0);
  575. rc = qemu_strtoul(words[4], NULL, 0, &nret);
  576. g_assert(rc == 0);
  577. rc = qemu_strtou64(words[5], NULL, 0, &ret);
  578. g_assert(rc == 0);
  579. res = qtest_rtas_call(words[1], nargs, args, nret, ret);
  580. qtest_send_prefix(chr);
  581. qtest_sendf(chr, "OK %"PRIu64"\n", res);
  582. #endif
  583. } else if (qtest_enabled() && strcmp(words[0], "clock_step") == 0) {
  584. int64_t ns;
  585. if (words[1]) {
  586. int ret = qemu_strtoi64(words[1], NULL, 0, &ns);
  587. g_assert(ret == 0);
  588. } else {
  589. ns = qemu_clock_deadline_ns_all(QEMU_CLOCK_VIRTUAL);
  590. }
  591. qtest_clock_warp(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + ns);
  592. qtest_send_prefix(chr);
  593. qtest_sendf(chr, "OK %"PRIi64"\n",
  594. (int64_t)qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
  595. } else if (qtest_enabled() && strcmp(words[0], "clock_set") == 0) {
  596. int64_t ns;
  597. int ret;
  598. g_assert(words[1]);
  599. ret = qemu_strtoi64(words[1], NULL, 0, &ns);
  600. g_assert(ret == 0);
  601. qtest_clock_warp(ns);
  602. qtest_send_prefix(chr);
  603. qtest_sendf(chr, "OK %"PRIi64"\n",
  604. (int64_t)qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
  605. } else {
  606. qtest_send_prefix(chr);
  607. qtest_sendf(chr, "FAIL Unknown command '%s'\n", words[0]);
  608. }
  609. }
  610. static void qtest_process_inbuf(CharBackend *chr, GString *inbuf)
  611. {
  612. char *end;
  613. while ((end = strchr(inbuf->str, '\n')) != NULL) {
  614. size_t offset;
  615. GString *cmd;
  616. gchar **words;
  617. offset = end - inbuf->str;
  618. cmd = g_string_new_len(inbuf->str, offset);
  619. g_string_erase(inbuf, 0, offset + 1);
  620. words = g_strsplit(cmd->str, " ", 0);
  621. qtest_process_command(chr, words);
  622. g_strfreev(words);
  623. g_string_free(cmd, TRUE);
  624. }
  625. }
  626. static void qtest_read(void *opaque, const uint8_t *buf, int size)
  627. {
  628. CharBackend *chr = opaque;
  629. g_string_append_len(inbuf, (const gchar *)buf, size);
  630. qtest_process_inbuf(chr, inbuf);
  631. }
  632. static int qtest_can_read(void *opaque)
  633. {
  634. return 1024;
  635. }
  636. static void qtest_event(void *opaque, int event)
  637. {
  638. int i;
  639. switch (event) {
  640. case CHR_EVENT_OPENED:
  641. /*
  642. * We used to call qemu_system_reset() here, hoping we could
  643. * use the same process for multiple tests that way. Never
  644. * used. Injects an extra reset even when it's not used, and
  645. * that can mess up tests, e.g. -boot once.
  646. */
  647. for (i = 0; i < ARRAY_SIZE(irq_levels); i++) {
  648. irq_levels[i] = 0;
  649. }
  650. qemu_gettimeofday(&start_time);
  651. qtest_opened = true;
  652. if (qtest_log_fp) {
  653. fprintf(qtest_log_fp, "[I " FMT_timeval "] OPENED\n",
  654. (long) start_time.tv_sec, (long) start_time.tv_usec);
  655. }
  656. break;
  657. case CHR_EVENT_CLOSED:
  658. qtest_opened = false;
  659. if (qtest_log_fp) {
  660. qemu_timeval tv;
  661. qtest_get_time(&tv);
  662. fprintf(qtest_log_fp, "[I +" FMT_timeval "] CLOSED\n",
  663. (long) tv.tv_sec, (long) tv.tv_usec);
  664. }
  665. break;
  666. default:
  667. break;
  668. }
  669. }
  670. void qtest_server_init(const char *qtest_chrdev, const char *qtest_log, Error **errp)
  671. {
  672. Chardev *chr;
  673. chr = qemu_chr_new("qtest", qtest_chrdev, NULL);
  674. if (chr == NULL) {
  675. error_setg(errp, "Failed to initialize device for qtest: \"%s\"",
  676. qtest_chrdev);
  677. return;
  678. }
  679. if (qtest_log) {
  680. if (strcmp(qtest_log, "none") != 0) {
  681. qtest_log_fp = fopen(qtest_log, "w+");
  682. }
  683. } else {
  684. qtest_log_fp = stderr;
  685. }
  686. qemu_chr_fe_init(&qtest_chr, chr, errp);
  687. qemu_chr_fe_set_handlers(&qtest_chr, qtest_can_read, qtest_read,
  688. qtest_event, NULL, &qtest_chr, NULL, true);
  689. qemu_chr_fe_set_echo(&qtest_chr, true);
  690. inbuf = g_string_new("");
  691. }
  692. bool qtest_driver(void)
  693. {
  694. return qtest_chr.chr != NULL;
  695. }