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63 lines
1.7 KiB
63 lines
1.7 KiB
5 years ago
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#!/bin/bash
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set -x
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# Wt
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cd /home/jebba/devel/FPGA/litex/litex/litex/boards/targets
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rm -rf /home/jebba/devel/FPGA/litex/litex/litex/boards/targets/soc_basesoc_versa_ecp5
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rm -rf /home/jebba/devel/FPGA/litex/litex/litex/boards/targets/soc_ethernetsoc_versa_ecp5
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echo
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echo "NOW BUILDING"
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echo
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# Build .svf
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./versa_ecp5.py \
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--sys-clk-freq=66666666 \
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--gateware-toolchain=trellis \
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--gateware-toolchain-path=/usr/local \
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--cpu-type=vexriscv \
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--cpu-variant=linux+no-dsp \
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--csr-csv=./csr_ecp5versa.csv \
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|| exit
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# If you add/remove ethernet, also need to change .svf below
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# --with-ethernet \
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# --cpu-variant=linux \
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# --cpu-variant=linux+no-dsp \
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# --cpu-type=rocket \
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# --sys-clk-freq=60e6 \
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echo
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echo "NOW FLASHING"
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echo
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openocd \
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-f /home/jebba/devel/FPGA/muh/ecp5-versa5g.cfg \
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-c "transport select jtag; init; svf /home/jebba/devel/FPGA/litex/litex/litex/boards/targets/soc_basesoc_versa_ecp5/gateware/top.svf; exit" \
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|| exit
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# No ethernet
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# XXX UPDATE
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# -c "transport select jtag; init; svf /home/jebba/devel/FPGA/litex/litex/litex/boards/targets/soc_basesoc_versa_ecp5/gateware/top.svf; exit" \
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# With ethernet
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# -c "transport select jtag; init; svf /home/jebba/devel/FPGA/litex/litex-boards/litex_boards/official/targets/soc_ethernetsoc_versa_ecp5/gateware/top.svf; exit" \
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echo "Running:"
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echo "lxterm /dev/ttyUSB1"
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echo "Hit ctrl-c twice to bail"
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echo
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echo "If that lxterm doesn't connect try like this:"
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echo "lxterm /dev/ttyUSB1 --speed=2e6"
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echo
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echo "NOW CONNECTING"
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echo
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#lxterm /dev/ttyUSB1
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echo "no, really gonna try to load a kernel instead:"
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echo "lxterm --images=/home/jebba/devel/FPGA/muh/jeboot.json /dev/ttyUSB1 --no-crc --speed=1e6"
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