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49 lines
1.3 KiB
49 lines
1.3 KiB
5 years ago
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#!/bin/bash
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set -x
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cd ~/devel/FPGA/litex/litex-boards/litex_boards/partner/targets
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./trellisboard.py \
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--with-ethernet \
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--sys-clk-freq=75e6 \
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--gateware-toolchain=trellis \
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--gateware-toolchain-path=/usr/local \
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--cpu-type=vexriscv \
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--cpu-variant=linux+no-dsp \
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--csr-csv=./csr_trellisboard.csv
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exit 0
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openocd \
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-f ~/devel/FPGA/muh/trellisboard.cfg \
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-c "init; svf soc_ethernetsoc_trellisboard/gateware/top.svf ; exit"
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#lxterm /dev/ttyUSB1 --speed=2e6
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#lxterm /dev/ttyUSB1 --speed=1e6
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lxterm /dev/ttyUSB1
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exit 0
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TypeError: __init__() got multiple values for keyword argument 'integrated_rom_size'
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--integrated-rom-size=32768 \
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--integrated-rom-size=1 \
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--integrated-rom-size=0 \
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ValueError: Memory region conflict between main_ram and main_ram
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--integrated-main-ram-size=131072 \
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--integrated-main-ram-size=32768 \
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--integrated-main-ram-size=536870912 \
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--integrated-main-ram-size=10 \
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--integrated-main-ram-size=9 \
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--integrated-main-ram-size=8 \
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assert(min < max)
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--integrated-main-ram-size=1 \
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--integrated-main-ram-size=2 \
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--integrated-main-ram-size=3 \
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--integrated-main-ram-size=4 \
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--integrated-main-ram-size=7 \
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BUILDS:
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--integrated-main-ram-size=0 \
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