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#/bin/bash
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set -x
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cd ~/devel/FPGA/litex/litex/litex/boards/targets
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./versa_ecp5.py
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--gateware-toolchain trellis
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--csr-csv ./csr_ecp5versa.csv
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--with-ethernet
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--sys-clk-freq=60e6
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--cpu-type vexriscv
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--cpu-variant linux
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exit 0
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--cpu-type rocket
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