- PCIe 2.0 x2 card edge connector on two SERDES channels
- Remaining two SERDES channels muxed using high-speed mux:
- 2-lane mini DisplayPort transmit and receive connectors
- or USB type-C connector (with proper CC logic and ULPI PHY for USB 2.0)
- Must have flexible SERDES clocking for a range of protocols with passive adapters (SFP, SATA, etc)
- 1GByte or 2GByte x32 DDR3, either chips or half SODIMM
- Dedicated HDMI output, probably using TFP410 serialiser for a simpler video output than DP
- Dual GbE connectors with RGMII PHYs
- Remaining two SERDES channels on SATA connectors
- 1GByte x32 DDR3 chips
- Dedicated HDMI output, probably using TFP410 serialiser
- 1000BASE-T GbE connector with RGMII PHY
- USB-A 2.0 host connector with ULPI PHY
- 2nd USB-A connector directly connected to FPGA
- FT2232H for debug JTAG and UART/FIFO on second USB type-C connector also used for normal board power (up to 5V 3A)
- Optional PCIe 12V power input connector
- At least 8 user LEDs, 4 user buttons, 4 or 8 user DIP switches
- FT2232H for debug JTAG and UART/FIFO with micro-B connector
- PCIe or external 12V power input
- 12 user LEDs, 4 user buttons, 8 user DIP switches
- 128Mbit QSPI flash for boot and data
- microSD card connector
- Audio I/O with I2S codec
- Dual PMOD connector
- As many remaining IO as possible on high speed FFC connectors with a differential optimised pinout (at least 100-150 IO using this)
- As many remaining IO as possible on high speed FFC connectors with a differential optimised pinout (4x 24 IO + ...). Selectable 1.8V/2.5V/3.3V
## Layout
- PCIe card form factor
- At least Ethernet, 2x miniDP and 2x USB-C on exposed side when in a case used as a PCIe card
- At least Ethernet, USB-A, micro-USB debug and HDMI out
- Other connectors probably would have to be on other sides. FFC connectors probably on top so they can loop over to another card to form a 2-slot card (e.g. with ADCs/DACs for SDR/DAQ)
## Possible accessories using high-speed FFC connectors
David Shah
6 years ago