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2x40 pin connector

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pull/3/head
Davor 8 years ago
parent c52fe53c1e
commit 3a34e66ca9
2 changed files with 371 additions and 289 deletions
Show Stats Download Patch File Download Diff File

332
ulx3s.kicad_pcb
Unescape View File

@ -2,8 +2,8 @@
(general
(links 190)
(no_connects 189)
(area 64.350001 16.5 195.275001 147.935001)
(no_connects 190)
(area 89.124999 36.124999 195.275001 92.275001)
(thickness 1.6)
(drawings 16)
(tracks 6)
@ -112,31 +112,31 @@
(net 16 /gpio/P6)
(net 17 /gpio/P7)
(net 18 /gpio/P8)
(net 19 /gpio/P9)
(net 20 /gpio/P10)
(net 21 /gpio/P11)
(net 22 /gpio/P12)
(net 23 /gpio/P13)
(net 24 /gpio/P14)
(net 25 /gpio/P17)
(net 26 /gpio/P18)
(net 27 /gpio/P19)
(net 28 /gpio/P20)
(net 29 /gpio/P21)
(net 30 /gpio/P22)
(net 31 /gpio/P23)
(net 32 /gpio/P24)
(net 33 /gpio/P25)
(net 34 /gpio/P26)
(net 35 /gpio/P27)
(net 36 /gpio/P28)
(net 37 /gpio/P29)
(net 38 /gpio/P30)
(net 39 /SD_3)
(net 40 /MTMS)
(net 41 /MTCK)
(net 42 /MTDO)
(net 43 /MTDI)
(net 19 /gpio/P11)
(net 20 /gpio/P12)
(net 21 /gpio/P13)
(net 22 /gpio/P14)
(net 23 /gpio/P17)
(net 24 /gpio/P18)
(net 25 /gpio/P19)
(net 26 /gpio/P20)
(net 27 /gpio/P21)
(net 28 /gpio/P22)
(net 29 /gpio/P23)
(net 30 /gpio/P24)
(net 31 /gpio/P25)
(net 32 /gpio/P26)
(net 33 /gpio/P27)
(net 34 /gpio/P28)
(net 35 /gpio/P29)
(net 36 /gpio/P30)
(net 37 /SD_3)
(net 38 /MTMS)
(net 39 /MTCK)
(net 40 /MTDO)
(net 41 /MTDI)
(net 42 /gpio/P15)
(net 43 /gpio/P16)
(net_class Default "This is the default net class."
(clearance 0.2)
@ -158,11 +158,12 @@
(add_net /USB5V)
(add_net /gpio/IN5V)
(add_net /gpio/OUT5V)
(add_net /gpio/P10)
(add_net /gpio/P11)
(add_net /gpio/P12)
(add_net /gpio/P13)
(add_net /gpio/P14)
(add_net /gpio/P15)
(add_net /gpio/P16)
(add_net /gpio/P17)
(add_net /gpio/P18)
(add_net /gpio/P19)
@ -181,7 +182,6 @@
(add_net /gpio/P6)
(add_net /gpio/P7)
(add_net /gpio/P8)
(add_net /gpio/P9)
(add_net "Net-(D4-Pad1)")
(add_net "Net-(HDMI1-PadSHD)")
(add_net "Net-(P1-Pad6)")
@ -224,15 +224,15 @@
(fp_line (start 0 -15.6) (end 0 8.4) (layer B.Fab) (width 0.1524))
(fp_line (start 0 8.4) (end 16 8.4) (layer B.Fab) (width 0.1524))
(pad 9 smd oval (at 2.99 -15.75 90) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask)
(net 42 /MTDO))
(net 40 /MTDO))
(pad 10 smd oval (at 4.99 -15.75 90) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask)
(net 43 /MTDI))
(net 41 /MTDI))
(pad 11 smd oval (at 6.99 -15.75 90) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask)
(net 39 /SD_3))
(net 37 /SD_3))
(pad 12 smd oval (at 8.99 -15.75 90) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask)
(net 40 /MTMS))
(net 38 /MTMS))
(pad 13 smd oval (at 10.99 -15.75 90) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask)
(net 41 /MTCK))
(net 39 /MTCK))
(pad 14 smd oval (at 12.99 -15.75 90) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask))
(pad 1 smd rect (at 0 0 180) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask))
(pad 2 smd oval (at 0 -2 180) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask))
@ -300,7 +300,7 @@
)
(module Connect:USB_Micro-B (layer B.Cu) (tedit 5543E447) (tstamp 56A96317)
(at 93.2 79.2 90)
(at 93.2 73.2 90)
(descr "Micro USB Type B Receptacle")
(tags "USB USB_B USB_micro USB_OTG")
(path /56ACC38E)
@ -397,18 +397,18 @@
(fp_line (start -7 15.2) (end -7 0) (layer F.SilkS) (width 0.01016))
(fp_line (start -7 0) (end 7 0) (layer F.SilkS) (width 0.01016))
(pad 1 smd rect (at 1.94 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask)
(net 39 /SD_3))
(net 37 /SD_3))
(pad 2 smd rect (at 0.84 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask)
(net 40 /MTMS))
(net 38 /MTMS))
(pad 3 smd rect (at -0.26 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at -1.36 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at -2.46 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask)
(net 41 /MTCK))
(net 39 /MTCK))
(pad 6 smd rect (at -3.56 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask))
(pad 7 smd rect (at -4.66 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask)
(net 42 /MTDO))
(net 40 /MTDO))
(pad 8 smd rect (at -5.76 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask)
(net 43 /MTDI))
(net 41 /MTDI))
(pad S smd rect (at -5.05 0.4 180) (size 1.6 1.4) (layers F.Cu F.Paste F.Mask))
(pad S smd rect (at 0.75 0.4 180) (size 1.8 1.4) (layers F.Cu F.Paste F.Mask))
(pad G smd rect (at -7.45 13.55 180) (size 1.4 1.9) (layers F.Cu F.Paste F.Mask))
@ -495,13 +495,13 @@
(pad A4 smd circle (at -5.2 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad A5 smd circle (at -4.4 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad A6 smd circle (at -3.6 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 38 /gpio/P30))
(net 36 /gpio/P30))
(pad A7 smd circle (at -2.8 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 26 /gpio/P18))
(net 24 /gpio/P18))
(pad A8 smd circle (at -2 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 25 /gpio/P17))
(net 23 /gpio/P17))
(pad A9 smd circle (at -1.2 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 20 /gpio/P10))
(net 43 /gpio/P16))
(pad A10 smd circle (at -0.4 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 17 /gpio/P7))
(pad A11 smd circle (at 0.4 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
@ -520,15 +520,15 @@
(pad B4 smd circle (at -5.2 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad B5 smd circle (at -4.4 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad B6 smd circle (at -3.6 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 37 /gpio/P29))
(net 35 /gpio/P29))
(pad B7 smd circle (at -2.8 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 1 GND))
(pad B8 smd circle (at -2 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 27 /gpio/P19))
(net 25 /gpio/P19))
(pad B9 smd circle (at -1.2 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 22 /gpio/P12))
(net 20 /gpio/P12))
(pad B10 smd circle (at -0.4 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 19 /gpio/P9))
(net 42 /gpio/P15))
(pad B11 smd circle (at 0.4 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 15 /gpio/P5))
(pad B12 smd circle (at 1.2 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
@ -547,14 +547,14 @@
(pad C4 smd circle (at -5.2 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad C5 smd circle (at -4.4 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad C6 smd circle (at -3.6 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 32 /gpio/P24))
(net 30 /gpio/P24))
(pad C7 smd circle (at -2.8 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 31 /gpio/P23))
(net 29 /gpio/P23))
(pad C8 smd circle (at -2 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 28 /gpio/P20))
(net 26 /gpio/P20))
(pad C9 smd circle (at -1.2 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad C10 smd circle (at -0.4 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 21 /gpio/P11))
(net 19 /gpio/P11))
(pad C11 smd circle (at 0.4 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 16 /gpio/P6))
(pad C12 smd circle (at 1.2 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
@ -574,13 +574,13 @@
(net 1 GND))
(pad D5 smd circle (at -4.4 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad D6 smd circle (at -3.6 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 35 /gpio/P27))
(net 33 /gpio/P27))
(pad D7 smd circle (at -2.8 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 33 /gpio/P25))
(net 31 /gpio/P25))
(pad D8 smd circle (at -2 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 29 /gpio/P21))
(net 27 /gpio/P21))
(pad D9 smd circle (at -1.2 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 24 /gpio/P14))
(net 22 /gpio/P14))
(pad D10 smd circle (at -0.4 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad D11 smd circle (at 0.4 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad D12 smd circle (at 1.2 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
@ -598,13 +598,13 @@
(pad E4 smd circle (at -5.2 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad E5 smd circle (at -4.4 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad E6 smd circle (at -3.6 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 36 /gpio/P28))
(net 34 /gpio/P28))
(pad E7 smd circle (at -2.8 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 34 /gpio/P26))
(net 32 /gpio/P26))
(pad E8 smd circle (at -2 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 30 /gpio/P22))
(net 28 /gpio/P22))
(pad E9 smd circle (at -1.2 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 23 /gpio/P13))
(net 21 /gpio/P13))
(pad E10 smd circle (at -0.4 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad E11 smd circle (at 0.4 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad E12 smd circle (at 1.2 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
@ -1101,103 +1101,143 @@
)
)
(module Pin_Headers:Pin_Header_Straight_2x20 (layer F.Cu) (tedit 0) (tstamp 56AA109A)
(at 117.2 89.2 90)
(descr "Through hole pin header")
(tags "pin header")
(path /56AC389C/56AC4818)
(fp_text reference J1 (at 0 -5.1 90) (layer F.SilkS)
(module Socket_Strips:Socket_Strip_Straight_2x40 (layer F.Cu) (tedit 0) (tstamp 58D32B1C)
(at 92.29 81.91)
(descr "Through hole socket strip")
(tags "socket strip")
(path /56AC389C/58D32178)
(fp_text reference J1 (at 0 -5.1) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value CONN_02X20 (at 0 -3.1 90) (layer F.Fab)
(fp_text value CONN_02X40 (at 0 -3.1) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.75 -1.75) (end -1.75 50.05) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.3 -1.75) (end 4.3 50.05) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 50.05) (end 4.3 50.05) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.81 49.53) (end 3.81 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 1.27) (end -1.27 49.53) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 49.53) (end -1.27 49.53) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.75 -1.75) (end -1.75 4.3) (layer F.CrtYd) (width 0.05))
(fp_line (start 100.85 -1.75) (end 100.85 4.3) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 -1.75) (end 100.85 -1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 4.3) (end 100.85 4.3) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.27 3.81) (end 100.33 3.81) (layer F.SilkS) (width 0.15))
(fp_line (start 100.33 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 100.33 3.81) (end 100.33 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 3.81) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15))
(pad 1 thru_hole rect (at 0 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 1 thru_hole rect (at 0 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 13 /gpio/IN5V))
(pad 2 thru_hole oval (at 2.54 0 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 2 thru_hole oval (at 0 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 14 /gpio/OUT5V))
(pad 3 thru_hole oval (at 0 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 3 thru_hole oval (at 2.54 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 1 GND))
(pad 4 thru_hole oval (at 2.54 2.54 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 4 thru_hole oval (at 2.54 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 1 GND))
(pad 5 thru_hole oval (at 0 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 5 thru_hole oval (at 5.08 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 15 /gpio/P5))
(pad 6 thru_hole oval (at 2.54 5.08 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 6 thru_hole oval (at 5.08 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 16 /gpio/P6))
(pad 7 thru_hole oval (at 0 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 7 thru_hole oval (at 7.62 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 17 /gpio/P7))
(pad 8 thru_hole oval (at 2.54 7.62 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 8 thru_hole oval (at 7.62 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 18 /gpio/P8))
(pad 9 thru_hole oval (at 0 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 19 /gpio/P9))
(pad 10 thru_hole oval (at 2.54 10.16 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 20 /gpio/P10))
(pad 11 thru_hole oval (at 0 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 21 /gpio/P11))
(pad 12 thru_hole oval (at 2.54 12.7 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 22 /gpio/P12))
(pad 13 thru_hole oval (at 0 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 23 /gpio/P13))
(pad 14 thru_hole oval (at 2.54 15.24 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 24 /gpio/P14))
(pad 15 thru_hole oval (at 0 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
(pad 16 thru_hole oval (at 2.54 17.78 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
(pad 17 thru_hole oval (at 0 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 25 /gpio/P17))
(pad 18 thru_hole oval (at 2.54 20.32 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 26 /gpio/P18))
(pad 19 thru_hole oval (at 0 22.86 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 27 /gpio/P19))
(pad 20 thru_hole oval (at 2.54 22.86 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 28 /gpio/P20))
(pad 21 thru_hole oval (at 0 25.4 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 29 /gpio/P21))
(pad 22 thru_hole oval (at 2.54 25.4 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 30 /gpio/P22))
(pad 23 thru_hole oval (at 0 27.94 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 31 /gpio/P23))
(pad 24 thru_hole oval (at 2.54 27.94 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 32 /gpio/P24))
(pad 25 thru_hole oval (at 0 30.48 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 33 /gpio/P25))
(pad 26 thru_hole oval (at 2.54 30.48 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 34 /gpio/P26))
(pad 27 thru_hole oval (at 0 33.02 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 35 /gpio/P27))
(pad 28 thru_hole oval (at 2.54 33.02 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 36 /gpio/P28))
(pad 29 thru_hole oval (at 0 35.56 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 37 /gpio/P29))
(pad 30 thru_hole oval (at 2.54 35.56 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 38 /gpio/P30))
(pad 31 thru_hole oval (at 0 38.1 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
(pad 32 thru_hole oval (at 2.54 38.1 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
(pad 33 thru_hole oval (at 0 40.64 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
(pad 34 thru_hole oval (at 2.54 40.64 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
(pad 35 thru_hole oval (at 0 43.18 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
(pad 36 thru_hole oval (at 2.54 43.18 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
(pad 37 thru_hole oval (at 0 45.72 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
(pad 38 thru_hole oval (at 2.54 45.72 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
(pad 39 thru_hole oval (at 0 48.26 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 9 thru_hole oval (at 10.16 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 10 thru_hole oval (at 10.16 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 11 thru_hole oval (at 12.7 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 19 /gpio/P11))
(pad 12 thru_hole oval (at 12.7 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 20 /gpio/P12))
(pad 13 thru_hole oval (at 15.24 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 21 /gpio/P13))
(pad 14 thru_hole oval (at 15.24 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 22 /gpio/P14))
(pad 15 thru_hole oval (at 17.78 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 42 /gpio/P15))
(pad 16 thru_hole oval (at 17.78 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 43 /gpio/P16))
(pad 17 thru_hole oval (at 20.32 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 23 /gpio/P17))
(pad 18 thru_hole oval (at 20.32 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 24 /gpio/P18))
(pad 19 thru_hole oval (at 22.86 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 25 /gpio/P19))
(pad 20 thru_hole oval (at 22.86 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 26 /gpio/P20))
(pad 21 thru_hole oval (at 25.4 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 27 /gpio/P21))
(pad 22 thru_hole oval (at 25.4 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 28 /gpio/P22))
(pad 23 thru_hole oval (at 27.94 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 29 /gpio/P23))
(pad 24 thru_hole oval (at 27.94 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 30 /gpio/P24))
(pad 25 thru_hole oval (at 30.48 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 31 /gpio/P25))
(pad 26 thru_hole oval (at 30.48 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 32 /gpio/P26))
(pad 27 thru_hole oval (at 33.02 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 33 /gpio/P27))
(pad 28 thru_hole oval (at 33.02 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 34 /gpio/P28))
(pad 29 thru_hole oval (at 35.56 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 35 /gpio/P29))
(pad 30 thru_hole oval (at 35.56 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 36 /gpio/P30))
(pad 31 thru_hole oval (at 38.1 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 32 thru_hole oval (at 38.1 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 33 thru_hole oval (at 40.64 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 34 thru_hole oval (at 40.64 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 35 thru_hole oval (at 43.18 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 36 thru_hole oval (at 43.18 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 37 thru_hole oval (at 45.72 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 38 thru_hole oval (at 45.72 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 39 thru_hole oval (at 48.26 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 2 VCC))
(pad 40 thru_hole oval (at 2.54 48.26 90) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 40 thru_hole oval (at 48.26 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 2 VCC))
(model Pin_Headers.3dshapes/Pin_Header_Straight_2x20.wrl
(at (xyz 0.05 -0.95 0))
(pad 41 thru_hole oval (at 50.8 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 42 thru_hole oval (at 50.8 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 43 thru_hole oval (at 53.34 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 44 thru_hole oval (at 53.34 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 45 thru_hole oval (at 55.88 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 46 thru_hole oval (at 55.88 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 47 thru_hole oval (at 58.42 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 48 thru_hole oval (at 58.42 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 49 thru_hole oval (at 60.96 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 50 thru_hole oval (at 60.96 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 51 thru_hole oval (at 63.5 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 52 thru_hole oval (at 63.5 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 53 thru_hole oval (at 66.04 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 54 thru_hole oval (at 66.04 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 55 thru_hole oval (at 68.58 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 56 thru_hole oval (at 68.58 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 57 thru_hole oval (at 71.12 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 58 thru_hole oval (at 71.12 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 59 thru_hole oval (at 73.66 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 60 thru_hole oval (at 73.66 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 61 thru_hole oval (at 76.2 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 62 thru_hole oval (at 76.2 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 63 thru_hole oval (at 78.74 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 64 thru_hole oval (at 78.74 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 65 thru_hole oval (at 81.28 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 66 thru_hole oval (at 81.28 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 67 thru_hole oval (at 83.82 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 68 thru_hole oval (at 83.82 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 69 thru_hole oval (at 86.36 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 70 thru_hole oval (at 86.36 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 71 thru_hole oval (at 88.9 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 72 thru_hole oval (at 88.9 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 73 thru_hole oval (at 91.44 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 74 thru_hole oval (at 91.44 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 75 thru_hole oval (at 93.98 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 76 thru_hole oval (at 93.98 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 77 thru_hole oval (at 96.52 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 78 thru_hole oval (at 96.52 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 79 thru_hole oval (at 99.06 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 80 thru_hole oval (at 99.06 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(model Socket_Strips.3dshapes/Socket_Strip_Straight_2x40.wrl
(at (xyz 1.95 -0.05 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 90))
(rotate (xyz 0 0 180))
)
)
@ -1262,11 +1302,11 @@
(gr_circle (center 92.2 39.2) (end 93.95 39.2) (layer Dwgs.User) (width 0.2))
(gr_circle (center 92.2 39.2) (end 93.45 39.2) (layer Dwgs.User) (width 0.2))
(segment (start 143.95 84.2) (end 143.95 88.01) (width 0.25) (layer In1.Cu) (net 31))
(segment (start 143.95 88.01) (end 145.14 89.2) (width 0.25) (layer In1.Cu) (net 31))
(segment (start 139 79.25) (end 143.95 84.2) (width 0.25) (layer In1.Cu) (net 31))
(segment (start 139 60.6) (end 139 79.25) (width 0.25) (layer In1.Cu) (net 31))
(segment (start 139.4 60.2) (end 139 60.6) (width 0.25) (layer F.Cu) (net 31))
(via micro (at 139 60.6) (size 0.3) (drill 0.1) (layers F.Cu In1.Cu) (net 31))
(segment (start 120.23 81.91) (end 125.408664 76.731336) (width 0.25) (layer In1.Cu) (net 29))
(segment (start 125.408664 76.731336) (end 137.468664 76.731336) (width 0.25) (layer In1.Cu) (net 29))
(segment (start 137.468664 76.731336) (end 139 75.2) (width 0.25) (layer In1.Cu) (net 29))
(segment (start 139 75.2) (end 139 60.6) (width 0.25) (layer In1.Cu) (net 29))
(segment (start 139.4 60.2) (end 139 60.6) (width 0.25) (layer F.Cu) (net 29))
(via micro (at 139 60.6) (size 0.3) (drill 0.1) (layers F.Cu In1.Cu) (net 29))
)

328
ulx3s.kicad_pcb-bak
Unescape View File

@ -3,10 +3,10 @@
(general
(links 190)
(no_connects 190)
(area 71.350001 45.5 172.372201 153.050002)
(area 89.124999 36.124999 195.275001 92.275001)
(thickness 1.6)
(drawings 16)
(tracks 4)
(tracks 6)
(zones 0)
(modules 11)
(nets 44)
@ -112,31 +112,31 @@
(net 16 /gpio/P6)
(net 17 /gpio/P7)
(net 18 /gpio/P8)
(net 19 /gpio/P9)
(net 20 /gpio/P10)
(net 21 /gpio/P11)
(net 22 /gpio/P12)
(net 23 /gpio/P13)
(net 24 /gpio/P14)
(net 25 /gpio/P17)
(net 26 /gpio/P18)
(net 27 /gpio/P19)
(net 28 /gpio/P20)
(net 29 /gpio/P21)
(net 30 /gpio/P22)
(net 31 /gpio/P23)
(net 32 /gpio/P24)
(net 33 /gpio/P25)
(net 34 /gpio/P26)
(net 35 /gpio/P27)
(net 36 /gpio/P28)
(net 37 /gpio/P29)
(net 38 /gpio/P30)
(net 39 /SD_3)
(net 40 /MTMS)
(net 41 /MTCK)
(net 42 /MTDO)
(net 43 /MTDI)
(net 19 /gpio/P11)
(net 20 /gpio/P12)
(net 21 /gpio/P13)
(net 22 /gpio/P14)
(net 23 /gpio/P17)
(net 24 /gpio/P18)
(net 25 /gpio/P19)
(net 26 /gpio/P20)
(net 27 /gpio/P21)
(net 28 /gpio/P22)
(net 29 /gpio/P23)
(net 30 /gpio/P24)
(net 31 /gpio/P25)
(net 32 /gpio/P26)
(net 33 /gpio/P27)
(net 34 /gpio/P28)
(net 35 /gpio/P29)
(net 36 /gpio/P30)
(net 37 /SD_3)
(net 38 /MTMS)
(net 39 /MTCK)
(net 40 /MTDO)
(net 41 /MTDI)
(net 42 /gpio/P15)
(net 43 /gpio/P16)
(net_class Default "This is the default net class."
(clearance 0.2)
@ -158,11 +158,12 @@
(add_net /USB5V)
(add_net /gpio/IN5V)
(add_net /gpio/OUT5V)
(add_net /gpio/P10)
(add_net /gpio/P11)
(add_net /gpio/P12)
(add_net /gpio/P13)
(add_net /gpio/P14)
(add_net /gpio/P15)
(add_net /gpio/P16)
(add_net /gpio/P17)
(add_net /gpio/P18)
(add_net /gpio/P19)
@ -181,7 +182,6 @@
(add_net /gpio/P6)
(add_net /gpio/P7)
(add_net /gpio/P8)
(add_net /gpio/P9)
(add_net "Net-(D4-Pad1)")
(add_net "Net-(HDMI1-PadSHD)")
(add_net "Net-(P1-Pad6)")
@ -224,15 +224,15 @@
(fp_line (start 0 -15.6) (end 0 8.4) (layer B.Fab) (width 0.1524))
(fp_line (start 0 8.4) (end 16 8.4) (layer B.Fab) (width 0.1524))
(pad 9 smd oval (at 2.99 -15.75 90) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask)
(net 42 /MTDO))
(net 40 /MTDO))
(pad 10 smd oval (at 4.99 -15.75 90) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask)
(net 43 /MTDI))
(net 41 /MTDI))
(pad 11 smd oval (at 6.99 -15.75 90) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask)
(net 39 /SD_3))
(net 37 /SD_3))
(pad 12 smd oval (at 8.99 -15.75 90) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask)
(net 40 /MTMS))
(net 38 /MTMS))
(pad 13 smd oval (at 10.99 -15.75 90) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask)
(net 41 /MTCK))
(net 39 /MTCK))
(pad 14 smd oval (at 12.99 -15.75 90) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask))
(pad 1 smd rect (at 0 0 180) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask))
(pad 2 smd oval (at 0 -2 180) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask))
@ -300,7 +300,7 @@
)
(module Connect:USB_Micro-B (layer B.Cu) (tedit 5543E447) (tstamp 56A96317)
(at 93.2 79.2 90)
(at 93.2 73.2 90)
(descr "Micro USB Type B Receptacle")
(tags "USB USB_B USB_micro USB_OTG")
(path /56ACC38E)
@ -397,18 +397,18 @@
(fp_line (start -7 15.2) (end -7 0) (layer F.SilkS) (width 0.01016))
(fp_line (start -7 0) (end 7 0) (layer F.SilkS) (width 0.01016))
(pad 1 smd rect (at 1.94 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask)
(net 39 /SD_3))
(net 37 /SD_3))
(pad 2 smd rect (at 0.84 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask)
(net 40 /MTMS))
(net 38 /MTMS))
(pad 3 smd rect (at -0.26 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at -1.36 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at -2.46 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask)
(net 41 /MTCK))
(net 39 /MTCK))
(pad 6 smd rect (at -3.56 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask))
(pad 7 smd rect (at -4.66 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask)
(net 42 /MTDO))
(net 40 /MTDO))
(pad 8 smd rect (at -5.76 11 180) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask)
(net 43 /MTDI))
(net 41 /MTDI))
(pad S smd rect (at -5.05 0.4 180) (size 1.6 1.4) (layers F.Cu F.Paste F.Mask))
(pad S smd rect (at 0.75 0.4 180) (size 1.8 1.4) (layers F.Cu F.Paste F.Mask))
(pad G smd rect (at -7.45 13.55 180) (size 1.4 1.9) (layers F.Cu F.Paste F.Mask))
@ -495,13 +495,13 @@
(pad A4 smd circle (at -5.2 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad A5 smd circle (at -4.4 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad A6 smd circle (at -3.6 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 38 /gpio/P30))
(net 36 /gpio/P30))
(pad A7 smd circle (at -2.8 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 26 /gpio/P18))
(net 24 /gpio/P18))
(pad A8 smd circle (at -2 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 25 /gpio/P17))
(net 23 /gpio/P17))
(pad A9 smd circle (at -1.2 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 20 /gpio/P10))
(net 43 /gpio/P16))
(pad A10 smd circle (at -0.4 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 17 /gpio/P7))
(pad A11 smd circle (at 0.4 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
@ -520,15 +520,15 @@
(pad B4 smd circle (at -5.2 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad B5 smd circle (at -4.4 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad B6 smd circle (at -3.6 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 37 /gpio/P29))
(net 35 /gpio/P29))
(pad B7 smd circle (at -2.8 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 1 GND))
(pad B8 smd circle (at -2 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 27 /gpio/P19))
(net 25 /gpio/P19))
(pad B9 smd circle (at -1.2 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 22 /gpio/P12))
(net 20 /gpio/P12))
(pad B10 smd circle (at -0.4 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 19 /gpio/P9))
(net 42 /gpio/P15))
(pad B11 smd circle (at 0.4 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 15 /gpio/P5))
(pad B12 smd circle (at 1.2 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
@ -547,14 +547,14 @@
(pad C4 smd circle (at -5.2 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad C5 smd circle (at -4.4 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad C6 smd circle (at -3.6 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 32 /gpio/P24))
(net 30 /gpio/P24))
(pad C7 smd circle (at -2.8 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 31 /gpio/P23))
(net 29 /gpio/P23))
(pad C8 smd circle (at -2 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 28 /gpio/P20))
(net 26 /gpio/P20))
(pad C9 smd circle (at -1.2 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad C10 smd circle (at -0.4 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 21 /gpio/P11))
(net 19 /gpio/P11))
(pad C11 smd circle (at 0.4 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 16 /gpio/P6))
(pad C12 smd circle (at 1.2 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
@ -574,13 +574,13 @@
(net 1 GND))
(pad D5 smd circle (at -4.4 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad D6 smd circle (at -3.6 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 35 /gpio/P27))
(net 33 /gpio/P27))
(pad D7 smd circle (at -2.8 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 33 /gpio/P25))
(net 31 /gpio/P25))
(pad D8 smd circle (at -2 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 29 /gpio/P21))
(net 27 /gpio/P21))
(pad D9 smd circle (at -1.2 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 24 /gpio/P14))
(net 22 /gpio/P14))
(pad D10 smd circle (at -0.4 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad D11 smd circle (at 0.4 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad D12 smd circle (at 1.2 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
@ -598,13 +598,13 @@
(pad E4 smd circle (at -5.2 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad E5 smd circle (at -4.4 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad E6 smd circle (at -3.6 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 36 /gpio/P28))
(net 34 /gpio/P28))
(pad E7 smd circle (at -2.8 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 34 /gpio/P26))
(net 32 /gpio/P26))
(pad E8 smd circle (at -2 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 30 /gpio/P22))
(net 28 /gpio/P22))
(pad E9 smd circle (at -1.2 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 23 /gpio/P13))
(net 21 /gpio/P13))
(pad E10 smd circle (at -0.4 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad E11 smd circle (at 0.4 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad E12 smd circle (at 1.2 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
@ -1101,103 +1101,143 @@
)
)
(module Pin_Headers:Pin_Header_Straight_2x20 (layer F.Cu) (tedit 0) (tstamp 56AA109A)
(at 151.2 97.66)
(descr "Through hole pin header")
(tags "pin header")
(path /56AC389C/56AC4818)
(module Socket_Strips:Socket_Strip_Straight_2x40 (layer F.Cu) (tedit 0) (tstamp 58D32B1C)
(at 92.29 81.91)
(descr "Through hole socket strip")
(tags "socket strip")
(path /56AC389C/58D32178)
(fp_text reference J1 (at 0 -5.1) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value CONN_02X20 (at 0 -3.1) (layer F.Fab)
(fp_text value CONN_02X40 (at 0 -3.1) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1.75 -1.75) (end -1.75 50.05) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.3 -1.75) (end 4.3 50.05) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 -1.75) (end 4.3 -1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 50.05) (end 4.3 50.05) (layer F.CrtYd) (width 0.05))
(fp_line (start 3.81 49.53) (end 3.81 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 1.27) (end -1.27 49.53) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 49.53) (end -1.27 49.53) (layer F.SilkS) (width 0.15))
(fp_line (start 3.81 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.75 -1.75) (end -1.75 4.3) (layer F.CrtYd) (width 0.05))
(fp_line (start 100.85 -1.75) (end 100.85 4.3) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 -1.75) (end 100.85 -1.75) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.75 4.3) (end 100.85 4.3) (layer F.CrtYd) (width 0.05))
(fp_line (start -1.27 3.81) (end 100.33 3.81) (layer F.SilkS) (width 0.15))
(fp_line (start 100.33 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 100.33 3.81) (end 100.33 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 3.81) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.27 1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
(fp_line (start 1.27 1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
(fp_line (start -1.55 -1.55) (end -1.55 0) (layer F.SilkS) (width 0.15))
(pad 1 thru_hole rect (at 0 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 1 thru_hole rect (at 0 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 13 /gpio/IN5V))
(pad 2 thru_hole oval (at 2.54 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 2 thru_hole oval (at 0 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 14 /gpio/OUT5V))
(pad 3 thru_hole oval (at 0 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 3 thru_hole oval (at 2.54 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 1 GND))
(pad 4 thru_hole oval (at 2.54 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 4 thru_hole oval (at 2.54 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 1 GND))
(pad 5 thru_hole oval (at 0 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 5 thru_hole oval (at 5.08 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 15 /gpio/P5))
(pad 6 thru_hole oval (at 2.54 5.08) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 6 thru_hole oval (at 5.08 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 16 /gpio/P6))
(pad 7 thru_hole oval (at 0 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 7 thru_hole oval (at 7.62 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 17 /gpio/P7))
(pad 8 thru_hole oval (at 2.54 7.62) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 8 thru_hole oval (at 7.62 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 18 /gpio/P8))
(pad 9 thru_hole oval (at 0 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 19 /gpio/P9))
(pad 10 thru_hole oval (at 2.54 10.16) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 20 /gpio/P10))
(pad 11 thru_hole oval (at 0 12.7) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 21 /gpio/P11))
(pad 12 thru_hole oval (at 2.54 12.7) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 22 /gpio/P12))
(pad 13 thru_hole oval (at 0 15.24) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 23 /gpio/P13))
(pad 14 thru_hole oval (at 2.54 15.24) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 24 /gpio/P14))
(pad 15 thru_hole oval (at 0 17.78) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
(pad 16 thru_hole oval (at 2.54 17.78) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
(pad 17 thru_hole oval (at 0 20.32) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 25 /gpio/P17))
(pad 18 thru_hole oval (at 2.54 20.32) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 26 /gpio/P18))
(pad 19 thru_hole oval (at 0 22.86) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 27 /gpio/P19))
(pad 20 thru_hole oval (at 2.54 22.86) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 28 /gpio/P20))
(pad 21 thru_hole oval (at 0 25.4) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 29 /gpio/P21))
(pad 22 thru_hole oval (at 2.54 25.4) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 30 /gpio/P22))
(pad 23 thru_hole oval (at 0 27.94) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 31 /gpio/P23))
(pad 24 thru_hole oval (at 2.54 27.94) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 32 /gpio/P24))
(pad 25 thru_hole oval (at 0 30.48) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 33 /gpio/P25))
(pad 26 thru_hole oval (at 2.54 30.48) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 34 /gpio/P26))
(pad 27 thru_hole oval (at 0 33.02) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 35 /gpio/P27))
(pad 28 thru_hole oval (at 2.54 33.02) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 36 /gpio/P28))
(pad 29 thru_hole oval (at 0 35.56) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 37 /gpio/P29))
(pad 30 thru_hole oval (at 2.54 35.56) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(net 38 /gpio/P30))
(pad 31 thru_hole oval (at 0 38.1) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
(pad 32 thru_hole oval (at 2.54 38.1) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
(pad 33 thru_hole oval (at 0 40.64) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
(pad 34 thru_hole oval (at 2.54 40.64) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
(pad 35 thru_hole oval (at 0 43.18) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
(pad 36 thru_hole oval (at 2.54 43.18) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
(pad 37 thru_hole oval (at 0 45.72) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
(pad 38 thru_hole oval (at 2.54 45.72) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
(pad 39 thru_hole oval (at 0 48.26) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 9 thru_hole oval (at 10.16 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 10 thru_hole oval (at 10.16 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 11 thru_hole oval (at 12.7 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 19 /gpio/P11))
(pad 12 thru_hole oval (at 12.7 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 20 /gpio/P12))
(pad 13 thru_hole oval (at 15.24 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 21 /gpio/P13))
(pad 14 thru_hole oval (at 15.24 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 22 /gpio/P14))
(pad 15 thru_hole oval (at 17.78 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 42 /gpio/P15))
(pad 16 thru_hole oval (at 17.78 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 43 /gpio/P16))
(pad 17 thru_hole oval (at 20.32 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 23 /gpio/P17))
(pad 18 thru_hole oval (at 20.32 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 24 /gpio/P18))
(pad 19 thru_hole oval (at 22.86 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 25 /gpio/P19))
(pad 20 thru_hole oval (at 22.86 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 26 /gpio/P20))
(pad 21 thru_hole oval (at 25.4 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 27 /gpio/P21))
(pad 22 thru_hole oval (at 25.4 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 28 /gpio/P22))
(pad 23 thru_hole oval (at 27.94 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 29 /gpio/P23))
(pad 24 thru_hole oval (at 27.94 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 30 /gpio/P24))
(pad 25 thru_hole oval (at 30.48 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 31 /gpio/P25))
(pad 26 thru_hole oval (at 30.48 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 32 /gpio/P26))
(pad 27 thru_hole oval (at 33.02 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 33 /gpio/P27))
(pad 28 thru_hole oval (at 33.02 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 34 /gpio/P28))
(pad 29 thru_hole oval (at 35.56 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 35 /gpio/P29))
(pad 30 thru_hole oval (at 35.56 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 36 /gpio/P30))
(pad 31 thru_hole oval (at 38.1 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 32 thru_hole oval (at 38.1 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 33 thru_hole oval (at 40.64 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 34 thru_hole oval (at 40.64 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 35 thru_hole oval (at 43.18 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 36 thru_hole oval (at 43.18 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 37 thru_hole oval (at 45.72 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 38 thru_hole oval (at 45.72 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 39 thru_hole oval (at 48.26 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 2 VCC))
(pad 40 thru_hole oval (at 2.54 48.26) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
(pad 40 thru_hole oval (at 48.26 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask)
(net 2 VCC))
(model Pin_Headers.3dshapes/Pin_Header_Straight_2x20.wrl
(at (xyz 0.05 -0.95 0))
(pad 41 thru_hole oval (at 50.8 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 42 thru_hole oval (at 50.8 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 43 thru_hole oval (at 53.34 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 44 thru_hole oval (at 53.34 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 45 thru_hole oval (at 55.88 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 46 thru_hole oval (at 55.88 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 47 thru_hole oval (at 58.42 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 48 thru_hole oval (at 58.42 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 49 thru_hole oval (at 60.96 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 50 thru_hole oval (at 60.96 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 51 thru_hole oval (at 63.5 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 52 thru_hole oval (at 63.5 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 53 thru_hole oval (at 66.04 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 54 thru_hole oval (at 66.04 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 55 thru_hole oval (at 68.58 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 56 thru_hole oval (at 68.58 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 57 thru_hole oval (at 71.12 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 58 thru_hole oval (at 71.12 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 59 thru_hole oval (at 73.66 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 60 thru_hole oval (at 73.66 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 61 thru_hole oval (at 76.2 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 62 thru_hole oval (at 76.2 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 63 thru_hole oval (at 78.74 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 64 thru_hole oval (at 78.74 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 65 thru_hole oval (at 81.28 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 66 thru_hole oval (at 81.28 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 67 thru_hole oval (at 83.82 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 68 thru_hole oval (at 83.82 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 69 thru_hole oval (at 86.36 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 70 thru_hole oval (at 86.36 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 71 thru_hole oval (at 88.9 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 72 thru_hole oval (at 88.9 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 73 thru_hole oval (at 91.44 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 74 thru_hole oval (at 91.44 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 75 thru_hole oval (at 93.98 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 76 thru_hole oval (at 93.98 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 77 thru_hole oval (at 96.52 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 78 thru_hole oval (at 96.52 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 79 thru_hole oval (at 99.06 0) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(pad 80 thru_hole oval (at 99.06 2.54) (size 1.7272 1.7272) (drill 1.016) (layers *.Cu *.Mask))
(model Socket_Strips.3dshapes/Socket_Strip_Straight_2x40.wrl
(at (xyz 1.95 -0.05 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 90))
(rotate (xyz 0 0 180))
)
)
@ -1262,9 +1302,11 @@
(gr_circle (center 92.2 39.2) (end 93.95 39.2) (layer Dwgs.User) (width 0.2))
(gr_circle (center 92.2 39.2) (end 93.45 39.2) (layer Dwgs.User) (width 0.2))
(segment (start 139 60.6) (end 139 113.4) (width 0.25) (layer In1.Cu) (net 31))
(segment (start 139 113.4) (end 151.2 125.6) (width 0.25) (layer In1.Cu) (net 31))
(segment (start 139.4 60.2) (end 139 60.6) (width 0.25) (layer F.Cu) (net 31))
(via micro (at 139 60.6) (size 0.3) (drill 0.1) (layers F.Cu In1.Cu) (net 31))
(segment (start 139 60.6) (end 139 75.2) (width 0.25) (layer In1.Cu) (net 29))
(segment (start 120.23 81.91) (end 122.94 79.2) (width 0.25) (layer In1.Cu) (net 29))
(segment (start 122.94 79.2) (end 135 79.2) (width 0.25) (layer In1.Cu) (net 29))
(segment (start 135 79.2) (end 139 75.2) (width 0.25) (layer In1.Cu) (net 29))
(segment (start 139.4 60.2) (end 139 60.6) (width 0.25) (layer F.Cu) (net 29))
(via micro (at 139 60.6) (size 0.3) (drill 0.1) (layers F.Cu In1.Cu) (net 29))
)

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