place renumbered schematic units of the fpga chip

pull/3/head
davor 8 years ago
parent 067962ec48
commit a60712b2f6

@ -54,41 +54,41 @@ $EndDescr
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@ -323,10 +323,6 @@ F 3 "" H 2500 2750 50 0000 C CNN
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@ -688,10 +688,10 @@ DRAW
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X PL29B J5 750 600 200 L 50 50 5 1 I
X PL35B K5 750 0 200 L 50 50 5 1 I
X PL35D L5 750 100 200 L 50 50 5 1 I
X PL35D L5 750 300 200 L 50 50 5 1 I
X PL38B N5 750 -200 200 L 50 50 5 1 I
X PL38D P5 750 -100 200 L 50 50 5 1 I
S -550 800 550 -900 6 1 0 N S -550 800 550 -900 6 1 0 N
X PL14B B1 750 -200 200 L 50 50 6 1 I
X PL17A C1 -750 -400 200 R 50 50 6 1 I
X PL17B D1 750 -400 200 L 50 50 6 1 I
X PL17D E1 750 -300 200 L 50 50 6 1 I
X PL14A A2 -750 -200 200 R 50 50 6 1 I
X PL14C B2 -750 -100 200 R 50 50 6 1 I
X PL14D C2 750 -100 200 L 50 50 6 1 I
X PL17C D2 -750 -300 200 R 50 50 6 1 I
X PCLKC7_0 E2 750 -700 200 L 50 50 6 1 I
X PCLKT7_0 F2 -750 -700 200 R 50 50 6 1 I
X PL5C A3 -750 500 200 R 50 50 6 1 I
X PL5D B3 750 500 200 L 50 50 6 1 I
X PL8C C3 -750 300 200 R 50 50 6 1 I
X PL8D D3 750 300 200 L 50 50 6 1 I
X PL11B E3 750 0 200 L 50 50 6 1 I
X PCLKC7_1 F3 750 -800 200 L 50 50 6 1 I
X PCLKT7_1 G3 -750 -800 200 R 50 50 6 1 I
X PL20D H3 750 -500 200 L 50 50 6 1 I
X PL2A A4 -750 600 200 R 50 50 6 1 I
X PL5B B4 750 400 200 L 50 50 6 1 I
X PL5A C4 -750 400 200 R 50 50 6 1 I
X PL8A E4 -750 200 200 R 50 50 6 1 I
X PL11A F4 -750 0 200 R 50 50 6 1 I
X GR_PCLK7_1 H4 -750 -600 200 R 50 50 6 1 I
X PL2B A5 750 600 200 L 50 50 6 1 I
X PL2C B5 -750 700 200 R 50 50 6 1 I
X PL2D C5 750 700 200 L 50 50 6 1 I
X PL8B D5 750 200 200 L 50 50 6 1 I
X PL11C E5 -750 100 200 R 50 50 6 1 I
X PL11D F5 750 100 200 L 50 50 6 1 I
X PL20B G5 750 -600 200 L 50 50 6 1 I
X GR_PCLK7_0 H5 -750 -500 200 R 50 50 6 1 I
S -550 800 550 -900 7 1 0 N S -550 800 550 -900 7 1 0 N
X PL32C H1 -750 500 200 R 50 50 7 1 I X D7 R1 -750 700 200 R 50 50 7 1 I
X PL32B J1 750 200 200 L 50 50 7 1 I X D6 T1 750 700 200 L 50 50 7 1 I
X PL32B J1 750 400 200 L 50 50 7 1 I X D5/MISO2 U1 -750 600 200 R 50 50 7 1 I
X PL32D K1 750 500 200 L 50 50 7 1 I X D4/MOSI2 V1 750 600 200 L 50 50 7 1 I
X PL44C L1 -750 -500 200 R 50 50 7 1 I X D3 W1 -750 500 200 R 50 50 7 1 I
X PL44B M1 750 -600 200 L 50 50 7 1 I X HOLDN/DI R2 -750 200 200 R 50 50 7 1 I
X PL44D N1 750 -500 200 L 50 50 7 1 I X SN/CSN T2 -750 300 200 R 50 50 7 1 I
X PL47A P1 -750 -800 200 R 50 50 7 1 I X CS1N U2 750 300 200 L 50 50 7 1 I
X PL32A K2 -750 200 200 R 50 50 7 1 I X D1/MISO V2 -750 400 200 R 50 50 7 1 I
X PL32A K2 -750 400 200 R 50 50 7 1 I X D0/MOSI W2 750 400 200 L 50 50 7 1 I
X PL41D L2 750 -300 200 L 50 50 7 1 I X D2 Y2 750 500 200 L 50 50 7 1 I
X PL44A N2 -750 -600 200 R 50 50 7 1 I X DOUT/CSON R3 750 200 200 L 50 50 7 1 I
X PL47B P2 750 -800 200 L 50 50 7 1 I X WRITEN T3 -750 -100 200 R 50 50 7 1 I
X GR_PCLK6_1 J3 -750 700 200 R 50 50 7 1 I X CCLK U3 -750 -200 200 R 50 50 7 1 I
X PL29D K3 750 700 200 L 50 50 7 1 I X INITN V3 -750 100 200 R 50 50 7 1 I
X PL41C L3 -750 -300 200 R 50 50 7 1 I X PROGRAMN W3 -750 0 200 R 50 50 7 1 I
X PL41B M3 750 -400 200 L 50 50 7 1 I X DONE Y3 -750 -300 200 R 50 50 7 1 I
X PL41A N3 -750 -400 200 R 50 50 7 1 I X CFG_2 R4 -750 -400 200 R 50 50 7 1 I
X GPLL0T_IN P3 -750 -700 200 R 50 50 7 1 I X CFG_1 T4 -750 -500 200 R 50 50 7 1 I
X GR_PCLK6_0 J4 -750 600 200 R 50 50 7 1 I X CFG_0 U4 -750 -600 200 R 50 50 7 1 I
X PL35A K4 -750 0 200 R 50 50 7 1 I
X PL32C L4 -750 300 200 R 50 50 7 1 I
X PL35C L4 -750 100 200 R 50 50 7 1 I
X PL38A M4 -750 -200 200 R 50 50 7 1 I
X PL38C N4 -750 -100 200 R 50 50 7 1 I
X GPLL0C_IN P4 750 -700 200 L 50 50 7 1 I
X PL29B J5 750 600 200 L 50 50 7 1 I
X PL35B K5 750 0 200 L 50 50 7 1 I
X PL35D L5 750 100 200 L 50 50 7 1 I
X PL35D L5 750 300 200 L 50 50 7 1 I
X PL38B N5 750 -200 200 L 50 50 7 1 I
X PL38D P5 750 -100 200 L 50 50 7 1 I
S -550 800 550 -900 8 1 0 N S -550 800 550 -900 8 1 0 N
X PL14B B1 750 -200 200 L 50 50 8 1 I
X PL17A C1 -750 -400 200 R 50 50 8 1 I
X PL17B D1 750 -400 200 L 50 50 8 1 I
X PL17D E1 750 -300 200 L 50 50 8 1 I
X PL14A A2 -750 -200 200 R 50 50 8 1 I
X PL14C B2 -750 -100 200 R 50 50 8 1 I
X PL14D C2 750 -100 200 L 50 50 8 1 I
X PL17C D2 -750 -300 200 R 50 50 8 1 I
X PCLKC7_0 E2 750 -700 200 L 50 50 8 1 I
X PCLKT7_0 F2 -750 -700 200 R 50 50 8 1 I
X PL5C A3 -750 500 200 R 50 50 8 1 I
X PL5D B3 750 500 200 L 50 50 8 1 I
X PL8C C3 -750 300 200 R 50 50 8 1 I
X PL8D D3 750 300 200 L 50 50 8 1 I
X PL11B E3 750 0 200 L 50 50 8 1 I
X PCLKC7_1 F3 750 -800 200 L 50 50 8 1 I
X PCLKT7_1 G3 -750 -800 200 R 50 50 8 1 I
X PL20D H3 750 -500 200 L 50 50 8 1 I
X PL2A A4 -750 600 200 R 50 50 8 1 I
X PL5B B4 750 400 200 L 50 50 8 1 I
X PL5A C4 -750 400 200 R 50 50 8 1 I
X PL8A E4 -750 200 200 R 50 50 8 1 I
X PL11A F4 -750 0 200 R 50 50 8 1 I
X GR_PCLK7_1 H4 -750 -600 200 R 50 50 8 1 I
X PL2B A5 750 600 200 L 50 50 8 1 I
X PL2C B5 -750 700 200 R 50 50 8 1 I
X PL2D C5 750 700 200 L 50 50 8 1 I
X PL8B D5 750 200 200 L 50 50 8 1 I
X PL11C E5 -750 100 200 R 50 50 8 1 I
X PL11D F5 750 100 200 L 50 50 8 1 I
X PL20B G5 750 -600 200 L 50 50 8 1 I
X GR_PCLK7_0 H5 -750 -500 200 R 50 50 8 1 I
T 0 0 -100 60 0 9 1 POWER Normal 0 C C T 0 0 -100 60 0 9 1 POWER Normal 0 C C
S -5100 450 5050 -500 9 1 0 N S -5100 450 5050 -500 9 1 0 N
X GND J2 1850 -700 200 U 50 50 9 1 I X GND J2 1850 -700 200 U 50 50 9 1 I

@ -3515,11 +3515,11 @@
(pad A5 smd circle (at -4.4 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (pad A5 smd circle (at -4.4 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.04)) (solder_mask_margin 0.04))
(pad A6 smd circle (at -3.6 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (pad A6 smd circle (at -3.6 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 84 /gpio/A6) (solder_mask_margin 0.04)) (net 83 /gpio/B6) (solder_mask_margin 0.04))
(pad A7 smd circle (at -2.8 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (pad A7 smd circle (at -2.8 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 72 /gpio/A7) (solder_mask_margin 0.04))
(pad A8 smd circle (at -2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 71 /gpio/A8) (solder_mask_margin 0.04)) (net 71 /gpio/A8) (solder_mask_margin 0.04))
(pad A8 smd circle (at -2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 72 /gpio/A7) (solder_mask_margin 0.04))
(pad A9 smd circle (at -1.2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (pad A9 smd circle (at -1.2 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 66 /gpio/A9) (solder_mask_margin 0.04)) (net 66 /gpio/A9) (solder_mask_margin 0.04))
(pad A10 smd circle (at -0.4 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (pad A10 smd circle (at -0.4 -7.6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
@ -3553,13 +3553,13 @@
(pad B5 smd circle (at -4.4 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (pad B5 smd circle (at -4.4 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.04)) (solder_mask_margin 0.04))
(pad B6 smd circle (at -3.6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (pad B6 smd circle (at -3.6 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 83 /gpio/B6) (solder_mask_margin 0.04)) (net 84 /gpio/A6) (solder_mask_margin 0.04))
(pad B7 smd circle (at -2.8 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (pad B7 smd circle (at -2.8 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 1 GND) (solder_mask_margin 0.04)) (net 1 GND) (solder_mask_margin 0.04))
(pad B8 smd circle (at -2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (pad B8 smd circle (at -2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 73 /gpio/B8) (solder_mask_margin 0.04)) (net 74 /gpio/C8) (solder_mask_margin 0.04))
(pad B9 smd circle (at -1.2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (pad B9 smd circle (at -1.2 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 68 /gpio/B9) (solder_mask_margin 0.04)) (net 67 /gpio/C10) (solder_mask_margin 0.04))
(pad B10 smd circle (at -0.4 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (pad B10 smd circle (at -0.4 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 65 /gpio/B10) (solder_mask_margin 0.04)) (net 65 /gpio/B10) (solder_mask_margin 0.04))
(pad B11 smd circle (at 0.4 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (pad B11 smd circle (at 0.4 -6.8) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
@ -3593,15 +3593,15 @@
(pad C5 smd circle (at -4.4 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (pad C5 smd circle (at -4.4 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.04)) (solder_mask_margin 0.04))
(pad C6 smd circle (at -3.6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (pad C6 smd circle (at -3.6 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 78 /gpio/C6) (solder_mask_margin 0.04))
(pad C7 smd circle (at -2.8 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 77 /gpio/C7) (solder_mask_margin 0.04)) (net 77 /gpio/C7) (solder_mask_margin 0.04))
(pad C7 smd circle (at -2.8 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 78 /gpio/C6) (solder_mask_margin 0.04))
(pad C8 smd circle (at -2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (pad C8 smd circle (at -2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 74 /gpio/C8) (solder_mask_margin 0.04)) (net 73 /gpio/B8) (solder_mask_margin 0.04))
(pad C9 smd circle (at -1.2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (pad C9 smd circle (at -1.2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.04)) (solder_mask_margin 0.04))
(pad C10 smd circle (at -0.4 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (pad C10 smd circle (at -0.4 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 67 /gpio/C10) (solder_mask_margin 0.04)) (net 68 /gpio/B9) (solder_mask_margin 0.04))
(pad C11 smd circle (at 0.4 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (pad C11 smd circle (at 0.4 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 62 /gpio/C11) (solder_mask_margin 0.04)) (net 62 /gpio/C11) (solder_mask_margin 0.04))
(pad C12 smd circle (at 1.2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (pad C12 smd circle (at 1.2 -6) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
@ -3633,13 +3633,13 @@
(pad D5 smd circle (at -4.4 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (pad D5 smd circle (at -4.4 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.04)) (solder_mask_margin 0.04))
(pad D6 smd circle (at -3.6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (pad D6 smd circle (at -3.6 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 81 /gpio/D6) (solder_mask_margin 0.04)) (net 82 /gpio/E6) (solder_mask_margin 0.04))
(pad D7 smd circle (at -2.8 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (pad D7 smd circle (at -2.8 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 79 /gpio/D7) (solder_mask_margin 0.04)) (net 80 /gpio/E7) (solder_mask_margin 0.04))
(pad D8 smd circle (at -2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (pad D8 smd circle (at -2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 75 /gpio/D8) (solder_mask_margin 0.04)) (net 76 /gpio/E8) (solder_mask_margin 0.04))
(pad D9 smd circle (at -1.2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (pad D9 smd circle (at -1.2 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 70 /gpio/D9) (solder_mask_margin 0.04)) (net 69 /gpio/E9) (solder_mask_margin 0.04))
(pad D10 smd circle (at -0.4 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (pad D10 smd circle (at -0.4 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.04)) (solder_mask_margin 0.04))
(pad D11 smd circle (at 0.4 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (pad D11 smd circle (at 0.4 -5.2) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
@ -3673,13 +3673,13 @@
(pad E5 smd circle (at -4.4 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (pad E5 smd circle (at -4.4 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.04)) (solder_mask_margin 0.04))
(pad E6 smd circle (at -3.6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (pad E6 smd circle (at -3.6 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 82 /gpio/E6) (solder_mask_margin 0.04)) (net 81 /gpio/D6) (solder_mask_margin 0.04))
(pad E7 smd circle (at -2.8 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (pad E7 smd circle (at -2.8 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 80 /gpio/E7) (solder_mask_margin 0.04)) (net 79 /gpio/D7) (solder_mask_margin 0.04))
(pad E8 smd circle (at -2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (pad E8 smd circle (at -2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 76 /gpio/E8) (solder_mask_margin 0.04)) (net 75 /gpio/D8) (solder_mask_margin 0.04))
(pad E9 smd circle (at -1.2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (pad E9 smd circle (at -1.2 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(net 69 /gpio/E9) (solder_mask_margin 0.04)) (net 70 /gpio/D9) (solder_mask_margin 0.04))
(pad E10 smd circle (at -0.4 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (pad E10 smd circle (at -0.4 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)
(solder_mask_margin 0.04)) (solder_mask_margin 0.04))
(pad E11 smd circle (at 0.4 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask) (pad E11 smd circle (at 0.4 -4.4) (size 0.35 0.35) (layers F.Cu F.Paste F.Mask)

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff
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