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schematics: references for buttons on previous PCB v1.7

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pull/3/head
davor 6 years ago
parent a560d000d7
commit b535b7ccee
6 changed files with 499 additions and 491 deletions
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@ -59,447 +59,449 @@ $EndDescr
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484
flash.sch
Unescape View File

@ -59,447 +59,449 @@ $EndDescr
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L +3V3 #PWR0149
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F 3 "" H 3100 1100 50 0000 C CNN
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L +3V3 #PWR0150
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Text Notes 1850 850 0 60 ~ 0
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L +3V3 #PWR0151
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F 3 "" H 2300 1100 50 0000 C CNN
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F 3 "" H 3050 2200 50 0000 C CNN
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$Comp
L R R12
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L +3V3 #PWR0152
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$Comp
L +3V3 #PWR0153
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F 2 "" H 5450 3350 50 0000 C CNN
F 3 "" H 5450 3350 50 0000 C CNN
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F 2 "" H 6300 5000 50 0000 C CNN
F 3 "" H 6300 5000 50 0000 C CNN
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0 -1 -1 0
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$Comp
L GND #PWR0154
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F 3 "" H 5650 3450 50 0000 C CNN
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$Comp
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F 2 "" H 5650 3250 50 0000 C CNN
F 3 "" H 5650 3250 50 0000 C CNN
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F 3 "" H 9250 2700 50 0000 C CNN
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L +3V3 #PWR0158
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F 3 "" H 9250 2550 50 0000 C CNN
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F 3 "" H 5600 2200 50 0000 C CNN
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$Comp
L +3V3 #PWR0159
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F 1 "+3V3" H 5650 3090 50 0000 C CNN
F 2 "" H 5650 2950 50 0000 C CNN
F 3 "" H 5650 2950 50 0000 C CNN
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F 3 "" H 6500 4600 50 0000 C CNN
1 6500 4600
0 -1 -1 0
$EndComp
$Comp
L +3V3 #PWR0160
U 1 1 58EC8800
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F 0 "#PWR0160" H 5650 2400 50 0001 C CNN
F 1 "+3V3" H 5650 2690 50 0000 C CNN
F 2 "" H 5650 2550 50 0000 C CNN
F 3 "" H 5650 2550 50 0000 C CNN
1 5650 2550
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F 0 "#PWR0160" H 6500 4050 50 0001 C CNN
F 1 "+3V3" H 6500 4340 50 0000 C CNN
F 2 "" H 6500 4200 50 0000 C CNN
F 3 "" H 6500 4200 50 0000 C CNN
1 6500 4200
0 -1 -1 0
$EndComp
$Comp
L +3V3 #PWR0161
U 1 1 58EC882A
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F 0 "#PWR0161" H 7150 2400 50 0001 C CNN
F 1 "+3V3" H 7150 2690 50 0000 C CNN
F 2 "" H 7150 2550 50 0000 C CNN
F 3 "" H 7150 2550 50 0000 C CNN
1 7150 2550
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F 0 "#PWR0161" H 8000 4050 50 0001 C CNN
F 1 "+3V3" H 8000 4340 50 0000 C CNN
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F 3 "" H 8000 4200 50 0000 C CNN
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0 1 1 0
$EndComp
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BTN_F1
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BTN_F2
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pullups to allow entering USER mode\nTN1260: lattice ECP5 sysCONFIG guide p.6, p.8, p.13
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L R R55
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F 0 "R55" V 4580 3150 50 0000 C CNN
F 1 "15k" V 4500 3150 50 0000 C CNN
F 2 "Resistors_SMD:R_0603_HandSoldering" V 4430 3150 50 0001 C CNN
F 3 "" H 4500 3150 50 0000 C CNN
1 4500 3150
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F 0 "R55" V 5430 4800 50 0000 C CNN
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F 3 "" H 5350 4800 50 0000 C CNN
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PROG_DONE
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AR Path="/58D913EC/5A07BEF6" Ref="U1" Part="7"
F 0 "U1" H 6400 3800 60 0000 C CNN
F 1 "LFE5U-45F-6BG381C" H 6400 3700 60 0000 C CNN
F 2 "lfe5bg381:BGA-381_pitch0.8mm_dia0.4mm" H 5350 3800 60 0001 C CNN
F 3 "http://www.latticesemi.com/~/media/LatticeSemi/Documents/ApplicationNotes/EH/TN1260.pdf" H 5350 3800 60 0001 C CNN
F 4 "LFE5U-45F-6BG381C" H 6400 2850 60 0001 C CNN "MFG_PN"
F 5 "www.mouser.com" H 6400 2850 60 0001 C CNN "Distributor1_URL"
F 6 "842-LFE5U45F6BG381C" H 6400 2850 60 0001 C CNN "Distributor1_PN"
7 6400 2850
F 0 "U1" H 7250 5450 60 0000 C CNN
F 1 "LFE5U-45F-6BG381C" H 7250 5350 60 0000 C CNN
F 2 "lfe5bg381:BGA-381_pitch0.8mm_dia0.4mm" H 6200 5450 60 0001 C CNN
F 3 "http://www.latticesemi.com/~/media/LatticeSemi/Documents/ApplicationNotes/EH/TN1260.pdf" H 6200 5450 60 0001 C CNN
F 4 "LFE5U-45F-6BG381C" H 7250 4500 60 0001 C CNN "MFG_PN"
F 5 "www.mouser.com" H 7250 4500 60 0001 C CNN "Distributor1_URL"
F 6 "842-LFE5U45F6BG381C" H 7250 4500 60 0001 C CNN "Distributor1_PN"
7 7250 4500
1 0 0 -1
$EndComp
Text Notes 1500 3500 0 60 ~ 0
Text Notes 2350 5150 0 60 ~ 0
For programming Flash thru JTAG see\nLattice FPGA-TN-02050
Text Notes 8600 2400 0 60 ~ 0
WPn
Wire Wire Line
7150 2350 8150 2350
8000 4000 9000 4000
Wire Wire Line
5650 2350 4650 2350
Text Label 4700 2350 0 60 ~ 0
6500 4000 5500 4000
Text Label 5550 4000 0 60 ~ 0
FLASH_nHOLD
Text Label 7550 2350 0 60 ~ 0
Text Label 8400 4000 0 60 ~ 0
FLASH_nWP
Text Notes 4950 4000 0 60 ~ 0
BTN_U v1.7
Text Notes 9050 4000 0 60 ~ 0
BTN_R v1.7
$EndSCHEMATC

12
gpdi.bak
Unescape View File

@ -494,12 +494,16 @@ Text Label 4450 2200 0 60 ~ 0
FPGA_CEC
Text Notes 800 5650 0 60 ~ 0
i2c shared with RTC\non "power" sheet
Text Notes 4450 2750 0 60 ~ 0
Text Notes 4250 2750 0 60 ~ 0
GP22 v1.7
Text Notes 7700 2750 0 60 ~ 0
Text Notes 7750 2750 0 60 ~ 0
GN22 v1.7
Text Notes 4450 2850 0 60 ~ 0
Text Notes 4250 2850 0 60 ~ 0
GP25 v1.7
Text Notes 7700 2850 0 60 ~ 0
Text Notes 7750 2850 0 60 ~ 0
GN25 v1.7
Text GLabel 5500 2700 0 60 Input ~ 0
USB_FPGA_D+
Text GLabel 7000 2700 2 60 Input ~ 0
USB_FPGA_D-
$EndSCHEMATC

2
ulx3s.sch
Unescape View File

@ -49,7 +49,7 @@ encoding utf-8
Sheet 1 11
Title "ULX3S"
Date ""
Rev "1.7.9"
Rev "1.7.10"
Comp "FER+RIZ+RADIONA"
Comment1 "Root sheet"
Comment2 ""

4
usb.bak
Unescape View File

@ -498,8 +498,8 @@ Text Label 1850 1800 0 60 ~ 0
FTD-
Text Label 1850 1900 0 60 ~ 0
FTD+
Text Notes 2850 3100 0 60 ~ 0
USB_FPGA connected to\nBANK2 on "ram" sheet
Text Notes 2850 3250 0 60 ~ 0
USB_FPGA connected to\nBANK1 on "gpdi" sheet and\nBANK2 on "ram" sheet
$Comp
L R R52
U 1 1 59C0F7B0

4
usb.sch
Unescape View File

@ -498,8 +498,8 @@ Text Label 1850 1800 0 60 ~ 0
FTD-
Text Label 1850 1900 0 60 ~ 0
FTD+
Text Notes 2850 3100 0 60 ~ 0
USB_FPGA connected to\nBANK2 on "ram" sheet
Text Notes 2850 3250 0 60 ~ 0
USB_FPGA connected to\nBANK1 on "gpdi" sheet and\nBANK2 on "ram" sheet
$Comp
L R R52
U 1 1 59C0F7B0

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