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@ -265,9 +265,9 @@ Wire Wire Line
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Wire Wire Line
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1800 1900 2150 1900
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Wire Wire Line
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1800 2750 2450 2750
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1800 2750 2100 2750
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Wire Wire Line
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1800 2850 2450 2850
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1800 2850 2100 2850
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Wire Wire Line
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1800 2950 1850 2950
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Wire Wire Line
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@ -492,29 +492,29 @@ USB_FPGA connected to\nBANK1 on "gpdi" sheet and\nBANK2 on "ram" sheet
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$Comp
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L R R52
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U 1 1 59C0F7B0
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P 2600 2750
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F 0 "R52" V 2550 2950 50 0000 C CNN
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F 1 "27" V 2600 2750 50 0000 C CNN
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F 2 "Resistors_SMD:R_0603_HandSoldering" V 2530 2750 50 0001 C CNN
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F 3 "" H 2600 2750 50 0000 C CNN
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1 2600 2750
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P 2250 2750
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F 0 "R52" V 2200 2950 50 0000 C CNN
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F 1 "27" V 2250 2750 50 0000 C CNN
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F 2 "Resistors_SMD:R_0603_HandSoldering" V 2180 2750 50 0001 C CNN
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F 3 "" H 2250 2750 50 0000 C CNN
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1 2250 2750
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0 1 1 0
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$EndComp
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$Comp
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L R R53
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U 1 1 59C0F7B6
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P 2600 2850
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F 0 "R53" V 2550 3050 50 0000 C CNN
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F 1 "27" V 2600 2850 50 0000 C CNN
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F 2 "Resistors_SMD:R_0603_HandSoldering" V 2530 2850 50 0001 C CNN
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F 3 "" H 2600 2850 50 0000 C CNN
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1 2600 2850
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P 2250 2850
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F 0 "R53" V 2200 3050 50 0000 C CNN
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F 1 "27" V 2250 2850 50 0000 C CNN
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F 2 "Resistors_SMD:R_0603_HandSoldering" V 2180 2850 50 0001 C CNN
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F 3 "" H 2250 2850 50 0000 C CNN
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1 2250 2850
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0 1 1 0
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$EndComp
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Wire Wire Line
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2750 2750 3150 2750
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2400 2750 3150 2750
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Wire Wire Line
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2750 2850 3150 2850
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2400 2850 3150 2850
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Text Label 1850 2750 0 60 ~ 0
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FPD-
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Text Label 1850 2850 0 60 ~ 0
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@ -522,47 +522,47 @@ FPD+
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$Comp
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L D_Zener_Small_ALT D20
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U 1 1 59C133D8
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P 2200 3000
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F 0 "D20" H 2400 2900 50 0000 C CNN
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F 1 "3.6V" H 2200 2910 50 0000 C CNN
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F 2 "Diodes_SMD:D_SOD-323_HandSoldering" V 2200 3000 50 0001 C CNN
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F 3 "" V 2200 3000 50 0001 C CNN
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1 2200 3000
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P 2600 3000
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F 0 "D20" H 2800 2900 50 0000 C CNN
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F 1 "3.6V" H 2600 2910 50 0000 C CNN
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F 2 "Diodes_SMD:D_SOD-323_HandSoldering" V 2600 3000 50 0001 C CNN
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F 3 "" V 2600 3000 50 0001 C CNN
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1 2600 3000
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0 1 1 0
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$EndComp
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$Comp
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L D_Zener_Small_ALT D21
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U 1 1 59C134C9
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P 2300 3000
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F 0 "D21" H 2500 3100 50 0000 C CNN
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F 1 "3.6V" H 2300 3100 50 0000 C CNN
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F 2 "Diodes_SMD:D_SOD-323_HandSoldering" V 2300 3000 50 0001 C CNN
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F 3 "" V 2300 3000 50 0001 C CNN
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1 2300 3000
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P 2700 3000
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F 0 "D21" H 2900 3100 50 0000 C CNN
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F 1 "3.6V" H 2700 3100 50 0000 C CNN
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F 2 "Diodes_SMD:D_SOD-323_HandSoldering" V 2700 3000 50 0001 C CNN
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F 3 "" V 2700 3000 50 0001 C CNN
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1 2700 3000
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0 1 1 0
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$EndComp
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Wire Wire Line
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2200 3100 2200 3200
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2600 3100 2600 3200
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Wire Wire Line
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2200 3200 2300 3200
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2600 3200 2700 3200
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Wire Wire Line
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2300 3200 2300 3100
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2700 3200 2700 3100
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$Comp
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L GND #PWR0107
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U 1 1 59C1372A
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P 2250 3250
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F 0 "#PWR0107" H 2250 3000 50 0001 C CNN
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F 1 "GND" H 2250 3100 50 0000 C CNN
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F 2 "" H 2250 3250 50 0001 C CNN
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F 3 "" H 2250 3250 50 0001 C CNN
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1 2250 3250
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P 2650 3250
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F 0 "#PWR0107" H 2650 3000 50 0001 C CNN
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F 1 "GND" H 2650 3100 50 0000 C CNN
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F 2 "" H 2650 3250 50 0001 C CNN
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F 3 "" H 2650 3250 50 0001 C CNN
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1 2650 3250
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1 0 0 -1
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$EndComp
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Wire Wire Line
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2250 3250 2250 3200
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Connection ~ 2250 3200
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Connection ~ 2200 2850
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Connection ~ 2300 2750
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2650 3250 2650 3200
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Connection ~ 2650 3200
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Connection ~ 2600 2850
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Connection ~ 2700 2750
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Text GLabel 8650 2550 0 60 Input ~ 0
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WIFI_GPIO16
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$Comp
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@ -581,7 +581,7 @@ Wire Wire Line
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10150 1350 10750 1350
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Text Label 10200 1350 0 60 ~ 0
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ANT_433MHz
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Text Notes 2550 3850 0 60 ~ 0
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Text Notes 650 4100 0 60 ~ 0
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D8,D9: Schottky 2A/30V \nLow drop Vfmax=0.375V
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$Comp
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L R R54
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@ -754,10 +754,6 @@ Wire Wire Line
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2400 4650 2750 4650
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Wire Wire Line
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2400 5250 2750 5250
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Text Label 2450 5250 0 60 ~ 0
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FPD-
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Text Label 2450 4650 0 60 ~ 0
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FPD+
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Text Notes 650 4450 0 60 ~ 0
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USB pull lines connected to\nBANK0 on "gpio" sheet
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$Comp
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@ -829,7 +825,11 @@ Wire Wire Line
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1700 5450 1800 5450
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Connection ~ 1700 5250
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Wire Wire Line
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2200 2850 2200 2900
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2600 2850 2600 2900
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Wire Wire Line
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2300 2750 2300 2900
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2700 2750 2700 2900
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Text GLabel 2750 4650 2 60 Input ~ 0
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USB_FPGA_D+
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Text GLabel 2750 5250 2 60 Input ~ 0
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USB_FPGA_D-
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$EndSCHEMATC
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