readme update: todo allow external differential clock input

README.md

@@ -65,6 +65,7 @@ section (thicker power lines, separately routed feedback)
     [x] Silkscreen JTAG signal names on 6-pin 2.54 mm header
     [x] Silkscreen remove OLED outline
     [x] Solder stop mask must go inbetween all SMD chip pads
+    [ ] External differential clock input
     [ ] Thinner copper, more spacing to SDRAM-FPGA
     [ ] physically sprinkle VCC blocator capacitors under BGA
     [ ] Values on silkscreen