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FPGA aligned to 0.2 mm raster and one trace routead as example

Browse Source 
using Ctrl-V for micro-via
pull/3/head
Davor 7 years ago
parent fdfb12770c
commit fbc265154d
3 changed files with 343 additions and 630 deletions
Show Stats Download Patch File Download Diff File

30
ulx3s-rescue.lib
Unescape View File

@ -0,0 +1,30 @@
EESchema-LIBRARY Version 2.3
#encoding utf-8
#
# USB_OTG-RESCUE-ulx3s
#
DEF USB_OTG-RESCUE-ulx3s P 0 40 Y Y 1 F N
F0 "P" 325 -125 50 H V C CNN
F1 "USB_OTG-RESCUE-ulx3s" 0 200 50 H V C CNN
F2 "" -50 -100 60 V V C CNN
F3 "" -50 -100 60 V V C CNN
$FPLIST
USB*
$ENDFPLIST
DRAW
S -250 -150 250 150 0 1 0 N
S -205 -150 -195 -120 0 1 0 N
S -105 -150 -95 -120 0 1 0 N
S -5 -150 5 -120 0 1 0 N
S 95 -150 105 -120 0 1 0 N
S 195 -150 205 -120 0 1 0 N
X VCC 1 -200 -300 150 U 50 50 1 1 w
X D- 2 -100 -300 150 U 50 50 1 1 P
X D+ 3 0 -300 150 U 50 50 1 1 P
X ID 4 100 -300 150 U 50 50 1 1 W
X GND 5 200 -300 150 U 50 50 1 1 W
X shield 6 400 100 150 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
#End Library

17
ulx3s.kicad_pcb
Unescape View File

@ -2,11 +2,11 @@
(general
(links 200)
(no_connects 199)
(area 87.599999 56.189999 184.420001 109.830001)
(no_connects 200)
(area 64.660001 38.4 193.621334 117.925001)
(thickness 1.6)
(drawings 20)
(tracks 0)
(tracks 6)
(zones 0)
(modules 13)
(nets 44)
@ -65,7 +65,7 @@
(pad_to_mask_clearance 0.2)
(aux_axis_origin 82.67 62.69)
(grid_origin 86.48 79.2)
(visible_elements 7FFFF7FF)
(visible_elements 7FFFFFFF)
(pcbplotparams
(layerselection 0x00030_80000001)
(usegerberextensions false)
@ -743,7 +743,7 @@
)
(module lfe5bg381:BGA-381_pitch0.8mm_dia0.4mm (layer F.Cu) (tedit 56A8C998) (tstamp 56AA0CD9)
(at 135.864 84.68)
(at 135.48 84.8)
(path /56AA9804)
(attr smd)
(fp_text reference U1 (at -7.6 -9.2) (layer F.SilkS)
@ -2307,4 +2307,11 @@
(gr_line (start 184.27 105.87) (end 184.27 60.15) (layer Edge.Cuts) (width 0.3))
(gr_line (start 91.56 109.68) (end 180.46 109.68) (layer Edge.Cuts) (width 0.3))
(segment (start 132.28 80) (end 131.485886 80.794114) (width 0.25) (layer In1.Cu) (net 28))
(segment (start 127.12 101.16) (end 127.12 104.6) (width 0.25) (layer In1.Cu) (net 28))
(segment (start 131.485886 80.794114) (end 131.485886 96.794114) (width 0.25) (layer In1.Cu) (net 28))
(segment (start 131.485886 96.794114) (end 127.12 101.16) (width 0.25) (layer In1.Cu) (net 28))
(segment (start 132.68 79.6) (end 132.28 80) (width 0.25) (layer F.Cu) (net 28))
(via micro (at 132.28 80) (size 0.3) (drill 0.1) (layers F.Cu In1.Cu) (net 28))
)

926
ulx3s.kicad_pcb-bak
Unescape View File

@ -1,15 +1,15 @@
(kicad_pcb (version 4) (host pcbnew 4.0.5+dfsg1-4)
(general
(links 198)
(no_connects 198)
(links 200)
(no_connects 200)
(area 64.660001 38.4 193.621334 117.925001)
(thickness 1.6)
(drawings 20)
(tracks 0)
(tracks 6)
(zones 0)
(modules 13)
(nets 155)
(nets 44)
)
(page A4)
@ -65,7 +65,7 @@
(pad_to_mask_clearance 0.2)
(aux_axis_origin 82.67 62.69)
(grid_origin 86.48 79.2)
(visible_elements 7FFFF7FF)
(visible_elements 7FFFFFFF)
(pcbplotparams
(layerselection 0x00030_80000001)
(usegerberextensions false)
@ -100,154 +100,43 @@
(net 4 /TCK)
(net 5 /TMS)
(net 6 /TDO)
(net 7 "Net-(P1-Pad6)")
(net 8 "Net-(P2-Pad6)")
(net 9 +5V)
(net 10 /USB5V)
(net 11 "Net-(D4-Pad1)")
(net 12 /gpio/IN5V)
(net 13 /gpio/OUT5V)
(net 14 /gpio/P5)
(net 15 /gpio/P6)
(net 16 /gpio/P7)
(net 17 /gpio/P8)
(net 18 /gpio/P11)
(net 19 /gpio/P12)
(net 20 /gpio/P13)
(net 21 /gpio/P14)
(net 22 /gpio/P17)
(net 23 /gpio/P18)
(net 24 /gpio/P19)
(net 25 /gpio/P20)
(net 26 /gpio/P21)
(net 27 /gpio/P22)
(net 28 /gpio/P23)
(net 29 /gpio/P24)
(net 30 /gpio/P25)
(net 31 /gpio/P26)
(net 32 /gpio/P27)
(net 33 /gpio/P28)
(net 34 /gpio/P29)
(net 35 /gpio/P30)
(net 36 /SD_3)
(net 37 /MTMS)
(net 38 /MTCK)
(net 39 /MTDO)
(net 40 /MTDI)
(net 41 /gpio/P9)
(net 42 /gpio/P10)
(net 43 "Net-(GPDI1-PadSHD)")
(net 44 /gpio/USB5V)
(net 45 "Net-(GPDI1-Pad1)")
(net 46 "Net-(GPDI1-Pad3)")
(net 47 "Net-(GPDI1-Pad5)")
(net 48 "Net-(GPDI1-Pad7)")
(net 49 "Net-(GPDI1-Pad9)")
(net 50 "Net-(GPDI1-Pad11)")
(net 51 "Net-(GPDI1-Pad13)")
(net 52 "Net-(GPDI1-Pad15)")
(net 53 "Net-(GPDI1-Pad17)")
(net 54 "Net-(GPDI1-Pad19)")
(net 55 "Net-(GPDI1-Pad2)")
(net 56 "Net-(GPDI1-Pad4)")
(net 57 "Net-(GPDI1-Pad6)")
(net 58 "Net-(GPDI1-Pad8)")
(net 59 "Net-(GPDI1-Pad10)")
(net 60 "Net-(GPDI1-Pad12)")
(net 61 "Net-(GPDI1-Pad14)")
(net 62 "Net-(GPDI1-Pad16)")
(net 63 "Net-(GPDI1-Pad18)")
(net 64 /gpio/P15)
(net 65 /gpio/P16)
(net 66 /gpio/P31)
(net 67 /gpio/P32)
(net 68 /gpio/P33)
(net 69 /gpio/P34)
(net 70 /gpio/P35)
(net 71 /gpio/P36)
(net 72 /gpio/P37)
(net 73 /gpio/P38)
(net 74 "Net-(J1-Pad41)")
(net 75 "Net-(J1-Pad42)")
(net 76 "Net-(J1-Pad43)")
(net 77 "Net-(J1-Pad44)")
(net 78 "Net-(J1-Pad45)")
(net 79 "Net-(J1-Pad46)")
(net 80 "Net-(J1-Pad47)")
(net 81 "Net-(J1-Pad48)")
(net 82 "Net-(J1-Pad49)")
(net 83 "Net-(J1-Pad50)")
(net 84 "Net-(J1-Pad51)")
(net 85 "Net-(J1-Pad52)")
(net 86 "Net-(J1-Pad53)")
(net 87 "Net-(J1-Pad54)")
(net 88 "Net-(J1-Pad55)")
(net 89 "Net-(J1-Pad56)")
(net 90 "Net-(J1-Pad57)")
(net 91 "Net-(J1-Pad58)")
(net 92 "Net-(J1-Pad59)")
(net 93 "Net-(J1-Pad60)")
(net 94 "Net-(J1-Pad61)")
(net 95 "Net-(J1-Pad62)")
(net 96 "Net-(J1-Pad63)")
(net 97 "Net-(J1-Pad64)")
(net 98 /gpio/PMODA1)
(net 99 /gpio/PMODA2)
(net 100 /gpio/PMODA3)
(net 101 /gpio/PMODA4)
(net 102 /gpio/PMODA5)
(net 103 /gpio/PMODA6)
(net 104 /gpio/PMODA7)
(net 105 /gpio/PMODA8)
(net 106 /gpio/MP1)
(net 107 /gpio/MP2)
(net 108 /gpio/MP3)
(net 109 /gpio/MP4)
(net 110 /gpio/MP5)
(net 111 /gpio/MP6)
(net 112 /gpio/PMODB1)
(net 113 /gpio/PMODB2)
(net 114 /gpio/PMODB3)
(net 115 /gpio/PMODB4)
(net 116 /gpio/PMODB5)
(net 117 /gpio/PMODB6)
(net 118 /gpio/PMODB7)
(net 119 /gpio/PMODB8)
(net 120 "Net-(P1-Pad2)")
(net 121 "Net-(P1-Pad3)")
(net 122 "Net-(P1-Pad4)")
(net 123 "Net-(P1-Pad5)")
(net 124 "Net-(P2-Pad2)")
(net 125 "Net-(P2-Pad3)")
(net 126 "Net-(P2-Pad4)")
(net 127 "Net-(P2-Pad5)")
(net 128 "Net-(SD1-Pad3)")
(net 129 "Net-(SD1-Pad4)")
(net 130 "Net-(SD1-Pad6)")
(net 131 /SD_2)
(net 132 "Net-(U2-Pad1)")
(net 133 "Net-(U2-Pad2)")
(net 134 "Net-(U2-Pad3)")
(net 135 "Net-(U2-Pad8)")
(net 136 "Net-(U2-Pad16)")
(net 137 "Net-(U2-Pad17)")
(net 138 "Net-(U2-Pad18)")
(net 139 "Net-(U2-Pad19)")
(net 140 "Net-(U2-Pad20)")
(net 141 "Net-(U2-Pad21)")
(net 142 "Net-(U2-Pad22)")
(net 143 "Net-(J3-Pad1)")
(net 144 "Net-(J3-Pad2)")
(net 145 "Net-(J3-Pad3)")
(net 146 "Net-(J3-Pad4)")
(net 147 "Net-(J3-Pad5)")
(net 148 "Net-(J3-Pad6)")
(net 149 "Net-(J3-Pad7)")
(net 150 "Net-(J3-Pad8)")
(net 151 "Net-(J3-Pad9)")
(net 152 "Net-(J3-Pad10)")
(net 153 "Net-(J3-Pad11)")
(net 154 "Net-(J3-Pad12)")
(net 7 +5V)
(net 8 /USB5V)
(net 9 "Net-(D4-Pad1)")
(net 10 /gpio/IN5V)
(net 11 /gpio/OUT5V)
(net 12 /gpio/P5)
(net 13 /gpio/P6)
(net 14 /gpio/P7)
(net 15 /gpio/P8)
(net 16 /gpio/P11)
(net 17 /gpio/P12)
(net 18 /gpio/P13)
(net 19 /gpio/P14)
(net 20 /gpio/P17)
(net 21 /gpio/P18)
(net 22 /gpio/P19)
(net 23 /gpio/P20)
(net 24 /gpio/P21)
(net 25 /gpio/P22)
(net 26 /gpio/P23)
(net 27 /gpio/P24)
(net 28 /gpio/P25)
(net 29 /gpio/P26)
(net 30 /gpio/P27)
(net 31 /gpio/P28)
(net 32 /gpio/P29)
(net 33 /gpio/P30)
(net 34 /SD_3)
(net 35 /MTMS)
(net 36 /MTCK)
(net 37 /MTDO)
(net 38 /MTDI)
(net 39 /gpio/P9)
(net 40 /gpio/P10)
(net 41 "Net-(GPDI1-PadSHD)")
(net 42 "Net-(US1-Pad6)")
(net 43 "Net-(US2-Pad6)")
(net_class Default "This is the default net class."
(clearance 0.2)
@ -261,7 +150,6 @@
(add_net /MTDI)
(add_net /MTDO)
(add_net /MTMS)
(add_net /SD_2)
(add_net /SD_3)
(add_net /TCK)
(add_net /TDI)
@ -269,20 +157,12 @@
(add_net /TMS)
(add_net /USB5V)
(add_net /gpio/IN5V)
(add_net /gpio/MP1)
(add_net /gpio/MP2)
(add_net /gpio/MP3)
(add_net /gpio/MP4)
(add_net /gpio/MP5)
(add_net /gpio/MP6)
(add_net /gpio/OUT5V)
(add_net /gpio/P10)
(add_net /gpio/P11)
(add_net /gpio/P12)
(add_net /gpio/P13)
(add_net /gpio/P14)
(add_net /gpio/P15)
(add_net /gpio/P16)
(add_net /gpio/P17)
(add_net /gpio/P18)
(add_net /gpio/P19)
@ -297,117 +177,15 @@
(add_net /gpio/P28)
(add_net /gpio/P29)
(add_net /gpio/P30)
(add_net /gpio/P31)
(add_net /gpio/P32)
(add_net /gpio/P33)
(add_net /gpio/P34)
(add_net /gpio/P35)
(add_net /gpio/P36)
(add_net /gpio/P37)
(add_net /gpio/P38)
(add_net /gpio/P5)
(add_net /gpio/P6)
(add_net /gpio/P7)
(add_net /gpio/P8)
(add_net /gpio/P9)
(add_net /gpio/PMODA1)
(add_net /gpio/PMODA2)
(add_net /gpio/PMODA3)
(add_net /gpio/PMODA4)
(add_net /gpio/PMODA5)
(add_net /gpio/PMODA6)
(add_net /gpio/PMODA7)
(add_net /gpio/PMODA8)
(add_net /gpio/PMODB1)
(add_net /gpio/PMODB2)
(add_net /gpio/PMODB3)
(add_net /gpio/PMODB4)
(add_net /gpio/PMODB5)
(add_net /gpio/PMODB6)
(add_net /gpio/PMODB7)
(add_net /gpio/PMODB8)
(add_net /gpio/USB5V)
(add_net "Net-(D4-Pad1)")
(add_net "Net-(GPDI1-Pad1)")
(add_net "Net-(GPDI1-Pad10)")
(add_net "Net-(GPDI1-Pad11)")
(add_net "Net-(GPDI1-Pad12)")
(add_net "Net-(GPDI1-Pad13)")
(add_net "Net-(GPDI1-Pad14)")
(add_net "Net-(GPDI1-Pad15)")
(add_net "Net-(GPDI1-Pad16)")
(add_net "Net-(GPDI1-Pad17)")
(add_net "Net-(GPDI1-Pad18)")
(add_net "Net-(GPDI1-Pad19)")
(add_net "Net-(GPDI1-Pad2)")
(add_net "Net-(GPDI1-Pad3)")
(add_net "Net-(GPDI1-Pad4)")
(add_net "Net-(GPDI1-Pad5)")
(add_net "Net-(GPDI1-Pad6)")
(add_net "Net-(GPDI1-Pad7)")
(add_net "Net-(GPDI1-Pad8)")
(add_net "Net-(GPDI1-Pad9)")
(add_net "Net-(GPDI1-PadSHD)")
(add_net "Net-(J1-Pad41)")
(add_net "Net-(J1-Pad42)")
(add_net "Net-(J1-Pad43)")
(add_net "Net-(J1-Pad44)")
(add_net "Net-(J1-Pad45)")
(add_net "Net-(J1-Pad46)")
(add_net "Net-(J1-Pad47)")
(add_net "Net-(J1-Pad48)")
(add_net "Net-(J1-Pad49)")
(add_net "Net-(J1-Pad50)")
(add_net "Net-(J1-Pad51)")
(add_net "Net-(J1-Pad52)")
(add_net "Net-(J1-Pad53)")
(add_net "Net-(J1-Pad54)")
(add_net "Net-(J1-Pad55)")
(add_net "Net-(J1-Pad56)")
(add_net "Net-(J1-Pad57)")
(add_net "Net-(J1-Pad58)")
(add_net "Net-(J1-Pad59)")
(add_net "Net-(J1-Pad60)")
(add_net "Net-(J1-Pad61)")
(add_net "Net-(J1-Pad62)")
(add_net "Net-(J1-Pad63)")
(add_net "Net-(J1-Pad64)")
(add_net "Net-(J3-Pad1)")
(add_net "Net-(J3-Pad10)")
(add_net "Net-(J3-Pad11)")
(add_net "Net-(J3-Pad12)")
(add_net "Net-(J3-Pad2)")
(add_net "Net-(J3-Pad3)")
(add_net "Net-(J3-Pad4)")
(add_net "Net-(J3-Pad5)")
(add_net "Net-(J3-Pad6)")
(add_net "Net-(J3-Pad7)")
(add_net "Net-(J3-Pad8)")
(add_net "Net-(J3-Pad9)")
(add_net "Net-(P1-Pad2)")
(add_net "Net-(P1-Pad3)")
(add_net "Net-(P1-Pad4)")
(add_net "Net-(P1-Pad5)")
(add_net "Net-(P1-Pad6)")
(add_net "Net-(P2-Pad2)")
(add_net "Net-(P2-Pad3)")
(add_net "Net-(P2-Pad4)")
(add_net "Net-(P2-Pad5)")
(add_net "Net-(P2-Pad6)")
(add_net "Net-(SD1-Pad3)")
(add_net "Net-(SD1-Pad4)")
(add_net "Net-(SD1-Pad6)")
(add_net "Net-(U2-Pad1)")
(add_net "Net-(U2-Pad16)")
(add_net "Net-(U2-Pad17)")
(add_net "Net-(U2-Pad18)")
(add_net "Net-(U2-Pad19)")
(add_net "Net-(U2-Pad2)")
(add_net "Net-(U2-Pad20)")
(add_net "Net-(U2-Pad21)")
(add_net "Net-(U2-Pad22)")
(add_net "Net-(U2-Pad3)")
(add_net "Net-(U2-Pad8)")
(add_net "Net-(US1-Pad6)")
(add_net "Net-(US2-Pad6)")
(add_net VCC)
)
@ -421,88 +199,6 @@
(add_net GND)
)
(module Connectors:USB_Micro-B (layer F.Cu) (tedit 5543E447) (tstamp 56A9630A)
(at 162.68 61.42 180)
(descr "Micro USB Type B Receptacle")
(tags "USB USB_B USB_micro USB_OTG")
(path /56ACC213)
(attr smd)
(fp_text reference P1 (at 0 -3.24 180) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value USB_FTDI (at 0 5.01 180) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -4.6 -2.59) (end 4.6 -2.59) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.6 -2.59) (end 4.6 4.26) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.6 4.26) (end -4.6 4.26) (layer F.CrtYd) (width 0.05))
(fp_line (start -4.6 4.26) (end -4.6 -2.59) (layer F.CrtYd) (width 0.05))
(fp_line (start -4.35 4.03) (end 4.35 4.03) (layer F.SilkS) (width 0.12))
(fp_line (start -4.35 -2.38) (end 4.35 -2.38) (layer F.SilkS) (width 0.12))
(fp_line (start 4.35 -2.38) (end 4.35 4.03) (layer F.SilkS) (width 0.12))
(fp_line (start 4.35 2.8) (end -4.35 2.8) (layer F.SilkS) (width 0.12))
(fp_line (start -4.35 4.03) (end -4.35 -2.38) (layer F.SilkS) (width 0.12))
(pad 1 smd rect (at -1.3 -1.35 270) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask)
(net 10 /USB5V))
(pad 2 smd rect (at -0.65 -1.35 270) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask)
(net 120 "Net-(P1-Pad2)"))
(pad 3 smd rect (at 0 -1.35 270) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask)
(net 121 "Net-(P1-Pad3)"))
(pad 4 smd rect (at 0.65 -1.35 270) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask)
(net 122 "Net-(P1-Pad4)"))
(pad 5 smd rect (at 1.3 -1.35 270) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask)
(net 123 "Net-(P1-Pad5)"))
(pad 6 thru_hole oval (at -2.5 -1.35 270) (size 0.95 1.25) (drill oval 0.55 0.85) (layers *.Cu *.Mask)
(net 7 "Net-(P1-Pad6)"))
(pad 6 thru_hole oval (at 2.5 -1.35 270) (size 0.95 1.25) (drill oval 0.55 0.85) (layers *.Cu *.Mask)
(net 7 "Net-(P1-Pad6)"))
(pad 6 thru_hole oval (at -3.5 1.35 270) (size 1.55 1) (drill oval 1.15 0.5) (layers *.Cu *.Mask)
(net 7 "Net-(P1-Pad6)"))
(pad 6 thru_hole oval (at 3.5 1.35 270) (size 1.55 1) (drill oval 1.15 0.5) (layers *.Cu *.Mask)
(net 7 "Net-(P1-Pad6)"))
)
(module Connect:USB_Micro-B (layer F.Cu) (tedit 5543E447) (tstamp 56A96317)
(at 148.6691 61.42 180)
(descr "Micro USB Type B Receptacle")
(tags "USB USB_B USB_micro USB_OTG")
(path /56ACC38E)
(attr smd)
(fp_text reference P2 (at 0 -3.45 180) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value USB_FPGA (at 0 4.8 180) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -4.6 -2.8) (end 4.6 -2.8) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.6 -2.8) (end 4.6 4.05) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.6 4.05) (end -4.6 4.05) (layer F.CrtYd) (width 0.05))
(fp_line (start -4.6 4.05) (end -4.6 -2.8) (layer F.CrtYd) (width 0.05))
(fp_line (start -4.3509 3.81746) (end 4.3491 3.81746) (layer F.SilkS) (width 0.15))
(fp_line (start -4.3509 -2.58754) (end 4.3491 -2.58754) (layer F.SilkS) (width 0.15))
(fp_line (start 4.3491 -2.58754) (end 4.3491 3.81746) (layer F.SilkS) (width 0.15))
(fp_line (start 4.3491 2.58746) (end -4.3509 2.58746) (layer F.SilkS) (width 0.15))
(fp_line (start -4.3509 3.81746) (end -4.3509 -2.58754) (layer F.SilkS) (width 0.15))
(pad 1 smd rect (at -1.3009 -1.56254 270) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask)
(net 11 "Net-(D4-Pad1)"))
(pad 2 smd rect (at -0.6509 -1.56254 270) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask)
(net 124 "Net-(P2-Pad2)"))
(pad 3 smd rect (at -0.0009 -1.56254 270) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask)
(net 125 "Net-(P2-Pad3)"))
(pad 4 smd rect (at 0.6491 -1.56254 270) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask)
(net 126 "Net-(P2-Pad4)"))
(pad 5 smd rect (at 1.2991 -1.56254 270) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask)
(net 127 "Net-(P2-Pad5)"))
(pad 6 thru_hole oval (at -2.5009 -1.56254 270) (size 0.95 1.25) (drill oval 0.55 0.85) (layers *.Cu *.Mask F.SilkS)
(net 8 "Net-(P2-Pad6)"))
(pad 6 thru_hole oval (at 2.4991 -1.56254 270) (size 0.95 1.25) (drill oval 0.55 0.85) (layers *.Cu *.Mask F.SilkS)
(net 8 "Net-(P2-Pad6)"))
(pad 6 thru_hole oval (at -3.5009 1.13746 270) (size 1.55 1) (drill oval 1.15 0.5) (layers *.Cu *.Mask F.SilkS)
(net 8 "Net-(P2-Pad6)"))
(pad 6 thru_hole oval (at 3.4991 1.13746 270) (size 1.55 1) (drill oval 1.15 0.5) (layers *.Cu *.Mask F.SilkS)
(net 8 "Net-(P2-Pad6)"))
)
(module Socket_Strips:Socket_Strip_Angled_2x15_Pitch2.54mm (layer F.Cu) (tedit 58CD5449) (tstamp 58D3A9BD)
(at 179.19 100.79 180)
(descr "Through hole angled socket strip, 2x15, 2.54mm pitch, 8.51mm socket length, double rows")
@ -793,34 +489,20 @@
(net 1 GND))
(pad 4 thru_hole oval (at -2.54 2.54 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 1 GND))
(pad 5 thru_hole oval (at 0 5.08 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 98 /gpio/PMODA1))
(pad 6 thru_hole oval (at -2.54 5.08 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 99 /gpio/PMODA2))
(pad 7 thru_hole oval (at 0 7.62 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 100 /gpio/PMODA3))
(pad 8 thru_hole oval (at -2.54 7.62 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 101 /gpio/PMODA4))
(pad 9 thru_hole oval (at 0 10.16 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 102 /gpio/PMODA5))
(pad 10 thru_hole oval (at -2.54 10.16 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 103 /gpio/PMODA6))
(pad 11 thru_hole oval (at 0 12.7 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 104 /gpio/PMODA7))
(pad 12 thru_hole oval (at -2.54 12.7 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 105 /gpio/PMODA8))
(pad 13 thru_hole oval (at 0 15.24 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 106 /gpio/MP1))
(pad 14 thru_hole oval (at -2.54 15.24 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 107 /gpio/MP2))
(pad 15 thru_hole oval (at 0 17.78 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 108 /gpio/MP3))
(pad 16 thru_hole oval (at -2.54 17.78 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 109 /gpio/MP4))
(pad 17 thru_hole oval (at 0 20.32 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 110 /gpio/MP5))
(pad 18 thru_hole oval (at -2.54 20.32 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 111 /gpio/MP6))
(pad 5 thru_hole oval (at 0 5.08 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 6 thru_hole oval (at -2.54 5.08 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 7 thru_hole oval (at 0 7.62 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 8 thru_hole oval (at -2.54 7.62 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 9 thru_hole oval (at 0 10.16 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 10 thru_hole oval (at -2.54 10.16 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 11 thru_hole oval (at 0 12.7 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 12 thru_hole oval (at -2.54 12.7 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 13 thru_hole oval (at 0 15.24 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 14 thru_hole oval (at -2.54 15.24 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 15 thru_hole oval (at 0 17.78 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 16 thru_hole oval (at -2.54 17.78 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 17 thru_hole oval (at 0 20.32 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 18 thru_hole oval (at -2.54 20.32 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 19 thru_hole oval (at 0 22.86 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 2 VCC))
(pad 20 thru_hole oval (at -2.54 22.86 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
@ -829,22 +511,14 @@
(net 1 GND))
(pad 22 thru_hole oval (at -2.54 25.4 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 1 GND))
(pad 23 thru_hole oval (at 0 27.94 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 112 /gpio/PMODB1))
(pad 24 thru_hole oval (at -2.54 27.94 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 113 /gpio/PMODB2))
(pad 25 thru_hole oval (at 0 30.48 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 114 /gpio/PMODB3))
(pad 26 thru_hole oval (at -2.54 30.48 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 115 /gpio/PMODB4))
(pad 27 thru_hole oval (at 0 33.02 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 116 /gpio/PMODB5))
(pad 28 thru_hole oval (at -2.54 33.02 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 117 /gpio/PMODB6))
(pad 29 thru_hole oval (at 0 35.56 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 118 /gpio/PMODB7))
(pad 30 thru_hole oval (at -2.54 35.56 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 119 /gpio/PMODB8))
(pad 23 thru_hole oval (at 0 27.94 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 24 thru_hole oval (at -2.54 27.94 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 25 thru_hole oval (at 0 30.48 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 26 thru_hole oval (at -2.54 30.48 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 27 thru_hole oval (at 0 33.02 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 28 thru_hole oval (at -2.54 33.02 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 29 thru_hole oval (at 0 35.56 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 30 thru_hole oval (at -2.54 35.56 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(model ${KISYS3DMOD}/Socket_Strips.3dshapes/Socket_Strip_Angled_2x15_Pitch2.54mm.wrl
(at (xyz -0.05 -0.7 0))
(scale (xyz 1 1 1))
@ -990,30 +664,18 @@
(fp_text user %R (at -5.65 -2.27) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 143 "Net-(J3-Pad1)"))
(pad 2 thru_hole oval (at -2.54 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 144 "Net-(J3-Pad2)"))
(pad 3 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 145 "Net-(J3-Pad3)"))
(pad 4 thru_hole oval (at -2.54 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 146 "Net-(J3-Pad4)"))
(pad 5 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 147 "Net-(J3-Pad5)"))
(pad 6 thru_hole oval (at -2.54 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 148 "Net-(J3-Pad6)"))
(pad 7 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 149 "Net-(J3-Pad7)"))
(pad 8 thru_hole oval (at -2.54 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 150 "Net-(J3-Pad8)"))
(pad 9 thru_hole oval (at 0 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 151 "Net-(J3-Pad9)"))
(pad 10 thru_hole oval (at -2.54 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 152 "Net-(J3-Pad10)"))
(pad 11 thru_hole oval (at 0 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 153 "Net-(J3-Pad11)"))
(pad 12 thru_hole oval (at -2.54 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 154 "Net-(J3-Pad12)"))
(pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 2 thru_hole oval (at -2.54 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 3 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 4 thru_hole oval (at -2.54 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 5 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 6 thru_hole oval (at -2.54 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 7 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 8 thru_hole oval (at -2.54 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 9 thru_hole oval (at 0 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 10 thru_hole oval (at -2.54 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 11 thru_hole oval (at 0 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 12 thru_hole oval (at -2.54 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(model ${KISYS3DMOD}/Socket_Strips.3dshapes/Socket_Strip_Angled_2x06_Pitch2.54mm.wrl
(at (xyz -0.05 -0.25 0))
(scale (xyz 1 1 1))
@ -1041,9 +703,8 @@
(fp_line (start 2.54 -1.143) (end 0.889 -1.143) (layer B.SilkS) (width 0.15))
(fp_line (start -0.889 1.143) (end -2.54 1.143) (layer B.SilkS) (width 0.15))
(pad 1 smd rect (at -1.651 0) (size 1.524 2.032) (layers B.Cu B.Paste B.Mask)
(net 13 /gpio/OUT5V))
(pad 2 smd rect (at 1.651 0) (size 1.524 2.032) (layers B.Cu B.Paste B.Mask)
(net 44 /gpio/USB5V))
(net 11 /gpio/OUT5V))
(pad 2 smd rect (at 1.651 0) (size 1.524 2.032) (layers B.Cu B.Paste B.Mask))
(model SMD_Packages.3dshapes/SMD-1206_Pol.wrl
(at (xyz 0 0 0))
(scale (xyz 0.17 0.16 0.16))
@ -1071,9 +732,9 @@
(fp_line (start 2.54 -1.143) (end 0.889 -1.143) (layer B.SilkS) (width 0.15))
(fp_line (start -0.889 1.143) (end -2.54 1.143) (layer B.SilkS) (width 0.15))
(pad 1 smd rect (at -1.651 0) (size 1.524 2.032) (layers B.Cu B.Paste B.Mask)
(net 9 +5V))
(net 7 +5V))
(pad 2 smd rect (at 1.651 0) (size 1.524 2.032) (layers B.Cu B.Paste B.Mask)
(net 12 /gpio/IN5V))
(net 10 /gpio/IN5V))
(model SMD_Packages.3dshapes/SMD-1206_Pol.wrl
(at (xyz 0 0 0))
(scale (xyz 0.17 0.16 0.16))
@ -1082,7 +743,7 @@
)
(module lfe5bg381:BGA-381_pitch0.8mm_dia0.4mm (layer F.Cu) (tedit 56A8C998) (tstamp 56AA0CD9)
(at 135.864 84.68)
(at 135.48 84.8)
(path /56AA9804)
(attr smd)
(fp_text reference U1 (at -7.6 -9.2) (layer F.SilkS)
@ -1101,17 +762,17 @@
(pad A4 smd circle (at -5.2 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad A5 smd circle (at -4.4 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad A6 smd circle (at -3.6 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 35 /gpio/P30))
(net 33 /gpio/P30))
(pad A7 smd circle (at -2.8 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 23 /gpio/P18))
(net 21 /gpio/P18))
(pad A8 smd circle (at -2 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 22 /gpio/P17))
(net 20 /gpio/P17))
(pad A9 smd circle (at -1.2 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 42 /gpio/P10))
(net 40 /gpio/P10))
(pad A10 smd circle (at -0.4 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 16 /gpio/P7))
(net 14 /gpio/P7))
(pad A11 smd circle (at 0.4 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 17 /gpio/P8))
(net 15 /gpio/P8))
(pad A12 smd circle (at 1.2 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad A13 smd circle (at 2 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad A14 smd circle (at 2.8 -7.6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
@ -1126,17 +787,17 @@
(pad B4 smd circle (at -5.2 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad B5 smd circle (at -4.4 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad B6 smd circle (at -3.6 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 34 /gpio/P29))
(net 32 /gpio/P29))
(pad B7 smd circle (at -2.8 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 1 GND))
(pad B8 smd circle (at -2 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 24 /gpio/P19))
(net 22 /gpio/P19))
(pad B9 smd circle (at -1.2 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 19 /gpio/P12))
(net 17 /gpio/P12))
(pad B10 smd circle (at -0.4 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 41 /gpio/P9))
(net 39 /gpio/P9))
(pad B11 smd circle (at 0.4 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 14 /gpio/P5))
(net 12 /gpio/P5))
(pad B12 smd circle (at 1.2 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad B13 smd circle (at 2 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad B14 smd circle (at 2.8 -6.8) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
@ -1153,16 +814,16 @@
(pad C4 smd circle (at -5.2 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad C5 smd circle (at -4.4 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad C6 smd circle (at -3.6 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 29 /gpio/P24))
(net 27 /gpio/P24))
(pad C7 smd circle (at -2.8 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 28 /gpio/P23))
(net 26 /gpio/P23))
(pad C8 smd circle (at -2 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 25 /gpio/P20))
(net 23 /gpio/P20))
(pad C9 smd circle (at -1.2 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad C10 smd circle (at -0.4 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 18 /gpio/P11))
(net 16 /gpio/P11))
(pad C11 smd circle (at 0.4 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 15 /gpio/P6))
(net 13 /gpio/P6))
(pad C12 smd circle (at 1.2 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad C13 smd circle (at 2 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad C14 smd circle (at 2.8 -6) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
@ -1180,13 +841,13 @@
(net 1 GND))
(pad D5 smd circle (at -4.4 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad D6 smd circle (at -3.6 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 32 /gpio/P27))
(net 30 /gpio/P27))
(pad D7 smd circle (at -2.8 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 30 /gpio/P25))
(net 28 /gpio/P25))
(pad D8 smd circle (at -2 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 26 /gpio/P21))
(net 24 /gpio/P21))
(pad D9 smd circle (at -1.2 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 21 /gpio/P14))
(net 19 /gpio/P14))
(pad D10 smd circle (at -0.4 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad D11 smd circle (at 0.4 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad D12 smd circle (at 1.2 -5.2) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
@ -1204,13 +865,13 @@
(pad E4 smd circle (at -5.2 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad E5 smd circle (at -4.4 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad E6 smd circle (at -3.6 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 33 /gpio/P28))
(net 31 /gpio/P28))
(pad E7 smd circle (at -2.8 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 31 /gpio/P26))
(net 29 /gpio/P26))
(pad E8 smd circle (at -2 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 27 /gpio/P22))
(net 25 /gpio/P22))
(pad E9 smd circle (at -1.2 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask)
(net 20 /gpio/P13))
(net 18 /gpio/P13))
(pad E10 smd circle (at -0.4 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad E11 smd circle (at 0.4 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
(pad E12 smd circle (at 1.2 -4.4) (size 0.4 0.4) (layers F.Cu F.Paste F.Mask))
@ -1668,9 +1329,9 @@
(fp_line (start 2.54 -1.143) (end 0.889 -1.143) (layer B.SilkS) (width 0.15))
(fp_line (start -0.889 1.143) (end -2.54 1.143) (layer B.SilkS) (width 0.15))
(pad 1 smd rect (at -1.651 0 90) (size 1.524 2.032) (layers B.Cu B.Paste B.Mask)
(net 11 "Net-(D4-Pad1)"))
(net 9 "Net-(D4-Pad1)"))
(pad 2 smd rect (at 1.651 0 90) (size 1.524 2.032) (layers B.Cu B.Paste B.Mask)
(net 9 +5V))
(net 7 +5V))
(model SMD_Packages.3dshapes/SMD-1206_Pol.wrl
(at (xyz 0 0 0))
(scale (xyz 0.17 0.16 0.16))
@ -1698,9 +1359,9 @@
(fp_line (start 2.54 -1.143) (end 0.889 -1.143) (layer B.SilkS) (width 0.15))
(fp_line (start -0.889 1.143) (end -2.54 1.143) (layer B.SilkS) (width 0.15))
(pad 1 smd rect (at -1.651 0 270) (size 1.524 2.032) (layers B.Cu B.Paste B.Mask)
(net 9 +5V))
(net 7 +5V))
(pad 2 smd rect (at 1.651 0 270) (size 1.524 2.032) (layers B.Cu B.Paste B.Mask)
(net 10 /USB5V))
(net 8 /USB5V))
(model SMD_Packages.3dshapes/SMD-1206_Pol.wrl
(at (xyz 0 0 0))
(scale (xyz 0.17 0.16 0.16))
@ -1725,21 +1386,18 @@
(fp_line (start -7 15.2) (end -7 0) (layer F.SilkS) (width 0.01016))
(fp_line (start -7 0) (end 7 0) (layer F.SilkS) (width 0.01016))
(pad 1 smd rect (at 1.94 11 90) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask)
(net 36 /SD_3))
(net 34 /SD_3))
(pad 2 smd rect (at 0.84 11 90) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask)
(net 37 /MTMS))
(pad 3 smd rect (at -0.26 11 90) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask)
(net 128 "Net-(SD1-Pad3)"))
(pad 4 smd rect (at -1.36 11 90) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask)
(net 129 "Net-(SD1-Pad4)"))
(net 35 /MTMS))
(pad 3 smd rect (at -0.26 11 90) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at -1.36 11 90) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at -2.46 11 90) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask)
(net 38 /MTCK))
(pad 6 smd rect (at -3.56 11 90) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask)
(net 130 "Net-(SD1-Pad6)"))
(net 36 /MTCK))
(pad 6 smd rect (at -3.56 11 90) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask))
(pad 7 smd rect (at -4.66 11 90) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask)
(net 39 /MTDO))
(net 37 /MTDO))
(pad 8 smd rect (at -5.76 11 90) (size 0.7 1.8) (layers F.Cu F.Paste F.Mask)
(net 40 /MTDI))
(net 38 /MTDI))
(pad S smd rect (at -5.05 0.4 90) (size 1.6 1.4) (layers F.Cu F.Paste F.Mask))
(pad S smd rect (at 0.75 0.4 90) (size 1.8 1.4) (layers F.Cu F.Paste F.Mask))
(pad G smd rect (at -7.45 13.55 90) (size 1.4 1.9) (layers F.Cu F.Paste F.Mask))
@ -1747,7 +1405,7 @@
)
(module micro-hdmi-d:MICRO-HDMI-D (layer F.Cu) (tedit 53F70906) (tstamp 56A965BA)
(at 133.47 57.61 180)
(at 130.93 57.61 180)
(path /56ACD5D4)
(attr smd)
(fp_text reference GPDI1 (at -0.025 -3.125 180) (layer F.SilkS)
@ -1763,48 +1421,29 @@
(fp_line (start -3.3 -6.8) (end 3.3 -6.8) (layer F.SilkS) (width 0.001))
(fp_line (start 3.3 -6.8) (end 3.3 0) (layer F.SilkS) (width 0.001))
(fp_line (start 3.3 0) (end -3.3 0) (layer F.SilkS) (width 0.001))
(pad 1 smd rect (at 1.8 -6.475 180) (size 0.23 0.85) (layers F.Cu F.Paste F.Mask)
(net 45 "Net-(GPDI1-Pad1)"))
(pad 3 smd rect (at 1.4 -6.475 180) (size 0.23 0.85) (layers F.Cu F.Paste F.Mask)
(net 46 "Net-(GPDI1-Pad3)"))
(pad 5 smd rect (at 1 -6.475 180) (size 0.23 0.85) (layers F.Cu F.Paste F.Mask)
(net 47 "Net-(GPDI1-Pad5)"))
(pad 7 smd rect (at 0.6 -6.475 180) (size 0.23 0.85) (layers F.Cu F.Paste F.Mask)
(net 48 "Net-(GPDI1-Pad7)"))
(pad 9 smd rect (at 0.2 -6.475 180) (size 0.23 0.85) (layers F.Cu F.Paste F.Mask)
(net 49 "Net-(GPDI1-Pad9)"))
(pad 11 smd rect (at -0.2 -6.475 180) (size 0.23 0.85) (layers F.Cu F.Paste F.Mask)
(net 50 "Net-(GPDI1-Pad11)"))
(pad 13 smd rect (at -0.6 -6.475 180) (size 0.23 0.85) (layers F.Cu F.Paste F.Mask)
(net 51 "Net-(GPDI1-Pad13)"))
(pad 15 smd rect (at -1 -6.475 180) (size 0.23 0.85) (layers F.Cu F.Paste F.Mask)
(net 52 "Net-(GPDI1-Pad15)"))
(pad 17 smd rect (at -1.4 -6.475 180) (size 0.23 0.85) (layers F.Cu F.Paste F.Mask)
(net 53 "Net-(GPDI1-Pad17)"))
(pad 19 smd rect (at -1.8 -6.475 180) (size 0.23 0.85) (layers F.Cu F.Paste F.Mask)
(net 54 "Net-(GPDI1-Pad19)"))
(pad 2 smd rect (at 1.6 -5.25 180) (size 0.23 1) (layers F.Cu F.Paste F.Mask)
(net 55 "Net-(GPDI1-Pad2)"))
(pad 4 smd rect (at 1.2 -5.25 180) (size 0.23 1) (layers F.Cu F.Paste F.Mask)
(net 56 "Net-(GPDI1-Pad4)"))
(pad 6 smd rect (at 0.8 -5.25 180) (size 0.23 1) (layers F.Cu F.Paste F.Mask)
(net 57 "Net-(GPDI1-Pad6)"))
(pad 8 smd rect (at 0.4 -5.25 180) (size 0.23 1) (layers F.Cu F.Paste F.Mask)
(net 58 "Net-(GPDI1-Pad8)"))
(pad 10 smd rect (at 0 -5.25 180) (size 0.23 1) (layers F.Cu F.Paste F.Mask)
(net 59 "Net-(GPDI1-Pad10)"))
(pad 12 smd rect (at -0.4 -5.25 180) (size 0.23 1) (layers F.Cu F.Paste F.Mask)
(net 60 "Net-(GPDI1-Pad12)"))
(pad 14 smd rect (at -0.8 -5.25 180) (size 0.23 1) (layers F.Cu F.Paste F.Mask)
(net 61 "Net-(GPDI1-Pad14)"))
(pad 16 smd rect (at -1.2 -5.25 180) (size 0.23 1) (layers F.Cu F.Paste F.Mask)
(net 62 "Net-(GPDI1-Pad16)"))
(pad 18 smd rect (at -1.6 -5.25 180) (size 0.23 1) (layers F.Cu F.Paste F.Mask)
(net 63 "Net-(GPDI1-Pad18)"))
(pad 1 smd rect (at 1.8 -6.475 180) (size 0.23 0.85) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at 1.4 -6.475 180) (size 0.23 0.85) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at 1 -6.475 180) (size 0.23 0.85) (layers F.Cu F.Paste F.Mask))
(pad 7 smd rect (at 0.6 -6.475 180) (size 0.23 0.85) (layers F.Cu F.Paste F.Mask))
(pad 9 smd rect (at 0.2 -6.475 180) (size 0.23 0.85) (layers F.Cu F.Paste F.Mask))
(pad 11 smd rect (at -0.2 -6.475 180) (size 0.23 0.85) (layers F.Cu F.Paste F.Mask))
(pad 13 smd rect (at -0.6 -6.475 180) (size 0.23 0.85) (layers F.Cu F.Paste F.Mask))
(pad 15 smd rect (at -1 -6.475 180) (size 0.23 0.85) (layers F.Cu F.Paste F.Mask))
(pad 17 smd rect (at -1.4 -6.475 180) (size 0.23 0.85) (layers F.Cu F.Paste F.Mask))
(pad 19 smd rect (at -1.8 -6.475 180) (size 0.23 0.85) (layers F.Cu F.Paste F.Mask))
(pad 2 smd rect (at 1.6 -5.25 180) (size 0.23 1) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at 1.2 -5.25 180) (size 0.23 1) (layers F.Cu F.Paste F.Mask))
(pad 6 smd rect (at 0.8 -5.25 180) (size 0.23 1) (layers F.Cu F.Paste F.Mask))
(pad 8 smd rect (at 0.4 -5.25 180) (size 0.23 1) (layers F.Cu F.Paste F.Mask))
(pad 10 smd rect (at 0 -5.25 180) (size 0.23 1) (layers F.Cu F.Paste F.Mask))
(pad 12 smd rect (at -0.4 -5.25 180) (size 0.23 1) (layers F.Cu F.Paste F.Mask))
(pad 14 smd rect (at -0.8 -5.25 180) (size 0.23 1) (layers F.Cu F.Paste F.Mask))
(pad 16 smd rect (at -1.2 -5.25 180) (size 0.23 1) (layers F.Cu F.Paste F.Mask))
(pad 18 smd rect (at -1.6 -5.25 180) (size 0.23 1) (layers F.Cu F.Paste F.Mask))
(pad SHD smd rect (at 3.45 -5.06 180) (size 2.4 1.38) (layers F.Cu F.Paste F.Mask)
(net 43 "Net-(GPDI1-PadSHD)"))
(net 41 "Net-(GPDI1-PadSHD)"))
(pad SHD smd rect (at -3.45 -5.06 180) (size 2.4 1.38) (layers F.Cu F.Paste F.Mask)
(net 43 "Net-(GPDI1-PadSHD)"))
(net 41 "Net-(GPDI1-PadSHD)"))
(pad "" thru_hole oval (at -3.1 -1.7 180) (size 1.5 2.55) (drill oval 0.65 1.7) (layers *.Cu *.Mask F.SilkS))
(pad "" thru_hole oval (at 3.1 -1.7 180) (size 1.5 2.55) (drill oval 0.65 1.7) (layers *.Cu *.Mask F.SilkS))
)
@ -1834,23 +1473,19 @@
(fp_line (start 0 -15.6) (end 0 8.4) (layer B.Fab) (width 0.1524))
(fp_line (start 0 8.4) (end 16 8.4) (layer B.Fab) (width 0.1524))
(pad 9 smd oval (at 2.99 -15.75 180) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask)
(net 39 /MTDO))
(net 37 /MTDO))
(pad 10 smd oval (at 4.99 -15.75 180) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask)
(net 40 /MTDI))
(net 38 /MTDI))
(pad 11 smd oval (at 6.99 -15.75 180) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask)
(net 36 /SD_3))
(net 34 /SD_3))
(pad 12 smd oval (at 8.99 -15.75 180) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask)
(net 37 /MTMS))
(net 35 /MTMS))
(pad 13 smd oval (at 10.99 -15.75 180) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask)
(net 38 /MTCK))
(pad 14 smd oval (at 12.99 -15.75 180) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask)
(net 131 /SD_2))
(pad 1 smd rect (at 0 0 270) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask)
(net 132 "Net-(U2-Pad1)"))
(pad 2 smd oval (at 0 -2 270) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask)
(net 133 "Net-(U2-Pad2)"))
(pad 3 smd oval (at 0 -4 270) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask)
(net 134 "Net-(U2-Pad3)"))
(net 36 /MTCK))
(pad 14 smd oval (at 12.99 -15.75 180) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask))
(pad 1 smd rect (at 0 0 270) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask))
(pad 2 smd oval (at 0 -2 270) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask))
(pad 3 smd oval (at 0 -4 270) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask))
(pad 4 smd oval (at 0 -6 270) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask)
(net 3 /TDI))
(pad 5 smd oval (at 0 -8 270) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask)
@ -1859,24 +1494,16 @@
(net 4 /TCK))
(pad 7 smd oval (at 0 -12 270) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask)
(net 5 /TMS))
(pad 8 smd oval (at 0 -14 270) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask)
(net 135 "Net-(U2-Pad8)"))
(pad 8 smd oval (at 0 -14 270) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask))
(pad 15 smd oval (at 16 -14 270) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask)
(net 1 GND))
(pad 16 smd oval (at 16 -12 270) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask)
(net 136 "Net-(U2-Pad16)"))
(pad 17 smd oval (at 16 -10 270) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask)
(net 137 "Net-(U2-Pad17)"))
(pad 18 smd oval (at 16 -8 270) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask)
(net 138 "Net-(U2-Pad18)"))
(pad 19 smd oval (at 16 -6 270) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask)
(net 139 "Net-(U2-Pad19)"))
(pad 20 smd oval (at 16 -4 270) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask)
(net 140 "Net-(U2-Pad20)"))
(pad 21 smd oval (at 16 -2 270) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask)
(net 141 "Net-(U2-Pad21)"))
(pad 22 smd oval (at 16 0 270) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask)
(net 142 "Net-(U2-Pad22)"))
(pad 16 smd oval (at 16 -12 270) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask))
(pad 17 smd oval (at 16 -10 270) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask))
(pad 18 smd oval (at 16 -8 270) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask))
(pad 19 smd oval (at 16 -6 270) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask))
(pad 20 smd oval (at 16 -4 270) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask))
(pad 21 smd oval (at 16 -2 270) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask))
(pad 22 smd oval (at 16 0 270) (size 2.4 1.1) (layers B.Cu B.Paste B.Mask))
(model ${ESPLIB}/ESP8266.3dshapes/ESP-12.wrl
(at (xyz 0.04 0 0))
(scale (xyz 0.3937 0.3937 0.3937))
@ -2439,133 +2066,99 @@
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 12 /gpio/IN5V))
(net 10 /gpio/IN5V))
(pad 2 thru_hole oval (at -2.54 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 13 /gpio/OUT5V))
(net 11 /gpio/OUT5V))
(pad 3 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 1 GND))
(pad 4 thru_hole oval (at -2.54 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 1 GND))
(pad 5 thru_hole oval (at 0 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 14 /gpio/P5))
(net 12 /gpio/P5))
(pad 6 thru_hole oval (at -2.54 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 15 /gpio/P6))
(net 13 /gpio/P6))
(pad 7 thru_hole oval (at 0 7.62 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 16 /gpio/P7))
(net 14 /gpio/P7))
(pad 8 thru_hole oval (at -2.54 7.62 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 17 /gpio/P8))
(net 15 /gpio/P8))
(pad 9 thru_hole oval (at 0 10.16 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 41 /gpio/P9))
(net 39 /gpio/P9))
(pad 10 thru_hole oval (at -2.54 10.16 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 42 /gpio/P10))
(net 40 /gpio/P10))
(pad 11 thru_hole oval (at 0 12.7 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 18 /gpio/P11))
(net 16 /gpio/P11))
(pad 12 thru_hole oval (at -2.54 12.7 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 19 /gpio/P12))
(net 17 /gpio/P12))
(pad 13 thru_hole oval (at 0 15.24 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 20 /gpio/P13))
(net 18 /gpio/P13))
(pad 14 thru_hole oval (at -2.54 15.24 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 21 /gpio/P14))
(pad 15 thru_hole oval (at 0 17.78 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 64 /gpio/P15))
(pad 16 thru_hole oval (at -2.54 17.78 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 65 /gpio/P16))
(net 19 /gpio/P14))
(pad 15 thru_hole oval (at 0 17.78 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 16 thru_hole oval (at -2.54 17.78 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 17 thru_hole oval (at 0 20.32 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 22 /gpio/P17))
(net 20 /gpio/P17))
(pad 18 thru_hole oval (at -2.54 20.32 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 23 /gpio/P18))
(net 21 /gpio/P18))
(pad 19 thru_hole oval (at 0 22.86 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 24 /gpio/P19))
(net 22 /gpio/P19))
(pad 20 thru_hole oval (at -2.54 22.86 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 25 /gpio/P20))
(net 23 /gpio/P20))
(pad 21 thru_hole oval (at 0 25.4 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 26 /gpio/P21))
(net 24 /gpio/P21))
(pad 22 thru_hole oval (at -2.54 25.4 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 27 /gpio/P22))
(net 25 /gpio/P22))
(pad 23 thru_hole oval (at 0 27.94 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 28 /gpio/P23))
(net 26 /gpio/P23))
(pad 24 thru_hole oval (at -2.54 27.94 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 29 /gpio/P24))
(net 27 /gpio/P24))
(pad 25 thru_hole oval (at 0 30.48 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 30 /gpio/P25))
(net 28 /gpio/P25))
(pad 26 thru_hole oval (at -2.54 30.48 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 31 /gpio/P26))
(net 29 /gpio/P26))
(pad 27 thru_hole oval (at 0 33.02 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 32 /gpio/P27))
(net 30 /gpio/P27))
(pad 28 thru_hole oval (at -2.54 33.02 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 33 /gpio/P28))
(net 31 /gpio/P28))
(pad 29 thru_hole oval (at 0 35.56 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 34 /gpio/P29))
(net 32 /gpio/P29))
(pad 30 thru_hole oval (at -2.54 35.56 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 35 /gpio/P30))
(pad 31 thru_hole oval (at 0 38.1 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 66 /gpio/P31))
(pad 32 thru_hole oval (at -2.54 38.1 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 67 /gpio/P32))
(pad 33 thru_hole oval (at 0 40.64 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 68 /gpio/P33))
(pad 34 thru_hole oval (at -2.54 40.64 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 69 /gpio/P34))
(pad 35 thru_hole oval (at 0 43.18 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 70 /gpio/P35))
(pad 36 thru_hole oval (at -2.54 43.18 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 71 /gpio/P36))
(pad 37 thru_hole oval (at 0 45.72 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 72 /gpio/P37))
(pad 38 thru_hole oval (at -2.54 45.72 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 73 /gpio/P38))
(net 33 /gpio/P30))
(pad 31 thru_hole oval (at 0 38.1 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 32 thru_hole oval (at -2.54 38.1 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 33 thru_hole oval (at 0 40.64 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 34 thru_hole oval (at -2.54 40.64 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 35 thru_hole oval (at 0 43.18 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 36 thru_hole oval (at -2.54 43.18 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 37 thru_hole oval (at 0 45.72 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 38 thru_hole oval (at -2.54 45.72 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 39 thru_hole oval (at 0 48.26 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 2 VCC))
(pad 40 thru_hole oval (at -2.54 48.26 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 2 VCC))
(pad 41 thru_hole oval (at 0 50.8 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 74 "Net-(J1-Pad41)"))
(pad 42 thru_hole oval (at -2.54 50.8 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 75 "Net-(J1-Pad42)"))
(pad 43 thru_hole oval (at 0 53.34 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 76 "Net-(J1-Pad43)"))
(pad 44 thru_hole oval (at -2.54 53.34 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 77 "Net-(J1-Pad44)"))
(pad 45 thru_hole oval (at 0 55.88 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 78 "Net-(J1-Pad45)"))
(pad 46 thru_hole oval (at -2.54 55.88 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 79 "Net-(J1-Pad46)"))
(pad 47 thru_hole oval (at 0 58.42 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 80 "Net-(J1-Pad47)"))
(pad 48 thru_hole oval (at -2.54 58.42 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 81 "Net-(J1-Pad48)"))
(pad 49 thru_hole oval (at 0 60.96 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 82 "Net-(J1-Pad49)"))
(pad 50 thru_hole oval (at -2.54 60.96 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 83 "Net-(J1-Pad50)"))
(pad 51 thru_hole oval (at 0 63.5 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 84 "Net-(J1-Pad51)"))
(pad 52 thru_hole oval (at -2.54 63.5 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 85 "Net-(J1-Pad52)"))
(pad 53 thru_hole oval (at 0 66.04 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 86 "Net-(J1-Pad53)"))
(pad 54 thru_hole oval (at -2.54 66.04 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 87 "Net-(J1-Pad54)"))
(pad 55 thru_hole oval (at 0 68.58 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 88 "Net-(J1-Pad55)"))
(pad 56 thru_hole oval (at -2.54 68.58 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 89 "Net-(J1-Pad56)"))
(pad 57 thru_hole oval (at 0 71.12 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 90 "Net-(J1-Pad57)"))
(pad 58 thru_hole oval (at -2.54 71.12 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 91 "Net-(J1-Pad58)"))
(pad 59 thru_hole oval (at 0 73.66 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 92 "Net-(J1-Pad59)"))
(pad 60 thru_hole oval (at -2.54 73.66 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 93 "Net-(J1-Pad60)"))
(pad 61 thru_hole oval (at 0 76.2 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 94 "Net-(J1-Pad61)"))
(pad 62 thru_hole oval (at -2.54 76.2 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 95 "Net-(J1-Pad62)"))
(pad 63 thru_hole oval (at 0 78.74 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 96 "Net-(J1-Pad63)"))
(pad 64 thru_hole oval (at -2.54 78.74 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 97 "Net-(J1-Pad64)"))
(pad 41 thru_hole oval (at 0 50.8 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 42 thru_hole oval (at -2.54 50.8 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 43 thru_hole oval (at 0 53.34 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 44 thru_hole oval (at -2.54 53.34 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 45 thru_hole oval (at 0 55.88 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 46 thru_hole oval (at -2.54 55.88 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 47 thru_hole oval (at 0 58.42 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 48 thru_hole oval (at -2.54 58.42 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 49 thru_hole oval (at 0 60.96 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 50 thru_hole oval (at -2.54 60.96 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 51 thru_hole oval (at 0 63.5 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 52 thru_hole oval (at -2.54 63.5 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 53 thru_hole oval (at 0 66.04 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 54 thru_hole oval (at -2.54 66.04 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 55 thru_hole oval (at 0 68.58 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 56 thru_hole oval (at -2.54 68.58 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 57 thru_hole oval (at 0 71.12 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 58 thru_hole oval (at -2.54 71.12 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 59 thru_hole oval (at 0 73.66 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 60 thru_hole oval (at -2.54 73.66 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 61 thru_hole oval (at 0 76.2 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 62 thru_hole oval (at -2.54 76.2 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 63 thru_hole oval (at 0 78.74 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(pad 64 thru_hole oval (at -2.54 78.74 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask))
(model ${KISYS3DMOD}/Socket_Strips.3dshapes/Socket_Strip_Angled_2x32_Pitch2.54mm.wrl
(at (xyz -0.05 -1.55 0))
(scale (xyz 1 1 1))
@ -2573,6 +2166,82 @@
)
)
(module usb_otg:USB_Micro-B (layer F.Cu) (tedit 5543E447) (tstamp 58D43115)
(at 149.98 61.42 180)
(descr "Micro USB Type B Receptacle")
(tags "USB USB_B USB_micro USB_OTG")
(path /58D432CE)
(attr smd)
(fp_text reference US1 (at 0 -3.24 180) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value USB_FTDI (at 0 5.01 180) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -4.6 -2.59) (end 4.6 -2.59) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.6 -2.59) (end 4.6 4.26) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.6 4.26) (end -4.6 4.26) (layer F.CrtYd) (width 0.05))
(fp_line (start -4.6 4.26) (end -4.6 -2.59) (layer F.CrtYd) (width 0.05))
(fp_line (start -4.35 4.03) (end 4.35 4.03) (layer F.SilkS) (width 0.12))
(fp_line (start -4.35 -2.38) (end 4.35 -2.38) (layer F.SilkS) (width 0.12))
(fp_line (start 4.35 -2.38) (end 4.35 4.03) (layer F.SilkS) (width 0.12))
(fp_line (start 4.35 2.8) (end -4.35 2.8) (layer F.SilkS) (width 0.12))
(fp_line (start -4.35 4.03) (end -4.35 -2.38) (layer F.SilkS) (width 0.12))
(pad 1 smd rect (at -1.3 -1.35 270) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask)
(net 8 /USB5V))
(pad 2 smd rect (at -0.65 -1.35 270) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at 0 -1.35 270) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at 0.65 -1.35 270) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at 1.3 -1.35 270) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask)
(net 1 GND))
(pad 6 thru_hole oval (at -2.5 -1.35 270) (size 0.95 1.25) (drill oval 0.55 0.85) (layers *.Cu *.Mask)
(net 42 "Net-(US1-Pad6)"))
(pad 6 thru_hole oval (at 2.5 -1.35 270) (size 0.95 1.25) (drill oval 0.55 0.85) (layers *.Cu *.Mask)
(net 42 "Net-(US1-Pad6)"))
(pad 6 thru_hole oval (at -3.5 1.35 270) (size 1.55 1) (drill oval 1.15 0.5) (layers *.Cu *.Mask)
(net 42 "Net-(US1-Pad6)"))
(pad 6 thru_hole oval (at 3.5 1.35 270) (size 1.55 1) (drill oval 1.15 0.5) (layers *.Cu *.Mask)
(net 42 "Net-(US1-Pad6)"))
)
(module usb_otg:USB_Micro-B (layer F.Cu) (tedit 5543E447) (tstamp 58D43122)
(at 169.03 61.42 180)
(descr "Micro USB Type B Receptacle")
(tags "USB USB_B USB_micro USB_OTG")
(path /58D4378B)
(attr smd)
(fp_text reference US2 (at 0 -3.24 180) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value USB_FPGA (at 0 5.01 180) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -4.6 -2.59) (end 4.6 -2.59) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.6 -2.59) (end 4.6 4.26) (layer F.CrtYd) (width 0.05))
(fp_line (start 4.6 4.26) (end -4.6 4.26) (layer F.CrtYd) (width 0.05))
(fp_line (start -4.6 4.26) (end -4.6 -2.59) (layer F.CrtYd) (width 0.05))
(fp_line (start -4.35 4.03) (end 4.35 4.03) (layer F.SilkS) (width 0.12))
(fp_line (start -4.35 -2.38) (end 4.35 -2.38) (layer F.SilkS) (width 0.12))
(fp_line (start 4.35 -2.38) (end 4.35 4.03) (layer F.SilkS) (width 0.12))
(fp_line (start 4.35 2.8) (end -4.35 2.8) (layer F.SilkS) (width 0.12))
(fp_line (start -4.35 4.03) (end -4.35 -2.38) (layer F.SilkS) (width 0.12))
(pad 1 smd rect (at -1.3 -1.35 270) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask)
(net 9 "Net-(D4-Pad1)"))
(pad 2 smd rect (at -0.65 -1.35 270) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask))
(pad 3 smd rect (at 0 -1.35 270) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask))
(pad 4 smd rect (at 0.65 -1.35 270) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask))
(pad 5 smd rect (at 1.3 -1.35 270) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask)
(net 1 GND))
(pad 6 thru_hole oval (at -2.5 -1.35 270) (size 0.95 1.25) (drill oval 0.55 0.85) (layers *.Cu *.Mask)
(net 43 "Net-(US2-Pad6)"))
(pad 6 thru_hole oval (at 2.5 -1.35 270) (size 0.95 1.25) (drill oval 0.55 0.85) (layers *.Cu *.Mask)
(net 43 "Net-(US2-Pad6)"))
(pad 6 thru_hole oval (at -3.5 1.35 270) (size 1.55 1) (drill oval 1.15 0.5) (layers *.Cu *.Mask)
(net 43 "Net-(US2-Pad6)"))
(pad 6 thru_hole oval (at 3.5 1.35 270) (size 1.55 1) (drill oval 1.15 0.5) (layers *.Cu *.Mask)
(net 43 "Net-(US2-Pad6)"))
)
(dimension 53.34 (width 0.3) (layer Eco2.User)
(gr_text "53,340 mm" (at 71.16 83.01 90) (layer Eco2.User)
(effects (font (size 1.5 1.5) (thickness 0.3)))
@ -2638,4 +2307,11 @@
(gr_line (start 184.27 105.87) (end 184.27 60.15) (layer Edge.Cuts) (width 0.3))
(gr_line (start 91.56 109.68) (end 180.46 109.68) (layer Edge.Cuts) (width 0.3))
(segment (start 131.68 96.6) (end 127.12 101.16) (width 0.25) (layer In1.Cu) (net 28))
(segment (start 127.12 101.16) (end 127.12 104.6) (width 0.25) (layer In1.Cu) (net 28))
(segment (start 131.68 80.6) (end 131.68 96.6) (width 0.25) (layer In1.Cu) (net 28))
(segment (start 132.28 80) (end 131.68 80.6) (width 0.25) (layer In1.Cu) (net 28))
(segment (start 132.68 79.6) (end 132.28 80) (width 0.25) (layer F.Cu) (net 28))
(via micro (at 132.28 80) (size 0.3) (drill 0.1) (layers F.Cu In1.Cu) (net 28))
)

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