138 Commits (0f9d00f6024b28b2478d9be65975621086536b0d)

Author SHA1 Message Date
davor eb3fc2ec70 connecting some GNDs and GNDing unnamed shield pads on USB connectors
8 years ago
davor b1718ae700 thick power lines
8 years ago
Emard 7d0fc68da0 connecting 2.5V
8 years ago
Emard 108abc3158 connecting 3.3V and 1.2V
8 years ago
Emard ecc772b518 optimizing wakeup network
8 years ago
davor aeaf64f99c connecting all BTNs except power BTN
8 years ago
davor dcbfda0556 Run DRC to update cupper fill zones
8 years ago
davor 9d6f8bf493 improving SD card power supply and replacing with
8 years ago
Emard 2426a9f7e7 DRC rerun
8 years ago
Emard 5590ba802d optimizing routing for SD and FTDI
8 years ago
davor c381c4c5c4 small PCB optimizations
8 years ago
davor 1f60f95a71 compatible OLED models: SSD1306 or SSD1331
8 years ago
Emard 28c4106026 J2 GPIO: routed in the purple plane only
8 years ago
Emard aabd353e71 J1 GPIO: grouping lines on purple plane
8 years ago
Emard 752eddee0e J1 routed using only purple plane, (yellow plane made free)
8 years ago
davor 1e5e0b01a6 connecting JTAG lines to FTDI serial lines RI DCD CTS DSR
8 years ago
davor 57fa143c11 connecting 2.5V and 3.3V sources to BGA planes
8 years ago
davor 4a0cc08307 connecting 1.2V core voltage, solving FPGA voltage plane,
8 years ago
Emard 5e953da6b9 connecting required pins for WiFi programming
8 years ago
Emard 4c13f262e8 connecting FTDI TXD/RXD
8 years ago
Emard 092e601af1 connecting LEDs
8 years ago
Emard 364957f9e0 connecting OLED
8 years ago
Emard feb31c8f87 moving inner layer routes away from BGA
8 years ago
Emard 24c52062fa moving routes under BGA out of inner layers
8 years ago
Emard 6e2e5f8c39 moving routing out of inner layers under BGA to allow
8 years ago
davor 3a9160cb16 scrapping current routing, placing power supply on copper zones under the BGA
8 years ago
davor 21aa552e1a placing copper fill zones for power supply by the book
8 years ago
Emard 37f7a62a25 reducing minimal drill size to 0.2 mm as
8 years ago
Emard 8061b47da8 moving some resistor near flash chip
8 years ago
Emard b12f1b64a6 routing spi flash lines
8 years ago
Emard 820f30f598 routing JTAG
8 years ago
davor 3a079bd1d2 moving some resistor closer to ftdi
8 years ago
davor 48f79d581b reordering PCB elements to simplify or shorten routes
8 years ago
Emard 6e48d42150 fully routed GPIO
8 years ago
davor dcc2d375ea routing additional pins to J2 GPIO. 2 differential pairs left to route
8 years ago
davor 9f0d9c46a7 routing half of J2 gpio
8 years ago
Emard e30bbeea40 routing 4 GPIO on J2
8 years ago
Emard 48dc148919 manually routing J1 differential
8 years ago
Emard 9050eefd6e update fill zone
8 years ago
Davor 3446afcc08 optimizing PCB component placement
8 years ago
Davor 19b884baef using corrected schem symbol, reordering pins
8 years ago
Davor 39dce76f0a use new schem symbol
8 years ago
Davor 2cda80c3a8 manually routed few tracks of GPIO
8 years ago
Davor 8a53acb71a cleaning GPDI routes and moving OLED back in place
8 years ago
davor 70fb21781b reorder GPDI differential pairs for almost straitforward routing
8 years ago
davor a8f1214b27 reorder SDRAM to FPGA connection for straightforward routing
8 years ago
Davor 19c91e5c6b differential pair track thickness and spacing
8 years ago
Davor 632e5bd443 importing netlist with differential pairs named + -
8 years ago
Davor ec42a18d26 reordering RAM connections to use peripheral pins near SDRAM chip
8 years ago
davor 53f11a6950 reducing track width to 0.19 mm to pass out of 2nd row of BGA
8 years ago