Emard
|
ea8e02c2fe
|
PCB: trac cosmetix remove redundand trace towards GPDI1 THT hole
|
6 years ago |
|
Emard
|
222a3182f6
|
PCB: trac cosmetix under US1 vias
|
6 years ago |
|
Emard
|
c89d277b32
|
PCB: v3.0: (only version bump v2.1.17->v3.0)
|
6 years ago |
|
Emard
|
2f284399db
|
PCB v2.1.17: Silkscreen cosmetix
text "SDRAM" moved away from pads
text "R56" moved from top to bottom side, where it belongs
|
6 years ago |
|
Emard
|
d2506bad02
|
PCB v2.1.16: SDRAM pads length 1.1->1.2 mm
|
6 years ago |
|
Emard
|
65512e8323
|
PCB v2.1.15: rounded pads for PCB jumpers, BGA thermal management
|
6 years ago |
|
Emard
|
aaa8f530d1
|
PCB v2.1.14: thermal management and trac cosmetix
|
6 years ago |
|
Emard
|
247db8b329
|
PCB v2.1.12: thermal management (Zec suggestions)
|
6 years ago |
|
Emard
|
5680223e2d
|
PCB v2.1.11: thermal management
|
6 years ago |
|
Emard
|
65320e230f
|
PCB: thermal management around RV2 RV3
|
6 years ago |
|
Emard
|
7305ea83ba
|
PCB: silkscreen cosmetix R11 R12
|
6 years ago |
|
Emard
|
a68c9789de
|
PCB v2.1.10: thernal management against tombstoning
|
6 years ago |
|
Emard
|
e4addde457
|
PCB v2.1.9: move VIAs out of pads under BGA
update R56 as virtual to not appear in fabrication placement list
copper fill keepout on jumpers
trac cosmetix
|
6 years ago |
|
Emard
|
9099c7f928
|
PCB: ADC silkscreen dot update
|
6 years ago |
|
Emard
|
df8154be45
|
PCB v2.1.8: BGA chip alignment fiducials, ft231x reduced row distance
|
6 years ago |
|
Emard
|
3eabc3d722
|
PCB: ft231x enlarged silkscreen outline
|
6 years ago |
|
Emard
|
3f4842a718
|
PCB: balancing thermal relief on both SMD pads of R,C in attempt to prevent tombstoning
|
6 years ago |
|
Emard
|
f9e4c8f0e3
|
PCB v2.1.7: new footprints for R,C and LED with rounded pads
|
6 years ago |
|
Emard
|
dfcd39ecf4
|
PCB v2.1.6: trac cosmetix around SDRAM
|
6 years ago |
|
Emard
|
2f6f450ce3
|
PCB: updated SDRAM footprint and trac cosmetix
|
6 years ago |
|
Emard
|
59c3943ce9
|
PCB: adc silkscreen cosmetix
|
6 years ago |
|
Emard
|
c7e9196ce2
|
PCB: updating dipswitch and adc silkscreen
|
6 years ago |
|
Emard
|
9848db7076
|
PCB: update footprints for ADC and USBSERIAL
grid origin to lower left edge of PCB
|
6 years ago |
|
Emard
|
90f43a53b8
|
PCB: trac cosmetix
|
6 years ago |
|
Emard
|
91a831541e
|
PCB v2.1.5: ADC land pattern pads distance now 4.68 mm
|
6 years ago |
|
Emard
|
2863267e27
|
PCB: trac cosmetix under BGA
|
6 years ago |
|
Emard
|
aa58166786
|
PCB: move SW1 mark at Fab layer to more visible place
|
6 years ago |
|
Emard
|
9361e1b3b9
|
PCB v2.1.4: ADC footprint according to Maxim packaging information
|
6 years ago |
|
Emard
|
e67da73514
|
PCB: re-enabling ESP32 in 3D view
|
6 years ago |
|
Emard
|
4c76c26cae
|
PCB: copper fill keepout from USB pads, "skriptarnica.hr" written under ESP32
|
6 years ago |
|
Emard
|
7d9c40b7b8
|
footprints, PCB: dipswitch footprint moved to directory "footprints/dipswitch/dipswitch_smd.pretty"
|
6 years ago |
|
Emard
|
0f52e86c05
|
PCB: uncluttering Fab layers
|
6 years ago |
|
Emard
|
f46af906b7
|
PCB v2.1.3: mostly NOP changes going into next PCB release
|
6 years ago |
|
Emard
|
55bb335121
|
PCB: fixing Fab layers for assembly layout printed on paper sheet
|
6 years ago |
|
Emard
|
8c4d1cddc0
|
PCB: route GP14 thru nearest VIA and leave space to
balance 45deg routing to SDRAM.
|
6 years ago |
|
Emard
|
5936d9a722
|
PCB: trac cosmetix
|
6 years ago |
|
Emard
|
7880718881
|
PCB: all copper traces under BGA 0.127 mm width
|
6 years ago |
|
Emard
|
08bffeb7e3
|
PCB: re-run DRC after schematics v2.1.2 to make sure for NOP change
|
6 years ago |
|
Emard
|
95f06be717
|
partially fixed fab layer (need to fix many footprints too)
|
6 years ago |
|
Emard
|
432ada4878
|
PCB: copper fill keepout area around GPDI and ADC,
thicker trace 0.127->0.19 for 2.5V under BGA
|
6 years ago |
|
Emard
|
7286403ff3
|
PCB v2.1.2: trac cosmetix under BGA
|
6 years ago |
|
Emard
|
7a31fc77a4
|
PCB: connecting each BGA pad with max 1 track (thermal relief)
|
6 years ago |
|
Emard
|
be4d757c29
|
PCB: trac cosmetix
|
6 years ago |
|
Emard
|
96c3dfe16f
|
PCB v2.1.1: copper fill cosmetix
|
6 years ago |
|
Emard
|
6ebd1367f2
|
PCB: grid origin to lower left edge of PCB
|
6 years ago |
|
Emard
|
6138a03c05
|
PCB: in2.Cu fill minimal width increased 0.1->0.126 mm
More than this >=0.127 mm DRC will not pass
|
6 years ago |
|
Emard
|
cf0c54059c
|
PCB v2.1
|
6 years ago |
|
Emard
|
b7fd68a25f
|
PCB: more GND VIAs
|
6 years ago |
|
Emard
|
6e2b08c1e3
|
PCB: solder paste to copper clearance -0.025 mm from each edge
|
6 years ago |
|
Emard
|
1f7c73ee9c
|
PCB: trac cosmetix
|
6 years ago |
