davor
|
53ea44f214
|
Silkscreen JTAG header signal names
readme update
|
7 years ago |
|
davor
|
5a2eb8220f
|
silkscreen on top layer: avoiding writing on solder pads
|
7 years ago |
|
Emard
|
407177a486
|
Move HDMI a bit closer to OLED
|
7 years ago |
|
Emard
|
e15ab7d84f
|
removing battery circle from the sikscreen
(changing footprint)
|
7 years ago |
|
Emard
|
e3a535e842
|
move 25MHz clock generator Y1 away from heat and EM noise
|
7 years ago |
|
Emard
|
7569433437
|
removing OLED outline from the silkscreen
(footprint changed)
|
7 years ago |
|
Emard
|
079a93a159
|
readme update
|
7 years ago |
|
Emard
|
0312d80fa3
|
reducing default solder mask clearance to 0.05 mm
it will help preventing shortcuts coming from solder
overflow
|
7 years ago |
|
Emard
|
64f70e4998
|
routing 5V using shorter path between 2 USB connectors
|
7 years ago |
|
davor
|
f120d212d9
|
433 MHz onboard antenna (need to uncover copper infill layers)
|
7 years ago |
|
davor
|
6b9a07a7ab
|
BGA footprint with double squares for manual alignment
|
7 years ago |
|
Emard
|
98a9a84c3e
|
readme update
|
7 years ago |
|
Emard
|
46218e383e
|
yellow layer cleanup - removing part of trace leading nowhere
|
7 years ago |
|
Emard
|
c28b6c7126
|
readme update todo list
|
7 years ago |
|
Emard
|
e76db02634
|
small changes, moving the traces
|
7 years ago |
|
davor
|
9f6eae914c
|
connecting almost all free pins from ESP32 to FPGA
(only 4 left unconnected)
|
7 years ago |
|
Emard
|
1f9c416f60
|
R25 moved away from OLED screw hole (to the bottom side)
|
7 years ago |
|
Emard
|
1588776a9d
|
top layer GND infill
|
7 years ago |
|
Emard
|
7768508f33
|
moving battery to allow clearance from VBAT pad and screw hole (GND)
|
7 years ago |
|
davor
|
68db94dacd
|
small cleanup of traces/vias
|
7 years ago |
|
davor
|
d462ffc350
|
Connecting more ESP32 WIFI pins,
sharing them with external 2.54 mm header
to access ADC and HSPI
|
7 years ago |
|
davor
|
f46b531882
|
doc: esp32 module pinout JPG picture
|
7 years ago |
|
davor
|
600c4478fd
|
esp32: avoid connection to NC pin for JTAG_TDO
|
7 years ago |
|
davor
|
0229a768ad
|
FPGA direct-to-pin Hackish USB transciver 27 ohm + 3.6 V zener
|
7 years ago |
|
davor
|
00c73747b3
|
thicker USB GND traces, vias and small cleanup on nearby traces
|
7 years ago |
|
davor
|
1ab504aaf2
|
Moving USB connectors on top layer
|
7 years ago |
|
davor
|
fdf38ad9a1
|
DIP switch moved to the right, near RAM.
Maybe should be moved more to the right not to overlap with OLED
|
7 years ago |
|
davor
|
7681329e37
|
readme updating TODO list
|
7 years ago |
|
davor
|
1ad66b57fc
|
readme new wishes from Marko
|
7 years ago |
|
davor
|
79e8f40e95
|
readme
|
7 years ago |
|
davor
|
fbe0cf4d01
|
symmetric usb left-right
|
7 years ago |
|
davor
|
45827eecf5
|
moving silkscreen values and references out of BGA pads
|
7 years ago |
|
davor
|
d562b631d8
|
readme
|
7 years ago |
|
davor
|
45e1976f38
|
gerber update
|
8 years ago |
|
davor
|
375924d916
|
readme
|
8 years ago |
|
Emard
|
7262e854c0
|
readme
|
8 years ago |
|
Emard
|
730a44a20e
|
update jpeg's
|
8 years ago |
|
Emard
|
dedd8fb6ff
|
readme update
|
8 years ago |
|
Emard
|
4d3828764b
|
tidying up routes
|
8 years ago |
|
davor
|
5f589c33f4
|
USB directly to FPGA for possible USB1.1 core
|
8 years ago |
|
davor
|
2e7622d27d
|
Readme update
|
8 years ago |
|
davor
|
236f63488a
|
DIP SWITCH routed
|
8 years ago |
|
davor
|
f147df4510
|
ADC datasheets
|
8 years ago |
|
davor
|
29885b92a4
|
readme update
|
8 years ago |
|
davor
|
6d14ed8ff0
|
Placing DIP switch, but not yet connecting it to FPGA
|
8 years ago |
|
davor
|
37bb008e24
|
ADC connecting REF+/REF- and SPI
|
8 years ago |
|
davor
|
2ca8acc32d
|
ADC chip moved on top layer.
Connecting 8 analog lines to J2
and remaining VCC/GND
|
8 years ago |
|
davor
|
32836831ae
|
i2c of RTC connected to GPDI i2c
|
8 years ago |
|
davor
|
ee20b46f6d
|
connecting ADC substrate pad to GND
|
8 years ago |
|
davor
|
a0d3693b66
|
moving ADC chip near J2, better possibility to get routed
|
8 years ago |
