davor
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982e43da3b
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schematics: changing all resistor footprints to normal 0603 (not handsoldering)
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7 years ago |
davor
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5096a087f9
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schematics: SPI flash chip schematic symbol changed from FRAM to EEPROM
It has same pinout but looks better in BOM.
|
7 years ago |
davor
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b9330957c2
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schematics: MFG_URL for R,C
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7 years ago |
davor
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a1c2e8228f
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schematics: changing old rescue symbols with new from kicad 5 library
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7 years ago |
davor
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49f7610d21
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schematics: set part numbers for most resistors
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7 years ago |
davor
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ed23f3a2f9
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schematics: updating resistor footprints
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7 years ago |
davor
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853497d403
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schematics: replace 45F chip with 85F
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7 years ago |
davor
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b006a34b71
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schematics: C54 22uF for 3V RTC battery
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7 years ago |
davor
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3996e140ef
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schematics: kicad 5 load and save
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7 years ago |
davor
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7b88b3baf1
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schematics: v1.8 adding capacitor for 2.5/3.3V
|
7 years ago |
davor
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1911c0afe2
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schematics: add capacitor near SDRAM
|
7 years ago |
davor
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db50639a60
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schematics: 4 22nF capacitors for 2.5/3.3V and 3.3V near J1 and J2 connector
|
7 years ago |
davor
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ec8c012ebb
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schematics: jumper for selectable 2.5V/3.3V J1 voltage
|
7 years ago |
davor
|
4ae602347e
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schematics: power decoupling capactor near OLED
|
7 years ago |
davor
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42e3255b7a
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schematics: US2 diodes pull up/down 1.5k/15k
|
7 years ago |
davor
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b535b7ccee
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schematics: references for buttons on previous PCB v1.7
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7 years ago |
davor
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d95e2eab3d
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schematics: 3 decoupling 22nF capacitors for SDRAM
|
7 years ago |
davor
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2f3cc59274
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schematics: adding mouser P/N
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7 years ago |
davor
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b205d52f4f
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schematics: sprinkling 22nF decoupling capacitors under FPGA
|
7 years ago |
davor
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a04b74cc61
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schematics, footprints: micro usb cleanup
|
7 years ago |
davor
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6079a51257
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schematics: symbol for SDRAM copied from rescue to proper library
|
7 years ago |
davor
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c1053dd7bd
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schematics: cleanup of MFG_PN to simplify BOM
|
7 years ago |
davor
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6b50f65544
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footprints: FPGA renaming Quad SPI lines D2,D3
schematics: reference FPGA footprint directly (not from rescue file)
|
7 years ago |
davor
|
987aefa1fd
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schematics: routing FPGA to SPI QUAD.
BTN_R,U connected to BANK2,3 on "ram" sheet
|
7 years ago |
davor
|
e81d05b68d
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schematics: renaming pins J..+- to GP,GN..
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7 years ago |
davor
|
6228263ac6
|
schematics: additional diode R23 to make shutdown more reliable
reduce hold resistor, use schottky for nSLEEP
|
7 years ago |
Emard
|
31814ddf66
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schematics: note on Flash over JTAG programming
|
7 years ago |
davor
|
f4d7692c91
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schematics: SD card symbol with 2 CD pins connected to GND
|
7 years ago |
Emard
|
ea88fb4ceb
|
schematics: changed I2C and SPI FLASH part numbers to provide
150-mil SOIC-8 packages to fit one board.
FLASH increased 16->32Mb
|
7 years ago |
Emard
|
7aa1854030
|
schematics: use SOA008 footprint for the SPI flash chip
|
7 years ago |
Emard
|
3915779e0c
|
schematics: part numbers and URLs of datasheets and manufacturers
of most chips and connectors. Small parts not done yet.
|
7 years ago |
Emard
|
52814d6ae0
|
WIFI LED (blue) on schematics
|
7 years ago |
Emard
|
a5a51a8f28
|
connected missing SD card pins to esp-32
|
7 years ago |
Emard
|
cca17d282d
|
open-close to check that everything loads fine
|
7 years ago |
Emard
|
35b3a8b3dd
|
changing to 45F which is production device now
schem symbol 45F fixed typo T8->T7 (GND) and SERDES
|
7 years ago |
Emard
|
ba4c8e8d22
|
PCB v1.6 SDRAM fully reworked
|
7 years ago |
davor
|
1ea88bda53
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Adding pins to schematic symbols for all chips in unit "H" (SERDES)
Non-serdes chips need GND connection on unit "H".
"power" sheet now connects GND's at unit "H".
|
7 years ago |
Emard
|
d57b16519c
|
update (I hope) all chip units to 85F
add more GND vias
|
7 years ago |
davor
|
e4fc99887e
|
moving GND and VCC on schematics symbols to
common locations for planned PCB which
supports upgrade path for example
12F->25F->45F->85F and if possible ECP5U->ECP5UM
|
7 years ago |
Emard
|
07de158d38
|
R56 for FT231X rev A,B,C workaround from TN140_FT231X Errata
|
7 years ago |
davor
|
bc4b88ee58
|
Micro SD: using SCHD3A0100
|
7 years ago |
davor
|
c42c90ae37
|
FPGA_DONE connected to ESP32 over a resistors,
Other resistors moved away to allow routing thru the mess.
ESP-32 connected missing GND pin
|
7 years ago |
davor
|
10df092413
|
using modified ECP5 footprint
|
7 years ago |
Emard
|
bab7ee607e
|
placeholder for 1.5k pullup for usb 1.0
|
7 years ago |
davor
|
f120d212d9
|
433 MHz onboard antenna (need to uncover copper infill layers)
|
7 years ago |
davor
|
0229a768ad
|
FPGA direct-to-pin Hackish USB transciver 27 ohm + 3.6 V zener
|
7 years ago |
davor
|
6d14ed8ff0
|
Placing DIP switch, but not yet connecting it to FPGA
|
7 years ago |
davor
|
37bb008e24
|
ADC connecting REF+/REF- and SPI
|
7 years ago |
davor
|
2ca8acc32d
|
ADC chip moved on top layer.
Connecting 8 analog lines to J2
and remaining VCC/GND
|
7 years ago |
davor
|
2153a220a0
|
schematic symbol for ADC MAX11123
small PCB traces cleanup
ADC chip placed on PCB but connected only to GND
|
7 years ago |