283 Commits (730a44a20e93f409a2b69c73a0e9229b4932275b)
 

Author SHA1 Message Date
davor 4a0cc08307 connecting 1.2V core voltage, solving FPGA voltage plane,
8 years ago
davor ad274f07a2 recommendations for BGA381 4-layer PCB layout
8 years ago
Emard 5e953da6b9 connecting required pins for WiFi programming
8 years ago
Emard 5432fd6540 connecting clock and ftdi USB
8 years ago
Emard 4c13f262e8 connecting FTDI TXD/RXD
8 years ago
Emard 092e601af1 connecting LEDs
8 years ago
Emard 364957f9e0 connecting OLED
8 years ago
Emard feb31c8f87 moving inner layer routes away from BGA
8 years ago
Emard 24c52062fa moving routes under BGA out of inner layers
8 years ago
Emard 6e2e5f8c39 moving routing out of inner layers under BGA to allow
8 years ago
davor 3a9160cb16 scrapping current routing, placing power supply on copper zones under the BGA
8 years ago
davor 21aa552e1a placing copper fill zones for power supply by the book
8 years ago
Emard 37f7a62a25 reducing minimal drill size to 0.2 mm as
8 years ago
Emard 1392c5aa2b how to route BGA
8 years ago
Emard 8061b47da8 moving some resistor near flash chip
8 years ago
Emard b12f1b64a6 routing spi flash lines
8 years ago
Emard 820f30f598 routing JTAG
8 years ago
davor 3a079bd1d2 moving some resistor closer to ftdi
8 years ago
davor 48f79d581b reordering PCB elements to simplify or shorten routes
8 years ago
Emard 6e48d42150 fully routed GPIO
8 years ago
davor dcc2d375ea routing additional pins to J2 GPIO. 2 differential pairs left to route
8 years ago
davor 9f0d9c46a7 routing half of J2 gpio
8 years ago
Emard e30bbeea40 routing 4 GPIO on J2
8 years ago
Emard 48dc148919 manually routing J1 differential
8 years ago
Emard 9050eefd6e update fill zone
8 years ago
Davor 55ecd6c1c2 update 3D view top
8 years ago
Davor 56e8ad2710 update 3D view pictures
8 years ago
Davor 3446afcc08 optimizing PCB component placement
8 years ago
Davor 19b884baef using corrected schem symbol, reordering pins
8 years ago
Davor a4b74230d3 fixing errors in schem symbol BANK6
8 years ago
Davor af58a36fbd delete old FPGA schem. symbol component from the library
8 years ago
Davor 39dce76f0a use new schem symbol
8 years ago
Davor e5f97e1897 schematic symbol FPGA: mark bank physical location
8 years ago
Davor 2cda80c3a8 manually routed few tracks of GPIO
8 years ago
Davor 8a53acb71a cleaning GPDI routes and moving OLED back in place
8 years ago
davor 70fb21781b reorder GPDI differential pairs for almost straitforward routing
8 years ago
davor 4a26254f9a correcting schematic symbol of FPGA
8 years ago
davor a8f1214b27 reorder SDRAM to FPGA connection for straightforward routing
8 years ago
davor 01d1cad2ec add missing pins in schematic symbol for BANK3
8 years ago
Davor 19c91e5c6b differential pair track thickness and spacing
8 years ago
Davor 632e5bd443 importing netlist with differential pairs named + -
8 years ago
Davor aef3945a8e differential pin naming for GPDI, USB, GPIO
8 years ago
Davor d0791b1e47 correcting few pin numbering errors in FPGA schematic symbols
8 years ago
Davor ec42a18d26 reordering RAM connections to use peripheral pins near SDRAM chip
8 years ago
Davor 40aef19979 FPGA schematic symbol add mssing PR41A, PR41B to BANK3
8 years ago
davor 53f11a6950 reducing track width to 0.19 mm to pass out of 2nd row of BGA
8 years ago
Davor 961755fc98 manual routing BGA power
8 years ago
Davor af042dfef0 manually routing BGA power
8 years ago
davor a1d25d9d24 create copper fill layers
8 years ago
davor d6fd30e59c jumper to disable wifi module
8 years ago