Emard
|
7569433437
|
removing OLED outline from the silkscreen
(footprint changed)
|
7 years ago |
|
Emard
|
0312d80fa3
|
reducing default solder mask clearance to 0.05 mm
it will help preventing shortcuts coming from solder
overflow
|
7 years ago |
|
Emard
|
64f70e4998
|
routing 5V using shorter path between 2 USB connectors
|
7 years ago |
|
davor
|
f120d212d9
|
433 MHz onboard antenna (need to uncover copper infill layers)
|
7 years ago |
|
Emard
|
46218e383e
|
yellow layer cleanup - removing part of trace leading nowhere
|
7 years ago |
|
Emard
|
e76db02634
|
small changes, moving the traces
|
7 years ago |
|
davor
|
9f6eae914c
|
connecting almost all free pins from ESP32 to FPGA
(only 4 left unconnected)
|
7 years ago |
|
Emard
|
1f9c416f60
|
R25 moved away from OLED screw hole (to the bottom side)
|
7 years ago |
|
Emard
|
1588776a9d
|
top layer GND infill
|
7 years ago |
|
Emard
|
7768508f33
|
moving battery to allow clearance from VBAT pad and screw hole (GND)
|
7 years ago |
|
davor
|
68db94dacd
|
small cleanup of traces/vias
|
7 years ago |
|
davor
|
d462ffc350
|
Connecting more ESP32 WIFI pins,
sharing them with external 2.54 mm header
to access ADC and HSPI
|
7 years ago |
|
davor
|
600c4478fd
|
esp32: avoid connection to NC pin for JTAG_TDO
|
7 years ago |
|
davor
|
0229a768ad
|
FPGA direct-to-pin Hackish USB transciver 27 ohm + 3.6 V zener
|
7 years ago |
|
davor
|
00c73747b3
|
thicker USB GND traces, vias and small cleanup on nearby traces
|
7 years ago |
|
davor
|
1ab504aaf2
|
Moving USB connectors on top layer
|
7 years ago |
|
davor
|
fdf38ad9a1
|
DIP switch moved to the right, near RAM.
Maybe should be moved more to the right not to overlap with OLED
|
7 years ago |
|
davor
|
fbe0cf4d01
|
symmetric usb left-right
|
7 years ago |
|
davor
|
45827eecf5
|
moving silkscreen values and references out of BGA pads
|
7 years ago |
|
Emard
|
4d3828764b
|
tidying up routes
|
7 years ago |
|
davor
|
5f589c33f4
|
USB directly to FPGA for possible USB1.1 core
|
7 years ago |
|
davor
|
236f63488a
|
DIP SWITCH routed
|
7 years ago |
|
davor
|
6d14ed8ff0
|
Placing DIP switch, but not yet connecting it to FPGA
|
7 years ago |
|
davor
|
37bb008e24
|
ADC connecting REF+/REF- and SPI
|
7 years ago |
|
davor
|
2ca8acc32d
|
ADC chip moved on top layer.
Connecting 8 analog lines to J2
and remaining VCC/GND
|
7 years ago |
|
davor
|
32836831ae
|
i2c of RTC connected to GPDI i2c
|
7 years ago |
|
davor
|
ee20b46f6d
|
connecting ADC substrate pad to GND
|
7 years ago |
|
davor
|
a0d3693b66
|
moving ADC chip near J2, better possibility to get routed
|
7 years ago |
|
davor
|
851f2a0162
|
optimizing PCB lines for +5V
|
7 years ago |
|
davor
|
2153a220a0
|
schematic symbol for ADC MAX11123
small PCB traces cleanup
ADC chip placed on PCB but connected only to GND
|
7 years ago |
|
Emard
|
be09416928
|
Add 27 ohm resistors in series with FTDI USB and readme update
|
8 years ago |
|
davor
|
278ac6b341
|
2.2uF for ESP-32 and gerber update
|
8 years ago |
|
davor
|
81b3ea5da0
|
adding minimal set of 3 2.2uF capacitor for 1.2V, 2.5V and 3.3V
|
8 years ago |
|
davor
|
96fabee1bc
|
Moving C18 away from battery
|
8 years ago |
|
Emard
|
a11072b4e4
|
beautifying routes of LEDs and moving oscillator under the LEDs
|
8 years ago |
|
Emard
|
ee7d266543
|
Resistors for LEDs
|
8 years ago |
|
Emard
|
18aef04f2c
|
JTAG header
|
8 years ago |
|
Emard
|
238ad770ce
|
moving USB LEDs on TOP layer
|
8 years ago |
|
davor
|
dcbf46dff2
|
optimizing PCB
|
8 years ago |
|
davor
|
34c4e9d7f3
|
increasing power via diameter
|
8 years ago |
|
davor
|
b7500cc477
|
increasing thickness of power traces, moving clock
to a bank which is always at 3.3V
|
8 years ago |
|
Emard
|
57fdb7743e
|
1mm thick 5V line
|
8 years ago |
|
davor
|
76542e7630
|
moving FTDI USB on top
|
8 years ago |
|
davor
|
1a122bfc67
|
fully routed
|
8 years ago |
|
davor
|
dbf4b92a22
|
audio DAC routed
|
8 years ago |
|
davor
|
23b588ff16
|
Routing... 4 routes remaining
|
8 years ago |
|
davor
|
f036dae0fd
|
tidying up some traces, nothing important
|
8 years ago |
|
Emard
|
f7f305ad0d
|
tidying up SDRAM connections. Trace lengths unequal,
expected about 0.1 ns time difference
|
8 years ago |
|
davor
|
20cbbc4ef9
|
continue routing PCB
|
8 years ago |
|
davor
|
eb3fc2ec70
|
connecting some GNDs and GNDing unnamed shield pads on USB connectors
|
8 years ago |
