davor
|
ecdbece0e6
|
readme update
|
7 years ago |
|
davor
|
5fc3fbda8a
|
readme update (about kicad 5)
|
7 years ago |
|
davor
|
24fd600a82
|
readme update
|
7 years ago |
|
davor
|
e972a96371
|
readme update
|
7 years ago |
|
davor
|
1f1ed2a72d
|
schematics: HDMI connector part number changed to match PCB layout
|
7 years ago |
|
davor
|
94d8e59661
|
readme update
|
7 years ago |
|
davor
|
976f617a72
|
readme update
|
7 years ago |
|
davor
|
e087b751b9
|
readme update
|
7 years ago |
|
davor
|
dd148a62df
|
readme update
|
7 years ago |
|
davor
|
6832d8b865
|
readme update
|
7 years ago |
|
davor
|
5cddd4da10
|
readme update
|
7 years ago |
|
Emard
|
b19072ae87
|
readme update
|
7 years ago |
|
Emard
|
65582918bd
|
readme update
|
7 years ago |
|
davor
|
8cac013993
|
readme update
|
7 years ago |
|
davor
|
19b6d423f8
|
readme update
|
7 years ago |
|
davor
|
db10fa9093
|
readme update
|
7 years ago |
|
davor
|
d4fc287571
|
readme update
|
7 years ago |
|
davor
|
cf37ea3128
|
readme update, trac cosmetix
|
7 years ago |
|
davor
|
e7d9fd6f31
|
readme update
|
7 years ago |
|
davor
|
caf02320ee
|
schematics: reconnecting 3.6V Zener from usb to fpga side
|
7 years ago |
|
davor
|
d61e51c84f
|
readme update
|
7 years ago |
|
davor
|
2b6d859b12
|
readme update
|
7 years ago |
|
davor
|
472457808b
|
readme update
|
7 years ago |
|
davor
|
c44f3f9786
|
readme update
|
7 years ago |
|
davor
|
746cb7b8db
|
readme update
|
7 years ago |
|
davor
|
8717a08852
|
readme update
|
7 years ago |
|
davor
|
1ad630c338
|
readme update
|
7 years ago |
|
davor
|
1349ac0f51
|
readme update
|
7 years ago |
|
davor
|
e91dc9305f
|
readme update
|
7 years ago |
|
davor
|
e0a7830a4e
|
readme update
|
7 years ago |
|
davor
|
5c4b5dc90d
|
readme update
|
7 years ago |
|
davor
|
1afeee5961
|
readme update
|
7 years ago |
|
davor
|
cc6adc5a4d
|
readme update
|
7 years ago |
|
davor
|
22a79ec617
|
readme update
|
7 years ago |
|
davor
|
6cadba6783
|
readme update
|
7 years ago |
|
davor
|
20d94f7e3e
|
readme update
|
7 years ago |
|
davor
|
9fbd80ba77
|
readme update
|
7 years ago |
|
davor
|
449751bbbe
|
readme update
|
7 years ago |
|
davor
|
aa176cae9f
|
readme update
|
7 years ago |
|
davor
|
a0d5476205
|
readme update
|
7 years ago |
|
davor
|
f976a0aaff
|
readme update
|
7 years ago |
|
davor
|
42c141a886
|
readme update
|
7 years ago |
|
davor
|
f7dc501e2c
|
readme update
|
7 years ago |
|
davor
|
a560d000d7
|
feadme update
|
7 years ago |
|
Emard
|
272eda6bb4
|
readme update
|
7 years ago |
|
Emard
|
78e4a8ddbb
|
readme update
|
7 years ago |
|
davor
|
017c797154
|
readme update
|
7 years ago |
|
davor
|
33440ee3fa
|
schematics, readme: swap SD_CLK and SD_D2 pins,
now SD_CLK is connected to clock capable FPGA pin
|
7 years ago |
|
davor
|
f9985ae004
|
readme update
|
7 years ago |
|
davor
|
c86d41449f
|
readme update
|
7 years ago |
