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312 lines
14 KiB
312 lines
14 KiB
# ULX3S PCB
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[ULX3S](http://radiona.org/ulx3s) = [University digital Logic](https://www.fer.unizg.hr/en/course/diglog) Learning
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Xtensible board release 3 with SDRAM,
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Successor of [ULX2S](http://github.com/emard/ulx2s).
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[Manual](/doc/MANUAL.md) *
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[Quickstart Binaries](http://github.com/emard/ulx3s-bin) *
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[ULX3S at Kitspace](https://kitspace.org/boards/github.com/emard/ulx3s)
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3D preview
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Prototypes available
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at [SKRIPTARNICA](http://skriptarnica.hr/vijest.aspx?newsID=1466),
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local shop inside of [FER](https://www.fer.unizg.hr/) university.
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This is a small (94x51 mm) standalone FPGA board
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for education, research and general purpose, with a full
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featured selection of chips which I all wanted on
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a low-cost PCB, but haven't found on the market.
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It's open source and open hardware because if it is
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good for our development of [f32c](http://github.com/f32c/f32c) SOC,
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it should be also good to other projects.
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ULX3S will carry all digital logic on our
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research, [education](https://www.fer.unizg.hr/en/course/diglog) and
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[makerspace](https://radiona.org) projects in next 5 years.
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ULX3S is standalone embeddable gadget with onboard display, buttons,
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storage, WiFi and compatible connectors.
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ULX3S can do things no other board can.
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ULX3S can self-reflash with a bitstream sent
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remotely from web interface over WiFi or from SD
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card browsed by onboard OLED display and buttons.
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ULX3S can completely power down and wakeup from
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battery backed RTC.
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ULX3S has rich range of chips and connectivity
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required for many other open source projects:
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SDRAM, USB, PS/2, SDCARD, Digital Video, FLASH, RTC, I2C, OLED, AUDIO, ADC,
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onboard FM/ASK antenna 88-433.92 MHz and 56 GPIO pins routed as differential
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pairs and have pinout that is PMOD compatible. There are 12 true
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differential bidirectional pairs and 16 single-ended pairs.
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ULX3S is sufficiently equipped to
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emulate [Amiga](https://github.com/emard/Minimig_ECS) retro
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computer and run its games, but can do much more like
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running [Linux](https://twitter.com/fpga_dave/status/1053290842809683968).
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[Schematics](/doc/schematics.pdf) and PCB started with KiCAD 4.
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After version v1.8 project switched to KiCAD 5 PCB editor:
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kicad ulx3s.pro
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View generated gerbers
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gerbv -p plot/ulx3s.gvp
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# Features
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FPGA: Lattice ECP5 [LFE5U-85F-6BG381C](http://www.latticesemi.com/~/media/LatticeSemi/Documents/DataSheets/ECP5/FPGA-DS-02012.pdf?document_id=50461) (85K LUT)
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USB: FTDI [FT231XS](https://www.ftdichip.com/Support/Documents/DataSheets/ICs/DS_FT231X.pdf) (500kbit JTAG and 3Mbit USB-serial)
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GPIO: 56 pins (12 true differential pairs, 16 single-ended pairs), [PMOD](https://reference.digilentinc.com/_media/pmod:pmod:originalPmodInterfaceSpecification.pdf)-friendly
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with power out 3.3V/1A 2.5V/1.5A
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RAM: 32MB SDRAM [MT48LC16M16](https://www.micron.com/~/media/Documents/Products/Data%20Sheet/DRAM/256Mb_sdr.pdf)
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Flash: 16MB Quad-SPI Flash [IS25LP128F](http://www.issi.com/WW/pdf/25LP-WP128F.pdf) for FPGA config
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Storage: Micro-SD slot
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LEDs: 11 (8 blink-LEDs, 2 USB LEDs, 1 WiFi LED)
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Buttons: 7 (4 direction, 2 fire, 1 power button)
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Audio: 3.5 mm jack with 4 contacts (analog stereo + digital audio or composite video)
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Video: GPDI connector with 3.3V-5V I2C bidirectional level shifter
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Display: placeholder for 0.96" SPI COLOR OLED [SSD1331](https://drive.google.com/file/d/0B5lkVYnewKTGRlpxcEdWaXNvWnM/view)
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WiFi+bluetooth: placeholder for [ESP-32](https://www.espressif.com/sites/default/files/documentation/esp32_datasheet_en.pdf) (Standalone JTAG web interface over WiFi)
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Antenna: 88-108/433 MHz FM/ASK onboard
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ADC: 8 channels, 12 bit, 1 MSa/s [MAX11125](https://datasheets.maximintegrated.com/en/ds/MAX11120-MAX11128.pdf)
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Power: 3 Switching voltage regulators: 1.1V, 2.5V, 3.3V
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Clock: 25 MHz onboard, external differential clock input
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Low power sleep: 5uA/5V standby, RTC [MCP7940N](http://ww1.microchip.com/downloads/en/DeviceDoc/20005010F.pdf) clock wakeup, power button, 32768 Hz quartz and battery
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GPDI is General Purpose Differential Interface,
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Electrically LVDS, mostly TMDS tolerant
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female receptacle more-or-less compatible
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with digital monitors/TVs
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# Production
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Independent production
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like [q3k](https://twitter.com/q3k/status/1029010026269167618) is
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welcome and desirable under conditions of [modified MIT LICENSE](/LICENSE.md).
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If you do manual assembly here is [minimal parts list](/doc/MINIMAL.md).
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ZIP the gerbers and send them to manufacturer:
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zip -r /tmp/ulx3s.zip plot/ulx3s
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If you are going to order this project by yourself, it is important
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what manufacturer to choose for PCBA (PCB and Assembly) service.
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Parts can be ordered from [Detailed BOM](/doc/ulx3s_bom.csv)
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or from [ULX3S at Kitspace](https://kitspace.org/boards/github.com/emard/ulx3s),
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which automatically submits [Simplified 1-click BOM](/1-click-bom.tsv) by
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clicking on "Digikey" or "Mouser" button. On each click, Digikey and Mouser will keep
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accumulating the BOM in the shopping cart. Number of unique parts on Digikey and Mouser
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should be equal but Digikey scripts have bugs.
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First time click on "Digikey" will upload a partial BOM, then the shopping
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cart must be reset and next click on "Digikey" will upload complete BOM.
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To reset shopping cart, click "New Cart" or "New Basket".
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Kitspace may be updated with about 1 day delay after this project update.
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Choose PCBA manufacturer which can produce PCB of IPC CLASS 3 quality,
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5/5 mil trace resolution and 0.2 mm holes.
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Avoid manufacturer who claims "quality" and "satisfaction" but doesn't
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really know what will be IPC CLASS rating for this project.
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PCBA manufacturer prices for the parts should be approximately equal as those
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from distributors like [Mouser](http://www.mouser.com) or [DigiKey](http://www.digikey.com).
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Avoid any PCBA manufacturer who asks 3$ for the 1$ part or 40$ for the 30$ part.
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Select [Mouser](http://www.mouser.com) language/location icon to PCBA manufacturer
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country of origin and $-currency to check is PCBA manufacturer telling the truth
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about prices.
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Before soldering the parts, ask manufacturer for [pictures](/pic/ulx3sb-v18.jpg) of PCB.
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CLASS 3 demands, among other things, that all drill holes stay inside of VIA pads.
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If some holes [break-out](/pic/ulx3sb-v18-breakout-c19.png) from pads,
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ask manufacturer to make new PCBs with better drill and copper layer alignment.
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[PCBCART](http://www.pcbcart.com) offers CLASS 3 quality and assembly at reasonable cost.
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Prices for the parts are equal to [Mouser](http://www.mouser.com).
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Don't pay everything at once. Following payment phases during the
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PCBA production are recommended:
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1. Pay for the parts
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2. Manufacturer orders the parts and optionally negotiates with you about part numbers.
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Depending on market availability, some parts may come in different physical package.
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3. Send updated gerbers which fit to ordered parts.
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4. Pay for PCB
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5. Manufacturer sends pictures of produced PCB for your inspection.
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If anything looks suspicious, ask also for X-ray imaging.
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6. Pay for the assembly and shipping.
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Nobody wants quality issues, so it is good to ask if manufacturer has qualified personnel
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able to follow instructions
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for [ULX3S self-test](https://github.com/emard/ulx3s-bin) before shipping.
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# Todo
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Here is checklist what was done or should be done in the next PCB release.
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[x] Silkscreen Double outline for BGA chip
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[x] Silkscreen do not write over the solder pads
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[x] Silkscreen JTAG signal names on 6-pin 2.54 mm header
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[x] Silkscreen remove OLED outline
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[x] Solder stop mask must go inbetween all SMD chip pads
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[x] External differential clock input at J1_33 +/-
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[x] physically sprinkle VCC blocator capacitors under BGA
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[x] Dedicated antenna pin
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[x] onboard 433 antenna
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[x] 433 remove GND and silkscreen test point
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[x] Resistors for LEDs
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[x] Move USB LEDs from bottom to top side
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[x] Improve SDRAM routing - use VIAs for closest pins
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[x] Increase thickness of power lines (5V, 3.3V, 2.5V)
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[x] Compile a f32c bitstream using the schematics
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[x] Compile differential GPDI output
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[x] Connect more lines from ESP-32 to FPGA
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[x] Connect FPGA USB D+/D- with 1.5k pullup in USB 1.1 (full speed) mode
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[x] FPGA USB add 27 ohm + 3.6 V zener
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[x] Symmetrically place USB connectors left-right
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[x] External JTAG header
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[x] Move JTAG 2 mm left
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[x] Move WiFi Disable jumper closer to the BTN1 (angled header)
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[x] Sprinkle 2.2uF capacitors on power lines
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[x] Spice simulation of power-up/shutdown network
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[x] 27ohm D+/D- to FT231XS
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[x] DIP switch (4 switches)
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[x] MAX11123 ADC SPI
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[x] I2C for RTC
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[x] main usb connector on top side
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[x] space screw to other parts
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[x] move battery away from screw hole
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[x] top layer GND fill
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[x] R25 move away from oled screw hole
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[x] DIP switch to the right near RAM
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[x] Move GPDI a bit closer to OLED
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[x] 32768Hz oscillator footprint
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[x] SD card footprint SCHD3A0100
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[x] center the SD footprint for T&R
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[x] SD connect GND (thin pins)
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[x] move USB 0.5-1mm more out
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[x] DIP SW footprint correct
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[x] AUDIO jack footprint fits
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[x] AUDIO jack pin 4 (ring2) connected to 4-bit DAC
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[x] BTN footprint too small
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[x] SMPS jumpers default OFF for prototype testing
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[x] FPGA DONE to ESP-32
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[x] Diodes manual soldering
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[x] R56: FT231X rev A,B,C TXDEN to GND
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workaround from TN140_FT231X Errata
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[x] PCB for LFE5UM ready (some GND will change to
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VCC for Serdes power supply, see LFE5U->LFE5UM
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migration docs)
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[x] Check GND/VCC for 45 and 85 packages,
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for example pin T11 is NC on 25U, GND on 85U and VCC ond 85UM
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[x] Reconnect WIFI_OFF so that jumper has priority
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[x] 25MHz oscillator: needs clearance from LEDs, move under USB1
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[x] connect SHUTDOWN to FPGA
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[x] ESP-32: won't boot when SD connected. Don't solder it at PCB v1.7
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It is routed differently in newer release
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Arduino->Examples->ESP32->SD_MMC_Test
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https://github.com/espressif/esp-idf/blob/master/examples/storage/sd_card/README.md
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moved blue LED from GPIO2 to GPIO5
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[x] I2C resistors increased 470->2.2k
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[x] GPDI AC-coupling 100nF to each differential line.
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[x] reliable shutdown (D11=RED LED, R4=4.7k)
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[x] SDRAM raster back to 0.8 mm
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[x] connect SPI Flash Quad Mode (QSPI)
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[x] allow powering the board without powering FTDI chip
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[x] micro USB extended pads for Handsoldering (already were extended)
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[x] move 25MHz oscillator away from USB connector for handsoldering
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[x] schematics gpio J..+- pins renamed to gp/gn for easier readability
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[ ] route 16-channel ADC
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[x] move 8 LEDs a bit down and right
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[x] let SD_CLK go to FPGA clock capable pin: swap SD_CLK and SD_D2 pins
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[x] additional 2 differential lines for US2
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[x] additional US2 pins for pullup 1.5k
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[x] additional US2 pins for pull up-down 15k
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[x] unified US2 pullup/down: resistor-diode nework for pullup 1.5k and pulldown 15k
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[x] clear silkscreen mess with Cx under FPGA
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[x] power decoupling capacitors for ESP32 and OLED
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[x] Connect switching power supply jumpers
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[x] every 1-2 seconds there are clicks at analog audio output, fixed in v2.1.2
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[x] 3.6V zener diodes must be on FPGA side
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[x] can esp32 second tx/rx port make serial communication with FPGA
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[x] Jumper to switch 2.5V/3.3V for left IO banks
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[x] move usb pull from gpio bank0 to gpdi bank1
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[x] isolate each PMOD group to each io bank
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[ ] move GP7,GP8 from gpio bank0 to gpio bank7
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[x] route selected voltage to VCCio0/7
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[x] route selected voltage to J1 PMOD instead of 3.3V fixed
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[x] more bank0,1,7 decoupling capacitors
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[x] Move Jumper 2.5V/3.3V deeper inside PCB (angled header)
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[x] 0R resistor placeholders to hardwire 2.5V/3.3V instead of the jumper
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[x] Selected 2.5/3.3V to J1 header (instead fixed 3.3V)
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[x] RTC battery capacitor
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[x] battery + pad clearance
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[x] PCB v1.8.1 redesigned to fit digital video 649-10029449-111RLF (the cheapest)
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[x] use cheaper diodes 1N914
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[x] fix copper layer after using non-handsoldering resistor footprints
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[x] DIP switch must be pulled up at 2.5/3.3V or 2.5V line, not 3.3V
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[x] RTC time loss at power down fixed with 1k+22uF - see page 54 of datasheet
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[x] Rotate SD card 180° for easier front loading
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[x] Move C1, C21, C50 away from J1, J2 connectors (make space for IDC header)
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[x] Smaller USB pads
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[x] Smaller pads (not for handsoldering)
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[x] Revert USB to datasheet default
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[x] ADC text smaller font, move above ADC chip
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[x] ULX3S/version left of ADC chip
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[x] (inem) KONCAR logo on bottom side
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[x] BTN font size like TCK
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[x] Combo pads for flash 150/208 mil
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[x] SDRAM text smaller font size
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[x] SW1 increase size, to more visible place
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[x] GPIO numbering on bottom side, all pins in smaller font
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[x] enlarge FER logo
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[x] Descriptive audio jack schematic symbol
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[x] USB ID pin to RTC WAKEUPn
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[x] Move 25MHz clock down closer to LEDs
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[x] i2c chip U11 VCC1=2.5V EN=3.3V for low power sleep
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[x] Noise filter for ADC (LC)
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[x] Non-GND yellow layer clearance from board's edge
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[x] VIAs thru-GND
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[x] no paste on SW1 pads
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[x] diode for BTN0 to PROGRAMN
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[x] capacitor for BTN0 debounce
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[x] BGA pad=0.4mm mask=0.5mm paste=0.35mm
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[x] VIA align to 0.4mm raster
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[x] min VIA enlarge 0.4 mm -> 0.419 mm
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[x] USB: copper fill keepout
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[x] ADC: footprint according to MAX1112x land pattern 90-0023
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[x] fix tombstoning see https://www.tempoautomation.com/blog/surface-mount-tombstone-experiment/
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[x] Avoid VIAs on the PADs
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[x] aligment marks for BGA footprint using exposed gold plated copper
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[ ] Order ADCs in reel (not bulk, not tube).
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[x] check increased distance of 2 pad rows of SDRAM
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[x] check decreased distance of 2 pad rows of FT231X
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[x] route FTDI_nRXLED to FPGA
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[ ] resistor in series with + battery
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[ ] GPDI clock to clock capable pins, swap with USB pullup
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