blank schema

master
forksand 3 years ago
parent f1145e460a
commit ef3fe8afd9

@ -0,0 +1,75 @@
{
"board": {
"active_layer": 0,
"active_layer_preset": "",
"auto_track_width": true,
"hidden_nets": [],
"high_contrast_mode": 0,
"net_color_mode": 1,
"opacity": {
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"tracks": 1.0,
"vias": 1.0,
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"ratsnest_display_mode": 0,
"selection_filter": {
"dimensions": true,
"footprints": true,
"graphics": true,
"keepouts": true,
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@ -22,40 +22,305 @@
}, },
"track_widths": [], "track_widths": [],
"via_dimensions": [] "via_dimensions": []
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"layer_presets": []
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"boards": [], "boards": [],
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"bus_to_bus_conflict": "error",
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"duplicate_reference": "error",
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"similar_labels": "warning",
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"libraries": { "libraries": {
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"meta": { "meta": {
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"line_style": 0,
"microvia_diameter": 0.3, "microvia_diameter": 0.3,
"microvia_drill": 0.1, "microvia_drill": 0.1,
"name": "Default", "name": "Default",
"nets": [], "pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.25, "track_width": 0.25,
"via_diameter": 0.8, "via_diameter": 0.8,
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"meta": { "meta": {
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"net_colors": null
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"pcbnew": { "pcbnew": {
"last_paths": {
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"idf": "",
"netlist": "",
"specctra_dsn": "",
"step": "",
"vrml": ""
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}, },
"sheets": [], "schematic": {
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"drawing": {
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"field_names": [],
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"intersheets_ref_prefix": "",
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"intersheets_ref_show": false,
"intersheets_ref_suffix": "",
"junction_size_choice": 3,
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"pin_symbol_size": 25.0,
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},
"legacy_lib_dir": "",
"legacy_lib_list": [],
"meta": {
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"net_format_name": "",
"ngspice": {
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"fix_passive_vals": false,
"meta": {
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"workbook_filename": ""
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"page_layout_descr_file": "",
"plot_directory": "",
"spice_adjust_passive_values": false,
"spice_external_command": "spice \"%I\"",
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},
"sheets": [
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""
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],
"text_variables": {} "text_variables": {}
} }

@ -1,5 +1,14 @@
(kicad_sch (version 20211123) (generator eeschema) (kicad_sch (version 20211123) (generator eeschema)
(uuid 861f2d69-fe41-4418-b7af-dad21ccba8dd)
(paper "A4") (paper "A4")
(lib_symbols)
(symbol_instances) (lib_symbols
)
(sheet_instances
(path "/" (page "1"))
)
) )

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