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@ -19,17 +19,54 @@
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Free Software Foundation, Inc., 59 Temple Place, Suite 330,
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Boston, MA 02111-1307 USA
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$Id: pins_arduino.c 254 2007-04-20 23:17:38Z mellis $
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Changelog
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-----------
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11/25/11 - ryan@ryanmsutton.com - Add pins for Sanguino 644P and 1284P
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$Id$
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*/
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#include <avr/io.h>
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#include "wiring_private.h"
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#include "pins_arduino.h"
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// On the Sanguino board, digital pins are also used
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// On the Arduino board, digital pins are also used
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// for the analog output (software PWM). Analog input
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// pins are a separate set.
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// ATMEL ATMEGA8 & 168 / ARDUINO
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//
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// +-\/-+
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// PC6 1| |28 PC5 (AI 5)
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// (D 0) PD0 2| |27 PC4 (AI 4)
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// (D 1) PD1 3| |26 PC3 (AI 3)
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// (D 2) PD2 4| |25 PC2 (AI 2)
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// PWM+ (D 3) PD3 5| |24 PC1 (AI 1)
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// (D 4) PD4 6| |23 PC0 (AI 0)
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// VCC 7| |22 GND
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// GND 8| |21 AREF
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// PB6 9| |20 AVCC
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// PB7 10| |19 PB5 (D 13)
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// PWM+ (D 5) PD5 11| |18 PB4 (D 12)
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// PWM+ (D 6) PD6 12| |17 PB3 (D 11) PWM
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// (D 7) PD7 13| |16 PB2 (D 10) PWM
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// (D 8) PB0 14| |15 PB1 (D 9) PWM
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// +----+
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//
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// (PWM+ indicates the additional PWM pins on the ATmega168.)
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// ATMEL ATMEGA1280 / ARDUINO
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//
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// 0-7 PE0-PE7 works
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// 8-13 PB0-PB5 works
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// 14-21 PA0-PA7 works
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// 22-29 PH0-PH7 works
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// 30-35 PG5-PG0 works
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// 36-43 PC7-PC0 works
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// 44-51 PJ7-PJ0 works
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// 52-59 PL7-PL0 works
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// 60-67 PD7-PD0 works
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// A0-A7 PF0-PF7
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// A8-A15 PK0-PK7
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// ATMEL ATMEGA644P / SANGUINO
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//
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// +---\/---+
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@ -55,53 +92,457 @@
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// PWM (D 14) PD6 20| |21 PD7 (D 15) PWM
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// +--------+
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//
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#define PA 1
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#define PB 2
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#define PC 3
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#define PD 4
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#define PE 5
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#define PF 6
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#define PG 7
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#define PH 8
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#define PJ 10
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#define PK 11
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#define PL 12
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#if defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
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const uint16_t PROGMEM port_to_mode_PGM[] = {
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NOT_A_PORT,
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&DDRA,
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&DDRB,
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&DDRC,
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&DDRD,
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&DDRE,
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&DDRF,
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&DDRG,
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&DDRH,
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NOT_A_PORT,
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&DDRJ,
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&DDRK,
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&DDRL,
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};
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const uint16_t PROGMEM port_to_output_PGM[] = {
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NOT_A_PORT,
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&PORTA,
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&PORTB,
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&PORTC,
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&PORTD,
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&PORTE,
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&PORTF,
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&PORTG,
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&PORTH,
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NOT_A_PORT,
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&PORTJ,
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&PORTK,
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&PORTL,
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};
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const uint16_t PROGMEM port_to_input_PGM[] = {
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NOT_A_PIN,
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&PINA,
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&PINB,
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&PINC,
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&PIND,
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&PINE,
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&PINF,
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&PING,
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&PINH,
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NOT_A_PIN,
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&PINJ,
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&PINK,
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&PINL,
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};
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const uint8_t PROGMEM digital_pin_to_port_PGM[] = {
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// PORTLIST
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// -------------------------------------------
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PE , // PE 0 ** 0 ** USART0_RX
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PE , // PE 1 ** 1 ** USART0_TX
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PE , // PE 4 ** 2 ** PWM2
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PE , // PE 5 ** 3 ** PWM3
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PG , // PG 5 ** 4 ** PWM4
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PE , // PE 3 ** 5 ** PWM5
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PH , // PH 3 ** 6 ** PWM6
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PH , // PH 4 ** 7 ** PWM7
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PH , // PH 5 ** 8 ** PWM8
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PH , // PH 6 ** 9 ** PWM9
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PB , // PB 4 ** 10 ** PWM10
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PB , // PB 5 ** 11 ** PWM11
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PB , // PB 6 ** 12 ** PWM12
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PB , // PB 7 ** 13 ** PWM13
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PJ , // PJ 1 ** 14 ** USART3_TX
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PJ , // PJ 0 ** 15 ** USART3_RX
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PH , // PH 1 ** 16 ** USART2_TX
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PH , // PH 0 ** 17 ** USART2_RX
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PD , // PD 3 ** 18 ** USART1_TX
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PD , // PD 2 ** 19 ** USART1_RX
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PD , // PD 1 ** 20 ** I2C_SDA
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PD , // PD 0 ** 21 ** I2C_SCL
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PA , // PA 0 ** 22 ** D22
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PA , // PA 1 ** 23 ** D23
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PA , // PA 2 ** 24 ** D24
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PA , // PA 3 ** 25 ** D25
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PA , // PA 4 ** 26 ** D26
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PA , // PA 5 ** 27 ** D27
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PA , // PA 6 ** 28 ** D28
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PA , // PA 7 ** 29 ** D29
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PC , // PC 7 ** 30 ** D30
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PC , // PC 6 ** 31 ** D31
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PC , // PC 5 ** 32 ** D32
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PC , // PC 4 ** 33 ** D33
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PC , // PC 3 ** 34 ** D34
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PC , // PC 2 ** 35 ** D35
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PC , // PC 1 ** 36 ** D36
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PC , // PC 0 ** 37 ** D37
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PD , // PD 7 ** 38 ** D38
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PG , // PG 2 ** 39 ** D39
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PG , // PG 1 ** 40 ** D40
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PG , // PG 0 ** 41 ** D41
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PL , // PL 7 ** 42 ** D42
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PL , // PL 6 ** 43 ** D43
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PL , // PL 5 ** 44 ** D44
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PL , // PL 4 ** 45 ** D45
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PL , // PL 3 ** 46 ** D46
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PL , // PL 2 ** 47 ** D47
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PL , // PL 1 ** 48 ** D48
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PL , // PL 0 ** 49 ** D49
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PB , // PB 3 ** 50 ** SPI_MISO
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PB , // PB 2 ** 51 ** SPI_MOSI
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PB , // PB 1 ** 52 ** SPI_SCK
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PB , // PB 0 ** 53 ** SPI_SS
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PF , // PF 0 ** 54 ** A0
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PF , // PF 1 ** 55 ** A1
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PF , // PF 2 ** 56 ** A2
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PF , // PF 3 ** 57 ** A3
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PF , // PF 4 ** 58 ** A4
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PF , // PF 5 ** 59 ** A5
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PF , // PF 6 ** 60 ** A6
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PF , // PF 7 ** 61 ** A7
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PK , // PK 0 ** 62 ** A8
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PK , // PK 1 ** 63 ** A9
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PK , // PK 2 ** 64 ** A10
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PK , // PK 3 ** 65 ** A11
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PK , // PK 4 ** 66 ** A12
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PK , // PK 5 ** 67 ** A13
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PK , // PK 6 ** 68 ** A14
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PK , // PK 7 ** 69 ** A15
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};
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const uint8_t PROGMEM digital_pin_to_bit_mask_PGM[] = {
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// PIN IN PORT
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// -------------------------------------------
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_BV( 0 ) , // PE 0 ** 0 ** USART0_RX
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_BV( 1 ) , // PE 1 ** 1 ** USART0_TX
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_BV( 4 ) , // PE 4 ** 2 ** PWM2
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_BV( 5 ) , // PE 5 ** 3 ** PWM3
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_BV( 5 ) , // PG 5 ** 4 ** PWM4
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_BV( 3 ) , // PE 3 ** 5 ** PWM5
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_BV( 3 ) , // PH 3 ** 6 ** PWM6
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_BV( 4 ) , // PH 4 ** 7 ** PWM7
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_BV( 5 ) , // PH 5 ** 8 ** PWM8
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_BV( 6 ) , // PH 6 ** 9 ** PWM9
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_BV( 4 ) , // PB 4 ** 10 ** PWM10
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_BV( 5 ) , // PB 5 ** 11 ** PWM11
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_BV( 6 ) , // PB 6 ** 12 ** PWM12
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_BV( 7 ) , // PB 7 ** 13 ** PWM13
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_BV( 1 ) , // PJ 1 ** 14 ** USART3_TX
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_BV( 0 ) , // PJ 0 ** 15 ** USART3_RX
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_BV( 1 ) , // PH 1 ** 16 ** USART2_TX
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_BV( 0 ) , // PH 0 ** 17 ** USART2_RX
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_BV( 3 ) , // PD 3 ** 18 ** USART1_TX
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_BV( 2 ) , // PD 2 ** 19 ** USART1_RX
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_BV( 1 ) , // PD 1 ** 20 ** I2C_SDA
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_BV( 0 ) , // PD 0 ** 21 ** I2C_SCL
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_BV( 0 ) , // PA 0 ** 22 ** D22
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_BV( 1 ) , // PA 1 ** 23 ** D23
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_BV( 2 ) , // PA 2 ** 24 ** D24
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_BV( 3 ) , // PA 3 ** 25 ** D25
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_BV( 4 ) , // PA 4 ** 26 ** D26
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_BV( 5 ) , // PA 5 ** 27 ** D27
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_BV( 6 ) , // PA 6 ** 28 ** D28
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_BV( 7 ) , // PA 7 ** 29 ** D29
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_BV( 7 ) , // PC 7 ** 30 ** D30
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_BV( 6 ) , // PC 6 ** 31 ** D31
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_BV( 5 ) , // PC 5 ** 32 ** D32
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_BV( 4 ) , // PC 4 ** 33 ** D33
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_BV( 3 ) , // PC 3 ** 34 ** D34
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_BV( 2 ) , // PC 2 ** 35 ** D35
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_BV( 1 ) , // PC 1 ** 36 ** D36
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_BV( 0 ) , // PC 0 ** 37 ** D37
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_BV( 7 ) , // PD 7 ** 38 ** D38
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_BV( 2 ) , // PG 2 ** 39 ** D39
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_BV( 1 ) , // PG 1 ** 40 ** D40
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_BV( 0 ) , // PG 0 ** 41 ** D41
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_BV( 7 ) , // PL 7 ** 42 ** D42
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_BV( 6 ) , // PL 6 ** 43 ** D43
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_BV( 5 ) , // PL 5 ** 44 ** D44
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_BV( 4 ) , // PL 4 ** 45 ** D45
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_BV( 3 ) , // PL 3 ** 46 ** D46
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_BV( 2 ) , // PL 2 ** 47 ** D47
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_BV( 1 ) , // PL 1 ** 48 ** D48
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_BV( 0 ) , // PL 0 ** 49 ** D49
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_BV( 3 ) , // PB 3 ** 50 ** SPI_MISO
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_BV( 2 ) , // PB 2 ** 51 ** SPI_MOSI
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_BV( 1 ) , // PB 1 ** 52 ** SPI_SCK
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_BV( 0 ) , // PB 0 ** 53 ** SPI_SS
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_BV( 0 ) , // PF 0 ** 54 ** A0
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_BV( 1 ) , // PF 1 ** 55 ** A1
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_BV( 2 ) , // PF 2 ** 56 ** A2
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_BV( 3 ) , // PF 3 ** 57 ** A3
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_BV( 4 ) , // PF 4 ** 58 ** A4
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_BV( 5 ) , // PF 5 ** 59 ** A5
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_BV( 6 ) , // PF 6 ** 60 ** A6
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_BV( 7 ) , // PF 7 ** 61 ** A7
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_BV( 0 ) , // PK 0 ** 62 ** A8
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_BV( 1 ) , // PK 1 ** 63 ** A9
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_BV( 2 ) , // PK 2 ** 64 ** A10
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_BV( 3 ) , // PK 3 ** 65 ** A11
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_BV( 4 ) , // PK 4 ** 66 ** A12
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_BV( 5 ) , // PK 5 ** 67 ** A13
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_BV( 6 ) , // PK 6 ** 68 ** A14
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_BV( 7 ) , // PK 7 ** 69 ** A15
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};
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const uint8_t PROGMEM digital_pin_to_timer_PGM[] = {
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// TIMERS
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// -------------------------------------------
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NOT_ON_TIMER , // PE 0 ** 0 ** USART0_RX
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NOT_ON_TIMER , // PE 1 ** 1 ** USART0_TX
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TIMER3B , // PE 4 ** 2 ** PWM2
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TIMER3C , // PE 5 ** 3 ** PWM3
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TIMER0B , // PG 5 ** 4 ** PWM4
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TIMER3A , // PE 3 ** 5 ** PWM5
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TIMER4A , // PH 3 ** 6 ** PWM6
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TIMER4B , // PH 4 ** 7 ** PWM7
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TIMER4C , // PH 5 ** 8 ** PWM8
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TIMER2B , // PH 6 ** 9 ** PWM9
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TIMER2A , // PB 4 ** 10 ** PWM10
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TIMER1A , // PB 5 ** 11 ** PWM11
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TIMER1B , // PB 6 ** 12 ** PWM12
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TIMER0A , // PB 7 ** 13 ** PWM13
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NOT_ON_TIMER , // PJ 1 ** 14 ** USART3_TX
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NOT_ON_TIMER , // PJ 0 ** 15 ** USART3_RX
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NOT_ON_TIMER , // PH 1 ** 16 ** USART2_TX
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NOT_ON_TIMER , // PH 0 ** 17 ** USART2_RX
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NOT_ON_TIMER , // PD 3 ** 18 ** USART1_TX
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NOT_ON_TIMER , // PD 2 ** 19 ** USART1_RX
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NOT_ON_TIMER , // PD 1 ** 20 ** I2C_SDA
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NOT_ON_TIMER , // PD 0 ** 21 ** I2C_SCL
|
|
|
|
|
NOT_ON_TIMER , // PA 0 ** 22 ** D22
|
|
|
|
|
NOT_ON_TIMER , // PA 1 ** 23 ** D23
|
|
|
|
|
NOT_ON_TIMER , // PA 2 ** 24 ** D24
|
|
|
|
|
NOT_ON_TIMER , // PA 3 ** 25 ** D25
|
|
|
|
|
NOT_ON_TIMER , // PA 4 ** 26 ** D26
|
|
|
|
|
NOT_ON_TIMER , // PA 5 ** 27 ** D27
|
|
|
|
|
NOT_ON_TIMER , // PA 6 ** 28 ** D28
|
|
|
|
|
NOT_ON_TIMER , // PA 7 ** 29 ** D29
|
|
|
|
|
NOT_ON_TIMER , // PC 7 ** 30 ** D30
|
|
|
|
|
NOT_ON_TIMER , // PC 6 ** 31 ** D31
|
|
|
|
|
NOT_ON_TIMER , // PC 5 ** 32 ** D32
|
|
|
|
|
NOT_ON_TIMER , // PC 4 ** 33 ** D33
|
|
|
|
|
NOT_ON_TIMER , // PC 3 ** 34 ** D34
|
|
|
|
|
NOT_ON_TIMER , // PC 2 ** 35 ** D35
|
|
|
|
|
NOT_ON_TIMER , // PC 1 ** 36 ** D36
|
|
|
|
|
NOT_ON_TIMER , // PC 0 ** 37 ** D37
|
|
|
|
|
NOT_ON_TIMER , // PD 7 ** 38 ** D38
|
|
|
|
|
NOT_ON_TIMER , // PG 2 ** 39 ** D39
|
|
|
|
|
NOT_ON_TIMER , // PG 1 ** 40 ** D40
|
|
|
|
|
NOT_ON_TIMER , // PG 0 ** 41 ** D41
|
|
|
|
|
NOT_ON_TIMER , // PL 7 ** 42 ** D42
|
|
|
|
|
NOT_ON_TIMER , // PL 6 ** 43 ** D43
|
|
|
|
|
TIMER5C , // PL 5 ** 44 ** D44
|
|
|
|
|
TIMER5B , // PL 4 ** 45 ** D45
|
|
|
|
|
TIMER5A , // PL 3 ** 46 ** D46
|
|
|
|
|
NOT_ON_TIMER , // PL 2 ** 47 ** D47
|
|
|
|
|
NOT_ON_TIMER , // PL 1 ** 48 ** D48
|
|
|
|
|
NOT_ON_TIMER , // PL 0 ** 49 ** D49
|
|
|
|
|
NOT_ON_TIMER , // PB 3 ** 50 ** SPI_MISO
|
|
|
|
|
NOT_ON_TIMER , // PB 2 ** 51 ** SPI_MOSI
|
|
|
|
|
NOT_ON_TIMER , // PB 1 ** 52 ** SPI_SCK
|
|
|
|
|
NOT_ON_TIMER , // PB 0 ** 53 ** SPI_SS
|
|
|
|
|
NOT_ON_TIMER , // PF 0 ** 54 ** A0
|
|
|
|
|
NOT_ON_TIMER , // PF 1 ** 55 ** A1
|
|
|
|
|
NOT_ON_TIMER , // PF 2 ** 56 ** A2
|
|
|
|
|
NOT_ON_TIMER , // PF 3 ** 57 ** A3
|
|
|
|
|
NOT_ON_TIMER , // PF 4 ** 58 ** A4
|
|
|
|
|
NOT_ON_TIMER , // PF 5 ** 59 ** A5
|
|
|
|
|
NOT_ON_TIMER , // PF 6 ** 60 ** A6
|
|
|
|
|
NOT_ON_TIMER , // PF 7 ** 61 ** A7
|
|
|
|
|
NOT_ON_TIMER , // PK 0 ** 62 ** A8
|
|
|
|
|
NOT_ON_TIMER , // PK 1 ** 63 ** A9
|
|
|
|
|
NOT_ON_TIMER , // PK 2 ** 64 ** A10
|
|
|
|
|
NOT_ON_TIMER , // PK 3 ** 65 ** A11
|
|
|
|
|
NOT_ON_TIMER , // PK 4 ** 66 ** A12
|
|
|
|
|
NOT_ON_TIMER , // PK 5 ** 67 ** A13
|
|
|
|
|
NOT_ON_TIMER , // PK 6 ** 68 ** A14
|
|
|
|
|
NOT_ON_TIMER , // PK 7 ** 69 ** A15
|
|
|
|
|
};
|
|
|
|
|
#elif defined(__AVR_ATmega644P__) || defined(__AVR_ATmega1284P__)
|
|
|
|
|
// these arrays map port names (e.g. port B) to the
|
|
|
|
|
// appropriate addresses for various functions (e.g. reading
|
|
|
|
|
// and writing)
|
|
|
|
|
const uint8_t PROGMEM port_to_mode_PGM[] =
|
|
|
|
|
const uint16_t PROGMEM port_to_mode_PGM[] =
|
|
|
|
|
{
|
|
|
|
|
NOT_A_PORT,
|
|
|
|
|
(uint8_t) (uint16_t) &DDRA,
|
|
|
|
|
(uint8_t) (uint16_t) &DDRB,
|
|
|
|
|
(uint8_t) (uint16_t) &DDRC,
|
|
|
|
|
(uint8_t) (uint16_t) &DDRD,
|
|
|
|
|
NOT_A_PORT,
|
|
|
|
|
&DDRA,
|
|
|
|
|
&DDRB,
|
|
|
|
|
&DDRC,
|
|
|
|
|
&DDRD,
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
const uint8_t PROGMEM port_to_output_PGM[] =
|
|
|
|
|
const uint16_t PROGMEM port_to_output_PGM[] =
|
|
|
|
|
{
|
|
|
|
|
NOT_A_PORT,
|
|
|
|
|
&PORTA,
|
|
|
|
|
&PORTB,
|
|
|
|
|
&PORTC,
|
|
|
|
|
&PORTD,
|
|
|
|
|
};
|
|
|
|
|
const uint16_t PROGMEM port_to_input_PGM[] =
|
|
|
|
|
{
|
|
|
|
|
NOT_A_PORT,
|
|
|
|
|
&PINA,
|
|
|
|
|
&PINB,
|
|
|
|
|
&PINC,
|
|
|
|
|
&PIND,
|
|
|
|
|
};
|
|
|
|
|
const uint8_t PROGMEM digital_pin_to_port_PGM[] =
|
|
|
|
|
{
|
|
|
|
|
PB, /* 0 */
|
|
|
|
|
PB,
|
|
|
|
|
PB,
|
|
|
|
|
PB,
|
|
|
|
|
PB,
|
|
|
|
|
PB,
|
|
|
|
|
PB,
|
|
|
|
|
PB,
|
|
|
|
|
PD, /* 8 */
|
|
|
|
|
PD,
|
|
|
|
|
PD,
|
|
|
|
|
PD,
|
|
|
|
|
PD,
|
|
|
|
|
PD,
|
|
|
|
|
PD,
|
|
|
|
|
PD,
|
|
|
|
|
PC, /* 16 */
|
|
|
|
|
PC,
|
|
|
|
|
PC,
|
|
|
|
|
PC,
|
|
|
|
|
PC,
|
|
|
|
|
PC,
|
|
|
|
|
PC,
|
|
|
|
|
PC,
|
|
|
|
|
PA, /* 24 */
|
|
|
|
|
PA,
|
|
|
|
|
PA,
|
|
|
|
|
PA,
|
|
|
|
|
PA,
|
|
|
|
|
PA,
|
|
|
|
|
PA,
|
|
|
|
|
PA /* 31 */
|
|
|
|
|
};
|
|
|
|
|
const uint8_t PROGMEM digital_pin_to_bit_mask_PGM[] =
|
|
|
|
|
{
|
|
|
|
|
_BV(0), /* 0, port B */
|
|
|
|
|
_BV(1),
|
|
|
|
|
_BV(2),
|
|
|
|
|
_BV(3),
|
|
|
|
|
_BV(4),
|
|
|
|
|
_BV(5),
|
|
|
|
|
_BV(6),
|
|
|
|
|
_BV(7),
|
|
|
|
|
_BV(0), /* 8, port D */
|
|
|
|
|
_BV(1),
|
|
|
|
|
_BV(2),
|
|
|
|
|
_BV(3),
|
|
|
|
|
_BV(4),
|
|
|
|
|
_BV(5),
|
|
|
|
|
_BV(6),
|
|
|
|
|
_BV(7),
|
|
|
|
|
_BV(0), /* 16, port C */
|
|
|
|
|
_BV(1),
|
|
|
|
|
_BV(2),
|
|
|
|
|
_BV(3),
|
|
|
|
|
_BV(4),
|
|
|
|
|
_BV(5),
|
|
|
|
|
_BV(6),
|
|
|
|
|
_BV(7),
|
|
|
|
|
_BV(7), /* 24, port A */
|
|
|
|
|
_BV(6),
|
|
|
|
|
_BV(5),
|
|
|
|
|
_BV(4),
|
|
|
|
|
_BV(3),
|
|
|
|
|
_BV(2),
|
|
|
|
|
_BV(1),
|
|
|
|
|
_BV(0)
|
|
|
|
|
};
|
|
|
|
|
const uint8_t PROGMEM digital_pin_to_timer_PGM[] =
|
|
|
|
|
{
|
|
|
|
|
NOT_ON_TIMER, /* 0 - PB0 */
|
|
|
|
|
NOT_ON_TIMER, /* 1 - PB1 */
|
|
|
|
|
NOT_ON_TIMER, /* 2 - PB2 */
|
|
|
|
|
TIMER0A, /* 3 - PB3 */
|
|
|
|
|
TIMER0B, /* 4 - PB4 */
|
|
|
|
|
NOT_ON_TIMER, /* 5 - PB5 */
|
|
|
|
|
NOT_ON_TIMER, /* 6 - PB6 */
|
|
|
|
|
NOT_ON_TIMER, /* 7 - PB7 */
|
|
|
|
|
NOT_ON_TIMER, /* 8 - PD0 */
|
|
|
|
|
NOT_ON_TIMER, /* 9 - PD1 */
|
|
|
|
|
NOT_ON_TIMER, /* 10 - PD2 */
|
|
|
|
|
NOT_ON_TIMER, /* 11 - PD3 */
|
|
|
|
|
TIMER1B, /* 12 - PD4 */
|
|
|
|
|
TIMER1A, /* 13 - PD5 */
|
|
|
|
|
TIMER2B, /* 14 - PD6 */
|
|
|
|
|
TIMER2A, /* 15 - PD7 */
|
|
|
|
|
NOT_ON_TIMER, /* 16 - PC0 */
|
|
|
|
|
NOT_ON_TIMER, /* 17 - PC1 */
|
|
|
|
|
NOT_ON_TIMER, /* 18 - PC2 */
|
|
|
|
|
NOT_ON_TIMER, /* 19 - PC3 */
|
|
|
|
|
NOT_ON_TIMER, /* 20 - PC4 */
|
|
|
|
|
NOT_ON_TIMER, /* 21 - PC5 */
|
|
|
|
|
NOT_ON_TIMER, /* 22 - PC6 */
|
|
|
|
|
NOT_ON_TIMER, /* 23 - PC7 */
|
|
|
|
|
NOT_ON_TIMER, /* 24 - PA0 */
|
|
|
|
|
NOT_ON_TIMER, /* 25 - PA1 */
|
|
|
|
|
NOT_ON_TIMER, /* 26 - PA2 */
|
|
|
|
|
NOT_ON_TIMER, /* 27 - PA3 */
|
|
|
|
|
NOT_ON_TIMER, /* 28 - PA4 */
|
|
|
|
|
NOT_ON_TIMER, /* 29 - PA5 */
|
|
|
|
|
NOT_ON_TIMER, /* 30 - PA6 */
|
|
|
|
|
NOT_ON_TIMER /* 31 - PA7 */
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
#else
|
|
|
|
|
// these arrays map port names (e.g. port B) to the
|
|
|
|
|
// appropriate addresses for various functions (e.g. reading
|
|
|
|
|
// and writing)
|
|
|
|
|
const uint16_t PROGMEM port_to_mode_PGM[] = {
|
|
|
|
|
NOT_A_PORT,
|
|
|
|
|
NOT_A_PORT,
|
|
|
|
|
(uint8_t) (uint16_t) &PORTA,
|
|
|
|
|
(uint8_t) (uint16_t) &PORTB,
|
|
|
|
|
(uint8_t) (uint16_t) &PORTC,
|
|
|
|
|
(uint8_t) (uint16_t) &PORTD,
|
|
|
|
|
&DDRB,
|
|
|
|
|
&DDRC,
|
|
|
|
|
&DDRD,
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
const uint8_t PROGMEM port_to_input_PGM[] =
|
|
|
|
|
{
|
|
|
|
|
const uint16_t PROGMEM port_to_output_PGM[] = {
|
|
|
|
|
NOT_A_PORT,
|
|
|
|
|
(uint8_t) (uint16_t) &PINA,
|
|
|
|
|
(uint8_t) (uint16_t) &PINB,
|
|
|
|
|
(uint8_t) (uint16_t) &PINC,
|
|
|
|
|
(uint8_t) (uint16_t) &PIND,
|
|
|
|
|
NOT_A_PORT,
|
|
|
|
|
&PORTB,
|
|
|
|
|
&PORTC,
|
|
|
|
|
&PORTD,
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
const uint8_t PROGMEM digital_pin_to_port_PGM[] =
|
|
|
|
|
{
|
|
|
|
|
PB, /* 0 */
|
|
|
|
|
PB,
|
|
|
|
|
PB,
|
|
|
|
|
PB,
|
|
|
|
|
PB,
|
|
|
|
|
PB,
|
|
|
|
|
PB,
|
|
|
|
|
PB,
|
|
|
|
|
PD, /* 8 */
|
|
|
|
|
const uint16_t PROGMEM port_to_input_PGM[] = {
|
|
|
|
|
NOT_A_PORT,
|
|
|
|
|
NOT_A_PORT,
|
|
|
|
|
&PINB,
|
|
|
|
|
&PINC,
|
|
|
|
|
&PIND,
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
const uint8_t PROGMEM digital_pin_to_port_PGM[] = {
|
|
|
|
|
PD, /* 0 */
|
|
|
|
|
PD,
|
|
|
|
|
PD,
|
|
|
|
|
PD,
|
|
|
|
@ -109,27 +550,22 @@ const uint8_t PROGMEM digital_pin_to_port_PGM[] =
|
|
|
|
|
PD,
|
|
|
|
|
PD,
|
|
|
|
|
PD,
|
|
|
|
|
PC, /* 16 */
|
|
|
|
|
PC,
|
|
|
|
|
PB, /* 8 */
|
|
|
|
|
PB,
|
|
|
|
|
PB,
|
|
|
|
|
PB,
|
|
|
|
|
PB,
|
|
|
|
|
PB,
|
|
|
|
|
PC, /* 14 */
|
|
|
|
|
PC,
|
|
|
|
|
PC,
|
|
|
|
|
PC,
|
|
|
|
|
PC,
|
|
|
|
|
PC,
|
|
|
|
|
PC,
|
|
|
|
|
PA, /* 24 */
|
|
|
|
|
PA,
|
|
|
|
|
PA,
|
|
|
|
|
PA,
|
|
|
|
|
PA,
|
|
|
|
|
PA,
|
|
|
|
|
PA,
|
|
|
|
|
PA /* 31 */
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
const uint8_t PROGMEM digital_pin_to_bit_mask_PGM[] =
|
|
|
|
|
{
|
|
|
|
|
_BV(0), /* 0, port B */
|
|
|
|
|
const uint8_t PROGMEM digital_pin_to_bit_mask_PGM[] = {
|
|
|
|
|
_BV(0), /* 0, port D */
|
|
|
|
|
_BV(1),
|
|
|
|
|
_BV(2),
|
|
|
|
|
_BV(3),
|
|
|
|
@ -137,64 +573,55 @@ const uint8_t PROGMEM digital_pin_to_bit_mask_PGM[] =
|
|
|
|
|
_BV(5),
|
|
|
|
|
_BV(6),
|
|
|
|
|
_BV(7),
|
|
|
|
|
_BV(0), /* 8, port D */
|
|
|
|
|
_BV(0), /* 8, port B */
|
|
|
|
|
_BV(1),
|
|
|
|
|
_BV(2),
|
|
|
|
|
_BV(3),
|
|
|
|
|
_BV(4),
|
|
|
|
|
_BV(5),
|
|
|
|
|
_BV(6),
|
|
|
|
|
_BV(7),
|
|
|
|
|
_BV(0), /* 16, port C */
|
|
|
|
|
_BV(0), /* 14, port C */
|
|
|
|
|
_BV(1),
|
|
|
|
|
_BV(2),
|
|
|
|
|
_BV(3),
|
|
|
|
|
_BV(4),
|
|
|
|
|
_BV(5),
|
|
|
|
|
_BV(6),
|
|
|
|
|
_BV(7),
|
|
|
|
|
_BV(7), /* 24, port A */
|
|
|
|
|
_BV(6),
|
|
|
|
|
_BV(5),
|
|
|
|
|
_BV(4),
|
|
|
|
|
_BV(3),
|
|
|
|
|
_BV(2),
|
|
|
|
|
_BV(1),
|
|
|
|
|
_BV(0)
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
const uint8_t PROGMEM digital_pin_to_timer_PGM[] =
|
|
|
|
|
{
|
|
|
|
|
NOT_ON_TIMER, /* 0 - PB0 */
|
|
|
|
|
NOT_ON_TIMER, /* 1 - PB1 */
|
|
|
|
|
NOT_ON_TIMER, /* 2 - PB2 */
|
|
|
|
|
TIMER0A, /* 3 - PB3 */
|
|
|
|
|
TIMER0B, /* 4 - PB4 */
|
|
|
|
|
NOT_ON_TIMER, /* 5 - PB5 */
|
|
|
|
|
NOT_ON_TIMER, /* 6 - PB6 */
|
|
|
|
|
NOT_ON_TIMER, /* 7 - PB7 */
|
|
|
|
|
NOT_ON_TIMER, /* 8 - PD0 */
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NOT_ON_TIMER, /* 9 - PD1 */
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NOT_ON_TIMER, /* 10 - PD2 */
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NOT_ON_TIMER, /* 11 - PD3 */
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TIMER1B, /* 12 - PD4 */
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TIMER1A, /* 13 - PD5 */
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TIMER2B, /* 14 - PD6 */
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TIMER2A, /* 15 - PD7 */
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NOT_ON_TIMER, /* 16 - PC0 */
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NOT_ON_TIMER, /* 17 - PC1 */
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NOT_ON_TIMER, /* 18 - PC2 */
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NOT_ON_TIMER, /* 19 - PC3 */
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NOT_ON_TIMER, /* 20 - PC4 */
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NOT_ON_TIMER, /* 21 - PC5 */
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NOT_ON_TIMER, /* 22 - PC6 */
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NOT_ON_TIMER, /* 23 - PC7 */
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NOT_ON_TIMER, /* 24 - PA0 */
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NOT_ON_TIMER, /* 25 - PA1 */
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NOT_ON_TIMER, /* 26 - PA2 */
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NOT_ON_TIMER, /* 27 - PA3 */
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NOT_ON_TIMER, /* 28 - PA4 */
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NOT_ON_TIMER, /* 29 - PA5 */
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NOT_ON_TIMER, /* 30 - PA6 */
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NOT_ON_TIMER /* 31 - PA7 */
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const uint8_t PROGMEM digital_pin_to_timer_PGM[] = {
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NOT_ON_TIMER, /* 0 - port D */
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NOT_ON_TIMER,
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NOT_ON_TIMER,
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// on the ATmega168, digital pin 3 has hardware pwm
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#if defined(__AVR_ATmega8__)
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NOT_ON_TIMER,
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#else
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TIMER2B,
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#endif
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NOT_ON_TIMER,
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// on the ATmega168, digital pins 5 and 6 have hardware pwm
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#if defined(__AVR_ATmega8__)
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NOT_ON_TIMER,
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NOT_ON_TIMER,
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#else
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TIMER0B,
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TIMER0A,
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#endif
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NOT_ON_TIMER,
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NOT_ON_TIMER, /* 8 - port B */
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TIMER1A,
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TIMER1B,
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#if defined(__AVR_ATmega8__)
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TIMER2,
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#else
|
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TIMER2A,
|
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|
#endif
|
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NOT_ON_TIMER,
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NOT_ON_TIMER,
|
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NOT_ON_TIMER,
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|
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|
NOT_ON_TIMER, /* 14 - port C */
|
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|
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|
NOT_ON_TIMER,
|
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|
NOT_ON_TIMER,
|
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NOT_ON_TIMER,
|
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NOT_ON_TIMER,
|
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};
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#endif
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