Merge pull request #408 from STB3/Marlin_with_ATmega1284p_Sanguino_on_023_support
Marlin with ATmega1284p sanguino support under Arduino 023master
commit
b3ebb71704
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# Makefile for ATmegaBOOT
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# E.Lins, 18.7.2005
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# $Id$
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#
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# Instructions
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#
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# To make bootloader .hex file:
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# make diecimila
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# make lilypad
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# make ng
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# etc...
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#
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# To burn bootloader .hex file:
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# make diecimila_isp
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# make lilypad_isp
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# make ng_isp
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# etc...
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# program name should not be changed...
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PROGRAM = optiboot
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# The default behavior is to build using tools that are in the users
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# current path variables, but we can also build using an installed
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# Arduino user IDE setup, or the Arduino source tree.
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# Uncomment this next lines to build within the arduino environment,
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# using the arduino-included avrgcc toolset (mac and pc)
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# ENV ?= arduino
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# ENV ?= arduinodev
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# OS ?= macosx
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# OS ?= windows
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# enter the parameters for the avrdude isp tool
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ISPTOOL = stk500v2
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ISPPORT = usb
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ISPSPEED = -b 115200
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MCU_TARGET = atmega168
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LDSECTIONS = -Wl,--section-start=.text=0x3e00 -Wl,--section-start=.version=0x3ffe
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# Build environments
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# Start of some ugly makefile-isms to allow optiboot to be built
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# in several different environments. See the README.TXT file for
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# details.
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# default
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fixpath = $(1)
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ifeq ($(ENV), arduino)
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# For Arduino, we assume that we're connected to the optiboot directory
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# included with the arduino distribution, which means that the full set
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# of avr-tools are "right up there" in standard places.
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TOOLROOT = ../../../tools
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GCCROOT = $(TOOLROOT)/avr/bin/
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AVRDUDE_CONF = -C$(TOOLROOT)/avr/etc/avrdude.conf
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ifeq ($(OS), windows)
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# On windows, SOME of the tool paths will need to have backslashes instead
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# of forward slashes (because they use windows cmd.exe for execution instead
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# of a unix/mingw shell?) We also have to ensure that a consistent shell
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# is used even if a unix shell is installed (ie as part of WINAVR)
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fixpath = $(subst /,\,$1)
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SHELL = cmd.exe
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endif
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else ifeq ($(ENV), arduinodev)
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# Arduino IDE source code environment. Use the unpacked compilers created
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# by the build (you'll need to do "ant build" first.)
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ifeq ($(OS), macosx)
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TOOLROOT = ../../../../build/macosx/work/Arduino.app/Contents/Resources/Java/hardware/tools
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endif
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ifeq ($(OS), windows)
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TOOLROOT = ../../../../build/windows/work/hardware/tools
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endif
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GCCROOT = $(TOOLROOT)/avr/bin/
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AVRDUDE_CONF = -C$(TOOLROOT)/avr/etc/avrdude.conf
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else
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GCCROOT =
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AVRDUDE_CONF =
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endif
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#
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# End of build environment code.
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# the efuse should really be 0xf8; since, however, only the lower
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# three bits of that byte are used on the atmega168, avrdude gets
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# confused if you specify 1's for the higher bits, see:
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# http://tinker.it/now/2007/02/24/the-tale-of-avrdude-atmega168-and-extended-bits-fuses/
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#
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# similarly, the lock bits should be 0xff instead of 0x3f (to
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# unlock the bootloader section) and 0xcf instead of 0x2f (to
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# lock it), but since the high two bits of the lock byte are
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# unused, avrdude would get confused.
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ISPFUSES = $(GCCROOT)avrdude $(AVRDUDE_CONF) -c $(ISPTOOL) \
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-p $(MCU_TARGET) -P $(ISPPORT) $(ISPSPEED) \
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-e -u -U lock:w:0x3f:m -U efuse:w:0x$(EFUSE):m \
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-U hfuse:w:0x$(HFUSE):m -U lfuse:w:0x$(LFUSE):m
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ISPFLASH = $(GCCROOT)avrdude $(AVRDUDE_CONF) -c $(ISPTOOL) \
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-p $(MCU_TARGET) -P $(ISPPORT) $(ISPSPEED) \
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-U flash:w:$(PROGRAM)_$(TARGET).hex -U lock:w:0x2f:m
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STK500 = "C:\Program Files\Atmel\AVR Tools\STK500\Stk500.exe"
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STK500-1 = $(STK500) -e -d$(MCU_TARGET) -pf -vf -if$(PROGRAM)_$(TARGET).hex \
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-lFF -LFF -f$(HFUSE)$(LFUSE) -EF8 -ms -q -cUSB -I200kHz -s -wt
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STK500-2 = $(STK500) -d$(MCU_TARGET) -ms -q -lCF -LCF -cUSB -I200kHz -s -wt
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OBJ = $(PROGRAM).o
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OPTIMIZE = -Os -fno-inline-small-functions -fno-split-wide-types -mshort-calls
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DEFS =
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LIBS =
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CC = $(GCCROOT)avr-gcc
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# Override is only needed by avr-lib build system.
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override CFLAGS = -g -Wall $(OPTIMIZE) -mmcu=$(MCU_TARGET) -DF_CPU=$(AVR_FREQ) $(DEFS)
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override LDFLAGS = $(LDSECTIONS) -Wl,--relax -Wl,--gc-sections -nostartfiles -nostdlib
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OBJCOPY = $(GCCROOT)avr-objcopy
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OBJDUMP = $(call fixpath,$(GCCROOT)avr-objdump)
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SIZE = $(GCCROOT)avr-size
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# Test platforms
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# Virtual boot block test
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virboot328: TARGET = atmega328
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virboot328: MCU_TARGET = atmega328p
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virboot328: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200' '-DVIRTUAL_BOOT'
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virboot328: AVR_FREQ = 16000000L
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virboot328: LDSECTIONS = -Wl,--section-start=.text=0x7e00 -Wl,--section-start=.version=0x7ffe
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virboot328: $(PROGRAM)_atmega328.hex
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virboot328: $(PROGRAM)_atmega328.lst
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# 20MHz clocked platforms
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#
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# These are capable of 230400 baud, or 115200 baud on PC (Arduino Avrdude issue)
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#
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pro20: TARGET = pro_20mhz
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pro20: MCU_TARGET = atmega168
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pro20: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
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pro20: AVR_FREQ = 20000000L
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pro20: $(PROGRAM)_pro_20mhz.hex
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pro20: $(PROGRAM)_pro_20mhz.lst
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pro20_isp: pro20
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pro20_isp: TARGET = pro_20mhz
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# 2.7V brownout
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pro20_isp: HFUSE = DD
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# Full swing xtal (20MHz) 258CK/14CK+4.1ms
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pro20_isp: LFUSE = C6
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# 512 byte boot
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pro20_isp: EFUSE = 04
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pro20_isp: isp
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# 16MHz clocked platforms
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#
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# These are capable of 230400 baud, or 115200 baud on PC (Arduino Avrdude issue)
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#
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pro16: TARGET = pro_16MHz
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pro16: MCU_TARGET = atmega168
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pro16: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
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pro16: AVR_FREQ = 16000000L
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pro16: $(PROGRAM)_pro_16MHz.hex
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pro16: $(PROGRAM)_pro_16MHz.lst
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pro16_isp: pro16
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pro16_isp: TARGET = pro_16MHz
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# 2.7V brownout
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pro16_isp: HFUSE = DD
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# Full swing xtal (20MHz) 258CK/14CK+4.1ms
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pro16_isp: LFUSE = C6
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# 512 byte boot
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pro16_isp: EFUSE = 04
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pro16_isp: isp
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# Diecimila, Duemilanove with m168, and NG use identical bootloaders
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# Call it "atmega168" for generality and clarity, keep "diecimila" for
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# backward compatibility of makefile
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#
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atmega168: TARGET = atmega168
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atmega168: MCU_TARGET = atmega168
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atmega168: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
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atmega168: AVR_FREQ = 16000000L
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atmega168: $(PROGRAM)_atmega168.hex
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atmega168: $(PROGRAM)_atmega168.lst
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atmega168_isp: atmega168
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atmega168_isp: TARGET = atmega168
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# 2.7V brownout
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atmega168_isp: HFUSE = DD
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# Low power xtal (16MHz) 16KCK/14CK+65ms
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atmega168_isp: LFUSE = FF
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# 512 byte boot
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atmega168_isp: EFUSE = 04
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atmega168_isp: isp
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diecimila: TARGET = diecimila
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diecimila: MCU_TARGET = atmega168
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diecimila: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
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diecimila: AVR_FREQ = 16000000L
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diecimila: $(PROGRAM)_diecimila.hex
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diecimila: $(PROGRAM)_diecimila.lst
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diecimila_isp: diecimila
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diecimila_isp: TARGET = diecimila
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# 2.7V brownout
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diecimila_isp: HFUSE = DD
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# Low power xtal (16MHz) 16KCK/14CK+65ms
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diecimila_isp: LFUSE = FF
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# 512 byte boot
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diecimila_isp: EFUSE = 04
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diecimila_isp: isp
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atmega328: TARGET = atmega328
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atmega328: MCU_TARGET = atmega328p
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atmega328: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
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atmega328: AVR_FREQ = 16000000L
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atmega328: LDSECTIONS = -Wl,--section-start=.text=0x7e00 -Wl,--section-start=.version=0x7ffe
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atmega328: $(PROGRAM)_atmega328.hex
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atmega328: $(PROGRAM)_atmega328.lst
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atmega328_isp: atmega328
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atmega328_isp: TARGET = atmega328
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atmega328_isp: MCU_TARGET = atmega328p
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# 512 byte boot, SPIEN
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atmega328_isp: HFUSE = DE
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# Low power xtal (16MHz) 16KCK/14CK+65ms
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atmega328_isp: LFUSE = FF
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# 2.7V brownout
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atmega328_isp: EFUSE = 05
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atmega328_isp: isp
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atmega1284: TARGET = atmega1284p
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atmega1284: MCU_TARGET = atmega1284p
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atmega1284: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200' '-DBIGBOOT'
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atmega1284: AVR_FREQ = 16000000L
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atmega1284: LDSECTIONS = -Wl,--section-start=.text=0x1fc00
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atmega1284: $(PROGRAM)_atmega1284p.hex
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atmega1284: $(PROGRAM)_atmega1284p.lst
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atmega1284_isp: atmega1284
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atmega1284_isp: TARGET = atmega1284p
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atmega1284_isp: MCU_TARGET = atmega1284p
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# 1024 byte boot
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atmega1284_isp: HFUSE = DE
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# Low power xtal (16MHz) 16KCK/14CK+65ms
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atmega1284_isp: LFUSE = FF
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# 2.7V brownout
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atmega1284_isp: EFUSE = FD
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atmega1284_isp: isp
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# Sanguino has a minimum boot size of 1024 bytes, so enable extra functions
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#
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sanguino: TARGET = atmega644p
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sanguino: MCU_TARGET = atmega644p
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sanguino: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200' '-DBIGBOOT'
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sanguino: AVR_FREQ = 16000000L
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sanguino: LDSECTIONS = -Wl,--section-start=.text=0xfc00
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sanguino: $(PROGRAM)_atmega644p.hex
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sanguino: $(PROGRAM)_atmega644p.lst
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sanguino_isp: sanguino
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sanguino_isp: TARGET = atmega644p
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sanguino_isp: MCU_TARGET = atmega644p
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# 1024 byte boot
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sanguino_isp: HFUSE = DE
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# Low power xtal (16MHz) 16KCK/14CK+65ms
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sanguino_isp: LFUSE = FF
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# 2.7V brownout
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sanguino_isp: EFUSE = 05
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sanguino_isp: isp
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# Mega has a minimum boot size of 1024 bytes, so enable extra functions
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#mega: TARGET = atmega1280
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mega: MCU_TARGET = atmega1280
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mega: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200' '-DBIGBOOT'
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mega: AVR_FREQ = 16000000L
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mega: LDSECTIONS = -Wl,--section-start=.text=0x1fc00
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mega: $(PROGRAM)_atmega1280.hex
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mega: $(PROGRAM)_atmega1280.lst
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mega_isp: mega
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mega_isp: TARGET = atmega1280
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mega_isp: MCU_TARGET = atmega1280
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# 1024 byte boot
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mega_isp: HFUSE = DE
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# Low power xtal (16MHz) 16KCK/14CK+65ms
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||||||
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mega_isp: LFUSE = FF
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# 2.7V brownout
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mega_isp: EFUSE = 05
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mega_isp: isp
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# ATmega8
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#
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atmega8: TARGET = atmega8
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atmega8: MCU_TARGET = atmega8
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atmega8: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
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atmega8: AVR_FREQ = 16000000L
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atmega8: LDSECTIONS = -Wl,--section-start=.text=0x1e00 -Wl,--section-start=.version=0x1ffe
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||||||
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atmega8: $(PROGRAM)_atmega8.hex
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atmega8: $(PROGRAM)_atmega8.lst
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atmega8_isp: atmega8
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atmega8_isp: TARGET = atmega8
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atmega8_isp: MCU_TARGET = atmega8
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# SPIEN, CKOPT, Bootsize=512B
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atmega8_isp: HFUSE = CC
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# 2.7V brownout, Low power xtal (16MHz) 16KCK/14CK+65ms
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atmega8_isp: LFUSE = BF
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atmega8_isp: isp
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# ATmega88
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#
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atmega88: TARGET = atmega88
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atmega88: MCU_TARGET = atmega88
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atmega88: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
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atmega88: AVR_FREQ = 16000000L
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atmega88: LDSECTIONS = -Wl,--section-start=.text=0x1e00 -Wl,--section-start=.version=0x1ffe
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||||||
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atmega88: $(PROGRAM)_atmega88.hex
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||||||
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atmega88: $(PROGRAM)_atmega88.lst
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||||||
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atmega88_isp: atmega88
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atmega88_isp: TARGET = atmega88
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atmega88_isp: MCU_TARGET = atmega88
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# 2.7V brownout
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||||||
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atmega88_isp: HFUSE = DD
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||||||
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# Low power xtal (16MHz) 16KCK/14CK+65ms
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||||||
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atemga88_isp: LFUSE = FF
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# 512 byte boot
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||||||
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atmega88_isp: EFUSE = 04
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||||||
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atmega88_isp: isp
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||||||
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||||||
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||||||
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# 8MHz clocked platforms
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||||||
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#
|
||||||
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# These are capable of 115200 baud
|
||||||
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#
|
||||||
|
|
||||||
|
lilypad: TARGET = lilypad
|
||||||
|
lilypad: MCU_TARGET = atmega168
|
||||||
|
lilypad: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
|
||||||
|
lilypad: AVR_FREQ = 8000000L
|
||||||
|
lilypad: $(PROGRAM)_lilypad.hex
|
||||||
|
lilypad: $(PROGRAM)_lilypad.lst
|
||||||
|
|
||||||
|
lilypad_isp: lilypad
|
||||||
|
lilypad_isp: TARGET = lilypad
|
||||||
|
# 2.7V brownout
|
||||||
|
lilypad_isp: HFUSE = DD
|
||||||
|
# Internal 8MHz osc (8MHz) Slow rising power
|
||||||
|
lilypad_isp: LFUSE = E2
|
||||||
|
# 512 byte boot
|
||||||
|
lilypad_isp: EFUSE = 04
|
||||||
|
lilypad_isp: isp
|
||||||
|
|
||||||
|
lilypad_resonator: TARGET = lilypad_resonator
|
||||||
|
lilypad_resonator: MCU_TARGET = atmega168
|
||||||
|
lilypad_resonator: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
|
||||||
|
lilypad_resonator: AVR_FREQ = 8000000L
|
||||||
|
lilypad_resonator: $(PROGRAM)_lilypad_resonator.hex
|
||||||
|
lilypad_resonator: $(PROGRAM)_lilypad_resonator.lst
|
||||||
|
|
||||||
|
lilypad_resonator_isp: lilypad_resonator
|
||||||
|
lilypad_resonator_isp: TARGET = lilypad_resonator
|
||||||
|
# 2.7V brownout
|
||||||
|
lilypad_resonator_isp: HFUSE = DD
|
||||||
|
# Full swing xtal (20MHz) 258CK/14CK+4.1ms
|
||||||
|
lilypad_resonator_isp: LFUSE = C6
|
||||||
|
# 512 byte boot
|
||||||
|
lilypad_resonator_isp: EFUSE = 04
|
||||||
|
lilypad_resonator_isp: isp
|
||||||
|
|
||||||
|
pro8: TARGET = pro_8MHz
|
||||||
|
pro8: MCU_TARGET = atmega168
|
||||||
|
pro8: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
|
||||||
|
pro8: AVR_FREQ = 8000000L
|
||||||
|
pro8: $(PROGRAM)_pro_8MHz.hex
|
||||||
|
pro8: $(PROGRAM)_pro_8MHz.lst
|
||||||
|
|
||||||
|
pro8_isp: pro8
|
||||||
|
pro8_isp: TARGET = pro_8MHz
|
||||||
|
# 2.7V brownout
|
||||||
|
pro8_isp: HFUSE = DD
|
||||||
|
# Full swing xtal (20MHz) 258CK/14CK+4.1ms
|
||||||
|
pro8_isp: LFUSE = C6
|
||||||
|
# 512 byte boot
|
||||||
|
pro8_isp: EFUSE = 04
|
||||||
|
pro8_isp: isp
|
||||||
|
|
||||||
|
atmega328_pro8: TARGET = atmega328_pro_8MHz
|
||||||
|
atmega328_pro8: MCU_TARGET = atmega328p
|
||||||
|
atmega328_pro8: CFLAGS += '-DLED_START_FLASHES=3' '-DBAUD_RATE=115200'
|
||||||
|
atmega328_pro8: AVR_FREQ = 8000000L
|
||||||
|
atmega328_pro8: LDSECTIONS = -Wl,--section-start=.text=0x7e00 -Wl,--section-start=.version=0x7ffe
|
||||||
|
atmega328_pro8: $(PROGRAM)_atmega328_pro_8MHz.hex
|
||||||
|
atmega328_pro8: $(PROGRAM)_atmega328_pro_8MHz.lst
|
||||||
|
|
||||||
|
atmega328_pro8_isp: atmega328_pro8
|
||||||
|
atmega328_pro8_isp: TARGET = atmega328_pro_8MHz
|
||||||
|
atmega328_pro8_isp: MCU_TARGET = atmega328p
|
||||||
|
# 512 byte boot, SPIEN
|
||||||
|
atmega328_pro8_isp: HFUSE = DE
|
||||||
|
# Low power xtal (16MHz) 16KCK/14CK+65ms
|
||||||
|
atmega328_pro8_isp: LFUSE = FF
|
||||||
|
# 2.7V brownout
|
||||||
|
atmega328_pro8_isp: EFUSE = 05
|
||||||
|
atmega328_pro8_isp: isp
|
||||||
|
|
||||||
|
# 1MHz clocked platforms
|
||||||
|
#
|
||||||
|
# These are capable of 9600 baud
|
||||||
|
#
|
||||||
|
|
||||||
|
luminet: TARGET = luminet
|
||||||
|
luminet: MCU_TARGET = attiny84
|
||||||
|
luminet: CFLAGS += '-DLED_START_FLASHES=3' '-DSOFT_UART' '-DBAUD_RATE=9600'
|
||||||
|
luminet: CFLAGS += '-DVIRTUAL_BOOT_PARTITION'
|
||||||
|
luminet: AVR_FREQ = 1000000L
|
||||||
|
luminet: LDSECTIONS = -Wl,--section-start=.text=0x1d00 -Wl,--section-start=.version=0x1efe
|
||||||
|
luminet: $(PROGRAM)_luminet.hex
|
||||||
|
luminet: $(PROGRAM)_luminet.lst
|
||||||
|
|
||||||
|
luminet_isp: luminet
|
||||||
|
luminet_isp: TARGET = luminet
|
||||||
|
luminet_isp: MCU_TARGET = attiny84
|
||||||
|
# Brownout disabled
|
||||||
|
luminet_isp: HFUSE = DF
|
||||||
|
# 1MHz internal oscillator, slowly rising power
|
||||||
|
luminet_isp: LFUSE = 62
|
||||||
|
# Self-programming enable
|
||||||
|
luminet_isp: EFUSE = FE
|
||||||
|
luminet_isp: isp
|
||||||
|
|
||||||
|
#
|
||||||
|
# Generic build instructions
|
||||||
|
#
|
||||||
|
#
|
||||||
|
|
||||||
|
isp: $(TARGET)
|
||||||
|
$(ISPFUSES)
|
||||||
|
$(ISPFLASH)
|
||||||
|
|
||||||
|
isp-stk500: $(PROGRAM)_$(TARGET).hex
|
||||||
|
$(STK500-1)
|
||||||
|
$(STK500-2)
|
||||||
|
|
||||||
|
%.elf: $(OBJ)
|
||||||
|
$(CC) $(CFLAGS) $(LDFLAGS) -o $@ $^ $(LIBS)
|
||||||
|
$(SIZE) $@
|
||||||
|
|
||||||
|
clean:
|
||||||
|
rm -rf *.o *.elf *.lst *.map *.sym *.lss *.eep *.srec *.bin *.hex
|
||||||
|
|
||||||
|
%.lst: %.elf
|
||||||
|
$(OBJDUMP) -h -S $< > $@
|
||||||
|
|
||||||
|
%.hex: %.elf
|
||||||
|
$(OBJCOPY) -j .text -j .data -j .version --set-section-flags .version=alloc,load -O ihex $< $@
|
||||||
|
|
||||||
|
%.srec: %.elf
|
||||||
|
$(OBJCOPY) -j .text -j .data -j .version --set-section-flags .version=alloc,load -O srec $< $@
|
||||||
|
|
||||||
|
%.bin: %.elf
|
||||||
|
$(OBJCOPY) -j .text -j .data -j .version --set-section-flags .version=alloc,load -O binary $< $@
|
@ -0,0 +1,848 @@
|
|||||||
|
/* Modified to use out for SPM access
|
||||||
|
** Peter Knight, Optiboot project http://optiboot.googlecode.com
|
||||||
|
**
|
||||||
|
** Todo: Tidy up
|
||||||
|
**
|
||||||
|
** "_short" routines execute 1 cycle faster and use 1 less word of flash
|
||||||
|
** by using "out" instruction instead of "sts".
|
||||||
|
**
|
||||||
|
** Additional elpm variants that trust the value of RAMPZ
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Copyright (c) 2002, 2003, 2004, 2005, 2006, 2007 Eric B. Weddington
|
||||||
|
All rights reserved.
|
||||||
|
|
||||||
|
Redistribution and use in source and binary forms, with or without
|
||||||
|
modification, are permitted provided that the following conditions are met:
|
||||||
|
|
||||||
|
* Redistributions of source code must retain the above copyright
|
||||||
|
notice, this list of conditions and the following disclaimer.
|
||||||
|
* Redistributions in binary form must reproduce the above copyright
|
||||||
|
notice, this list of conditions and the following disclaimer in
|
||||||
|
the documentation and/or other materials provided with the
|
||||||
|
distribution.
|
||||||
|
* Neither the name of the copyright holders nor the names of
|
||||||
|
contributors may be used to endorse or promote products derived
|
||||||
|
from this software without specific prior written permission.
|
||||||
|
|
||||||
|
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||||
|
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||||
|
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||||
|
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||||
|
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||||
|
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||||
|
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||||
|
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
POSSIBILITY OF SUCH DAMAGE. */
|
||||||
|
|
||||||
|
/* $Id: boot.h,v 1.27.2.3 2008/09/30 13:58:48 arcanum Exp $ */
|
||||||
|
|
||||||
|
#ifndef _AVR_BOOT_H_
|
||||||
|
#define _AVR_BOOT_H_ 1
|
||||||
|
|
||||||
|
/** \file */
|
||||||
|
/** \defgroup avr_boot <avr/boot.h>: Bootloader Support Utilities
|
||||||
|
\code
|
||||||
|
#include <avr/io.h>
|
||||||
|
#include <avr/boot.h>
|
||||||
|
\endcode
|
||||||
|
|
||||||
|
The macros in this module provide a C language interface to the
|
||||||
|
bootloader support functionality of certain AVR processors. These
|
||||||
|
macros are designed to work with all sizes of flash memory.
|
||||||
|
|
||||||
|
Global interrupts are not automatically disabled for these macros. It
|
||||||
|
is left up to the programmer to do this. See the code example below.
|
||||||
|
Also see the processor datasheet for caveats on having global interrupts
|
||||||
|
enabled during writing of the Flash.
|
||||||
|
|
||||||
|
\note Not all AVR processors provide bootloader support. See your
|
||||||
|
processor datasheet to see if it provides bootloader support.
|
||||||
|
|
||||||
|
\todo From email with Marek: On smaller devices (all except ATmega64/128),
|
||||||
|
__SPM_REG is in the I/O space, accessible with the shorter "in" and "out"
|
||||||
|
instructions - since the boot loader has a limited size, this could be an
|
||||||
|
important optimization.
|
||||||
|
|
||||||
|
\par API Usage Example
|
||||||
|
The following code shows typical usage of the boot API.
|
||||||
|
|
||||||
|
\code
|
||||||
|
#include <inttypes.h>
|
||||||
|
#include <avr/interrupt.h>
|
||||||
|
#include <avr/pgmspace.h>
|
||||||
|
|
||||||
|
void boot_program_page (uint32_t page, uint8_t *buf)
|
||||||
|
{
|
||||||
|
uint16_t i;
|
||||||
|
uint8_t sreg;
|
||||||
|
|
||||||
|
// Disable interrupts.
|
||||||
|
|
||||||
|
sreg = SREG;
|
||||||
|
cli();
|
||||||
|
|
||||||
|
eeprom_busy_wait ();
|
||||||
|
|
||||||
|
boot_page_erase (page);
|
||||||
|
boot_spm_busy_wait (); // Wait until the memory is erased.
|
||||||
|
|
||||||
|
for (i=0; i<SPM_PAGESIZE; i+=2)
|
||||||
|
{
|
||||||
|
// Set up little-endian word.
|
||||||
|
|
||||||
|
uint16_t w = *buf++;
|
||||||
|
w += (*buf++) << 8;
|
||||||
|
|
||||||
|
boot_page_fill (page + i, w);
|
||||||
|
}
|
||||||
|
|
||||||
|
boot_page_write (page); // Store buffer in flash page.
|
||||||
|
boot_spm_busy_wait(); // Wait until the memory is written.
|
||||||
|
|
||||||
|
// Reenable RWW-section again. We need this if we want to jump back
|
||||||
|
// to the application after bootloading.
|
||||||
|
|
||||||
|
boot_rww_enable ();
|
||||||
|
|
||||||
|
// Re-enable interrupts (if they were ever enabled).
|
||||||
|
|
||||||
|
SREG = sreg;
|
||||||
|
}\endcode */
|
||||||
|
|
||||||
|
#include <avr/eeprom.h>
|
||||||
|
#include <avr/io.h>
|
||||||
|
#include <inttypes.h>
|
||||||
|
#include <limits.h>
|
||||||
|
|
||||||
|
/* Check for SPM Control Register in processor. */
|
||||||
|
#if defined (SPMCSR)
|
||||||
|
# define __SPM_REG SPMCSR
|
||||||
|
#elif defined (SPMCR)
|
||||||
|
# define __SPM_REG SPMCR
|
||||||
|
#else
|
||||||
|
# error AVR processor does not provide bootloader support!
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
/* Check for SPM Enable bit. */
|
||||||
|
#if defined(SPMEN)
|
||||||
|
# define __SPM_ENABLE SPMEN
|
||||||
|
#elif defined(SELFPRGEN)
|
||||||
|
# define __SPM_ENABLE SELFPRGEN
|
||||||
|
#else
|
||||||
|
# error Cannot find SPM Enable bit definition!
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/** \ingroup avr_boot
|
||||||
|
\def BOOTLOADER_SECTION
|
||||||
|
|
||||||
|
Used to declare a function or variable to be placed into a
|
||||||
|
new section called .bootloader. This section and its contents
|
||||||
|
can then be relocated to any address (such as the bootloader
|
||||||
|
NRWW area) at link-time. */
|
||||||
|
|
||||||
|
#define BOOTLOADER_SECTION __attribute__ ((section (".bootloader")))
|
||||||
|
|
||||||
|
/* Create common bit definitions. */
|
||||||
|
#ifdef ASB
|
||||||
|
#define __COMMON_ASB ASB
|
||||||
|
#else
|
||||||
|
#define __COMMON_ASB RWWSB
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef ASRE
|
||||||
|
#define __COMMON_ASRE ASRE
|
||||||
|
#else
|
||||||
|
#define __COMMON_ASRE RWWSRE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Define the bit positions of the Boot Lock Bits. */
|
||||||
|
|
||||||
|
#define BLB12 5
|
||||||
|
#define BLB11 4
|
||||||
|
#define BLB02 3
|
||||||
|
#define BLB01 2
|
||||||
|
|
||||||
|
/** \ingroup avr_boot
|
||||||
|
\def boot_spm_interrupt_enable()
|
||||||
|
Enable the SPM interrupt. */
|
||||||
|
|
||||||
|
#define boot_spm_interrupt_enable() (__SPM_REG |= (uint8_t)_BV(SPMIE))
|
||||||
|
|
||||||
|
/** \ingroup avr_boot
|
||||||
|
\def boot_spm_interrupt_disable()
|
||||||
|
Disable the SPM interrupt. */
|
||||||
|
|
||||||
|
#define boot_spm_interrupt_disable() (__SPM_REG &= (uint8_t)~_BV(SPMIE))
|
||||||
|
|
||||||
|
/** \ingroup avr_boot
|
||||||
|
\def boot_is_spm_interrupt()
|
||||||
|
Check if the SPM interrupt is enabled. */
|
||||||
|
|
||||||
|
#define boot_is_spm_interrupt() (__SPM_REG & (uint8_t)_BV(SPMIE))
|
||||||
|
|
||||||
|
/** \ingroup avr_boot
|
||||||
|
\def boot_rww_busy()
|
||||||
|
Check if the RWW section is busy. */
|
||||||
|
|
||||||
|
#define boot_rww_busy() (__SPM_REG & (uint8_t)_BV(__COMMON_ASB))
|
||||||
|
|
||||||
|
/** \ingroup avr_boot
|
||||||
|
\def boot_spm_busy()
|
||||||
|
Check if the SPM instruction is busy. */
|
||||||
|
|
||||||
|
#define boot_spm_busy() (__SPM_REG & (uint8_t)_BV(__SPM_ENABLE))
|
||||||
|
|
||||||
|
/** \ingroup avr_boot
|
||||||
|
\def boot_spm_busy_wait()
|
||||||
|
Wait while the SPM instruction is busy. */
|
||||||
|
|
||||||
|
#define boot_spm_busy_wait() do{}while(boot_spm_busy())
|
||||||
|
|
||||||
|
#define __BOOT_PAGE_ERASE (_BV(__SPM_ENABLE) | _BV(PGERS))
|
||||||
|
#define __BOOT_PAGE_WRITE (_BV(__SPM_ENABLE) | _BV(PGWRT))
|
||||||
|
#define __BOOT_PAGE_FILL _BV(__SPM_ENABLE)
|
||||||
|
#define __BOOT_RWW_ENABLE (_BV(__SPM_ENABLE) | _BV(__COMMON_ASRE))
|
||||||
|
#define __BOOT_LOCK_BITS_SET (_BV(__SPM_ENABLE) | _BV(BLBSET))
|
||||||
|
|
||||||
|
#define __boot_page_fill_short(address, data) \
|
||||||
|
(__extension__({ \
|
||||||
|
__asm__ __volatile__ \
|
||||||
|
( \
|
||||||
|
"movw r0, %3\n\t" \
|
||||||
|
"out %0, %1\n\t" \
|
||||||
|
"spm\n\t" \
|
||||||
|
"clr r1\n\t" \
|
||||||
|
: \
|
||||||
|
: "i" (_SFR_IO_ADDR(__SPM_REG)), \
|
||||||
|
"r" ((uint8_t)__BOOT_PAGE_FILL), \
|
||||||
|
"z" ((uint16_t)address), \
|
||||||
|
"r" ((uint16_t)data) \
|
||||||
|
: "r0" \
|
||||||
|
); \
|
||||||
|
}))
|
||||||
|
|
||||||
|
#define __boot_page_fill_normal(address, data) \
|
||||||
|
(__extension__({ \
|
||||||
|
__asm__ __volatile__ \
|
||||||
|
( \
|
||||||
|
"movw r0, %3\n\t" \
|
||||||
|
"sts %0, %1\n\t" \
|
||||||
|
"spm\n\t" \
|
||||||
|
"clr r1\n\t" \
|
||||||
|
: \
|
||||||
|
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
|
||||||
|
"r" ((uint8_t)__BOOT_PAGE_FILL), \
|
||||||
|
"z" ((uint16_t)address), \
|
||||||
|
"r" ((uint16_t)data) \
|
||||||
|
: "r0" \
|
||||||
|
); \
|
||||||
|
}))
|
||||||
|
|
||||||
|
#define __boot_page_fill_alternate(address, data)\
|
||||||
|
(__extension__({ \
|
||||||
|
__asm__ __volatile__ \
|
||||||
|
( \
|
||||||
|
"movw r0, %3\n\t" \
|
||||||
|
"sts %0, %1\n\t" \
|
||||||
|
"spm\n\t" \
|
||||||
|
".word 0xffff\n\t" \
|
||||||
|
"nop\n\t" \
|
||||||
|
"clr r1\n\t" \
|
||||||
|
: \
|
||||||
|
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
|
||||||
|
"r" ((uint8_t)__BOOT_PAGE_FILL), \
|
||||||
|
"z" ((uint16_t)address), \
|
||||||
|
"r" ((uint16_t)data) \
|
||||||
|
: "r0" \
|
||||||
|
); \
|
||||||
|
}))
|
||||||
|
|
||||||
|
#define __boot_page_fill_extended(address, data) \
|
||||||
|
(__extension__({ \
|
||||||
|
__asm__ __volatile__ \
|
||||||
|
( \
|
||||||
|
"movw r0, %4\n\t" \
|
||||||
|
"movw r30, %A3\n\t" \
|
||||||
|
"sts %1, %C3\n\t" \
|
||||||
|
"sts %0, %2\n\t" \
|
||||||
|
"spm\n\t" \
|
||||||
|
"clr r1\n\t" \
|
||||||
|
: \
|
||||||
|
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
|
||||||
|
"i" (_SFR_MEM_ADDR(RAMPZ)), \
|
||||||
|
"r" ((uint8_t)__BOOT_PAGE_FILL), \
|
||||||
|
"r" ((uint32_t)address), \
|
||||||
|
"r" ((uint16_t)data) \
|
||||||
|
: "r0", "r30", "r31" \
|
||||||
|
); \
|
||||||
|
}))
|
||||||
|
|
||||||
|
#define __boot_page_fill_extended_short(address, data) \
|
||||||
|
(__extension__({ \
|
||||||
|
__asm__ __volatile__ \
|
||||||
|
( \
|
||||||
|
"movw r0, %4\n\t" \
|
||||||
|
"movw r30, %A3\n\t" \
|
||||||
|
"out %1, %C3\n\t" \
|
||||||
|
"out %0, %2\n\t" \
|
||||||
|
"spm\n\t" \
|
||||||
|
"clr r1\n\t" \
|
||||||
|
: \
|
||||||
|
: "i" (_SFR_IO_ADDR(__SPM_REG)), \
|
||||||
|
"i" (_SFR_IO_ADDR(RAMPZ)), \
|
||||||
|
"r" ((uint8_t)__BOOT_PAGE_FILL), \
|
||||||
|
"r" ((uint32_t)address), \
|
||||||
|
"r" ((uint16_t)data) \
|
||||||
|
: "r0", "r30", "r31" \
|
||||||
|
); \
|
||||||
|
}))
|
||||||
|
|
||||||
|
#define __boot_page_erase_short(address) \
|
||||||
|
(__extension__({ \
|
||||||
|
__asm__ __volatile__ \
|
||||||
|
( \
|
||||||
|
"out %0, %1\n\t" \
|
||||||
|
"spm\n\t" \
|
||||||
|
: \
|
||||||
|
: "i" (_SFR_IO_ADDR(__SPM_REG)), \
|
||||||
|
"r" ((uint8_t)__BOOT_PAGE_ERASE), \
|
||||||
|
"z" ((uint16_t)address) \
|
||||||
|
); \
|
||||||
|
}))
|
||||||
|
|
||||||
|
|
||||||
|
#define __boot_page_erase_normal(address) \
|
||||||
|
(__extension__({ \
|
||||||
|
__asm__ __volatile__ \
|
||||||
|
( \
|
||||||
|
"sts %0, %1\n\t" \
|
||||||
|
"spm\n\t" \
|
||||||
|
: \
|
||||||
|
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
|
||||||
|
"r" ((uint8_t)__BOOT_PAGE_ERASE), \
|
||||||
|
"z" ((uint16_t)address) \
|
||||||
|
); \
|
||||||
|
}))
|
||||||
|
|
||||||
|
#define __boot_page_erase_alternate(address) \
|
||||||
|
(__extension__({ \
|
||||||
|
__asm__ __volatile__ \
|
||||||
|
( \
|
||||||
|
"sts %0, %1\n\t" \
|
||||||
|
"spm\n\t" \
|
||||||
|
".word 0xffff\n\t" \
|
||||||
|
"nop\n\t" \
|
||||||
|
: \
|
||||||
|
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
|
||||||
|
"r" ((uint8_t)__BOOT_PAGE_ERASE), \
|
||||||
|
"z" ((uint16_t)address) \
|
||||||
|
); \
|
||||||
|
}))
|
||||||
|
|
||||||
|
#define __boot_page_erase_extended(address) \
|
||||||
|
(__extension__({ \
|
||||||
|
__asm__ __volatile__ \
|
||||||
|
( \
|
||||||
|
"movw r30, %A3\n\t" \
|
||||||
|
"sts %1, %C3\n\t" \
|
||||||
|
"sts %0, %2\n\t" \
|
||||||
|
"spm\n\t" \
|
||||||
|
: \
|
||||||
|
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
|
||||||
|
"i" (_SFR_MEM_ADDR(RAMPZ)), \
|
||||||
|
"r" ((uint8_t)__BOOT_PAGE_ERASE), \
|
||||||
|
"r" ((uint32_t)address) \
|
||||||
|
: "r30", "r31" \
|
||||||
|
); \
|
||||||
|
}))
|
||||||
|
#define __boot_page_erase_extended_short(address) \
|
||||||
|
(__extension__({ \
|
||||||
|
__asm__ __volatile__ \
|
||||||
|
( \
|
||||||
|
"movw r30, %A3\n\t" \
|
||||||
|
"out %1, %C3\n\t" \
|
||||||
|
"out %0, %2\n\t" \
|
||||||
|
"spm\n\t" \
|
||||||
|
: \
|
||||||
|
: "i" (_SFR_IO_ADDR(__SPM_REG)), \
|
||||||
|
"i" (_SFR_IO_ADDR(RAMPZ)), \
|
||||||
|
"r" ((uint8_t)__BOOT_PAGE_ERASE), \
|
||||||
|
"r" ((uint32_t)address) \
|
||||||
|
: "r30", "r31" \
|
||||||
|
); \
|
||||||
|
}))
|
||||||
|
|
||||||
|
#define __boot_page_write_short(address) \
|
||||||
|
(__extension__({ \
|
||||||
|
__asm__ __volatile__ \
|
||||||
|
( \
|
||||||
|
"out %0, %1\n\t" \
|
||||||
|
"spm\n\t" \
|
||||||
|
: \
|
||||||
|
: "i" (_SFR_IO_ADDR(__SPM_REG)), \
|
||||||
|
"r" ((uint8_t)__BOOT_PAGE_WRITE), \
|
||||||
|
"z" ((uint16_t)address) \
|
||||||
|
); \
|
||||||
|
}))
|
||||||
|
|
||||||
|
#define __boot_page_write_normal(address) \
|
||||||
|
(__extension__({ \
|
||||||
|
__asm__ __volatile__ \
|
||||||
|
( \
|
||||||
|
"sts %0, %1\n\t" \
|
||||||
|
"spm\n\t" \
|
||||||
|
: \
|
||||||
|
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
|
||||||
|
"r" ((uint8_t)__BOOT_PAGE_WRITE), \
|
||||||
|
"z" ((uint16_t)address) \
|
||||||
|
); \
|
||||||
|
}))
|
||||||
|
|
||||||
|
#define __boot_page_write_alternate(address) \
|
||||||
|
(__extension__({ \
|
||||||
|
__asm__ __volatile__ \
|
||||||
|
( \
|
||||||
|
"sts %0, %1\n\t" \
|
||||||
|
"spm\n\t" \
|
||||||
|
".word 0xffff\n\t" \
|
||||||
|
"nop\n\t" \
|
||||||
|
: \
|
||||||
|
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
|
||||||
|
"r" ((uint8_t)__BOOT_PAGE_WRITE), \
|
||||||
|
"z" ((uint16_t)address) \
|
||||||
|
); \
|
||||||
|
}))
|
||||||
|
|
||||||
|
#define __boot_page_write_extended(address) \
|
||||||
|
(__extension__({ \
|
||||||
|
__asm__ __volatile__ \
|
||||||
|
( \
|
||||||
|
"movw r30, %A3\n\t" \
|
||||||
|
"sts %1, %C3\n\t" \
|
||||||
|
"sts %0, %2\n\t" \
|
||||||
|
"spm\n\t" \
|
||||||
|
: \
|
||||||
|
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
|
||||||
|
"i" (_SFR_MEM_ADDR(RAMPZ)), \
|
||||||
|
"r" ((uint8_t)__BOOT_PAGE_WRITE), \
|
||||||
|
"r" ((uint32_t)address) \
|
||||||
|
: "r30", "r31" \
|
||||||
|
); \
|
||||||
|
}))
|
||||||
|
#define __boot_page_write_extended_short(address) \
|
||||||
|
(__extension__({ \
|
||||||
|
__asm__ __volatile__ \
|
||||||
|
( \
|
||||||
|
"movw r30, %A3\n\t" \
|
||||||
|
"out %1, %C3\n\t" \
|
||||||
|
"out %0, %2\n\t" \
|
||||||
|
"spm\n\t" \
|
||||||
|
: \
|
||||||
|
: "i" (_SFR_IO_ADDR(__SPM_REG)), \
|
||||||
|
"i" (_SFR_IO_ADDR(RAMPZ)), \
|
||||||
|
"r" ((uint8_t)__BOOT_PAGE_WRITE), \
|
||||||
|
"r" ((uint32_t)address) \
|
||||||
|
: "r30", "r31" \
|
||||||
|
); \
|
||||||
|
}))
|
||||||
|
|
||||||
|
#define __boot_rww_enable_short() \
|
||||||
|
(__extension__({ \
|
||||||
|
__asm__ __volatile__ \
|
||||||
|
( \
|
||||||
|
"out %0, %1\n\t" \
|
||||||
|
"spm\n\t" \
|
||||||
|
: \
|
||||||
|
: "i" (_SFR_IO_ADDR(__SPM_REG)), \
|
||||||
|
"r" ((uint8_t)__BOOT_RWW_ENABLE) \
|
||||||
|
); \
|
||||||
|
}))
|
||||||
|
|
||||||
|
#define __boot_rww_enable() \
|
||||||
|
(__extension__({ \
|
||||||
|
__asm__ __volatile__ \
|
||||||
|
( \
|
||||||
|
"sts %0, %1\n\t" \
|
||||||
|
"spm\n\t" \
|
||||||
|
: \
|
||||||
|
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
|
||||||
|
"r" ((uint8_t)__BOOT_RWW_ENABLE) \
|
||||||
|
); \
|
||||||
|
}))
|
||||||
|
|
||||||
|
#define __boot_rww_enable_alternate() \
|
||||||
|
(__extension__({ \
|
||||||
|
__asm__ __volatile__ \
|
||||||
|
( \
|
||||||
|
"sts %0, %1\n\t" \
|
||||||
|
"spm\n\t" \
|
||||||
|
".word 0xffff\n\t" \
|
||||||
|
"nop\n\t" \
|
||||||
|
: \
|
||||||
|
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
|
||||||
|
"r" ((uint8_t)__BOOT_RWW_ENABLE) \
|
||||||
|
); \
|
||||||
|
}))
|
||||||
|
|
||||||
|
/* From the mega16/mega128 data sheets (maybe others):
|
||||||
|
|
||||||
|
Bits by SPM To set the Boot Loader Lock bits, write the desired data to
|
||||||
|
R0, write "X0001001" to SPMCR and execute SPM within four clock cycles
|
||||||
|
after writing SPMCR. The only accessible Lock bits are the Boot Lock bits
|
||||||
|
that may prevent the Application and Boot Loader section from any
|
||||||
|
software update by the MCU.
|
||||||
|
|
||||||
|
If bits 5..2 in R0 are cleared (zero), the corresponding Boot Lock bit
|
||||||
|
will be programmed if an SPM instruction is executed within four cycles
|
||||||
|
after BLBSET and SPMEN (or SELFPRGEN) are set in SPMCR. The Z-pointer is
|
||||||
|
don't care during this operation, but for future compatibility it is
|
||||||
|
recommended to load the Z-pointer with $0001 (same as used for reading the
|
||||||
|
Lock bits). For future compatibility It is also recommended to set bits 7,
|
||||||
|
6, 1, and 0 in R0 to 1 when writing the Lock bits. When programming the
|
||||||
|
Lock bits the entire Flash can be read during the operation. */
|
||||||
|
|
||||||
|
#define __boot_lock_bits_set_short(lock_bits) \
|
||||||
|
(__extension__({ \
|
||||||
|
uint8_t value = (uint8_t)(~(lock_bits)); \
|
||||||
|
__asm__ __volatile__ \
|
||||||
|
( \
|
||||||
|
"ldi r30, 1\n\t" \
|
||||||
|
"ldi r31, 0\n\t" \
|
||||||
|
"mov r0, %2\n\t" \
|
||||||
|
"out %0, %1\n\t" \
|
||||||
|
"spm\n\t" \
|
||||||
|
: \
|
||||||
|
: "i" (_SFR_IO_ADDR(__SPM_REG)), \
|
||||||
|
"r" ((uint8_t)__BOOT_LOCK_BITS_SET), \
|
||||||
|
"r" (value) \
|
||||||
|
: "r0", "r30", "r31" \
|
||||||
|
); \
|
||||||
|
}))
|
||||||
|
|
||||||
|
#define __boot_lock_bits_set(lock_bits) \
|
||||||
|
(__extension__({ \
|
||||||
|
uint8_t value = (uint8_t)(~(lock_bits)); \
|
||||||
|
__asm__ __volatile__ \
|
||||||
|
( \
|
||||||
|
"ldi r30, 1\n\t" \
|
||||||
|
"ldi r31, 0\n\t" \
|
||||||
|
"mov r0, %2\n\t" \
|
||||||
|
"sts %0, %1\n\t" \
|
||||||
|
"spm\n\t" \
|
||||||
|
: \
|
||||||
|
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
|
||||||
|
"r" ((uint8_t)__BOOT_LOCK_BITS_SET), \
|
||||||
|
"r" (value) \
|
||||||
|
: "r0", "r30", "r31" \
|
||||||
|
); \
|
||||||
|
}))
|
||||||
|
|
||||||
|
#define __boot_lock_bits_set_alternate(lock_bits) \
|
||||||
|
(__extension__({ \
|
||||||
|
uint8_t value = (uint8_t)(~(lock_bits)); \
|
||||||
|
__asm__ __volatile__ \
|
||||||
|
( \
|
||||||
|
"ldi r30, 1\n\t" \
|
||||||
|
"ldi r31, 0\n\t" \
|
||||||
|
"mov r0, %2\n\t" \
|
||||||
|
"sts %0, %1\n\t" \
|
||||||
|
"spm\n\t" \
|
||||||
|
".word 0xffff\n\t" \
|
||||||
|
"nop\n\t" \
|
||||||
|
: \
|
||||||
|
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
|
||||||
|
"r" ((uint8_t)__BOOT_LOCK_BITS_SET), \
|
||||||
|
"r" (value) \
|
||||||
|
: "r0", "r30", "r31" \
|
||||||
|
); \
|
||||||
|
}))
|
||||||
|
|
||||||
|
/*
|
||||||
|
Reading lock and fuse bits:
|
||||||
|
|
||||||
|
Similarly to writing the lock bits above, set BLBSET and SPMEN (or
|
||||||
|
SELFPRGEN) bits in __SPMREG, and then (within four clock cycles) issue an
|
||||||
|
LPM instruction.
|
||||||
|
|
||||||
|
Z address: contents:
|
||||||
|
0x0000 low fuse bits
|
||||||
|
0x0001 lock bits
|
||||||
|
0x0002 extended fuse bits
|
||||||
|
0x0003 high fuse bits
|
||||||
|
|
||||||
|
Sounds confusing, doesn't it?
|
||||||
|
|
||||||
|
Unlike the macros in pgmspace.h, no need to care for non-enhanced
|
||||||
|
cores here as these old cores do not provide SPM support anyway.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** \ingroup avr_boot
|
||||||
|
\def GET_LOW_FUSE_BITS
|
||||||
|
address to read the low fuse bits, using boot_lock_fuse_bits_get
|
||||||
|
*/
|
||||||
|
#define GET_LOW_FUSE_BITS (0x0000)
|
||||||
|
/** \ingroup avr_boot
|
||||||
|
\def GET_LOCK_BITS
|
||||||
|
address to read the lock bits, using boot_lock_fuse_bits_get
|
||||||
|
*/
|
||||||
|
#define GET_LOCK_BITS (0x0001)
|
||||||
|
/** \ingroup avr_boot
|
||||||
|
\def GET_EXTENDED_FUSE_BITS
|
||||||
|
address to read the extended fuse bits, using boot_lock_fuse_bits_get
|
||||||
|
*/
|
||||||
|
#define GET_EXTENDED_FUSE_BITS (0x0002)
|
||||||
|
/** \ingroup avr_boot
|
||||||
|
\def GET_HIGH_FUSE_BITS
|
||||||
|
address to read the high fuse bits, using boot_lock_fuse_bits_get
|
||||||
|
*/
|
||||||
|
#define GET_HIGH_FUSE_BITS (0x0003)
|
||||||
|
|
||||||
|
/** \ingroup avr_boot
|
||||||
|
\def boot_lock_fuse_bits_get(address)
|
||||||
|
|
||||||
|
Read the lock or fuse bits at \c address.
|
||||||
|
|
||||||
|
Parameter \c address can be any of GET_LOW_FUSE_BITS,
|
||||||
|
GET_LOCK_BITS, GET_EXTENDED_FUSE_BITS, or GET_HIGH_FUSE_BITS.
|
||||||
|
|
||||||
|
\note The lock and fuse bits returned are the physical values,
|
||||||
|
i.e. a bit returned as 0 means the corresponding fuse or lock bit
|
||||||
|
is programmed.
|
||||||
|
*/
|
||||||
|
#define boot_lock_fuse_bits_get_short(address) \
|
||||||
|
(__extension__({ \
|
||||||
|
uint8_t __result; \
|
||||||
|
__asm__ __volatile__ \
|
||||||
|
( \
|
||||||
|
"ldi r30, %3\n\t" \
|
||||||
|
"ldi r31, 0\n\t" \
|
||||||
|
"out %1, %2\n\t" \
|
||||||
|
"lpm %0, Z\n\t" \
|
||||||
|
: "=r" (__result) \
|
||||||
|
: "i" (_SFR_IO_ADDR(__SPM_REG)), \
|
||||||
|
"r" ((uint8_t)__BOOT_LOCK_BITS_SET), \
|
||||||
|
"M" (address) \
|
||||||
|
: "r0", "r30", "r31" \
|
||||||
|
); \
|
||||||
|
__result; \
|
||||||
|
}))
|
||||||
|
|
||||||
|
#define boot_lock_fuse_bits_get(address) \
|
||||||
|
(__extension__({ \
|
||||||
|
uint8_t __result; \
|
||||||
|
__asm__ __volatile__ \
|
||||||
|
( \
|
||||||
|
"ldi r30, %3\n\t" \
|
||||||
|
"ldi r31, 0\n\t" \
|
||||||
|
"sts %1, %2\n\t" \
|
||||||
|
"lpm %0, Z\n\t" \
|
||||||
|
: "=r" (__result) \
|
||||||
|
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
|
||||||
|
"r" ((uint8_t)__BOOT_LOCK_BITS_SET), \
|
||||||
|
"M" (address) \
|
||||||
|
: "r0", "r30", "r31" \
|
||||||
|
); \
|
||||||
|
__result; \
|
||||||
|
}))
|
||||||
|
|
||||||
|
/** \ingroup avr_boot
|
||||||
|
\def boot_signature_byte_get(address)
|
||||||
|
|
||||||
|
Read the Signature Row byte at \c address. For some MCU types,
|
||||||
|
this function can also retrieve the factory-stored oscillator
|
||||||
|
calibration bytes.
|
||||||
|
|
||||||
|
Parameter \c address can be 0-0x1f as documented by the datasheet.
|
||||||
|
\note The values are MCU type dependent.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define __BOOT_SIGROW_READ (_BV(__SPM_ENABLE) | _BV(SIGRD))
|
||||||
|
|
||||||
|
#define boot_signature_byte_get_short(addr) \
|
||||||
|
(__extension__({ \
|
||||||
|
uint16_t __addr16 = (uint16_t)(addr); \
|
||||||
|
uint8_t __result; \
|
||||||
|
__asm__ __volatile__ \
|
||||||
|
( \
|
||||||
|
"out %1, %2\n\t" \
|
||||||
|
"lpm %0, Z" "\n\t" \
|
||||||
|
: "=r" (__result) \
|
||||||
|
: "i" (_SFR_IO_ADDR(__SPM_REG)), \
|
||||||
|
"r" ((uint8_t) __BOOT_SIGROW_READ), \
|
||||||
|
"z" (__addr16) \
|
||||||
|
); \
|
||||||
|
__result; \
|
||||||
|
}))
|
||||||
|
|
||||||
|
#define boot_signature_byte_get(addr) \
|
||||||
|
(__extension__({ \
|
||||||
|
uint16_t __addr16 = (uint16_t)(addr); \
|
||||||
|
uint8_t __result; \
|
||||||
|
__asm__ __volatile__ \
|
||||||
|
( \
|
||||||
|
"sts %1, %2\n\t" \
|
||||||
|
"lpm %0, Z" "\n\t" \
|
||||||
|
: "=r" (__result) \
|
||||||
|
: "i" (_SFR_MEM_ADDR(__SPM_REG)), \
|
||||||
|
"r" ((uint8_t) __BOOT_SIGROW_READ), \
|
||||||
|
"z" (__addr16) \
|
||||||
|
); \
|
||||||
|
__result; \
|
||||||
|
}))
|
||||||
|
|
||||||
|
/** \ingroup avr_boot
|
||||||
|
\def boot_page_fill(address, data)
|
||||||
|
|
||||||
|
Fill the bootloader temporary page buffer for flash
|
||||||
|
address with data word.
|
||||||
|
|
||||||
|
\note The address is a byte address. The data is a word. The AVR
|
||||||
|
writes data to the buffer a word at a time, but addresses the buffer
|
||||||
|
per byte! So, increment your address by 2 between calls, and send 2
|
||||||
|
data bytes in a word format! The LSB of the data is written to the lower
|
||||||
|
address; the MSB of the data is written to the higher address.*/
|
||||||
|
|
||||||
|
/** \ingroup avr_boot
|
||||||
|
\def boot_page_erase(address)
|
||||||
|
|
||||||
|
Erase the flash page that contains address.
|
||||||
|
|
||||||
|
\note address is a byte address in flash, not a word address. */
|
||||||
|
|
||||||
|
/** \ingroup avr_boot
|
||||||
|
\def boot_page_write(address)
|
||||||
|
|
||||||
|
Write the bootloader temporary page buffer
|
||||||
|
to flash page that contains address.
|
||||||
|
|
||||||
|
\note address is a byte address in flash, not a word address. */
|
||||||
|
|
||||||
|
/** \ingroup avr_boot
|
||||||
|
\def boot_rww_enable()
|
||||||
|
|
||||||
|
Enable the Read-While-Write memory section. */
|
||||||
|
|
||||||
|
/** \ingroup avr_boot
|
||||||
|
\def boot_lock_bits_set(lock_bits)
|
||||||
|
|
||||||
|
Set the bootloader lock bits.
|
||||||
|
|
||||||
|
\param lock_bits A mask of which Boot Loader Lock Bits to set.
|
||||||
|
|
||||||
|
\note In this context, a 'set bit' will be written to a zero value.
|
||||||
|
Note also that only BLBxx bits can be programmed by this command.
|
||||||
|
|
||||||
|
For example, to disallow the SPM instruction from writing to the Boot
|
||||||
|
Loader memory section of flash, you would use this macro as such:
|
||||||
|
|
||||||
|
\code
|
||||||
|
boot_lock_bits_set (_BV (BLB11));
|
||||||
|
\endcode
|
||||||
|
|
||||||
|
\note Like any lock bits, the Boot Loader Lock Bits, once set,
|
||||||
|
cannot be cleared again except by a chip erase which will in turn
|
||||||
|
also erase the boot loader itself. */
|
||||||
|
|
||||||
|
/* Normal versions of the macros use 16-bit addresses.
|
||||||
|
Extended versions of the macros use 32-bit addresses.
|
||||||
|
Alternate versions of the macros use 16-bit addresses and require special
|
||||||
|
instruction sequences after LPM.
|
||||||
|
|
||||||
|
FLASHEND is defined in the ioXXXX.h file.
|
||||||
|
USHRT_MAX is defined in <limits.h>. */
|
||||||
|
|
||||||
|
#if defined(__AVR_ATmega161__) || defined(__AVR_ATmega163__) \
|
||||||
|
|| defined(__AVR_ATmega323__)
|
||||||
|
|
||||||
|
/* Alternate: ATmega161/163/323 and 16 bit address */
|
||||||
|
#define boot_page_fill(address, data) __boot_page_fill_alternate(address, data)
|
||||||
|
#define boot_page_erase(address) __boot_page_erase_alternate(address)
|
||||||
|
#define boot_page_write(address) __boot_page_write_alternate(address)
|
||||||
|
#define boot_rww_enable() __boot_rww_enable_alternate()
|
||||||
|
#define boot_lock_bits_set(lock_bits) __boot_lock_bits_set_alternate(lock_bits)
|
||||||
|
|
||||||
|
#elif (FLASHEND > USHRT_MAX)
|
||||||
|
|
||||||
|
/* Extended: >16 bit address */
|
||||||
|
#define boot_page_fill(address, data) __boot_page_fill_extended_short(address, data)
|
||||||
|
#define boot_page_erase(address) __boot_page_erase_extended_short(address)
|
||||||
|
#define boot_page_write(address) __boot_page_write_extended_short(address)
|
||||||
|
#define boot_rww_enable() __boot_rww_enable_short()
|
||||||
|
#define boot_lock_bits_set(lock_bits) __boot_lock_bits_set_short(lock_bits)
|
||||||
|
|
||||||
|
#else
|
||||||
|
|
||||||
|
/* Normal: 16 bit address */
|
||||||
|
#define boot_page_fill(address, data) __boot_page_fill_short(address, data)
|
||||||
|
#define boot_page_erase(address) __boot_page_erase_short(address)
|
||||||
|
#define boot_page_write(address) __boot_page_write_short(address)
|
||||||
|
#define boot_rww_enable() __boot_rww_enable_short()
|
||||||
|
#define boot_lock_bits_set(lock_bits) __boot_lock_bits_set_short(lock_bits)
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/** \ingroup avr_boot
|
||||||
|
|
||||||
|
Same as boot_page_fill() except it waits for eeprom and spm operations to
|
||||||
|
complete before filling the page. */
|
||||||
|
|
||||||
|
#define boot_page_fill_safe(address, data) \
|
||||||
|
do { \
|
||||||
|
boot_spm_busy_wait(); \
|
||||||
|
eeprom_busy_wait(); \
|
||||||
|
boot_page_fill(address, data); \
|
||||||
|
} while (0)
|
||||||
|
|
||||||
|
/** \ingroup avr_boot
|
||||||
|
|
||||||
|
Same as boot_page_erase() except it waits for eeprom and spm operations to
|
||||||
|
complete before erasing the page. */
|
||||||
|
|
||||||
|
#define boot_page_erase_safe(address) \
|
||||||
|
do { \
|
||||||
|
boot_spm_busy_wait(); \
|
||||||
|
eeprom_busy_wait(); \
|
||||||
|
boot_page_erase (address); \
|
||||||
|
} while (0)
|
||||||
|
|
||||||
|
/** \ingroup avr_boot
|
||||||
|
|
||||||
|
Same as boot_page_write() except it waits for eeprom and spm operations to
|
||||||
|
complete before writing the page. */
|
||||||
|
|
||||||
|
#define boot_page_write_safe(address) \
|
||||||
|
do { \
|
||||||
|
boot_spm_busy_wait(); \
|
||||||
|
eeprom_busy_wait(); \
|
||||||
|
boot_page_write (address); \
|
||||||
|
} while (0)
|
||||||
|
|
||||||
|
/** \ingroup avr_boot
|
||||||
|
|
||||||
|
Same as boot_rww_enable() except waits for eeprom and spm operations to
|
||||||
|
complete before enabling the RWW mameory. */
|
||||||
|
|
||||||
|
#define boot_rww_enable_safe() \
|
||||||
|
do { \
|
||||||
|
boot_spm_busy_wait(); \
|
||||||
|
eeprom_busy_wait(); \
|
||||||
|
boot_rww_enable(); \
|
||||||
|
} while (0)
|
||||||
|
|
||||||
|
/** \ingroup avr_boot
|
||||||
|
|
||||||
|
Same as boot_lock_bits_set() except waits for eeprom and spm operations to
|
||||||
|
complete before setting the lock bits. */
|
||||||
|
|
||||||
|
#define boot_lock_bits_set_safe(lock_bits) \
|
||||||
|
do { \
|
||||||
|
boot_spm_busy_wait(); \
|
||||||
|
eeprom_busy_wait(); \
|
||||||
|
boot_lock_bits_set (lock_bits); \
|
||||||
|
} while (0)
|
||||||
|
|
||||||
|
#endif /* _AVR_BOOT_H_ */
|
@ -0,0 +1,33 @@
|
|||||||
|
:020000021000EC
|
||||||
|
:10FE00000F92CDB7DEB7112484B714BE81FFDFD0C7
|
||||||
|
:10FE100082E08093C00088E18093C10086E08093F7
|
||||||
|
:10FE2000C2008AE28093C4008EE0BBD0209A00E03A
|
||||||
|
:10FE300010E0EE24E394E1E1DE2EF3E0FF2EA5D006
|
||||||
|
:10FE4000813471F4A2D08983B2D08981823809F4D7
|
||||||
|
:10FE50008BC0813811F484E001C083E08FD08BC067
|
||||||
|
:10FE6000823411F484E103C0853419F485E0A7D00D
|
||||||
|
:10FE700082C0853591F489D0A82EBB2486D0082F66
|
||||||
|
:10FE800010E0102F00270A291B29812F881F88279F
|
||||||
|
:10FE9000881F8BBF000F111F6DC0863521F484E0D1
|
||||||
|
:10FEA0008ED080E0DBCF843609F040C06ED06DD0BC
|
||||||
|
:10FEB000C82E6BD080EE0030180718F4F801F7BE9A
|
||||||
|
:10FEC000E895A12C51E0B52E60D0F50181935F013A
|
||||||
|
:10FED000CE16D1F7F0EE00301F0718F0F801F7BE8C
|
||||||
|
:10FEE000E89565D007B600FCFDCFF801A0E0B1E0D1
|
||||||
|
:10FEF0002C9130E011968C91119790E0982F8827E3
|
||||||
|
:10FF0000822B932B12960C01E7BEE89511243296B2
|
||||||
|
:10FF100082E0A030B80761F785E0F80187BFE89577
|
||||||
|
:10FF200007B600FCFDCFD7BEE89525C08437A9F4FD
|
||||||
|
:10FF30002CD02BD0B82E29D03AD0CB2C4801F401AC
|
||||||
|
:10FF400086911CD00894811C911CCA94C1F70F5F44
|
||||||
|
:10FF50001F4FBA940B0D111D0EC0853739F427D0F1
|
||||||
|
:10FF60008EE10CD087E90AD085E078CF813511F495
|
||||||
|
:10FF700088E017D01CD080E101D061CF9091C00003
|
||||||
|
:10FF800095FFFCCF8093C60008958091C00087FF45
|
||||||
|
:10FF9000FCCF8091C00084FD01C0A8958091C6006F
|
||||||
|
:10FFA0000895E0E6F0E098E1908380830895EDDF26
|
||||||
|
:10FFB000803219F088E0F5DFFFCF84E1DFCFCF9307
|
||||||
|
:10FFC000C82FE3DFC150E9F7F2DFCF91089580E059
|
||||||
|
:08FFD000E8DFEE27FF2709948A
|
||||||
|
:040000031000FE00EB
|
||||||
|
:00000001FF
|
@ -0,0 +1,81 @@
|
|||||||
|
#if defined(__AVR_ATmega168__) || defined(__AVR_ATmega328P__) || defined(__AVR_ATmega88) || defined(__AVR_ATmega8__) || defined(__AVR_ATmega88__)
|
||||||
|
/* Onboard LED is connected to pin PB5 in Arduino NG, Diecimila, and Duemilanove */
|
||||||
|
#define LED_DDR DDRB
|
||||||
|
#define LED_PORT PORTB
|
||||||
|
#define LED_PIN PINB
|
||||||
|
#define LED PINB5
|
||||||
|
|
||||||
|
/* Ports for soft UART */
|
||||||
|
#ifdef SOFT_UART
|
||||||
|
#define UART_PORT PORTD
|
||||||
|
#define UART_PIN PIND
|
||||||
|
#define UART_DDR DDRD
|
||||||
|
#define UART_TX_BIT 1
|
||||||
|
#define UART_RX_BIT 0
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if defined(__AVR_ATmega8__)
|
||||||
|
//Name conversion R.Wiersma
|
||||||
|
#define UCSR0A UCSRA
|
||||||
|
#define UDR0 UDR
|
||||||
|
#define UDRE0 UDRE
|
||||||
|
#define RXC0 RXC
|
||||||
|
#define FE0 FE
|
||||||
|
#define TIFR1 TIFR
|
||||||
|
#define WDTCSR WDTCR
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Luminet support */
|
||||||
|
#if defined(__AVR_ATtiny84__)
|
||||||
|
/* Red LED is connected to pin PA4 */
|
||||||
|
#define LED_DDR DDRA
|
||||||
|
#define LED_PORT PORTA
|
||||||
|
#define LED_PIN PINA
|
||||||
|
#define LED PINA4
|
||||||
|
/* Ports for soft UART - left port only for now. TX/RX on PA2/PA3 */
|
||||||
|
#ifdef SOFT_UART
|
||||||
|
#define UART_PORT PORTA
|
||||||
|
#define UART_PIN PINA
|
||||||
|
#define UART_DDR DDRA
|
||||||
|
#define UART_TX_BIT 2
|
||||||
|
#define UART_RX_BIT 3
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Sanguino support */
|
||||||
|
#if defined(__AVR_ATmega644P__) || defined(__AVR_ATmega1284P__)
|
||||||
|
/* Onboard LED is connected to pin PB0 on Sanguino */
|
||||||
|
#define LED_DDR DDRB
|
||||||
|
#define LED_PORT PORTB
|
||||||
|
#define LED_PIN PINB
|
||||||
|
#define LED PINB0
|
||||||
|
|
||||||
|
/* Ports for soft UART */
|
||||||
|
#ifdef SOFT_UART
|
||||||
|
#define UART_PORT PORTD
|
||||||
|
#define UART_PIN PIND
|
||||||
|
#define UART_DDR DDRD
|
||||||
|
#define UART_TX_BIT 1
|
||||||
|
#define UART_RX_BIT 0
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Mega support */
|
||||||
|
#if defined(__AVR_ATmega1280__)
|
||||||
|
/* Onboard LED is connected to pin PB7 on Arduino Mega */
|
||||||
|
#define LED_DDR DDRB
|
||||||
|
#define LED_PORT PORTB
|
||||||
|
#define LED_PIN PINB
|
||||||
|
#define LED PINB7
|
||||||
|
|
||||||
|
/* Ports for soft UART */
|
||||||
|
#ifdef SOFT_UART
|
||||||
|
#define UART_PORT PORTE
|
||||||
|
#define UART_PIN PINE
|
||||||
|
#define UART_DDR DDRE
|
||||||
|
#define UART_TX_BIT 1
|
||||||
|
#define UART_RX_BIT 0
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
@ -0,0 +1,39 @@
|
|||||||
|
/* STK500 constants list, from AVRDUDE */
|
||||||
|
#define STK_OK 0x10
|
||||||
|
#define STK_FAILED 0x11 // Not used
|
||||||
|
#define STK_UNKNOWN 0x12 // Not used
|
||||||
|
#define STK_NODEVICE 0x13 // Not used
|
||||||
|
#define STK_INSYNC 0x14 // ' '
|
||||||
|
#define STK_NOSYNC 0x15 // Not used
|
||||||
|
#define ADC_CHANNEL_ERROR 0x16 // Not used
|
||||||
|
#define ADC_MEASURE_OK 0x17 // Not used
|
||||||
|
#define PWM_CHANNEL_ERROR 0x18 // Not used
|
||||||
|
#define PWM_ADJUST_OK 0x19 // Not used
|
||||||
|
#define CRC_EOP 0x20 // 'SPACE'
|
||||||
|
#define STK_GET_SYNC 0x30 // '0'
|
||||||
|
#define STK_GET_SIGN_ON 0x31 // '1'
|
||||||
|
#define STK_SET_PARAMETER 0x40 // '@'
|
||||||
|
#define STK_GET_PARAMETER 0x41 // 'A'
|
||||||
|
#define STK_SET_DEVICE 0x42 // 'B'
|
||||||
|
#define STK_SET_DEVICE_EXT 0x45 // 'E'
|
||||||
|
#define STK_ENTER_PROGMODE 0x50 // 'P'
|
||||||
|
#define STK_LEAVE_PROGMODE 0x51 // 'Q'
|
||||||
|
#define STK_CHIP_ERASE 0x52 // 'R'
|
||||||
|
#define STK_CHECK_AUTOINC 0x53 // 'S'
|
||||||
|
#define STK_LOAD_ADDRESS 0x55 // 'U'
|
||||||
|
#define STK_UNIVERSAL 0x56 // 'V'
|
||||||
|
#define STK_PROG_FLASH 0x60 // '`'
|
||||||
|
#define STK_PROG_DATA 0x61 // 'a'
|
||||||
|
#define STK_PROG_FUSE 0x62 // 'b'
|
||||||
|
#define STK_PROG_LOCK 0x63 // 'c'
|
||||||
|
#define STK_PROG_PAGE 0x64 // 'd'
|
||||||
|
#define STK_PROG_FUSE_EXT 0x65 // 'e'
|
||||||
|
#define STK_READ_FLASH 0x70 // 'p'
|
||||||
|
#define STK_READ_DATA 0x71 // 'q'
|
||||||
|
#define STK_READ_FUSE 0x72 // 'r'
|
||||||
|
#define STK_READ_LOCK 0x73 // 's'
|
||||||
|
#define STK_READ_PAGE 0x74 // 't'
|
||||||
|
#define STK_READ_SIGN 0x75 // 'u'
|
||||||
|
#define STK_READ_OSCCAL 0x76 // 'v'
|
||||||
|
#define STK_READ_FUSE_EXT 0x77 // 'w'
|
||||||
|
#define STK_READ_OSCCAL_EXT 0x78 // 'x'
|
@ -1,135 +0,0 @@
|
|||||||
/*
|
|
||||||
wiring.h - Partial implementation of the Wiring API for the ATmega8.
|
|
||||||
Part of Arduino - http://www.arduino.cc/
|
|
||||||
|
|
||||||
Copyright (c) 2005-2006 David A. Mellis
|
|
||||||
|
|
||||||
This library is free software; you can redistribute it and/or
|
|
||||||
modify it under the terms of the GNU Lesser General Public
|
|
||||||
License as published by the Free Software Foundation; either
|
|
||||||
version 2.1 of the License, or (at your option) any later version.
|
|
||||||
|
|
||||||
This library is distributed in the hope that it will be useful,
|
|
||||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
||||||
Lesser General Public License for more details.
|
|
||||||
|
|
||||||
You should have received a copy of the GNU Lesser General
|
|
||||||
Public License along with this library; if not, write to the
|
|
||||||
Free Software Foundation, Inc., 59 Temple Place, Suite 330,
|
|
||||||
Boston, MA 02111-1307 USA
|
|
||||||
|
|
||||||
$Id$
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef Wiring_h
|
|
||||||
#define Wiring_h
|
|
||||||
|
|
||||||
#include <avr/io.h>
|
|
||||||
#include <stdlib.h>
|
|
||||||
#include "binary.h"
|
|
||||||
|
|
||||||
#ifdef __cplusplus
|
|
||||||
extern "C"{
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#define HIGH 0x1
|
|
||||||
#define LOW 0x0
|
|
||||||
|
|
||||||
#define INPUT 0x0
|
|
||||||
#define OUTPUT 0x1
|
|
||||||
|
|
||||||
#define true 0x1
|
|
||||||
#define false 0x0
|
|
||||||
|
|
||||||
#define PI 3.1415926535897932384626433832795
|
|
||||||
#define HALF_PI 1.5707963267948966192313216916398
|
|
||||||
#define TWO_PI 6.283185307179586476925286766559
|
|
||||||
#define DEG_TO_RAD 0.017453292519943295769236907684886
|
|
||||||
#define RAD_TO_DEG 57.295779513082320876798154814105
|
|
||||||
|
|
||||||
#define SERIAL 0x0
|
|
||||||
#define DISPLAY 0x1
|
|
||||||
|
|
||||||
#define LSBFIRST 0
|
|
||||||
#define MSBFIRST 1
|
|
||||||
|
|
||||||
#define CHANGE 1
|
|
||||||
#define FALLING 2
|
|
||||||
#define RISING 3
|
|
||||||
|
|
||||||
#if defined(__AVR_ATmega1280__) || defined(__AVR_ATmega2560__)
|
|
||||||
#define INTERNAL1V1 2
|
|
||||||
#define INTERNAL2V56 3
|
|
||||||
#else
|
|
||||||
#define INTERNAL 3
|
|
||||||
#endif
|
|
||||||
#define DEFAULT 1
|
|
||||||
#define EXTERNAL 0
|
|
||||||
|
|
||||||
// undefine stdlib's abs if encountered
|
|
||||||
#ifdef abs
|
|
||||||
#undef abs
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#define min(a,b) ((a)<(b)?(a):(b))
|
|
||||||
#define max(a,b) ((a)>(b)?(a):(b))
|
|
||||||
#define abs(x) ((x)>0?(x):-(x))
|
|
||||||
#define constrain(amt,low,high) ((amt)<(low)?(low):((amt)>(high)?(high):(amt)))
|
|
||||||
#define round(x) ((x)>=0?(long)((x)+0.5):(long)((x)-0.5))
|
|
||||||
#define radians(deg) ((deg)*DEG_TO_RAD)
|
|
||||||
#define degrees(rad) ((rad)*RAD_TO_DEG)
|
|
||||||
#define sq(x) ((x)*(x))
|
|
||||||
|
|
||||||
#define interrupts() sei()
|
|
||||||
#define noInterrupts() cli()
|
|
||||||
|
|
||||||
#define clockCyclesPerMicrosecond() ( F_CPU / 1000000L )
|
|
||||||
#define clockCyclesToMicroseconds(a) ( ((a) * 1000L) / (F_CPU / 1000L) )
|
|
||||||
#define microsecondsToClockCycles(a) ( ((a) * (F_CPU / 1000L)) / 1000L )
|
|
||||||
|
|
||||||
#define lowByte(w) ((uint8_t) ((w) & 0xff))
|
|
||||||
#define highByte(w) ((uint8_t) ((w) >> 8))
|
|
||||||
|
|
||||||
#define bitRead(value, bit) (((value) >> (bit)) & 0x01)
|
|
||||||
#define bitSet(value, bit) ((value) |= (1UL << (bit)))
|
|
||||||
#define bitClear(value, bit) ((value) &= ~(1UL << (bit)))
|
|
||||||
#define bitWrite(value, bit, bitvalue) (bitvalue ? bitSet(value, bit) : bitClear(value, bit))
|
|
||||||
|
|
||||||
|
|
||||||
typedef unsigned int word;
|
|
||||||
|
|
||||||
#define bit(b) (1UL << (b))
|
|
||||||
|
|
||||||
typedef uint8_t boolean;
|
|
||||||
typedef uint8_t byte;
|
|
||||||
|
|
||||||
void init(void);
|
|
||||||
|
|
||||||
void pinMode(uint8_t, uint8_t);
|
|
||||||
void digitalWrite(uint8_t, uint8_t);
|
|
||||||
int digitalRead(uint8_t);
|
|
||||||
int analogRead(uint8_t);
|
|
||||||
void analogReference(uint8_t mode);
|
|
||||||
void analogWrite(uint8_t, int);
|
|
||||||
|
|
||||||
unsigned long millis(void);
|
|
||||||
unsigned long micros(void);
|
|
||||||
void delay(unsigned long);
|
|
||||||
void delayMicroseconds(unsigned int us);
|
|
||||||
unsigned long pulseIn(uint8_t pin, uint8_t state, unsigned long timeout);
|
|
||||||
|
|
||||||
void shiftOut(uint8_t dataPin, uint8_t clockPin, uint8_t bitOrder, uint8_t val);
|
|
||||||
uint8_t shiftIn(uint8_t dataPin, uint8_t clockPin, uint8_t bitOrder);
|
|
||||||
|
|
||||||
void attachInterrupt(uint8_t, void (*)(void), int mode);
|
|
||||||
void detachInterrupt(uint8_t);
|
|
||||||
|
|
||||||
void setup(void);
|
|
||||||
void loop(void);
|
|
||||||
|
|
||||||
#ifdef __cplusplus
|
|
||||||
} // extern "C"
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#endif
|
|
Loading…
Reference in new issue