You can not select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
297 lines
15 KiB
297 lines
15 KiB
8 years ago
|
/*
|
||
|
ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
|
||
|
|
||
|
Licensed under the Apache License, Version 2.0 (the "License");
|
||
|
you may not use this file except in compliance with the License.
|
||
|
You may obtain a copy of the License at
|
||
|
|
||
|
http://www.apache.org/licenses/LICENSE-2.0
|
||
|
|
||
|
Unless required by applicable law or agreed to in writing, software
|
||
|
distributed under the License is distributed on an "AS IS" BASIS,
|
||
|
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||
|
See the License for the specific language governing permissions and
|
||
|
limitations under the License.
|
||
|
*/
|
||
|
|
||
|
#ifndef _BOARD_H_
|
||
|
#define _BOARD_H_
|
||
|
|
||
|
/*
|
||
|
* Setup for STM32 F04 boards
|
||
|
*/
|
||
|
|
||
|
/*
|
||
|
* Board identifier.
|
||
|
*/
|
||
|
#define BOARD_GENERIC_STM32_F04
|
||
|
#define BOARD_NAME "Generic STM32F04xx board"
|
||
|
|
||
|
/*
|
||
|
* Board oscillators-related settings.
|
||
|
* NOTE: LSE not fitted.
|
||
|
* NOTE: HSE not fitted.
|
||
|
*/
|
||
|
#if !defined(STM32_LSECLK)
|
||
|
#define STM32_LSECLK 0U
|
||
|
#endif
|
||
|
|
||
|
#define STM32_LSEDRV (3U << 3U)
|
||
|
|
||
|
#if !defined(STM32_HSECLK)
|
||
|
#define STM32_HSECLK 0U
|
||
|
#endif
|
||
|
|
||
|
#define STM32_HSE_BYPASS
|
||
|
|
||
|
/*
|
||
|
* MCU type as defined in the ST header. Valid options:
|
||
|
* qmk_firmware/lib/chibios/os/hal/ports/STM32/STM32F0xx/hal_lld.h
|
||
|
*/
|
||
|
#define STM32F042x6
|
||
|
|
||
|
/*
|
||
|
* IO pins assignments.
|
||
|
*/
|
||
|
#define GPIOA_PIN0 0U
|
||
|
#define GPIOA_PIN1 1U
|
||
|
#define GPIOA_PIN2 2U
|
||
|
#define GPIOA_PIN3 3U
|
||
|
#define GPIOA_PIN4 4U
|
||
|
#define GPIOA_PIN5 5U
|
||
|
#define GPIOA_PIN6 6U
|
||
|
#define GPIOA_PIN7 7U
|
||
|
|
||
|
#define GPIOA_PIN9 9U
|
||
|
#define GPIOA_PIN10 10U
|
||
|
|
||
|
|
||
|
#define GPIOA_SWDAT 13U
|
||
|
#define GPIOA_SWCLK 14U
|
||
|
#define GPIOA_PIN15 15U
|
||
|
|
||
|
#define GPIOB_PIN0 0U
|
||
|
#define GPIOB_PIN1 1U
|
||
|
|
||
|
#define GPIOB_PIN3 3U
|
||
|
#define GPIOB_PIN4 4U
|
||
|
#define GPIOB_PIN5 5U
|
||
|
#define GPIOB_PIN6 6U
|
||
|
#define GPIOB_PIN7 7U
|
||
|
|
||
|
#define GPIOF_OSC_IN 0U
|
||
|
#define GPIOF_OSC_OUT 1U
|
||
|
|
||
|
/*
|
||
|
* IO lines assignments.
|
||
|
*/
|
||
|
#define LINE_SWDAT PAL_LINE(GPIOA, 13U)
|
||
|
#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
|
||
|
|
||
|
#define LINE_OSC_IN PAL_LINE(GPIOF, 0U)
|
||
|
#define LINE_OSC_OUT PAL_LINE(GPIOF, 1U)
|
||
|
|
||
|
/*
|
||
|
* I/O ports initial setup, this configuration is established soon after reset
|
||
|
* in the initialization code.
|
||
|
* Please refer to the STM32 Reference Manual for details.
|
||
|
*/
|
||
|
#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
|
||
|
#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
|
||
|
#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
|
||
|
#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
|
||
|
#define PIN_ODR_LOW(n) (0U << (n))
|
||
|
#define PIN_ODR_HIGH(n) (1U << (n))
|
||
|
#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
|
||
|
#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
|
||
|
#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U))
|
||
|
#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U))
|
||
|
#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U))
|
||
|
#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U))
|
||
|
#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
|
||
|
#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
|
||
|
#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
|
||
|
#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
|
||
|
|
||
|
/*
|
||
|
* GPIOA setup:
|
||
|
*
|
||
|
* PA0 - PIN0 (input pullup).
|
||
|
* PA1 - PIN1 (input pullup).
|
||
|
* PA2 - PIN2 (input pullup).
|
||
|
* PA3 - PIN3 (input pullup).
|
||
|
* PA4 - PIN4 (input pullup).
|
||
|
* PA5 - PIN5 (input pullup).
|
||
|
* PA6 - PIN6 (input pullup).
|
||
|
* PA7 - PIN7 (input pullup).
|
||
|
* PA9 - PIN9 (input pullup).
|
||
|
* PA10 - PIN10 (input pullup).
|
||
|
* PA13 - SWDAT (alternate 0).
|
||
|
* PA14 - SWCLK (alternate 0).
|
||
|
* PA15 - PIN15 (input pullup).
|
||
|
*/
|
||
|
#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_PIN0) | \
|
||
|
PIN_MODE_INPUT(GPIOA_PIN1) | \
|
||
|
PIN_MODE_INPUT(GPIOA_PIN2) | \
|
||
|
PIN_MODE_INPUT(GPIOA_PIN3) | \
|
||
|
PIN_MODE_INPUT(GPIOA_PIN4) | \
|
||
|
PIN_MODE_INPUT(GPIOA_PIN5) | \
|
||
|
PIN_MODE_INPUT(GPIOA_PIN6) | \
|
||
|
PIN_MODE_INPUT(GPIOA_PIN7) | \
|
||
|
PIN_MODE_INPUT(GPIOA_PIN9) | \
|
||
|
PIN_MODE_INPUT(GPIOA_PIN10) | \
|
||
|
PIN_MODE_ALTERNATE(GPIOA_SWDAT) | \
|
||
|
PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
|
||
|
PIN_MODE_INPUT(GPIOA_PIN15))
|
||
|
#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_PIN0) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOA_PIN5) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOA_SWDAT) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
|
||
|
#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOA_PIN0) | \
|
||
|
PIN_OSPEED_VERYLOW(GPIOA_PIN1) | \
|
||
|
PIN_OSPEED_VERYLOW(GPIOA_PIN2) | \
|
||
|
PIN_OSPEED_VERYLOW(GPIOA_PIN3) | \
|
||
|
PIN_OSPEED_VERYLOW(GPIOA_PIN4) | \
|
||
|
PIN_OSPEED_VERYLOW(GPIOA_PIN5) | \
|
||
|
PIN_OSPEED_VERYLOW(GPIOA_PIN6) | \
|
||
|
PIN_OSPEED_VERYLOW(GPIOA_PIN7) | \
|
||
|
PIN_OSPEED_VERYLOW(GPIOA_PIN9) | \
|
||
|
PIN_OSPEED_VERYLOW(GPIOA_PIN10) | \
|
||
|
PIN_OSPEED_HIGH(GPIOA_SWDAT) | \
|
||
|
PIN_OSPEED_HIGH(GPIOA_SWCLK) | \
|
||
|
PIN_OSPEED_HIGH(GPIOA_PIN15))
|
||
|
#define VAL_GPIOA_PUPDR (PIN_PUPDR_PULLUP(GPIOA_PIN0) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOA_PIN1) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOA_PIN2) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOA_PIN3) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOA_PIN4) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOA_PIN5) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOA_PIN6) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOA_PIN7) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOA_PIN9) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOA_PIN10) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOA_SWDAT) | \
|
||
|
PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOA_PIN15))
|
||
|
#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_PIN0) | \
|
||
|
PIN_ODR_HIGH(GPIOA_PIN1) | \
|
||
|
PIN_ODR_HIGH(GPIOA_PIN2) | \
|
||
|
PIN_ODR_HIGH(GPIOA_PIN3) | \
|
||
|
PIN_ODR_HIGH(GPIOA_PIN4) | \
|
||
|
PIN_ODR_HIGH(GPIOA_PIN5) | \
|
||
|
PIN_ODR_HIGH(GPIOA_PIN6) | \
|
||
|
PIN_ODR_HIGH(GPIOA_PIN7) | \
|
||
|
PIN_ODR_HIGH(GPIOA_PIN9) | \
|
||
|
PIN_ODR_HIGH(GPIOA_PIN10) | \
|
||
|
PIN_ODR_HIGH(GPIOA_SWDAT) | \
|
||
|
PIN_ODR_HIGH(GPIOA_SWCLK) | \
|
||
|
PIN_ODR_HIGH(GPIOA_PIN15))
|
||
|
#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_PIN0, 0) | \
|
||
|
PIN_AFIO_AF(GPIOA_PIN1, 0) | \
|
||
|
PIN_AFIO_AF(GPIOA_PIN2, 0) | \
|
||
|
PIN_AFIO_AF(GPIOA_PIN3, 0) | \
|
||
|
PIN_AFIO_AF(GPIOA_PIN4, 0) | \
|
||
|
PIN_AFIO_AF(GPIOA_PIN5, 0) | \
|
||
|
PIN_AFIO_AF(GPIOA_PIN6, 0) | \
|
||
|
PIN_AFIO_AF(GPIOA_PIN7, 0))
|
||
|
#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN9, 0) | \
|
||
|
PIN_AFIO_AF(GPIOA_PIN10, 0) | \
|
||
|
PIN_AFIO_AF(GPIOA_SWDAT, 0) | \
|
||
|
PIN_AFIO_AF(GPIOA_SWCLK, 0) | \
|
||
|
PIN_AFIO_AF(GPIOA_PIN15, 0))
|
||
|
|
||
|
/*
|
||
|
* GPIOB setup:
|
||
|
*
|
||
|
* PB0 - PIN0 (input pullup).
|
||
|
* PB1 - PIN1 (input pullup).
|
||
|
* PB3 - PIN3 (input pullup).
|
||
|
* PB4 - PIN4 (input pullup).
|
||
|
* PB5 - PIN5 (input pullup).
|
||
|
* PB6 - PIN6 (input pullup).
|
||
|
* PB7 - PIN7 (input pullup).
|
||
|
*/
|
||
|
#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \
|
||
|
PIN_MODE_INPUT(GPIOB_PIN1) | \
|
||
|
PIN_MODE_INPUT(GPIOB_PIN3) | \
|
||
|
PIN_MODE_INPUT(GPIOB_PIN4) | \
|
||
|
PIN_MODE_INPUT(GPIOB_PIN5) | \
|
||
|
PIN_MODE_INPUT(GPIOB_PIN6) | \
|
||
|
PIN_MODE_INPUT(GPIOB_PIN7))
|
||
|
#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN3) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN6) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOB_PIN7))
|
||
|
#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOB_PIN0) | \
|
||
|
PIN_OSPEED_VERYLOW(GPIOB_PIN1) | \
|
||
|
PIN_OSPEED_HIGH(GPIOB_PIN3) | \
|
||
|
PIN_OSPEED_HIGH(GPIOB_PIN4) | \
|
||
|
PIN_OSPEED_VERYLOW(GPIOB_PIN5) | \
|
||
|
PIN_OSPEED_VERYLOW(GPIOB_PIN6) | \
|
||
|
PIN_OSPEED_VERYLOW(GPIOB_PIN7))
|
||
|
#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOB_PIN1) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOB_PIN3) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOB_PIN4) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOB_PIN5) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOB_PIN6) | \
|
||
|
PIN_PUPDR_PULLUP(GPIOB_PIN7))
|
||
|
#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \
|
||
|
PIN_ODR_HIGH(GPIOB_PIN1) | \
|
||
|
PIN_ODR_HIGH(GPIOB_PIN3) | \
|
||
|
PIN_ODR_HIGH(GPIOB_PIN4) | \
|
||
|
PIN_ODR_HIGH(GPIOB_PIN5) | \
|
||
|
PIN_ODR_HIGH(GPIOB_PIN6) | \
|
||
|
PIN_ODR_HIGH(GPIOB_PIN7))
|
||
|
#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0) | \
|
||
|
PIN_AFIO_AF(GPIOB_PIN1, 0) | \
|
||
|
PIN_AFIO_AF(GPIOB_PIN3, 0) | \
|
||
|
PIN_AFIO_AF(GPIOB_PIN4, 0) | \
|
||
|
PIN_AFIO_AF(GPIOB_PIN5, 0) | \
|
||
|
PIN_AFIO_AF(GPIOB_PIN6, 0) | \
|
||
|
PIN_AFIO_AF(GPIOB_PIN7, 0))
|
||
|
|
||
|
/*
|
||
|
* GPIOF setup:
|
||
|
*
|
||
|
* PF0 - OSC_IN (input floating).
|
||
|
* PF1 - OSC_OUT (input floating).
|
||
|
*/
|
||
|
#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_OSC_IN) | \
|
||
|
PIN_MODE_INPUT(GPIOF_OSC_OUT))
|
||
|
#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_OSC_IN) | \
|
||
|
PIN_OTYPE_PUSHPULL(GPIOF_OSC_OUT))
|
||
|
#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOF_OSC_IN) | \
|
||
|
PIN_OSPEED_VERYLOW(GPIOF_OSC_OUT))
|
||
|
#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_OSC_IN) | \
|
||
|
PIN_PUPDR_FLOATING(GPIOF_OSC_OUT))
|
||
|
#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_OSC_IN) | \
|
||
|
PIN_ODR_HIGH(GPIOF_OSC_OUT))
|
||
|
#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_OSC_IN, 0) | \
|
||
|
PIN_AFIO_AF(GPIOF_OSC_OUT, 0))
|
||
|
|
||
|
|
||
|
#if !defined(_FROM_ASM_)
|
||
|
#ifdef __cplusplus
|
||
|
extern "C" {
|
||
|
#endif
|
||
|
void boardInit(void);
|
||
|
#ifdef __cplusplus
|
||
|
}
|
||
|
#endif
|
||
|
#endif /* _FROM_ASM_ */
|
||
|
|
||
|
#endif /* _BOARD_H_ */
|