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297 lines
15 KiB
297 lines
15 KiB
/*
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ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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#ifndef _BOARD_H_
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#define _BOARD_H_
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/*
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* Setup for STM32 F04 boards
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*/
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/*
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* Board identifier.
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*/
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#define BOARD_GENERIC_STM32_F04
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#define BOARD_NAME "Generic STM32F04xx board"
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/*
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* Board oscillators-related settings.
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* NOTE: LSE not fitted.
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* NOTE: HSE not fitted.
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*/
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#if !defined(STM32_LSECLK)
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#define STM32_LSECLK 0U
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#endif
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#define STM32_LSEDRV (3U << 3U)
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#if !defined(STM32_HSECLK)
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#define STM32_HSECLK 0U
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#endif
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#define STM32_HSE_BYPASS
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/*
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* MCU type as defined in the ST header. Valid options:
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* qmk_firmware/lib/chibios/os/hal/ports/STM32/STM32F0xx/hal_lld.h
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*/
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#define STM32F042x6
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/*
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* IO pins assignments.
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*/
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#define GPIOA_PIN0 0U
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#define GPIOA_PIN1 1U
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#define GPIOA_PIN2 2U
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#define GPIOA_PIN3 3U
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#define GPIOA_PIN4 4U
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#define GPIOA_PIN5 5U
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#define GPIOA_PIN6 6U
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#define GPIOA_PIN7 7U
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#define GPIOA_PIN9 9U
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#define GPIOA_PIN10 10U
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#define GPIOA_SWDAT 13U
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#define GPIOA_SWCLK 14U
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#define GPIOA_PIN15 15U
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#define GPIOB_PIN0 0U
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#define GPIOB_PIN1 1U
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#define GPIOB_PIN3 3U
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#define GPIOB_PIN4 4U
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#define GPIOB_PIN5 5U
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#define GPIOB_PIN6 6U
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#define GPIOB_PIN7 7U
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#define GPIOF_OSC_IN 0U
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#define GPIOF_OSC_OUT 1U
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/*
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* IO lines assignments.
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*/
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#define LINE_SWDAT PAL_LINE(GPIOA, 13U)
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#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
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#define LINE_OSC_IN PAL_LINE(GPIOF, 0U)
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#define LINE_OSC_OUT PAL_LINE(GPIOF, 1U)
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/*
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* I/O ports initial setup, this configuration is established soon after reset
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* in the initialization code.
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* Please refer to the STM32 Reference Manual for details.
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*/
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#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
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#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
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#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
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#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
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#define PIN_ODR_LOW(n) (0U << (n))
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#define PIN_ODR_HIGH(n) (1U << (n))
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#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
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#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
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#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U))
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#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U))
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#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U))
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#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U))
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#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
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#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
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#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
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#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
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/*
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* GPIOA setup:
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*
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* PA0 - PIN0 (input pullup).
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* PA1 - PIN1 (input pullup).
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* PA2 - PIN2 (input pullup).
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* PA3 - PIN3 (input pullup).
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* PA4 - PIN4 (input pullup).
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* PA5 - PIN5 (input pullup).
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* PA6 - PIN6 (input pullup).
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* PA7 - PIN7 (input pullup).
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* PA9 - PIN9 (input pullup).
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* PA10 - PIN10 (input pullup).
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* PA13 - SWDAT (alternate 0).
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* PA14 - SWCLK (alternate 0).
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* PA15 - PIN15 (input pullup).
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*/
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#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_PIN0) | \
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PIN_MODE_INPUT(GPIOA_PIN1) | \
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PIN_MODE_INPUT(GPIOA_PIN2) | \
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PIN_MODE_INPUT(GPIOA_PIN3) | \
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PIN_MODE_INPUT(GPIOA_PIN4) | \
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PIN_MODE_INPUT(GPIOA_PIN5) | \
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PIN_MODE_INPUT(GPIOA_PIN6) | \
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PIN_MODE_INPUT(GPIOA_PIN7) | \
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PIN_MODE_INPUT(GPIOA_PIN9) | \
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PIN_MODE_INPUT(GPIOA_PIN10) | \
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PIN_MODE_ALTERNATE(GPIOA_SWDAT) | \
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PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
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PIN_MODE_INPUT(GPIOA_PIN15))
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#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_PIN0) | \
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PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \
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PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \
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PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \
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PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | \
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PIN_OTYPE_PUSHPULL(GPIOA_PIN5) | \
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PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | \
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PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | \
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PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \
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PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \
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PIN_OTYPE_PUSHPULL(GPIOA_SWDAT) | \
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PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
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PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
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#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOA_PIN0) | \
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PIN_OSPEED_VERYLOW(GPIOA_PIN1) | \
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PIN_OSPEED_VERYLOW(GPIOA_PIN2) | \
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PIN_OSPEED_VERYLOW(GPIOA_PIN3) | \
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PIN_OSPEED_VERYLOW(GPIOA_PIN4) | \
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PIN_OSPEED_VERYLOW(GPIOA_PIN5) | \
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PIN_OSPEED_VERYLOW(GPIOA_PIN6) | \
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PIN_OSPEED_VERYLOW(GPIOA_PIN7) | \
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PIN_OSPEED_VERYLOW(GPIOA_PIN9) | \
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PIN_OSPEED_VERYLOW(GPIOA_PIN10) | \
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PIN_OSPEED_HIGH(GPIOA_SWDAT) | \
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PIN_OSPEED_HIGH(GPIOA_SWCLK) | \
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PIN_OSPEED_HIGH(GPIOA_PIN15))
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#define VAL_GPIOA_PUPDR (PIN_PUPDR_PULLUP(GPIOA_PIN0) | \
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PIN_PUPDR_PULLUP(GPIOA_PIN1) | \
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PIN_PUPDR_PULLUP(GPIOA_PIN2) | \
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PIN_PUPDR_PULLUP(GPIOA_PIN3) | \
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PIN_PUPDR_PULLUP(GPIOA_PIN4) | \
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PIN_PUPDR_PULLUP(GPIOA_PIN5) | \
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PIN_PUPDR_PULLUP(GPIOA_PIN6) | \
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PIN_PUPDR_PULLUP(GPIOA_PIN7) | \
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PIN_PUPDR_PULLUP(GPIOA_PIN9) | \
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PIN_PUPDR_PULLUP(GPIOA_PIN10) | \
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PIN_PUPDR_PULLUP(GPIOA_SWDAT) | \
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PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \
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PIN_PUPDR_PULLUP(GPIOA_PIN15))
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#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_PIN0) | \
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PIN_ODR_HIGH(GPIOA_PIN1) | \
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PIN_ODR_HIGH(GPIOA_PIN2) | \
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PIN_ODR_HIGH(GPIOA_PIN3) | \
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PIN_ODR_HIGH(GPIOA_PIN4) | \
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PIN_ODR_HIGH(GPIOA_PIN5) | \
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PIN_ODR_HIGH(GPIOA_PIN6) | \
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PIN_ODR_HIGH(GPIOA_PIN7) | \
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PIN_ODR_HIGH(GPIOA_PIN9) | \
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PIN_ODR_HIGH(GPIOA_PIN10) | \
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PIN_ODR_HIGH(GPIOA_SWDAT) | \
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PIN_ODR_HIGH(GPIOA_SWCLK) | \
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PIN_ODR_HIGH(GPIOA_PIN15))
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#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_PIN0, 0) | \
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PIN_AFIO_AF(GPIOA_PIN1, 0) | \
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PIN_AFIO_AF(GPIOA_PIN2, 0) | \
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PIN_AFIO_AF(GPIOA_PIN3, 0) | \
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PIN_AFIO_AF(GPIOA_PIN4, 0) | \
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PIN_AFIO_AF(GPIOA_PIN5, 0) | \
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PIN_AFIO_AF(GPIOA_PIN6, 0) | \
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PIN_AFIO_AF(GPIOA_PIN7, 0))
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#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN9, 0) | \
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PIN_AFIO_AF(GPIOA_PIN10, 0) | \
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PIN_AFIO_AF(GPIOA_SWDAT, 0) | \
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PIN_AFIO_AF(GPIOA_SWCLK, 0) | \
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PIN_AFIO_AF(GPIOA_PIN15, 0))
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/*
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* GPIOB setup:
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*
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* PB0 - PIN0 (input pullup).
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* PB1 - PIN1 (input pullup).
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* PB3 - PIN3 (input pullup).
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* PB4 - PIN4 (input pullup).
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* PB5 - PIN5 (input pullup).
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* PB6 - PIN6 (input pullup).
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* PB7 - PIN7 (input pullup).
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*/
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#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \
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PIN_MODE_INPUT(GPIOB_PIN1) | \
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PIN_MODE_INPUT(GPIOB_PIN3) | \
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PIN_MODE_INPUT(GPIOB_PIN4) | \
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PIN_MODE_INPUT(GPIOB_PIN5) | \
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PIN_MODE_INPUT(GPIOB_PIN6) | \
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PIN_MODE_INPUT(GPIOB_PIN7))
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#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \
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PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \
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PIN_OTYPE_PUSHPULL(GPIOB_PIN3) | \
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PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \
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PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \
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PIN_OTYPE_PUSHPULL(GPIOB_PIN6) | \
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PIN_OTYPE_PUSHPULL(GPIOB_PIN7))
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#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOB_PIN0) | \
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PIN_OSPEED_VERYLOW(GPIOB_PIN1) | \
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PIN_OSPEED_HIGH(GPIOB_PIN3) | \
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PIN_OSPEED_HIGH(GPIOB_PIN4) | \
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PIN_OSPEED_VERYLOW(GPIOB_PIN5) | \
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PIN_OSPEED_VERYLOW(GPIOB_PIN6) | \
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PIN_OSPEED_VERYLOW(GPIOB_PIN7))
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#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \
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PIN_PUPDR_PULLUP(GPIOB_PIN1) | \
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PIN_PUPDR_PULLUP(GPIOB_PIN3) | \
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PIN_PUPDR_PULLUP(GPIOB_PIN4) | \
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PIN_PUPDR_PULLUP(GPIOB_PIN5) | \
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PIN_PUPDR_PULLUP(GPIOB_PIN6) | \
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PIN_PUPDR_PULLUP(GPIOB_PIN7))
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#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \
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PIN_ODR_HIGH(GPIOB_PIN1) | \
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PIN_ODR_HIGH(GPIOB_PIN3) | \
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PIN_ODR_HIGH(GPIOB_PIN4) | \
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PIN_ODR_HIGH(GPIOB_PIN5) | \
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PIN_ODR_HIGH(GPIOB_PIN6) | \
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PIN_ODR_HIGH(GPIOB_PIN7))
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#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0) | \
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PIN_AFIO_AF(GPIOB_PIN1, 0) | \
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PIN_AFIO_AF(GPIOB_PIN3, 0) | \
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PIN_AFIO_AF(GPIOB_PIN4, 0) | \
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PIN_AFIO_AF(GPIOB_PIN5, 0) | \
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PIN_AFIO_AF(GPIOB_PIN6, 0) | \
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PIN_AFIO_AF(GPIOB_PIN7, 0))
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/*
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* GPIOF setup:
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*
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* PF0 - OSC_IN (input floating).
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* PF1 - OSC_OUT (input floating).
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*/
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#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_OSC_IN) | \
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PIN_MODE_INPUT(GPIOF_OSC_OUT))
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#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_OSC_IN) | \
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PIN_OTYPE_PUSHPULL(GPIOF_OSC_OUT))
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#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOF_OSC_IN) | \
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PIN_OSPEED_VERYLOW(GPIOF_OSC_OUT))
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#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_OSC_IN) | \
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PIN_PUPDR_FLOATING(GPIOF_OSC_OUT))
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#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_OSC_IN) | \
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PIN_ODR_HIGH(GPIOF_OSC_OUT))
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#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_OSC_IN, 0) | \
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PIN_AFIO_AF(GPIOF_OSC_OUT, 0))
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#if !defined(_FROM_ASM_)
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#ifdef __cplusplus
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extern "C" {
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#endif
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void boardInit(void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* _FROM_ASM_ */
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#endif /* _BOARD_H_ */
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