Split out NVM access code in the AVRISP project into a seperate NVMTarget.c source file and header. Make NVM register accesses use the NVM base address as set by the host, rather than using the fixed value from the XMEGA datasheet.
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/*
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LUFA Library
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Copyright (C) Dean Camera, 2009.
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dean [at] fourwalledcubicle [dot] com
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www.fourwalledcubicle.com
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*/
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/*
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Copyright 2009 Dean Camera (dean [at] fourwalledcubicle [dot] com)
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Permission to use, copy, modify, and distribute this software
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and its documentation for any purpose and without fee is hereby
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granted, provided that the above copyright notice appear in all
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copies and that both that the copyright notice and this
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permission notice and warranty disclaimer appear in supporting
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documentation, and that the name of the author not be used in
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advertising or publicity pertaining to distribution of the
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software without specific, written prior permission.
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The author disclaim all warranties with regard to this
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software, including all implied warranties of merchantability
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and fitness. In no event shall the author be liable for any
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special, indirect or consequential damages or any damages
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whatsoever resulting from loss of use, data or profits, whether
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in an action of contract, negligence or other tortious action,
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arising out of or in connection with the use or performance of
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this software.
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*/
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/** \file
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*
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* Target-related functions for the target's NVM module.
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*/
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#define INCLUDE_FROM_NVMTARGET_C
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#include "NVMTarget.h"
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#if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)
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void NVMTarget_SendNVMRegAddress(uint8_t Register)
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{
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uint32_t Address = XPROG_Param_NVMBase | Register;
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PDITarget_SendByte(Address >> 24);
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PDITarget_SendByte(Address >> 26);
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PDITarget_SendByte(Address >> 8);
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PDITarget_SendByte(Address & 0xFF);
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}
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bool NVMTarget_WaitWhileNVMBusBusy(void)
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{
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uint8_t AttemptsRemaining = 255;
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/* Poll the STATUS register to check to see if NVM access has been enabled */
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while (AttemptsRemaining--)
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{
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PDITarget_SendByte(PDI_CMD_LDCS | PDI_STATUS_REG);
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if (PDITarget_ReceiveByte() & PDI_STATUS_NVM)
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return true;
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}
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return false;
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}
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void NVMTarget_WaitWhileNVMControllerBusy(void)
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{
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/* Poll the NVM STATUS register while the NVM controller is busy */
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for (;;)
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{
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PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_1BYTE << 2));
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NVMTarget_SendNVMRegAddress(NVM_REG_STATUS);
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if (!(PDITarget_ReceiveByte() & (1 << 7)))
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return;
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}
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}
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uint32_t NVMTarget_GetMemoryCRC(uint8_t MemoryCommand)
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{
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uint32_t MemoryCRC;
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/* Set the NVM command to the correct CRC read command */
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PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_1BYTE << 2));
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NVMTarget_SendNVMRegAddress(NVM_REG_CMD);
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PDITarget_SendByte(MemoryCommand);
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/* Set CMDEX bit in NVM CTRLA register to start the CRC generation */
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PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_1BYTE << 2));
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NVMTarget_SendNVMRegAddress(NVM_REG_CTRLA);
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PDITarget_SendByte(1 << 0);
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/* Wait until the NVM bus and controller is no longer busy */
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NVMTarget_WaitWhileNVMBusBusy();
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NVMTarget_WaitWhileNVMControllerBusy();
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/* Read the three byte generated CRC value */
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PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_3BYTES << 2));
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NVMTarget_SendNVMRegAddress(NVM_REG_DAT0);
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MemoryCRC = PDITarget_ReceiveByte();
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MemoryCRC |= ((uint16_t)PDITarget_ReceiveByte() << 8);
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MemoryCRC |= ((uint32_t)PDITarget_ReceiveByte() << 16);
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return MemoryCRC;
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}
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#endif
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@ -0,0 +1,90 @@
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/*
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LUFA Library
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Copyright (C) Dean Camera, 2009.
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dean [at] fourwalledcubicle [dot] com
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www.fourwalledcubicle.com
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*/
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/*
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Copyright 2009 Dean Camera (dean [at] fourwalledcubicle [dot] com)
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Permission to use, copy, modify, and distribute this software
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and its documentation for any purpose and without fee is hereby
|
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granted, provided that the above copyright notice appear in all
|
||||
copies and that both that the copyright notice and this
|
||||
permission notice and warranty disclaimer appear in supporting
|
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documentation, and that the name of the author not be used in
|
||||
advertising or publicity pertaining to distribution of the
|
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software without specific, written prior permission.
|
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The author disclaim all warranties with regard to this
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software, including all implied warranties of merchantability
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and fitness. In no event shall the author be liable for any
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special, indirect or consequential damages or any damages
|
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whatsoever resulting from loss of use, data or profits, whether
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in an action of contract, negligence or other tortious action,
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arising out of or in connection with the use or performance of
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this software.
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*/
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/** \file
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*
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* Header file for NVMTarget.c.
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*/
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#ifndef _NVM_TARGET_
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#define _NVM_TARGET_
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/* Includes: */
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#include <avr/io.h>
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#include <avr/interrupt.h>
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#include <stdbool.h>
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#include <LUFA/Common/Common.h>
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#include "PDIProtocol.h"
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#include "PDITarget.h"
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/* Preprocessor Checks: */
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#if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))
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#undef ENABLE_ISP_PROTOCOL
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#if !defined(ENABLE_PDI_PROTOCOL)
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#define ENABLE_PDI_PROTOCOL
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#endif
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#endif
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/* Defines: */
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#define FLASH_BASE 0x00800000
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#define EPPROM_BASE 0x008C0000
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#define FUSE_BASE 0x008F0020
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#define DATAMEM_BASE 0x01000000
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#define PROD_SIGNATURE_BASE 0x008E0200
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#define USER_SIGNATURE_BASE 0x008E0400
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#define NVM_REG_ADDR0 0x00
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#define NVM_REG_ADDR1 0x01
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#define NVM_REG_ADDR2 0x02
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#define NVM_REG_DAT0 0x04
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#define NVM_REG_DAT1 0x05
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#define NVM_REG_DAT2 0x06
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#define NVM_REG_CMD 0x0A
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#define NVM_REG_CTRLA 0x0B
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#define NVM_REG_CTRLB 0x0C
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#define NVM_REG_INTCTRL 0x0D
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#define NVM_REG_STATUS 0x0F
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#define NVM_REG_LOCKBITS 0x10
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#define NVM_CMD_APPCRC 0x38
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#define NVM_CMD_BOOTCRC 0x39
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#define NVM_CMD_FLASHCRC 0x78
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#define NVM_CMD_READUSERSIG 0x03
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/* Function Prototypes: */
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void NVMTarget_SendNVMRegAddress(uint8_t Register);
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bool NVMTarget_WaitWhileNVMBusBusy(void);
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void NVMTarget_WaitWhileNVMControllerBusy(void);
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uint32_t NVMTarget_GetMemoryCRC(uint8_t MemoryCommand);
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#endif
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