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@ -79,19 +79,13 @@ ISR(INT0_vect, ISR_BLOCK)
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RX_Data = 0;
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RX_Data = 0;
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RX_BitMask = (1 << 0);
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RX_BitMask = (1 << 0);
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/* Check that the start bit is still low to prevent noise from triggering a reception */
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/* Clear reception channel ISR flag and enable the bit reception ISR */
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if (!(SRXPIN & (1 << SRX)))
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{
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/* Clear reception channel ISR flag in case it is pending */
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TIFR1 = (1 << OCF1A);
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TIFR1 = (1 << OCF1A);
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/* Still low, enable bit receive ISR */
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TIMSK1 = (1 << OCIE1A);
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TIMSK1 = (1 << OCIE1A);
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/* Clear the start bit detection ISR flag */
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/* Disable start bit detection ISR while the next byte is received */
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EIMSK &= ~(1 << INT0);
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EIMSK &= ~(1 << INT0);
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}
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}
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}
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/** ISR to manage the reception of bits to the software UART. */
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/** ISR to manage the reception of bits to the software UART. */
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ISR(TIMER1_COMPA_vect, ISR_BLOCK)
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ISR(TIMER1_COMPA_vect, ISR_BLOCK)
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