Refactor AVRISP MKII Clone PDI/TPI command constants to simplify the driver code.

pull/1469/head
Dean Camera 11 years ago
parent e1b19e4e10
commit 560e5f75fb

@ -55,8 +55,8 @@ static void TINYNVM_SendPointerAddress(const uint16_t AbsoluteAddress)
static void TINYNVM_SendReadNVMRegister(const uint8_t Address) static void TINYNVM_SendReadNVMRegister(const uint8_t Address)
{ {
/* The TPI command for reading from the I/O space uses strange addressing, where the I/O address's upper /* The TPI command for reading from the I/O space uses strange addressing, where the I/O address's upper
* two bits of the 6-bit address are shifted left once */ * two bits of the 6-bit address are shifted left once - use function to reduce code size */
XPROGTarget_SendByte(TPI_CMD_SIN | ((Address & 0x30) << 1) | (Address & 0x0F)); XPROGTarget_SendByte(TPI_CMD_SIN(Address));
} }
/** Sends a SOUT command to the target with the specified I/O address, ready for the data byte to be read. /** Sends a SOUT command to the target with the specified I/O address, ready for the data byte to be read.
@ -66,8 +66,8 @@ static void TINYNVM_SendReadNVMRegister(const uint8_t Address)
static void TINYNVM_SendWriteNVMRegister(const uint8_t Address) static void TINYNVM_SendWriteNVMRegister(const uint8_t Address)
{ {
/* The TPI command for reading from the I/O space uses strange addressing, where the I/O address's upper /* The TPI command for reading from the I/O space uses strange addressing, where the I/O address's upper
* two bits of the 6-bit address are shifted left once */ * two bits of the 6-bit address are shifted left once - use function to reduce code size */
XPROGTarget_SendByte(TPI_CMD_SOUT | ((Address & 0x30) << 1) | (Address & 0x0F)); XPROGTarget_SendByte(TPI_CMD_SOUT(Address));
} }
/** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read. /** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read.
@ -80,7 +80,7 @@ bool TINYNVM_WaitWhileNVMBusBusy(void)
for (;;) for (;;)
{ {
/* Send the SLDCS command to read the TPI STATUS register to see the NVM bus is active */ /* Send the SLDCS command to read the TPI STATUS register to see the NVM bus is active */
XPROGTarget_SendByte(TPI_CMD_SLDCS | TPI_STATUS_REG); XPROGTarget_SendByte(TPI_CMD_SLDCS(TPI_REG_STATUS));
uint8_t StatusRegister = XPROGTarget_ReceiveByte(); uint8_t StatusRegister = XPROGTarget_ReceiveByte();
@ -129,7 +129,7 @@ bool TINYNVM_EnableTPI(void)
XPROGTarget_EnableTargetTPI(); XPROGTarget_EnableTargetTPI();
/* Lower direction change guard time to 32 USART bits */ /* Lower direction change guard time to 32 USART bits */
XPROGTarget_SendByte(TPI_CMD_SSTCS | TPI_CTRL_REG); XPROGTarget_SendByte(TPI_CMD_SSTCS(TPI_REG_CTRL));
XPROGTarget_SendByte(0x02); XPROGTarget_SendByte(0x02);
/* Enable access to the XPROG NVM bus by sending the documented NVM access key to the device */ /* Enable access to the XPROG NVM bus by sending the documented NVM access key to the device */
@ -149,11 +149,11 @@ void TINYNVM_DisableTPI(void)
do do
{ {
/* Clear the NVMEN bit in the TPI STATUS register to disable TPI mode */ /* Clear the NVMEN bit in the TPI STATUS register to disable TPI mode */
XPROGTarget_SendByte(TPI_CMD_SSTCS | TPI_STATUS_REG); XPROGTarget_SendByte(TPI_CMD_SSTCS(TPI_REG_STATUS));
XPROGTarget_SendByte(0x00); XPROGTarget_SendByte(0x00);
/* Read back the STATUS register, check to see if it took effect */ /* Read back the STATUS register, check to see if it took effect */
XPROGTarget_SendByte(TPI_CMD_SLDCS | PDI_RESET_REG); XPROGTarget_SendByte(TPI_CMD_SLDCS(TPI_REG_STATUS));
} while (XPROGTarget_ReceiveByte() != 0x00); } while (XPROGTarget_ReceiveByte() != 0x00);
XPROGTarget_DisableTargetTPI(); XPROGTarget_DisableTargetTPI();
@ -185,7 +185,7 @@ bool TINYNVM_ReadMemory(const uint16_t ReadAddress,
while (ReadSize-- && TimeoutTicksRemaining) while (ReadSize-- && TimeoutTicksRemaining)
{ {
/* Read the byte of data from the target */ /* Read the byte of data from the target */
XPROGTarget_SendByte(TPI_CMD_SLD | TPI_POINTER_INDIRECT_PI); XPROGTarget_SendByte(TPI_CMD_SLD(TPI_POINTER_INDIRECT_PI));
*(ReadBuffer++) = XPROGTarget_ReceiveByte(); *(ReadBuffer++) = XPROGTarget_ReceiveByte();
} }
@ -226,11 +226,11 @@ bool TINYNVM_WriteMemory(const uint16_t WriteAddress,
return false; return false;
/* Write the low byte of data to the target */ /* Write the low byte of data to the target */
XPROGTarget_SendByte(TPI_CMD_SST | TPI_POINTER_INDIRECT_PI); XPROGTarget_SendByte(TPI_CMD_SST(TPI_POINTER_INDIRECT_PI));
XPROGTarget_SendByte(*(WriteBuffer++)); XPROGTarget_SendByte(*(WriteBuffer++));
/* Write the high byte of data to the target */ /* Write the high byte of data to the target */
XPROGTarget_SendByte(TPI_CMD_SST | TPI_POINTER_INDIRECT_PI); XPROGTarget_SendByte(TPI_CMD_SST(TPI_POINTER_INDIRECT_PI));
XPROGTarget_SendByte(*(WriteBuffer++)); XPROGTarget_SendByte(*(WriteBuffer++));
/* Need to decrement the write length twice, since we wrote a whole two-byte word */ /* Need to decrement the write length twice, since we wrote a whole two-byte word */
@ -260,7 +260,7 @@ bool TINYNVM_EraseMemory(const uint8_t EraseCommand,
/* Write to a high byte location within the target address space to start the erase process */ /* Write to a high byte location within the target address space to start the erase process */
TINYNVM_SendPointerAddress(Address | 0x0001); TINYNVM_SendPointerAddress(Address | 0x0001);
XPROGTarget_SendByte(TPI_CMD_SST | TPI_POINTER_INDIRECT); XPROGTarget_SendByte(TPI_CMD_SST(TPI_POINTER_INDIRECT));
XPROGTarget_SendByte(0x00); XPROGTarget_SendByte(0x00);
/* Wait until the NVM controller is no longer busy */ /* Wait until the NVM controller is no longer busy */

@ -75,7 +75,7 @@ bool XMEGANVM_WaitWhileNVMBusBusy(void)
for (;;) for (;;)
{ {
/* Send the LDCS command to read the PDI STATUS register to see the NVM bus is active */ /* Send the LDCS command to read the PDI STATUS register to see the NVM bus is active */
XPROGTarget_SendByte(PDI_CMD_LDCS | PDI_STATUS_REG); XPROGTarget_SendByte(PDI_CMD_LDCS(PDI_REG_STATUS));
uint8_t StatusRegister = XPROGTarget_ReceiveByte(); uint8_t StatusRegister = XPROGTarget_ReceiveByte();
@ -97,14 +97,14 @@ bool XMEGANVM_WaitWhileNVMBusBusy(void)
bool XMEGANVM_WaitWhileNVMControllerBusy(void) bool XMEGANVM_WaitWhileNVMControllerBusy(void)
{ {
/* Preload the pointer register with the NVM STATUS register address to check the BUSY flag */ /* Preload the pointer register with the NVM STATUS register address to check the BUSY flag */
XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES); XPROGTarget_SendByte(PDI_CMD_ST(PDI_POINTER_DIRECT, PDI_DATSIZE_4BYTES));
XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_STATUS); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_STATUS);
/* Poll the NVM STATUS register while the NVM controller is busy */ /* Poll the NVM STATUS register while the NVM controller is busy */
for (;;) for (;;)
{ {
/* Fetch the current status value via the pointer register (without auto-increment afterwards) */ /* Fetch the current status value via the pointer register (without auto-increment afterwards) */
XPROGTarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT << 2) | PDI_DATSIZE_1BYTE); XPROGTarget_SendByte(PDI_CMD_LD(PDI_POINTER_INDIRECT, PDI_DATSIZE_1BYTE));
uint8_t StatusRegister = XPROGTarget_ReceiveByte(); uint8_t StatusRegister = XPROGTarget_ReceiveByte();
@ -128,11 +128,11 @@ bool XMEGANVM_EnablePDI(void)
XPROGTarget_EnableTargetPDI(); XPROGTarget_EnableTargetPDI();
/* Store the RESET key into the RESET PDI register to keep the XMEGA in reset */ /* Store the RESET key into the RESET PDI register to keep the XMEGA in reset */
XPROGTarget_SendByte(PDI_CMD_STCS | PDI_RESET_REG); XPROGTarget_SendByte(PDI_CMD_STCS(PDI_REG_RESET));
XPROGTarget_SendByte(PDI_RESET_KEY); XPROGTarget_SendByte(PDI_RESET_KEY);
/* Lower direction change guard time to 32 USART bits */ /* Lower direction change guard time to 32 USART bits */
XPROGTarget_SendByte(PDI_CMD_STCS | PDI_CTRL_REG); XPROGTarget_SendByte(PDI_CMD_STCS(PDI_REG_CTRL));
XPROGTarget_SendByte(0x02); XPROGTarget_SendByte(0x02);
/* Enable access to the XPROG NVM bus by sending the documented NVM access key to the device */ /* Enable access to the XPROG NVM bus by sending the documented NVM access key to the device */
@ -155,11 +155,11 @@ void XMEGANVM_DisablePDI(void)
do do
{ {
/* Clear reset register */ /* Clear reset register */
XPROGTarget_SendByte(PDI_CMD_STCS | PDI_RESET_REG); XPROGTarget_SendByte(PDI_CMD_STCS(PDI_REG_RESET));
XPROGTarget_SendByte(0x00); XPROGTarget_SendByte(0x00);
/* Read back the reset register, check to see if it took effect */ /* Read back the reset register, check to see if it took effect */
XPROGTarget_SendByte(PDI_CMD_LDCS | PDI_RESET_REG); XPROGTarget_SendByte(PDI_CMD_LDCS(PDI_REG_RESET));
} while (XPROGTarget_ReceiveByte() != 0x00); } while (XPROGTarget_ReceiveByte() != 0x00);
XPROGTarget_DisableTargetPDI(); XPROGTarget_DisableTargetPDI();
@ -182,12 +182,12 @@ bool XMEGANVM_GetMemoryCRC(const uint8_t CRCCommand,
return false; return false;
/* Set the NVM command to the correct CRC read command */ /* Set the NVM command to the correct CRC read command */
XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATSIZE_4BYTES, PDI_DATSIZE_1BYTE));
XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
XPROGTarget_SendByte(CRCCommand); XPROGTarget_SendByte(CRCCommand);
/* Set CMDEX bit in NVM CTRLA register to start the CRC generation */ /* Set CMDEX bit in NVM CTRLA register to start the CRC generation */
XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATSIZE_4BYTES, PDI_DATSIZE_1BYTE));
XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
XPROGTarget_SendByte(XMEGA_NVM_BIT_CTRLA_CMDEX); XPROGTarget_SendByte(XMEGA_NVM_BIT_CTRLA_CMDEX);
@ -200,15 +200,15 @@ bool XMEGANVM_GetMemoryCRC(const uint8_t CRCCommand,
return false; return false;
/* Load the PDI pointer register with the DAT0 register start address */ /* Load the PDI pointer register with the DAT0 register start address */
XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES); XPROGTarget_SendByte(PDI_CMD_ST(PDI_POINTER_DIRECT, PDI_DATSIZE_4BYTES));
XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_DAT0); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_DAT0);
/* Send the REPEAT command to grab the CRC bytes */ /* Send the REPEAT command to grab the CRC bytes */
XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE); XPROGTarget_SendByte(PDI_CMD_REPEAT(PDI_DATSIZE_1BYTE));
XPROGTarget_SendByte(XMEGA_CRC_LENGTH_BYTES - 1); XPROGTarget_SendByte(XMEGA_CRC_LENGTH_BYTES - 1);
/* Read in the CRC bytes from the target */ /* Read in the CRC bytes from the target */
XPROGTarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE); XPROGTarget_SendByte(PDI_CMD_LD(PDI_POINTER_INDIRECT_PI, PDI_DATSIZE_1BYTE));
for (uint8_t i = 0; i < XMEGA_CRC_LENGTH_BYTES; i++) for (uint8_t i = 0; i < XMEGA_CRC_LENGTH_BYTES; i++)
((uint8_t*)CRCDest)[i] = XPROGTarget_ReceiveByte(); ((uint8_t*)CRCDest)[i] = XPROGTarget_ReceiveByte();
@ -232,29 +232,29 @@ bool XMEGANVM_ReadMemory(const uint32_t ReadAddress,
return false; return false;
/* Send the READNVM command to the NVM controller for reading of an arbitrary location */ /* Send the READNVM command to the NVM controller for reading of an arbitrary location */
XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATSIZE_4BYTES, PDI_DATSIZE_1BYTE));
XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
XPROGTarget_SendByte(XMEGA_NVM_CMD_READNVM); XPROGTarget_SendByte(XMEGA_NVM_CMD_READNVM);
if (ReadSize > 1) if (ReadSize > 1)
{ {
/* Load the PDI pointer register with the start address we want to read from */ /* Load the PDI pointer register with the start address we want to read from */
XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES); XPROGTarget_SendByte(PDI_CMD_ST(PDI_POINTER_DIRECT, PDI_DATSIZE_4BYTES));
XMEGANVM_SendAddress(ReadAddress); XMEGANVM_SendAddress(ReadAddress);
/* Send the REPEAT command with the specified number of bytes to read */ /* Send the REPEAT command with the specified number of bytes to read */
XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE); XPROGTarget_SendByte(PDI_CMD_REPEAT(PDI_DATSIZE_1BYTE));
XPROGTarget_SendByte(ReadSize - 1); XPROGTarget_SendByte(ReadSize - 1);
/* Send a LD command with indirect access and post-increment to read out the bytes */ /* Send a LD command with indirect access and post-increment to read out the bytes */
XPROGTarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE); XPROGTarget_SendByte(PDI_CMD_LD(PDI_POINTER_INDIRECT_PI, PDI_DATSIZE_1BYTE));
while (ReadSize-- && TimeoutTicksRemaining) while (ReadSize-- && TimeoutTicksRemaining)
*(ReadBuffer++) = XPROGTarget_ReceiveByte(); *(ReadBuffer++) = XPROGTarget_ReceiveByte();
} }
else else
{ {
/* Send a LDS command with the read address to read out the requested byte */ /* Send a LDS command with the read address to read out the requested byte */
XPROGTarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2)); XPROGTarget_SendByte(PDI_CMD_LDS(PDI_DATSIZE_4BYTES, PDI_DATSIZE_1BYTE));
XMEGANVM_SendAddress(ReadAddress); XMEGANVM_SendAddress(ReadAddress);
*(ReadBuffer++) = XPROGTarget_ReceiveByte(); *(ReadBuffer++) = XPROGTarget_ReceiveByte();
} }
@ -279,12 +279,12 @@ bool XMEGANVM_WriteByteMemory(const uint8_t WriteCommand,
return false; return false;
/* Send the memory write command to the target */ /* Send the memory write command to the target */
XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATSIZE_4BYTES, PDI_DATSIZE_1BYTE));
XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
XPROGTarget_SendByte(WriteCommand); XPROGTarget_SendByte(WriteCommand);
/* Send new memory byte to the memory of the target */ /* Send new memory byte to the memory of the target */
XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATSIZE_4BYTES, PDI_DATSIZE_1BYTE));
XMEGANVM_SendAddress(WriteAddress); XMEGANVM_SendAddress(WriteAddress);
XPROGTarget_SendByte(Byte); XPROGTarget_SendByte(Byte);
@ -318,12 +318,12 @@ bool XMEGANVM_WritePageMemory(const uint8_t WriteBuffCommand,
return false; return false;
/* Send the memory buffer erase command to the target */ /* Send the memory buffer erase command to the target */
XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATSIZE_4BYTES, PDI_DATSIZE_1BYTE));
XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
XPROGTarget_SendByte(EraseBuffCommand); XPROGTarget_SendByte(EraseBuffCommand);
/* Set CMDEX bit in NVM CTRLA register to start the buffer erase */ /* Set CMDEX bit in NVM CTRLA register to start the buffer erase */
XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATSIZE_4BYTES, PDI_DATSIZE_1BYTE));
XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
XPROGTarget_SendByte(XMEGA_NVM_BIT_CTRLA_CMDEX); XPROGTarget_SendByte(XMEGA_NVM_BIT_CTRLA_CMDEX);
} }
@ -335,20 +335,20 @@ bool XMEGANVM_WritePageMemory(const uint8_t WriteBuffCommand,
return false; return false;
/* Send the memory buffer write command to the target */ /* Send the memory buffer write command to the target */
XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATSIZE_4BYTES, PDI_DATSIZE_1BYTE));
XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
XPROGTarget_SendByte(WriteBuffCommand); XPROGTarget_SendByte(WriteBuffCommand);
/* Load the PDI pointer register with the start address we want to write to */ /* Load the PDI pointer register with the start address we want to write to */
XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES); XPROGTarget_SendByte(PDI_CMD_ST(PDI_POINTER_DIRECT, PDI_DATSIZE_4BYTES));
XMEGANVM_SendAddress(WriteAddress); XMEGANVM_SendAddress(WriteAddress);
/* Send the REPEAT command with the specified number of bytes to write */ /* Send the REPEAT command with the specified number of bytes to write */
XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE); XPROGTarget_SendByte(PDI_CMD_REPEAT(PDI_DATSIZE_1BYTE));
XPROGTarget_SendByte(WriteSize - 1); XPROGTarget_SendByte(WriteSize - 1);
/* Send a ST command with indirect access and post-increment to write the bytes */ /* Send a ST command with indirect access and post-increment to write the bytes */
XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE); XPROGTarget_SendByte(PDI_CMD_ST(PDI_POINTER_INDIRECT_PI, PDI_DATSIZE_1BYTE));
while (WriteSize--) while (WriteSize--)
XPROGTarget_SendByte(*(WriteBuffer++)); XPROGTarget_SendByte(*(WriteBuffer++));
} }
@ -360,12 +360,12 @@ bool XMEGANVM_WritePageMemory(const uint8_t WriteBuffCommand,
return false; return false;
/* Send the memory write command to the target */ /* Send the memory write command to the target */
XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATSIZE_4BYTES, PDI_DATSIZE_1BYTE));
XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
XPROGTarget_SendByte(WritePageCommand); XPROGTarget_SendByte(WritePageCommand);
/* Send the address of the first page location to write the memory page */ /* Send the address of the first page location to write the memory page */
XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATSIZE_4BYTES, PDI_DATSIZE_1BYTE));
XMEGANVM_SendAddress(WriteAddress); XMEGANVM_SendAddress(WriteAddress);
XPROGTarget_SendByte(0x00); XPROGTarget_SendByte(0x00);
} }
@ -391,24 +391,24 @@ bool XMEGANVM_EraseMemory(const uint8_t EraseCommand,
if (EraseCommand == XMEGA_NVM_CMD_CHIPERASE) if (EraseCommand == XMEGA_NVM_CMD_CHIPERASE)
{ {
/* Send the memory erase command to the target */ /* Send the memory erase command to the target */
XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATSIZE_4BYTES, PDI_DATSIZE_1BYTE));
XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
XPROGTarget_SendByte(EraseCommand); XPROGTarget_SendByte(EraseCommand);
/* Set CMDEX bit in NVM CTRLA register to start the erase sequence */ /* Set CMDEX bit in NVM CTRLA register to start the erase sequence */
XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATSIZE_4BYTES, PDI_DATSIZE_1BYTE));
XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
XPROGTarget_SendByte(XMEGA_NVM_BIT_CTRLA_CMDEX); XPROGTarget_SendByte(XMEGA_NVM_BIT_CTRLA_CMDEX);
} }
else if (EraseCommand == XMEGA_NVM_CMD_ERASEEEPROM) else if (EraseCommand == XMEGA_NVM_CMD_ERASEEEPROM)
{ {
/* Send the EEPROM page buffer erase command to the target */ /* Send the EEPROM page buffer erase command to the target */
XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATSIZE_4BYTES, PDI_DATSIZE_1BYTE));
XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
XPROGTarget_SendByte(XMEGA_NVM_CMD_ERASEEEPROMPAGEBUFF); XPROGTarget_SendByte(XMEGA_NVM_CMD_ERASEEEPROMPAGEBUFF);
/* Set CMDEX bit in NVM CTRLA register to start the buffer erase */ /* Set CMDEX bit in NVM CTRLA register to start the buffer erase */
XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATSIZE_4BYTES, PDI_DATSIZE_1BYTE));
XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
XPROGTarget_SendByte(XMEGA_NVM_BIT_CTRLA_CMDEX); XPROGTarget_SendByte(XMEGA_NVM_BIT_CTRLA_CMDEX);
@ -417,42 +417,42 @@ bool XMEGANVM_EraseMemory(const uint8_t EraseCommand,
return false; return false;
/* Send the EEPROM memory buffer write command to the target */ /* Send the EEPROM memory buffer write command to the target */
XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATSIZE_4BYTES, PDI_DATSIZE_1BYTE));
XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
XPROGTarget_SendByte(XMEGA_NVM_CMD_LOADEEPROMPAGEBUFF); XPROGTarget_SendByte(XMEGA_NVM_CMD_LOADEEPROMPAGEBUFF);
/* Load the PDI pointer register with the EEPROM page start address */ /* Load the PDI pointer register with the EEPROM page start address */
XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES); XPROGTarget_SendByte(PDI_CMD_ST(PDI_POINTER_DIRECT, PDI_DATSIZE_4BYTES));
XMEGANVM_SendAddress(Address); XMEGANVM_SendAddress(Address);
/* Send the REPEAT command with the specified number of bytes to write */ /* Send the REPEAT command with the specified number of bytes to write */
XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE); XPROGTarget_SendByte(PDI_CMD_REPEAT(PDI_DATSIZE_1BYTE));
XPROGTarget_SendByte(XPROG_Param_EEPageSize - 1); XPROGTarget_SendByte(XPROG_Param_EEPageSize - 1);
/* Send a ST command with indirect access and post-increment to tag each byte in the EEPROM page buffer */ /* Send a ST command with indirect access and post-increment to tag each byte in the EEPROM page buffer */
XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE); XPROGTarget_SendByte(PDI_CMD_ST(PDI_POINTER_INDIRECT_PI, PDI_DATSIZE_1BYTE));
for (uint8_t PageByte = 0; PageByte < XPROG_Param_EEPageSize; PageByte++) for (uint8_t PageByte = 0; PageByte < XPROG_Param_EEPageSize; PageByte++)
XPROGTarget_SendByte(0x00); XPROGTarget_SendByte(0x00);
/* Send the memory erase command to the target */ /* Send the memory erase command to the target */
XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATSIZE_4BYTES, PDI_DATSIZE_1BYTE));
XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
XPROGTarget_SendByte(EraseCommand); XPROGTarget_SendByte(EraseCommand);
/* Set CMDEX bit in NVM CTRLA register to start the EEPROM erase sequence */ /* Set CMDEX bit in NVM CTRLA register to start the EEPROM erase sequence */
XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATSIZE_4BYTES, PDI_DATSIZE_1BYTE));
XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
XPROGTarget_SendByte(XMEGA_NVM_BIT_CTRLA_CMDEX); XPROGTarget_SendByte(XMEGA_NVM_BIT_CTRLA_CMDEX);
} }
else else
{ {
/* Send the memory erase command to the target */ /* Send the memory erase command to the target */
XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATSIZE_4BYTES, PDI_DATSIZE_1BYTE));
XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD); XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
XPROGTarget_SendByte(EraseCommand); XPROGTarget_SendByte(EraseCommand);
/* Other erase modes just need us to address a byte within the target memory space */ /* Other erase modes just need us to address a byte within the target memory space */
XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2)); XPROGTarget_SendByte(PDI_CMD_STS(PDI_DATSIZE_4BYTES, PDI_DATSIZE_1BYTE));
XMEGANVM_SendAddress(Address); XMEGANVM_SendAddress(Address);
XPROGTarget_SendByte(0x00); XPROGTarget_SendByte(0x00);
} }

@ -62,18 +62,21 @@
/** Total number of bits in a single USART frame. */ /** Total number of bits in a single USART frame. */
#define BITS_IN_USART_FRAME 12 #define BITS_IN_USART_FRAME 12
#define PDI_CMD_LDS 0x00 /** \name PDI Related Constants
#define PDI_CMD_LD 0x20 * @{
#define PDI_CMD_STS 0x40 */
#define PDI_CMD_ST 0x60 #define PDI_CMD_LDS(AddressSize, DataSize) (0x00 | ( AddressSize << 2) | DataSize)
#define PDI_CMD_LDCS 0x80 #define PDI_CMD_LD(PointerAccess, DataSize) (0x20 | (PointerAccess << 2) | DataSize)
#define PDI_CMD_REPEAT 0xA0 #define PDI_CMD_STS(AddressSize, DataSize) (0x40 | ( AddressSize << 2) | DataSize)
#define PDI_CMD_STCS 0xC0 #define PDI_CMD_ST(PointerAccess, DataSize) (0x60 | (PointerAccess << 2) | DataSize)
#define PDI_CMD_LDCS(PDIReg) (0x80 | PDIReg)
#define PDI_CMD_REPEAT(DataSize) (0xA0 | DataSize)
#define PDI_CMD_STCS(PDIReg) (0xC0 | PDIReg)
#define PDI_CMD_KEY 0xE0 #define PDI_CMD_KEY 0xE0
#define PDI_STATUS_REG 0 #define PDI_REG_STATUS 0
#define PDI_RESET_REG 1 #define PDI_REG_RESET 1
#define PDI_CTRL_REG 2 #define PDI_REG_CTRL 2
#define PDI_STATUS_NVM (1 << 1) #define PDI_STATUS_NVM (1 << 1)
@ -88,19 +91,23 @@
#define PDI_POINTER_INDIRECT 0 #define PDI_POINTER_INDIRECT 0
#define PDI_POINTER_INDIRECT_PI 1 #define PDI_POINTER_INDIRECT_PI 1
#define PDI_POINTER_DIRECT 2 #define PDI_POINTER_DIRECT 2
/** @} */
#define TPI_CMD_SLD 0x20 /** \name TPI Related Constants
#define TPI_CMD_SST 0x60 * @{
*/
#define TPI_CMD_SLD(PointerAccess) (0x20 | PointerAccess)
#define TPI_CMD_SST(PointerAccess) (0x60 | PointerAccess)
#define TPI_CMD_SSTPR 0x68 #define TPI_CMD_SSTPR 0x68
#define TPI_CMD_SIN 0x10 #define TPI_CMD_SIN(Address) (0x10 | ((Address & 0x30) << 1) | (Address & 0x0F))
#define TPI_CMD_SOUT 0x90 #define TPI_CMD_SOUT(Address) (0x90 | ((Address & 0x30) << 1) | (Address & 0x0F))
#define TPI_CMD_SLDCS 0x80 #define TPI_CMD_SLDCS(TPIReg) (0x80 | TPIReg)
#define TPI_CMD_SSTCS 0xC0 #define TPI_CMD_SSTCS(TPIReg) (0xC0 | TPIReg)
#define TPI_CMD_SKEY 0xE0 #define TPI_CMD_SKEY 0xE0
#define TPI_STATUS_REG 0x00 #define TPI_REG_STATUS 0x00
#define TPI_CTRL_REG 0x02 #define TPI_REG_CTRL 0x02
#define TPI_ID_REG 0x0F #define TPI_REG_ID 0x0F
#define TPI_STATUS_NVM (1 << 1) #define TPI_STATUS_NVM (1 << 1)
@ -108,6 +115,7 @@
#define TPI_POINTER_INDIRECT 0 #define TPI_POINTER_INDIRECT 0
#define TPI_POINTER_INDIRECT_PI 4 #define TPI_POINTER_INDIRECT_PI 4
/** @} */
/* Function Prototypes: */ /* Function Prototypes: */
void XPROGTarget_EnableTargetPDI(void); void XPROGTarget_EnableTargetPDI(void);

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