forksand
/
qmk_firmware
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

Fix XMEGA TWI driver indentation and style to conform to the rest of the LUFA codebase.

Browse Source
pull/1469/head
Dean Camera 12 years ago
parent 5fde9e0f0d
commit 7c57ad3858
2 changed files with 103 additions and 104 deletions
Show Stats Download Patch File Download Diff File

135
LUFA/Drivers/Peripheral/XMEGA/TWI_XMEGA.c
Unescape View File

@ -34,83 +34,77 @@
#define __INCLUDE_FROM_TWI_C #define __INCLUDE_FROM_TWI_C
#include "../TWI.h" #include "../TWI.h"
static inline bool bitmask_is_set(uint8_t byte, uint8_t mask) { uint8_t TWI_StartTransmission(TWI_t* const TWI,
return (byte & mask) == mask;
}
uint8_t TWI_StartTransmission(TWI_t *twi,
const uint8_t SlaveAddress, const uint8_t SlaveAddress,
const uint8_t TimeoutMS) const uint8_t TimeoutMS)
{ {
uint16_t TimeoutRemaining; uint16_t TimeoutRemaining;
twi->MASTER.ADDR = SlaveAddress; TWI->MASTER.ADDR = SlaveAddress;
TimeoutRemaining = (TimeoutMS * 100); TimeoutRemaining = (TimeoutMS * 100);
while (TimeoutRemaining) while (TimeoutRemaining)
{ {
uint8_t status = twi->MASTER.STATUS; uint8_t status = TWI->MASTER.STATUS;
if (bitmask_is_set(status, TWI_MASTER_WIF_bm | TWI_MASTER_ARBLOST_bm))
{ if ((status & (TWI_MASTER_WIF_bm | TWI_MASTER_ARBLOST_bm)) == (TWI_MASTER_WIF_bm | TWI_MASTER_ARBLOST_bm))
// Case 1: Arbitration lost. Try again. (or error) {
twi->MASTER.ADDR = SlaveAddress; TWI->MASTER.ADDR = SlaveAddress;
} }
else if (bitmask_is_set(status, TWI_MASTER_WIF_bm | TWI_MASTER_RXACK_bm)) else if ((status & (TWI_MASTER_WIF_bm | TWI_MASTER_RXACK_bm)) == (TWI_MASTER_WIF_bm | TWI_MASTER_RXACK_bm))
{ {
// Case 2: No response from slave. TWI_StopTransmission(twi);
// We need to release the bus. return TWI_ERROR_SlaveResponseTimeout;
TWI_StopTransmission(twi); }
return TWI_ERROR_SlaveResponseTimeout; else if (status & (TWI_MASTER_WIF_bm | TWI_MASTER_RIF_bm))
} {
else if (status & TWI_MASTER_WIF_bm) return TWI_ERROR_NoError;
{ }
// Case 3: Slave ACK the Write. Ready!
return TWI_ERROR_NoError; _delay_us(10);
} TimeoutRemaining--;
else if (status & TWI_MASTER_RIF_bm) }
{
// Case 4: Slave ACK the Read. Ready! (a byte will be read) if (!(TimeoutRemaining)) {
return TWI_ERROR_NoError; if (TWI->MASTER.STATUS & TWI_MASTER_CLKHOLD_bm) {
} TWI_StopTransmission(twi);
// Still waiting.. }
_delay_us(10); }
TimeoutRemaining--;
} return TWI_ERROR_BusCaptureTimeout;
if (!(TimeoutRemaining)) {
if (twi->MASTER.STATUS & TWI_MASTER_CLKHOLD_bm) {
// Release the bus if we're holding it.
TWI_StopTransmission(twi);
}
}
return TWI_ERROR_BusCaptureTimeout;
} }
bool TWI_SendByte(TWI_t *twi, const uint8_t Byte) bool TWI_SendByte(TWI_t* const TWI,
const uint8_t Byte)
{ {
// We assume we're ready to write! TWI->MASTER.DATA = Byte;
twi->MASTER.DATA = Byte;
while (!(twi->MASTER.STATUS & TWI_MASTER_WIF_bm)); while (!(TWI->MASTER.STATUS & TWI_MASTER_WIF_bm));
return (twi->MASTER.STATUS & TWI_MASTER_WIF_bm) && !(twi->MASTER.STATUS & TWI_MASTER_RXACK_bm);
return (TWI->MASTER.STATUS & TWI_MASTER_WIF_bm) && !(TWI->MASTER.STATUS & TWI_MASTER_RXACK_bm);
} }
bool TWI_ReceiveByte(TWI_t *twi, uint8_t* const Byte, bool TWI_ReceiveByte(TWI_t* const TWI,
const bool LastByte) uint8_t* const Byte,
const bool LastByte)
{ {
// If we're here, we should already be reading. Wait if we haven't read yet. if ((TWI->MASTER.STATUS & (TWI_MASTER_BUSERR_bm | TWI_MASTER_ARBLOST_bm)) == (TWI_MASTER_BUSERR_bm | TWI_MASTER_ARBLOST_bm)) {
if (bitmask_is_set(twi->MASTER.STATUS, TWI_MASTER_BUSERR_bm | TWI_MASTER_ARBLOST_bm)) { return false;
return false; }
}
while (!(twi->MASTER.STATUS & TWI_MASTER_RIF_bm)); while (!(TWI->MASTER.STATUS & TWI_MASTER_RIF_bm));
*Byte = twi->MASTER.DATA;
if (LastByte) *Byte = TWI->MASTER.DATA;
twi->MASTER.CTRLC = TWI_MASTER_ACKACT_bm | TWI_MASTER_CMD_STOP_gc;
else if (LastByte)
twi->MASTER.CTRLC = TWI_MASTER_CMD_RECVTRANS_gc; TWI->MASTER.CTRLC = TWI_MASTER_ACKACT_bm | TWI_MASTER_CMD_STOP_gc;
return true; else
TWI->MASTER.CTRLC = TWI_MASTER_CMD_RECVTRANS_gc;
return true;
} }
uint8_t TWI_ReadPacket(TWI_t *twi, uint8_t TWI_ReadPacket(TWI_t* const TWI,
const uint8_t SlaveAddress, const uint8_t SlaveAddress,
const uint8_t TimeoutMS, const uint8_t TimeoutMS,
const uint8_t* InternalAddress, const uint8_t* InternalAddress,
@ -133,7 +127,7 @@ uint8_t TWI_ReadPacket(TWI_t *twi,
} }
if ((ErrorCode = TWI_StartTransmission(twi, (SlaveAddress & TWI_DEVICE_ADDRESS_MASK) | TWI_ADDRESS_READ, if ((ErrorCode = TWI_StartTransmission(twi, (SlaveAddress & TWI_DEVICE_ADDRESS_MASK) | TWI_ADDRESS_READ,
TimeoutMS)) == TWI_ERROR_NoError) TimeoutMS)) == TWI_ERROR_NoError)
{ {
while (Length--) while (Length--)
{ {
@ -143,15 +137,15 @@ uint8_t TWI_ReadPacket(TWI_t *twi,
break; break;
} }
} }
} }
TWI_StopTransmission(twi);
TWI_StopTransmission(twi);
} }
return ErrorCode; return ErrorCode;
} }
uint8_t TWI_WritePacket(TWI_t *twi, uint8_t TWI_WritePacket(TWI_t* const twi,
const uint8_t SlaveAddress, const uint8_t SlaveAddress,
const uint8_t TimeoutMS, const uint8_t TimeoutMS,
const uint8_t* InternalAddress, const uint8_t* InternalAddress,
@ -160,6 +154,7 @@ uint8_t TWI_WritePacket(TWI_t *twi,
uint8_t Length) uint8_t Length)
{ {
uint8_t ErrorCode; uint8_t ErrorCode;
if ((ErrorCode = TWI_StartTransmission(twi, (SlaveAddress & TWI_DEVICE_ADDRESS_MASK) | TWI_ADDRESS_WRITE, if ((ErrorCode = TWI_StartTransmission(twi, (SlaveAddress & TWI_DEVICE_ADDRESS_MASK) | TWI_ADDRESS_WRITE,
TimeoutMS)) == TWI_ERROR_NoError) TimeoutMS)) == TWI_ERROR_NoError)
{ {

70
LUFA/Drivers/Peripheral/XMEGA/TWI_XMEGA.h
Unescape View File

@ -178,77 +178,81 @@
* \attention The value of the \c BitLength parameter should not be set below 10 or invalid bus conditions may * \attention The value of the \c BitLength parameter should not be set below 10 or invalid bus conditions may
* occur, as indicated in the XMEGA microcontroller datasheet. * occur, as indicated in the XMEGA microcontroller datasheet.
* *
* \param[in] twi The TWI Peripheral to use * \param[in] TWI Pointer to the base of the TWI peripheral within the device.
* \param[in] Baud Value of the BAUD register of the TWI Master. * \param[in] Baud Value of the BAUD register of the TWI Master.
*/ */
static inline void TWI_Init(TWI_t *twi, const uint8_t Baud) ATTR_ALWAYS_INLINE ATTR_NON_NULL_PTR_ARG(1); static inline void TWI_Init(TWI_t* const TWI,
static inline void TWI_Init(TWI_t *twi, const uint8_t Baud) const uint8_t Baud) ATTR_ALWAYS_INLINE ATTR_NON_NULL_PTR_ARG(1);
static inline void TWI_Init(TWI_t* const TWI,
const uint8_t Baud)
{ {
twi->CTRL = 0x00; TWI->CTRL = 0x00;
twi->MASTER.BAUD = Baud; TWI->MASTER.BAUD = Baud;
twi->MASTER.CTRLA = TWI_MASTER_ENABLE_bm; TWI->MASTER.CTRLA = TWI_MASTER_ENABLE_bm;
twi->MASTER.CTRLB = 0; TWI->MASTER.CTRLB = 0;
twi->MASTER.STATUS = TWI_MASTER_BUSSTATE_IDLE_gc; TWI->MASTER.STATUS = TWI_MASTER_BUSSTATE_IDLE_gc;
} }
/** Turns off the TWI driver hardware. If this is called, any further TWI operations will require a call to /** Turns off the TWI driver hardware. If this is called, any further TWI operations will require a call to
* \ref TWI_Init() before the TWI can be used again. * \ref TWI_Init() before the TWI can be used again.
* *
* \param[in] twi The TWI Peripheral to use * \param[in] TWI Pointer to the base of the TWI peripheral within the device.
*/ */
static inline void TWI_Disable(TWI_t *twi) ATTR_ALWAYS_INLINE ATTR_NON_NULL_PTR_ARG(1); static inline void TWI_Disable(TWI_t* const TWI) ATTR_ALWAYS_INLINE ATTR_NON_NULL_PTR_ARG(1);
static inline void TWI_Disable(TWI_t *twi) static inline void TWI_Disable(TWI_t* const TWI)
{ {
twi->MASTER.CTRLA &= ~TWI_MASTER_ENABLE_bm; TWI->MASTER.CTRLA &= ~TWI_MASTER_ENABLE_bm;
} }
/** Sends a TWI STOP onto the TWI bus, terminating communication with the currently addressed device. /** Sends a TWI STOP onto the TWI bus, terminating communication with the currently addressed device.
* *
* \param[in] twi The TWI Peripheral to use * \param[in] TWI Pointer to the base of the TWI peripheral within the device.
*/ */
static inline void TWI_StopTransmission(TWI_t *twi) ATTR_ALWAYS_INLINE ATTR_NON_NULL_PTR_ARG(1); static inline void TWI_StopTransmission(TWI_t* const TWI) ATTR_ALWAYS_INLINE ATTR_NON_NULL_PTR_ARG(1);
static inline void TWI_StopTransmission(TWI_t *twi) static inline void TWI_StopTransmission(TWI_t* const TWI)
{ {
twi->MASTER.CTRLC = TWI_MASTER_ACKACT_bm | TWI_MASTER_CMD_STOP_gc; TWI->MASTER.CTRLC = TWI_MASTER_ACKACT_bm | TWI_MASTER_CMD_STOP_gc;
} }
/* Function Prototypes: */ /* Function Prototypes: */
/** Begins a master mode TWI bus communication with the given slave device address. /** Begins a master mode TWI bus communication with the given slave device address.
* *
* \param[in] twi The TWI Peripheral to use * \param[in] TWI Pointer to the base of the TWI peripheral within the device.
* \param[in] SlaveAddress Address of the slave TWI device to communicate with. * \param[in] SlaveAddress Address of the slave TWI device to communicate with.
* \param[in] TimeoutMS Timeout period within which the slave must respond, in milliseconds. * \param[in] TimeoutMS Timeout period within which the slave must respond, in milliseconds.
* *
* \return A value from the \ref TWI_ErrorCodes_t enum. * \return A value from the \ref TWI_ErrorCodes_t enum.
*/ */
uint8_t TWI_StartTransmission(TWI_t *twi, uint8_t TWI_StartTransmission(TWI_t* const TWI,
const uint8_t SlaveAddress, const uint8_t SlaveAddress,
const uint8_t TimeoutMS) ATTR_NON_NULL_PTR_ARG(1); const uint8_t TimeoutMS) ATTR_NON_NULL_PTR_ARG(1);
/** Sends a byte to the currently addressed device on the TWI bus. /** Sends a byte to the currently addressed device on the TWI bus.
* *
* \param[in] twi The TWI Peripheral to use * \param[in] TWI Pointer to the base of the TWI peripheral within the device.
* \param[in] Byte Byte to send to the currently addressed device * \param[in] Byte Byte to send to the currently addressed device
* *
* \return Boolean \c true if the recipient ACKed the byte, \c false otherwise * \return Boolean \c true if the recipient ACKed the byte, \c false otherwise
*/ */
bool TWI_SendByte(TWI_t *twi, const uint8_t Byte) ATTR_NON_NULL_PTR_ARG(1); bool TWI_SendByte(TWI_t* const TWI,
const uint8_t Byte) ATTR_NON_NULL_PTR_ARG(1);
/** Receives a byte from the currently addressed device on the TWI bus. /** Receives a byte from the currently addressed device on the TWI bus.
* *
* \param[in] twi The TWI Peripheral to use * \param[in] TWI Pointer to the base of the TWI peripheral within the device.
* \param[in] Byte Location where the read byte is to be stored. * \param[in] Byte Location where the read byte is to be stored.
* \param[in] LastByte Indicates if the byte should be ACKed if false, NAKed if true. * \param[in] LastByte Indicates if the byte should be ACKed if false, NAKed if true.
* *
* \return Boolean \c true if the byte reception successfully completed, \c false otherwise. * \return Boolean \c true if the byte reception successfully completed, \c false otherwise.
*/ */
bool TWI_ReceiveByte(TWI_t *twi, uint8_t* const Byte, bool TWI_ReceiveByte(TWI_t* const TWI,
uint8_t* const Byte,
const bool LastByte) ATTR_NON_NULL_PTR_ARG(1, 2); const bool LastByte) ATTR_NON_NULL_PTR_ARG(1, 2);
/** High level function to perform a complete packet transfer over the TWI bus to the specified /** High level function to perform a complete packet transfer over the TWI bus to the specified
* device. * device.
* *
* \param[in] twi The TWI Peripheral to use * \param[in] TWI Pointer to the base of the TWI peripheral within the device.
* \param[in] SlaveAddress Base address of the TWI slave device to communicate with. * \param[in] SlaveAddress Base address of the TWI slave device to communicate with.
* \param[in] TimeoutMS Timeout for bus capture and slave START ACK, in milliseconds. * \param[in] TimeoutMS Timeout for bus capture and slave START ACK, in milliseconds.
* \param[in] InternalAddress Pointer to a location where the internal slave read start address is stored. * \param[in] InternalAddress Pointer to a location where the internal slave read start address is stored.
@ -258,8 +262,8 @@
* *
* \return A value from the \ref TWI_ErrorCodes_t enum. * \return A value from the \ref TWI_ErrorCodes_t enum.
*/ */
uint8_t TWI_ReadPacket(TWI_t *twi, uint8_t TWI_ReadPacket(TWI_t* const TWI,
const uint8_t SlaveAddress, const uint8_t SlaveAddress,
const uint8_t TimeoutMS, const uint8_t TimeoutMS,
const uint8_t* InternalAddress, const uint8_t* InternalAddress,
uint8_t InternalAddressLen, uint8_t InternalAddressLen,
@ -269,7 +273,7 @@
/** High level function to perform a complete packet transfer over the TWI bus from the specified /** High level function to perform a complete packet transfer over the TWI bus from the specified
* device. * device.
* *
* \param[in] twi The TWI Peripheral to use * \param[in] TWI Pointer to the base of the TWI peripheral within the device.
* \param[in] SlaveAddress Base address of the TWI slave device to communicate with * \param[in] SlaveAddress Base address of the TWI slave device to communicate with
* \param[in] TimeoutMS Timeout for bus capture and slave START ACK, in milliseconds * \param[in] TimeoutMS Timeout for bus capture and slave START ACK, in milliseconds
* \param[in] InternalAddress Pointer to a location where the internal slave write start address is stored * \param[in] InternalAddress Pointer to a location where the internal slave write start address is stored
@ -279,8 +283,8 @@
* *
* \return A value from the \ref TWI_ErrorCodes_t enum. * \return A value from the \ref TWI_ErrorCodes_t enum.
*/ */
uint8_t TWI_WritePacket(TWI_t *twi, uint8_t TWI_WritePacket(TWI_t* const TWI,
const uint8_t SlaveAddress, const uint8_t SlaveAddress,
const uint8_t TimeoutMS, const uint8_t TimeoutMS,
const uint8_t* InternalAddress, const uint8_t* InternalAddress,
uint8_t InternalAddressLen, uint8_t InternalAddressLen,

Write Preview
Loading…
Cancel
Save