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@ -156,8 +156,7 @@ void XPROGTarget_EnableTargetPDI(void)
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PORTD |= (1 << 3);
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PORTD |= (1 << 3);
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_delay_us(1);
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_delay_us(1);
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/* Set up the synchronous USART for XMEGA communications -
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/* Set up the synchronous USART for XMEGA communications - 8 data bits, even parity, 2 stop bits */
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8 data bits, even parity, 2 stop bits */
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UBRR1 = (F_CPU / XPROG_HARDWARE_SPEED);
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UBRR1 = (F_CPU / XPROG_HARDWARE_SPEED);
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UCSR1B = (1 << TXEN1);
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UCSR1B = (1 << TXEN1);
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UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
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UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
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@ -172,7 +171,6 @@ void XPROGTarget_EnableTargetPDI(void)
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/* Fire timer compare channel A ISR to manage the software USART */
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/* Fire timer compare channel A ISR to manage the software USART */
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OCR1A = BITS_BETWEEN_USART_CLOCKS;
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OCR1A = BITS_BETWEEN_USART_CLOCKS;
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OCR1B = BITS_BETWEEN_USART_CLOCKS;
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TCCR1B = (1 << WGM12) | (1 << CS10);
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TCCR1B = (1 << WGM12) | (1 << CS10);
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TIMSK1 = (1 << OCIE1A);
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TIMSK1 = (1 << OCIE1A);
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#endif
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#endif
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@ -197,8 +195,7 @@ void XPROGTarget_EnableTargetTPI(void)
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DDRD |= (1 << 5) | (1 << 3);
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DDRD |= (1 << 5) | (1 << 3);
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DDRD &= ~(1 << 2);
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DDRD &= ~(1 << 2);
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/* Set up the synchronous USART for TINY communications -
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/* Set up the synchronous USART for TINY communications - 8 data bits, even parity, 2 stop bits */
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8 data bits, even parity, 2 stop bits */
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UBRR1 = (F_CPU / XPROG_HARDWARE_SPEED);
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UBRR1 = (F_CPU / XPROG_HARDWARE_SPEED);
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UCSR1B = (1 << TXEN1);
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UCSR1B = (1 << TXEN1);
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UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
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UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
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@ -402,7 +399,14 @@ static void XPROGTarget_SetTxMode(void)
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IsSending = true;
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IsSending = true;
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#else
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#else
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while (SoftUSART_BitCount);
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while (SoftUSART_BitCount && TimeoutMSRemaining)
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{
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if (TIFR0 & (1 << OCF0A))
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{
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TIFR0 |= (1 << OCF0A);
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TimeoutMSRemaining--;
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}
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}
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/* Wait for a full cycle of the clock */
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/* Wait for a full cycle of the clock */
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SoftUSART_Data = 0x0001;
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SoftUSART_Data = 0x0001;
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@ -436,7 +440,14 @@ static void XPROGTarget_SetRxMode(void)
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DDRD &= ~(1 << 3);
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DDRD &= ~(1 << 3);
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PORTD &= ~(1 << 3);
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PORTD &= ~(1 << 3);
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#else
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#else
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while (SoftUSART_BitCount);
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while (SoftUSART_BitCount && TimeoutMSRemaining)
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{
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if (TIFR0 & (1 << OCF0A))
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{
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TIFR0 |= (1 << OCF0A);
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TimeoutMSRemaining--;
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}
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}
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if (XPROG_SelectedProtocol == XPRG_PROTOCOL_PDI)
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if (XPROG_SelectedProtocol == XPRG_PROTOCOL_PDI)
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{
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{
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