Add support for triple endpoint/pipe bank AVR32 UC3 devices.

pull/1469/head
Dean Camera 14 years ago
parent 7c3290607e
commit bc41cbd26d

@ -117,7 +117,7 @@
#define ENDPOINT_DETAILS_EP3 512, 2 #define ENDPOINT_DETAILS_EP3 512, 2
#define ENDPOINT_DETAILS_EP4 512, 2 #define ENDPOINT_DETAILS_EP4 512, 2
#define ENDPOINT_DETAILS_EP5 512, 2 #define ENDPOINT_DETAILS_EP5 512, 2
#define ENDPOINT_DETAILS_EP6 512, 2 #define ENDPOINT_DETAILS_EP6 512, 2
#define ENDPOINT_DETAILS_EP7 512, 2 #define ENDPOINT_DETAILS_EP7 512, 2
#elif defined(USB_SERIES_UC3B0_AVR32) || defined(USB_SERIES_UC3B1_AVR32) #elif defined(USB_SERIES_UC3B0_AVR32) || defined(USB_SERIES_UC3B1_AVR32)
#define ENDPOINT_DETAILS_MAXEP 7 #define ENDPOINT_DETAILS_MAXEP 7
@ -190,6 +190,17 @@
* accesses the second bank. * accesses the second bank.
*/ */
#define ENDPOINT_BANK_DOUBLE AVR32_USBB_UECFG0_EPBK_DOUBLE #define ENDPOINT_BANK_DOUBLE AVR32_USBB_UECFG0_EPBK_DOUBLE
#if defined(USB_SERIES_UC3A3_AVR32) || defined(USB_SERIES_UC3A4_AVR32) || defined(__DOXYGEN__)
/** Mask for the bank mode selection for the \ref Endpoint_ConfigureEndpoint() macro. This indicates
* that the endpoint should have three banks, which requires more USB FIFO memory but results
* in faster transfers as one USB device (the AVR or the host) can access one bank while the other
* accesses the remaining banks.
*
* \note Not available on all AVR models.
*/
#define ENDPOINT_BANK_TRIPLE AVR32_USBB_UECFG0_EPBK_TRIPLE
#endif
//@} //@}
#if (!defined(FIXED_CONTROL_ENDPOINT_SIZE) || defined(__DOXYGEN__)) #if (!defined(FIXED_CONTROL_ENDPOINT_SIZE) || defined(__DOXYGEN__))

@ -161,6 +161,17 @@
* bank. * bank.
*/ */
#define PIPE_BANK_DOUBLE AVR32_USBB_UPCFG0_PBK_DOUBLE #define PIPE_BANK_DOUBLE AVR32_USBB_UPCFG0_PBK_DOUBLE
#if defined(USB_SERIES_UC3A3_AVR32) || defined(USB_SERIES_UC3A4_AVR32) || defined(__DOXYGEN__)
/** Mask for the bank mode selection for the \ref Pipe_ConfigurePipe() macro. This indicates that the
* pipe should have three banks, which requires more USB FIFO memory but results in faster transfers
* as one USB device (the AVR or the attached device) can access one bank while the other accesses the
* remaining banks.
*
* \note Not available on all AVR models.
*/
#define PIPE_BANK_TRIPLE AVR32_USBB_UPCFG0_PBK_TRIPLE
#endif
//@} //@}
/** Default size of the default control pipe's bank, until altered by the Endpoint0Size value /** Default size of the default control pipe's bank, until altered by the Endpoint0Size value

@ -298,7 +298,7 @@
/* Private Interface - For use in library only: */ /* Private Interface - For use in library only: */
#if !defined(__DOXYGEN__) #if !defined(__DOXYGEN__)
/* Macros: */ /* Macros: */
#if (defined(USB_SERIES_UC3A3_AVR32) || defined(USB_SERIES_UC3A4_AVR32)) #if defined(USB_SERIES_UC3A3_AVR32) || defined(USB_SERIES_UC3A4_AVR32)
#define USB_CLOCK_REQUIRED_FREQ 12000000UL #define USB_CLOCK_REQUIRED_FREQ 12000000UL
#else #else
#define USB_CLOCK_REQUIRED_FREQ 48000000UL #define USB_CLOCK_REQUIRED_FREQ 48000000UL

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