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Increase JTAG reliability - hold reset active while connecting

USG_1.0
Robert Fisk 4 years ago
parent
commit
190a601f85
  1. 2
      OpenOCD_scripts/board/OpenOCD_USG_v1.0.cfg

2
OpenOCD_scripts/board/OpenOCD_USG_v1.0.cfg

@ -5,7 +5,7 @@ source [find target/stm32f4x.cfg]
# Use SRST to synchronously reset both micros
reset_config srst_only
reset_config srst_only connect_assert_srst
# Not necessary:
#cortex_m reset_config srst

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