Increase JTAG reliability - hold reset active while connecting

7 years ago · 190a601f85
parent c06a875050
commit 190a601f85
1 changed files with 1 additions and 1 deletions
--- a/OpenOCD_scripts/board/OpenOCD_USG_v1.0.cfg
+++ b/OpenOCD_scripts/board/OpenOCD_USG_v1.0.cfg
@ -5,7 +5,7 @@ source [find target/stm32f4x.cfg]


 # Use SRST to synchronously reset both micros 
-reset_config srst_only
+reset_config srst_only connect_assert_srst

 # Not necessary:
 #cortex_m reset_config srst