Increase SPI interface speed 4x, to 5.25Mbps. Required modifications to

SPI peripheral library. At this speed SPI requires ~60% CPU time at -Og
optimisation level. This could be further improved by trimming down the
SPI interrupt. But...

Speed is now limited by Downstream's single-packet-per-URB restriction,
to about 460kB/s. USB Middleware does not implement TX FIFO empty
interrupt, so a bit of work is required here.

Downstream/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c

@@ -1500,7 +1500,7 @@ void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi)
   if((tmp1 != RESET) && (tmp2 != RESET) && (tmp3 == RESET))
   {
     hspi->RxISR(hspi);
-    return;
+    //return;
   } 
 
   tmp1 = __HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE);
@@ -1699,11 +1699,11 @@ uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi)
   */
 static void SPI_TxCloseIRQHandler(SPI_HandleTypeDef *hspi)
 {
-  /* Wait until TXE flag is set to send data */
-  if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
-  {
-    hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
-  }
+//  /* Wait until TXE flag is set to send data */
+//  if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
+//  {
+//    hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
+//  }
 
   /* Disable TXE interrupt */
   __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE ));

Upstream/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c

@@ -1500,8 +1500,8 @@ void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi)
   if((tmp1 != RESET) && (tmp2 != RESET) && (tmp3 == RESET))
   {
     hspi->RxISR(hspi);
-    return;
-  } 
+    //return;
+  }
 
   tmp1 = __HAL_SPI_GET_FLAG(hspi, SPI_FLAG_TXE);
   tmp2 = __HAL_SPI_GET_IT_SOURCE(hspi, SPI_IT_TXE);
@@ -1699,11 +1699,11 @@ uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi)
   */
 static void SPI_TxCloseIRQHandler(SPI_HandleTypeDef *hspi)
 {
-  /* Wait until TXE flag is set to send data */
-  if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
-  {
-    hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
-  }
+//  /* Wait until TXE flag is set to send data */
+//  if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
+//  {
+//    hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
+//  }
 
   /* Disable TXE interrupt */
   __HAL_SPI_DISABLE_IT(hspi, (SPI_IT_TXE ));

Upstream/Src/upstream_spi.c

@@ -54,7 +54,7 @@ void Upstream_InitSPI(void)
 	Hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
 	Hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
 	Hspi1.Init.NSS = SPI_NSS_SOFT;
-	Hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_32;	//42MHz APB2 / 32 = 1.3Mbaud
+	Hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8;	//42MHz APB2 / 32 = 1.3Mbaud
 	Hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
 	Hspi1.Init.TIMode = SPI_TIMODE_DISABLED;
 	Hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_ENABLED;