Robert Fisk
9 years ago
parent
b271e038a3
commit
674cb621a7
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/*
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* downstream_interface_def.h
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*
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* Created on: 24/07/2015
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* Author: Robert Fisk
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*/
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#ifndef INC_DOWNSTREAM_INTERFACE_DEF_H_
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#define INC_DOWNSTREAM_INTERFACE_DEF_H_
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//***************
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// Attention!
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// Keep this file synchronised with downstream_interface_def.h
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// in the Upstream project.
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//***************
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#define COMMAND_CLASS_DATA_FLAG 0x80
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#define COMMAND_CLASS_MASK ((uint8_t)(~COMMAND_CLASS_DATA_FLAG))
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typedef enum
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{
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COMMAND_CLASS_INTERFACE,
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COMMAND_CLASS_MASS_STORAGE,
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}
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InterfaceCommandClassTypeDef;
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typedef enum
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{
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COMMAND_INTERFACE_ECHO, //Returns echo packet including all data
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COMMAND_INTERFACE_NOTIFY_DEVICE //Returns COMMAND_CLASS_*** byte when downstream USB device is connected
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}
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InterfaceCommandInterfaceTypeDef;
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typedef enum
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{
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COMMAND_MSC_TEST_UNIT_READY, //Returns HAL_StatusTypeDef result
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COMMAND_MSC_GET_CAPACITY, //Returns uint32_t blk_nbr, uint32_t blk_size
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COMMAND_MSC_BEGIN_READ, //Returns HAL_StatusTypeDef result, then data stream
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COMMAND_MSC_BEGIN_WRITE, //Returns HAL_OK, HAL_ERROR if medium not present, HAL_BUSY if write-protected result, then waits for data stream
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}
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InterfaceCommandMscTypeDef;
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#endif /* INC_DOWNSTREAM_INTERFACE_DEF_H_ */
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@ -0,0 +1,92 @@
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/*
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* downstream_spi.h
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*
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* Created on: 24/07/2015
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* Author: Robert Fisk
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*/
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#ifndef INC_DOWNSTREAM_SPI_H_
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#define INC_DOWNSTREAM_SPI_H_
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#include "usbh_config.h"
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#define DOWNSTREAM_PACKET_HEADER_LEN (2) //Min length = CommandClass & Command bytes
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#define DOWNSTREAM_PACKET_LEN (DOWNSTREAM_PACKET_HEADER_LEN + USBH_MAX_DATA_BUFFER)
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#define DOWNSTREAM_PACKET_LEN_MIN (DOWNSTREAM_PACKET_HEADER_LEN)
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#define SPI_INTERFACE_FREAKOUT_RETURN_VOID \
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do { \
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while (1); \
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/*UpstreamInterfaceState = INTERFACE_STATE_ERROR;*/ \
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/*return;*/ \
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} while (0);
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#define SPI_INTERFACE_FREAKOUT_RETURN_HAL_ERROR \
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do { \
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while (1); \
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/*UpstreamInterfaceState = INTERFACE_STATE_ERROR;*/ \
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/*return HAL_ERROR;*/ \
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} while (0);
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#define SPI_INTERFACE_FREAKOUT_NO_RETURN \
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do { \
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while (1); \
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/*while (1);*/ \
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} while (0);
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typedef enum
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{
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DOWNSTREAM_INTERFACE_IDLE,
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DOWNSTREAM_INTERFACE_RX_SIZE_WAIT,
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DOWNSTREAM_INTERFACE_RX_PACKET_WAIT,
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DOWNSTREAM_INTERFACE_TX_SIZE_WAIT,
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DOWNSTREAM_INTERFACE_TX_PACKET_WAIT,
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DOWNSTREAM_INTERFACE_ERROR
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}
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InterfaceStateTypeDef;
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typedef enum
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{
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NOT_BUSY,
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BUSY
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}
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PacketBusyTypeDef;
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typedef struct
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{
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PacketBusyTypeDef Busy; //Everything after Busy should be word-aligned
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uint16_t Length __ALIGN_END; //Packet length includes CommandClass, Command, and Data
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uint8_t CommandClass;
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uint8_t Command;
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uint8_t Data[USBH_MAX_DATA_BUFFER]; //Should (must?) be word-aligned, for USB copy routine
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uint8_t RxCrc;
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}
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DownstreamPacketTypeDef;
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typedef void (*FreePacketCallbackTypeDef)(DownstreamPacketTypeDef* freePacket);
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typedef void (*SpiPacketReceivedCallbackTypeDef)(DownstreamPacketTypeDef* receivedPacket);
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void Downstream_InitSPI(void);
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HAL_StatusTypeDef Downstream_GetFreePacket(FreePacketCallbackTypeDef callback);
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DownstreamPacketTypeDef* Downstream_GetFreePacketImmediately(void);
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void Downstream_ReleasePacket(DownstreamPacketTypeDef* packetToRelease);
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HAL_StatusTypeDef Downstream_ReceivePacket(SpiPacketReceivedCallbackTypeDef callback);
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HAL_StatusTypeDef Downstream_TransmitPacket(DownstreamPacketTypeDef* packetToWrite);
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void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi);
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void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi);
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void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
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void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi);
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#endif /* INC_DOWNSTREAM_SPI_H_ */
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@ -0,0 +1,30 @@
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/*
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* downstream_statemachine.h
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*
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* Created on: 2/08/2015
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* Author: Robert Fisk
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*/
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#ifndef INC_DOWNSTREAM_STATEMACHINE_H_
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#define INC_DOWNSTREAM_STATEMACHINE_H_
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#include "usbh_def.h"
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typedef enum
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{
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STATE_NOT_READY,
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STATE_WAIT_DEVICE_READY_CALLBACK,
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STATE_DEVICE_READY,
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STATE_ERROR
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} DownstreamStateTypeDef;
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void Downstream_InitStateMachine(void);
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void Downstream_HostUserCallback(USBH_HandleTypeDef *phost, uint8_t id);
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#endif /* INC_DOWNSTREAM_STATEMACHINE_H_ */
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@ -1,45 +0,0 @@
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/*
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* upstream_interface_def.h
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*
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* Created on: 24/07/2015
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* Author: Robert Fisk
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*/
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#ifndef INC_UPSTREAM_INTERFACE_DEF_H_
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#define INC_UPSTREAM_INTERFACE_DEF_H_
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//***************
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// Attention!
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// Keep this file synchronised with downstream_interface_def.h
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// in the Upstream project.
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//***************
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#define COMMAND_CLASS_DATA_FLAG 0x80
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#define COMMAND_CLASS_MASK ((uint8_t)(~COMMAND_CLASS_DATA_FLAG))
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typedef enum
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{
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COMMAND_CLASS_INTERFACE = 0,
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COMMAND_CLASS_MASS_STORAGE = 1,
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COMMAND_CLASS_MAX = 2,
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}
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InterfaceCommandClassTypeDef;
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typedef enum
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{
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COMMAND_MSC_TEST_UNIT_READY = 0, //Returns HAL_StatusTypeDef result
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COMMAND_MSC_GET_CAPACITY = 2, //Returns uint32_t blk_nbr, uint32_t blk_size
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COMMAND_MSC_BEGIN_READ = 3, //Returns HAL_StatusTypeDef result, then data stream
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COMMAND_MSC_BEGIN_WRITE = 4, //Returns HAL_OK, HAL_ERROR if medium not present, HAL_BUSY if write-protected result, then waits for data stream
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COMMAND_MSC_MAX = 5,
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}
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InterfaceCommandMscTypeDef;
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#endif /* INC_UPSTREAM_INTERFACE_DEF_H_ */
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@ -1,77 +0,0 @@
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/*
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* upstream_spi.h
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*
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* Created on: 24/07/2015
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* Author: Robert Fisk
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*/
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#ifndef INC_UPSTREAM_SPI_H_
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#define INC_UPSTREAM_SPI_H_
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#include "usbh_config.h"
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#define UPSTREAM_PACKET_HEADER_LEN (2) //Min length = CommandClass & Command bytes
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#define UPSTREAM_PACKET_LEN (UPSTREAM_PACKET_HEADER_LEN + USBH_MAX_DATA_BUFFER)
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#define UPSTREAM_PACKET_LEN_MIN (UPSTREAM_PACKET_HEADER_LEN)
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#define SPI_INTERFACE_FREAKOUT_VOID \
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do { \
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while (1); \
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/*UpstreamInterfaceState = INTERFACE_STATE_ERROR;*/ \
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/*return;*/ \
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} while (0);
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#define SPI_INTERFACE_FREAKOUT_HAL_ERROR \
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do { \
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while (1); \
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/*UpstreamInterfaceState = INTERFACE_STATE_ERROR;*/ \
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/*return HAL_ERROR;*/ \
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} while (0);
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typedef enum
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{
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INTERFACE_STATE_RESET = 0,
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// INTERFACE_STATE_WAITING_CLIENT = 1,
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// INTERFACE_STATE_IDLE = 2,
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// INTERFACE_STATE_TX_SIZE_WAIT = 3,
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// INTERFACE_STATE_TX_SIZE = 4,
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// INTERFACE_STATE_TX_PACKET_WAIT = 5,
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// INTERFACE_STATE_TX_PACKET = 6,
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// INTERFACE_STATE_RX_SIZE_WAIT = 7,
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// INTERFACE_STATE_RX_SIZE = 8,
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// INTERFACE_STATE_RX_PACKET_WAIT = 9,
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// INTERFACE_STATE_RX_PACKET = 10,
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INTERFACE_STATE_ERROR = 11
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} InterfaceStateTypeDef;
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typedef enum
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{
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NOT_BUSY = 0,
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BUSY = 1
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} PacketBusyTypeDef;
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typedef struct
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{
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PacketBusyTypeDef Busy; //Everything after Busy should be word-aligned
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uint16_t Length __ALIGN_END; //Packet length includes CommandClass, Command, and Data
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uint8_t CommandClass;
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uint8_t Command;
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uint8_t Data[USBH_MAX_DATA_BUFFER]; //Should (must?) be word-aligned, for USB copy routine
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uint8_t RxCrc;
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}
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UpstreamPacketTypeDef;
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void Upstream_InitInterface(void);
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#endif /* INC_UPSTREAM_SPI_H_ */
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@ -0,0 +1,344 @@
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/*
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* upstream_spi.c
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*
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* Created on: 24/07/2015
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* Author: Robert Fisk
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*/
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#include <downstream_interface_def.h>
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#include <downstream_spi.h>
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#include "board_config.h"
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SPI_HandleTypeDef Hspi1;
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DownstreamPacketTypeDef DownstreamPacket0;
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DownstreamPacketTypeDef DownstreamPacket1;
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DownstreamPacketTypeDef* CurrentWorkingPacket;
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InterfaceStateTypeDef DownstreamInterfaceState;
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FreePacketCallbackTypeDef PendingFreePacketCallback; //Indicates someone is waiting for a packet buffer to become available
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SpiPacketReceivedCallbackTypeDef ReceivePacketCallback; //Indicates someone is waiting for a received packet
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void SPI1_Init(void);
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HAL_StatusTypeDef Downstream_CheckPreparePacketReception(void);
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void Downstream_PreparePacketReception(DownstreamPacketTypeDef* freePacket);
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void Downstream_InitSPI(void)
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{
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SPI1_Init();
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DownstreamPacket0.Busy = NOT_BUSY;
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DownstreamPacket1.Busy = NOT_BUSY;
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//NextTxPacket = NULL;
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PendingFreePacketCallback = NULL;
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ReceivePacketCallback = NULL;
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DownstreamInterfaceState = DOWNSTREAM_INTERFACE_IDLE;
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}
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void SPI1_Init(void)
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{
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Hspi1.Instance = SPI1;
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Hspi1.Init.Mode = SPI_MODE_SLAVE;
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Hspi1.Init.Direction = SPI_DIRECTION_2LINES;
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Hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
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Hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
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Hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
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Hspi1.Init.NSS = SPI_NSS_HARD_INPUT;
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Hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
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Hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
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Hspi1.Init.TIMode = SPI_TIMODE_DISABLED;
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Hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_ENABLE;
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Hspi1.Init.CRCPolynomial = SPI_CRC_DEFAULTPOLYNOMIAL;
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HAL_SPI_Init(&Hspi1);
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}
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//Used by...
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HAL_StatusTypeDef Downstream_GetFreePacket(FreePacketCallbackTypeDef callback)
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{
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//Sanity checks
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if (DownstreamInterfaceState >= DOWNSTREAM_INTERFACE_ERROR)
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{
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SPI_INTERFACE_FREAKOUT_RETURN_HAL_ERROR;
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}
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//Do we already have a queued callback?
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if (PendingFreePacketCallback != NULL)
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{
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SPI_INTERFACE_FREAKOUT_RETURN_HAL_ERROR;
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}
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//Check if there is a free buffer now
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if (DownstreamPacket0.Busy == NOT_BUSY)
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{
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DownstreamPacket0.Busy = BUSY;
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callback(&DownstreamPacket0);
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return HAL_OK;
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}
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if (DownstreamPacket1.Busy == NOT_BUSY)
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{
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DownstreamPacket1.Busy = BUSY;
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callback(&DownstreamPacket1);
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return HAL_OK;
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}
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//Otherwise save requested address for when a buffer becomes free in the future
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PendingFreePacketCallback = callback;
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return HAL_OK;
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}
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//DownstreamPacketTypeDef* Downstream_GetFreePacketImmediately(void)
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//{
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// //Sanity checks
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// if (DownstreamInterfaceState >= DOWNSTREAM_INTERFACE_ERROR)
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// {
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// SPI_INTERFACE_FREAKOUT_RETURN_HAL_ERROR;
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// }
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//
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// //We are expecting a free buffer now
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// if (DownstreamPacket0.Busy == NOT_BUSY)
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// {
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// DownstreamPacket0.Busy = BUSY;
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// return &DownstreamPacket0;
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// }
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// if (DownstreamPacket1.Busy == NOT_BUSY)
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// {
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// DownstreamPacket1.Busy = BUSY;
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// return &DownstreamPacket1;
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// }
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//
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// //Should not happen:
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// SPI_INTERFACE_FREAKOUT_NO_RETURN;
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//}
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//Used by...
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void Downstream_ReleasePacket(DownstreamPacketTypeDef* packetToRelease)
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{
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FreePacketCallbackTypeDef tempCallback;
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if ((packetToRelease != &DownstreamPacket0) &&
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(packetToRelease != &DownstreamPacket1))
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{
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SPI_INTERFACE_FREAKOUT_RETURN_HAL_ERROR;
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}
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if (PendingFreePacketCallback != NULL)
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{
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tempCallback = PendingFreePacketCallback; //In extreme situations, running this callback can trigger another request for a free packet,
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PendingFreePacketCallback = NULL; //thereby causing GetFreePacket to freak out. So we need to clear the callback indicator first.
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tempCallback(packetToRelease);
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}
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else
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{
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packetToRelease->Busy = NOT_BUSY;
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}
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}
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//Used by Downstream state machine (and USB classes?).
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//Ok to call when idle or transmitting.
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//Not OK to call when receiving or waiting for downstream reply.
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HAL_StatusTypeDef Downstream_ReceivePacket(SpiPacketReceivedCallbackTypeDef callback)
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{
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if (ReceivePacketCallback != NULL)
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{
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SPI_INTERFACE_FREAKOUT_RETURN_HAL_ERROR;
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}
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ReceivePacketCallback = callback;
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return Downstream_CheckPreparePacketReception();
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}
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//Internal use only
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HAL_StatusTypeDef Downstream_CheckPreparePacketReception(void)
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{
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if (DownstreamInterfaceState > DOWNSTREAM_INTERFACE_TX_PACKET_WAIT)
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{
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SPI_INTERFACE_FREAKOUT_RETURN_VOID;
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}
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if (DownstreamInterfaceState == DOWNSTREAM_INTERFACE_IDLE)
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{
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DownstreamInterfaceState = DOWNSTREAM_INTERFACE_RX_SIZE_WAIT;
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return Downstream_GetFreePacket(Downstream_PreparePacketReception);
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}
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return HAL_OK;
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}
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//Internal use only
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void Downstream_PreparePacketReception(DownstreamPacketTypeDef* freePacket)
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{
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if (DownstreamInterfaceState != DOWNSTREAM_INTERFACE_RX_SIZE_WAIT)
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{
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SPI_INTERFACE_FREAKOUT_RETURN_VOID;
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}
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CurrentWorkingPacket = freePacket;
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//CurrentWorkingPacket->Length = 0;
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//if (HAL_SPI_TransmitReceive_DMA(... ????
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if (HAL_SPI_Receive_DMA(&Hspi1,
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(uint8_t*)&CurrentWorkingPacket->Length,
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(2 + 1)) != HAL_OK) //"When the CRC feature is enabled the pData Length must be Size + 1"
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{
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SPI_INTERFACE_FREAKOUT_RETURN_VOID;
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}
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UPSTREAM_TX_REQUEST_ASSERT;
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}
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//Called at the end of the SPI RX DMA transfer,
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//at DMA2 interrupt priority. Assume *hspi points to our hspi1.
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void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi)
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{
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SpiPacketReceivedCallbackTypeDef tempPacketCallback;
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UPSTREAM_TX_REQUEST_DEASSERT;
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if ((DownstreamInterfaceState != DOWNSTREAM_INTERFACE_RX_SIZE_WAIT) &&
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(DownstreamInterfaceState != DOWNSTREAM_INTERFACE_RX_PACKET_WAIT))
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{
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SPI_INTERFACE_FREAKOUT_RETURN_VOID;
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}
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if (DownstreamInterfaceState == DOWNSTREAM_INTERFACE_RX_SIZE_WAIT)
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{
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if ((CurrentWorkingPacket->Length < DOWNSTREAM_PACKET_LEN_MIN) ||
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(CurrentWorkingPacket->Length > DOWNSTREAM_PACKET_LEN))
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{
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SPI_INTERFACE_FREAKOUT_RETURN_VOID;
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}
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||||
DownstreamInterfaceState = DOWNSTREAM_INTERFACE_RX_PACKET_WAIT;
|
||||
if ((HAL_SPI_Receive_DMA(&Hspi1,
|
||||
&CurrentWorkingPacket->CommandClass,
|
||||
CurrentWorkingPacket->Length + 1)) != HAL_OK) //"When the CRC feature is enabled the pData Length must be Size + 1"
|
||||
{
|
||||
SPI_INTERFACE_FREAKOUT_RETURN_VOID;
|
||||
}
|
||||
UPSTREAM_TX_REQUEST_ASSERT;
|
||||
return;
|
||||
}
|
||||
|
||||
if (DownstreamInterfaceState == DOWNSTREAM_INTERFACE_RX_PACKET_WAIT)
|
||||
{
|
||||
DownstreamInterfaceState = DOWNSTREAM_INTERFACE_IDLE;
|
||||
if (ReceivePacketCallback == NULL)
|
||||
{
|
||||
SPI_INTERFACE_FREAKOUT_RETURN_VOID;
|
||||
}
|
||||
//Packet processor may want to receive another packet immediately,
|
||||
//so clear ReceivePacketCallback before the call.
|
||||
//It is the callback's responsibility to release the packet buffer we are passing to it!
|
||||
tempPacketCallback = ReceivePacketCallback;
|
||||
ReceivePacketCallback = NULL;
|
||||
tempPacketCallback(CurrentWorkingPacket);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
//Used by Downstream state machine (and USB classes?).
|
||||
//Call when idle only.
|
||||
HAL_StatusTypeDef Downstream_TransmitPacket(DownstreamPacketTypeDef* packetToWrite)
|
||||
{
|
||||
//Sanity checks
|
||||
if ((packetToWrite != &DownstreamPacket0) &&
|
||||
(packetToWrite != &DownstreamPacket1))
|
||||
{
|
||||
SPI_INTERFACE_FREAKOUT_RETURN_HAL_ERROR;
|
||||
}
|
||||
if ((packetToWrite->Busy != BUSY) ||
|
||||
(packetToWrite->Length < DOWNSTREAM_PACKET_LEN_MIN) ||
|
||||
(packetToWrite->Length > DOWNSTREAM_PACKET_LEN))
|
||||
{
|
||||
SPI_INTERFACE_FREAKOUT_RETURN_HAL_ERROR;
|
||||
}
|
||||
|
||||
if (DownstreamInterfaceState != DOWNSTREAM_INTERFACE_IDLE)
|
||||
{
|
||||
SPI_INTERFACE_FREAKOUT_RETURN_HAL_ERROR;
|
||||
}
|
||||
|
||||
DownstreamInterfaceState = DOWNSTREAM_INTERFACE_TX_SIZE_WAIT;
|
||||
CurrentWorkingPacket = packetToWrite;
|
||||
if (HAL_SPI_TransmitReceive_DMA(&Hspi1,
|
||||
(uint8_t*)&CurrentWorkingPacket->Length,
|
||||
(uint8_t*)&CurrentWorkingPacket->Length,
|
||||
2 + 1) != HAL_OK) //"When the CRC feature is enabled the pRxData Length must be Size + 1"
|
||||
{
|
||||
SPI_INTERFACE_FREAKOUT_RETURN_VOID;
|
||||
}
|
||||
|
||||
UPSTREAM_TX_REQUEST_ASSERT;
|
||||
return HAL_OK;
|
||||
}
|
||||
|
||||
|
||||
//Called at the end of the SPI TxRx DMA transfer,
|
||||
//at DMA2 interrupt priority. Assume *hspi points to our hspi1.
|
||||
//We use TxRx while sending our reply packet to check if Upstream was trying
|
||||
//to send us a packet at the same time.
|
||||
void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi)
|
||||
{
|
||||
UPSTREAM_TX_REQUEST_DEASSERT;
|
||||
|
||||
if (DownstreamInterfaceState != DOWNSTREAM_INTERFACE_TX_SIZE_WAIT)
|
||||
{
|
||||
SPI_INTERFACE_FREAKOUT_RETURN_VOID;
|
||||
}
|
||||
|
||||
if (CurrentWorkingPacket->Length != 0)
|
||||
{
|
||||
//Currently we just freak out if Upstream sends us an unexpected command.
|
||||
//Theoretically we could reset our downstream state machine and accept the new command...
|
||||
SPI_INTERFACE_FREAKOUT_RETURN_VOID;
|
||||
}
|
||||
|
||||
DownstreamInterfaceState = DOWNSTREAM_INTERFACE_TX_PACKET_WAIT;
|
||||
if ((HAL_SPI_Transmit_DMA(&Hspi1,
|
||||
&CurrentWorkingPacket->CommandClass,
|
||||
CurrentWorkingPacket->Length)) != HAL_OK)
|
||||
{
|
||||
SPI_INTERFACE_FREAKOUT_RETURN_VOID;
|
||||
}
|
||||
UPSTREAM_TX_REQUEST_ASSERT;
|
||||
}
|
||||
|
||||
|
||||
//Called at the end of the SPI TX DMA transfer,
|
||||
//at DMA2 interrupt priority. Assume *hspi points to our hspi1.
|
||||
void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi)
|
||||
{
|
||||
UPSTREAM_TX_REQUEST_DEASSERT;
|
||||
|
||||
if (DownstreamInterfaceState != DOWNSTREAM_INTERFACE_TX_PACKET_WAIT)
|
||||
{
|
||||
SPI_INTERFACE_FREAKOUT_RETURN_VOID;
|
||||
}
|
||||
|
||||
DownstreamInterfaceState = DOWNSTREAM_INTERFACE_IDLE;
|
||||
Downstream_ReleasePacket(CurrentWorkingPacket);
|
||||
if (ReceivePacketCallback != NULL)
|
||||
{
|
||||
Downstream_CheckPreparePacketReception();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
//Something bad happened! Possibly CRC error...
|
||||
void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi)
|
||||
{
|
||||
SPI_INTERFACE_FREAKOUT_RETURN_VOID;
|
||||
}
|
||||
|
||||
@ -0,0 +1,160 @@
|
||||
/*
|
||||
* downstream_statemachine.c
|
||||
*
|
||||
* Created on: 2/08/2015
|
||||
* Author: Robert Fisk
|
||||
*/
|
||||
|
||||
|
||||
#include "downstream_statemachine.h"
|
||||
#include "downstream_interface_def.h"
|
||||
#include "downstream_spi.h"
|
||||
#include "usbh_core.h"
|
||||
#include "usbh_msc.h"
|
||||
|
||||
|
||||
|
||||
DownstreamStateTypeDef DownstreamState;
|
||||
InterfaceCommandClassTypeDef ConfiguredDeviceClass;
|
||||
|
||||
|
||||
void Downstream_PacketProcessor(DownstreamPacketTypeDef* receivedPacket);
|
||||
void Downstream_PacketProcessor_Interface(DownstreamPacketTypeDef* receivedPacket);
|
||||
void Downstream_PacketProcessor_Interface_ReplyNotifyDevice(DownstreamPacketTypeDef* replyPacket);
|
||||
void Downstream_PacketProcessor_EmptyReply(DownstreamPacketTypeDef* replyPacket);
|
||||
|
||||
|
||||
|
||||
void Downstream_InitStateMachine(void)
|
||||
{
|
||||
DownstreamState = STATE_NOT_READY;
|
||||
ConfiguredDeviceClass = COMMAND_CLASS_INTERFACE;
|
||||
Downstream_InitSPI();
|
||||
|
||||
//Prepare to receive our first packet from Upstream!
|
||||
Downstream_ReceivePacket(Downstream_PacketProcessor);
|
||||
}
|
||||
|
||||
|
||||
void Downstream_PacketProcessor(DownstreamPacketTypeDef* receivedPacket)
|
||||
{
|
||||
switch (receivedPacket->CommandClass)
|
||||
{
|
||||
case COMMAND_CLASS_INTERFACE:
|
||||
if (DownstreamState != STATE_NOT_READY)
|
||||
{
|
||||
SPI_INTERFACE_FREAKOUT_RETURN_VOID;
|
||||
}
|
||||
Downstream_PacketProcessor_Interface(receivedPacket);
|
||||
break;
|
||||
|
||||
case COMMAND_CLASS_MASS_STORAGE:
|
||||
if (DownstreamState != STATE_DEVICE_READY)
|
||||
{
|
||||
Downstream_PacketProcessor_EmptyReply(receivedPacket);
|
||||
}
|
||||
//Mass storage packet processor...
|
||||
break;
|
||||
|
||||
//Add other classes here...
|
||||
|
||||
default:
|
||||
SPI_INTERFACE_FREAKOUT_RETURN_VOID;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
void Downstream_PacketProcessor_Interface(DownstreamPacketTypeDef* receivedPacket)
|
||||
{
|
||||
switch (receivedPacket->Command)
|
||||
{
|
||||
case COMMAND_INTERFACE_ECHO:
|
||||
Downstream_TransmitPacket(receivedPacket);
|
||||
Downstream_ReceivePacket(Downstream_PacketProcessor);
|
||||
break;
|
||||
|
||||
case COMMAND_INTERFACE_NOTIFY_DEVICE:
|
||||
if (ConfiguredDeviceClass != COMMAND_CLASS_INTERFACE)
|
||||
{
|
||||
Downstream_PacketProcessor_Interface_ReplyNotifyDevice(receivedPacket);
|
||||
}
|
||||
else
|
||||
{
|
||||
Downstream_ReleasePacket(receivedPacket);
|
||||
DownstreamState = STATE_WAIT_DEVICE_READY_CALLBACK;
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
SPI_INTERFACE_FREAKOUT_RETURN_VOID;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void Downstream_PacketProcessor_Interface_ReplyNotifyDevice(DownstreamPacketTypeDef* replyPacket)
|
||||
{
|
||||
replyPacket->Length = DOWNSTREAM_PACKET_HEADER_LEN + 1;
|
||||
replyPacket->CommandClass = COMMAND_CLASS_INTERFACE;
|
||||
replyPacket->Command = COMMAND_INTERFACE_NOTIFY_DEVICE;
|
||||
replyPacket->Data[0] = ConfiguredDeviceClass;
|
||||
Downstream_TransmitPacket(replyPacket);
|
||||
|
||||
DownstreamState = STATE_DEVICE_READY;
|
||||
Downstream_ReceivePacket(Downstream_PacketProcessor);
|
||||
}
|
||||
|
||||
|
||||
//An empty reply implies and error processing class-specific requests.
|
||||
void Downstream_PacketProcessor_EmptyReply(DownstreamPacketTypeDef* replyPacket)
|
||||
{
|
||||
replyPacket->Length = DOWNSTREAM_PACKET_HEADER_LEN;
|
||||
Downstream_TransmitPacket(replyPacket);
|
||||
Downstream_ReceivePacket(Downstream_PacketProcessor);
|
||||
}
|
||||
|
||||
|
||||
void Downstream_HostUserCallback(USBH_HandleTypeDef *phost, uint8_t id)
|
||||
{
|
||||
InterfaceCommandClassTypeDef newActiveClass;
|
||||
|
||||
if (id == HOST_USER_DISCONNECTION)
|
||||
{
|
||||
DownstreamState = STATE_NOT_READY;
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
if (id == HOST_USER_CLASS_ACTIVE)
|
||||
{
|
||||
if (DownstreamState > STATE_WAIT_DEVICE_READY_CALLBACK)
|
||||
{
|
||||
SPI_INTERFACE_FREAKOUT_RETURN_VOID;
|
||||
}
|
||||
|
||||
switch (phost->pActiveClass->ClassCode)
|
||||
{
|
||||
case USB_MSC_CLASS:
|
||||
newActiveClass = COMMAND_CLASS_MASS_STORAGE;
|
||||
break;
|
||||
|
||||
//Add other classes here...
|
||||
|
||||
default:
|
||||
newActiveClass = COMMAND_CLASS_INTERFACE;
|
||||
}
|
||||
|
||||
if ((ConfiguredDeviceClass != COMMAND_CLASS_INTERFACE) &&
|
||||
(ConfiguredDeviceClass != newActiveClass)) //To change device class, we must reboot.
|
||||
{
|
||||
SPI_INTERFACE_FREAKOUT_RETURN_VOID;
|
||||
}
|
||||
ConfiguredDeviceClass = newActiveClass;
|
||||
if (DownstreamState == STATE_WAIT_DEVICE_READY_CALLBACK)
|
||||
{
|
||||
Downstream_GetFreePacket(Downstream_PacketProcessor_Interface_ReplyNotifyDevice);
|
||||
}
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
@ -1,49 +0,0 @@
|
||||
/*
|
||||
* upstream_spi.c
|
||||
*
|
||||
* Created on: 24/07/2015
|
||||
* Author: Robert Fisk
|
||||
*/
|
||||
|
||||
|
||||
#include "upstream_spi.h"
|
||||
#include "upstream_interface_def.h"
|
||||
|
||||
|
||||
SPI_HandleTypeDef Hspi1;
|
||||
|
||||
InterfaceStateTypeDef UpstreamInterfaceState;
|
||||
|
||||
|
||||
|
||||
void SPI1_Init(void);
|
||||
|
||||
|
||||
|
||||
void Upstream_InitInterface(void)
|
||||
{
|
||||
UpstreamInterfaceState = INTERFACE_STATE_RESET;
|
||||
|
||||
SPI1_Init();
|
||||
|
||||
}
|
||||
|
||||
|
||||
void SPI1_Init(void)
|
||||
{
|
||||
Hspi1.Instance = SPI1;
|
||||
Hspi1.Init.Mode = SPI_MODE_SLAVE;
|
||||
Hspi1.Init.Direction = SPI_DIRECTION_2LINES;
|
||||
Hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
|
||||
Hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
|
||||
Hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
|
||||
Hspi1.Init.NSS = SPI_NSS_HARD_INPUT;
|
||||
Hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
|
||||
Hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
|
||||
Hspi1.Init.TIMode = SPI_TIMODE_DISABLED;
|
||||
Hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_ENABLE;
|
||||
Hspi1.Init.CRCPolynomial = SPI_CRC_DEFAULTPOLYNOMIAL;
|
||||
HAL_SPI_Init(&Hspi1);
|
||||
}
|
||||
|
||||
|
||||
Loading…
Reference in new issue