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Updated STM32 library from v1.4.0 to v1.7.0

Browse Source 
Significant changes to:
 - stm32f4xx_hal_spi.c
 - stm32f4xx_hal_gpio.c
 - stm32f4xx_ll_usb.c
 - usbd_core.c
 - usbd_ctrlreq.c
pull/7/head
Robert Fisk 9 years ago
parent 18e2218280
commit 8f41552214
14 changed files with 263 additions and 214 deletions
Show Stats Download Patch File Download Diff File

6
Upstream/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_gpio.h
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@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f4xx_hal_gpio.h
* @author MCD Application Team
* @version V1.2.0
* @date 26-December-2014
* @version V1.3.2
* @date 26-June-2015
* @brief Header file of GPIO HAL module.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:

8
Upstream/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h
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@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f4xx_hal_spi.h
* @author MCD Application Team
* @version V1.2.0
* @date 26-December-2014
* @version V1.3.2
* @date 26-June-2015
* @brief Header file of SPI HAL module.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@ -173,7 +173,7 @@ typedef struct __SPI_HandleTypeDef
#define HAL_SPI_ERROR_OVR ((uint32_t)0x00000004) /*!< OVR error */
#define HAL_SPI_ERROR_FRE ((uint32_t)0x00000008) /*!< FRE error */
#define HAL_SPI_ERROR_DMA ((uint32_t)0x00000010) /*!< DMA transfer error */
#define HAL_SPI_ERROR_FLAG ((uint32_t)0x00000010) /*!< Flag: RXNE,TXE, BSY */
#define HAL_SPI_ERROR_FLAG ((uint32_t)0x00000020) /*!< Flag: RXNE,TXE, BSY */
/**
* @}
*/

6
Upstream/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_uart.h
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@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f4xx_hal_uart.h
* @author MCD Application Team
* @version V1.2.0
* @date 26-December-2014
* @version V1.3.2
* @date 26-June-2015
* @brief Header file of UART HAL module.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:

8
Upstream/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_usart.h
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@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f4xx_hal_usart.h
* @author MCD Application Team
* @version V1.2.0
* @date 26-December-2014
* @version V1.3.2
* @date 26-June-2015
* @brief Header file of USART HAL module.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@ -554,7 +554,7 @@ uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart);
#define IS_USART_MODE(MODE) ((((MODE) & (uint32_t)0xFFF3) == 0x00) && ((MODE) != (uint32_t)0x00))
#define IS_USART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 10500001)
#define USART_DIV(_PCLK_, _BAUD_) (((_PCLK_)*25)/(4*(_BAUD_)))
#define USART_DIV(_PCLK_, _BAUD_) (((_PCLK_)*25)/(2*(_BAUD_)))
#define USART_DIVMANT(_PCLK_, _BAUD_) (USART_DIV((_PCLK_), (_BAUD_))/100)
#define USART_DIVFRAQ(_PCLK_, _BAUD_) (((USART_DIV((_PCLK_), (_BAUD_)) - (USART_DIVMANT((_PCLK_), (_BAUD_)) * 100)) * 16 + 50) / 100)
#define USART_BRR(_PCLK_, _BAUD_) ((USART_DIVMANT((_PCLK_), (_BAUD_)) << 4)|(USART_DIVFRAQ((_PCLK_), (_BAUD_)) & 0x0F))

10
Upstream/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h
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@ -2,13 +2,13 @@
******************************************************************************
* @file stm32f4xx_ll_usb.h
* @author MCD Application Team
* @version V1.2.0
* @date 26-December-2014
* @version V1.3.2
* @date 26-June-2015
* @brief Header file of USB Core HAL module.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@ -122,7 +122,9 @@ typedef struct
uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */
uint32_t low_power_enable; /*!< Enable or disable the low power mode. */
uint32_t low_power_enable; /*!< Enable or disable the low power mode. */
uint32_t lpm_enable; /*!< Enable or disable Link Power Management. */
uint32_t vbus_sensing_enable; /*!< Enable or disable the VBUS Sensing feature. */

31
Upstream/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c
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@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f4xx_hal_gpio.c
* @author MCD Application Team
* @version V1.2.0
* @date 26-December-2014
* @version V1.3.2
* @date 26-June-2015
* @brief GPIO HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the General Purpose Input/Output (GPIO) peripheral:
@ -95,7 +95,7 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@ -348,17 +348,22 @@ void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin)
GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << (position * 2));
/*------------------------- EXTI Mode Configuration --------------------*/
/* Configure the External Interrupt or event for the current IO */
tmp = ((uint32_t)0x0F) << (4 * (position & 0x03));
SYSCFG->EXTICR[position >> 2] &= ~tmp;
/* Clear EXTI line configuration */
EXTI->IMR &= ~((uint32_t)iocurrent);
EXTI->EMR &= ~((uint32_t)iocurrent);
tmp = SYSCFG->EXTICR[position >> 2];
tmp &= (((uint32_t)0x0F) << (4 * (position & 0x03)));
if(tmp == ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03))))
{
/* Configure the External Interrupt or event for the current IO */
tmp = ((uint32_t)0x0F) << (4 * (position & 0x03));
SYSCFG->EXTICR[position >> 2] &= ~tmp;
/* Clear Rising Falling edge configuration */
EXTI->RTSR &= ~((uint32_t)iocurrent);
EXTI->FTSR &= ~((uint32_t)iocurrent);
/* Clear EXTI line configuration */
EXTI->IMR &= ~((uint32_t)iocurrent);
EXTI->EMR &= ~((uint32_t)iocurrent);
/* Clear Rising Falling edge configuration */
EXTI->RTSR &= ~((uint32_t)iocurrent);
EXTI->FTSR &= ~((uint32_t)iocurrent);
}
}
}
}

213
Upstream/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c
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@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f4xx_hal_spi.c
* @author MCD Application Team
* @version V1.2.0
* @date 26-December-2014
* @version V1.3.2
* @date 26-June-2015
* @brief SPI HAL module driver.
*
* This file provides firmware functions to manage the following
@ -59,7 +59,7 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@ -114,6 +114,7 @@ static void SPI_TxISR(SPI_HandleTypeDef *hspi);
static void SPI_RxCloseIRQHandler(SPI_HandleTypeDef *hspi);
static void SPI_2LinesRxISR(SPI_HandleTypeDef *hspi);
static void SPI_RxISR(SPI_HandleTypeDef *hspi);
static void SPI_DMAEndTransmitReceive(SPI_HandleTypeDef *hspi);
static void SPI_DMATransmitCplt(DMA_HandleTypeDef *hdma);
static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma);
@ -194,6 +195,8 @@ HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
if(hspi->State == HAL_SPI_STATE_RESET)
{
/* Allocate lock resource and initialize it */
hspi->Lock = HAL_UNLOCKED;
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
HAL_SPI_MspInit(hspi);
}
@ -222,7 +225,6 @@ HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
hspi->ErrorCode = HAL_SPI_ERROR_NONE;
hspi->State = HAL_SPI_STATE_READY;
__HAL_UNLOCK(hspi);
return HAL_OK;
}
@ -311,27 +313,8 @@ HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi)
will be executed respectively at the end of the transmit or Receive process
The HAL_SPI_ErrorCallback()user callback will be executed when a communication error is detected
(#) Blocking mode APIs are :
(++) HAL_SPI_Transmit()in 1Line (simplex) and 2Lines (full duplex) mode
(++) HAL_SPI_Receive() in 1Line (simplex) and 2Lines (full duplex) mode
(++) HAL_SPI_TransmitReceive() in full duplex mode
(#) Non Blocking mode API's with Interrupt are :
(++) HAL_SPI_Transmit_IT()in 1Line (simplex) and 2Lines (full duplex) mode
(++) HAL_SPI_Receive_IT() in 1Line (simplex) and 2Lines (full duplex) mode
(++) HAL_SPI_TransmitReceive_IT()in full duplex mode
(++) HAL_SPI_IRQHandler()
(#) Non Blocking mode functions with DMA are :
(++) HAL_SPI_Transmit_DMA()in 1Line (simplex) and 2Lines (full duplex) mode
(++) HAL_SPI_Receive_DMA() in 1Line (simplex) and 2Lines (full duplex) mode
(++) HAL_SPI_TransmitReceie_DMA() in full duplex mode
(#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
(++) HAL_SPI_TxCpltCallback()
(++) HAL_SPI_RxCpltCallback()
(++) HAL_SPI_ErrorCallback()
(++) HAL_SPI_TxRxCpltCallback()
(#) APIs provided for these 2 transfer modes (Blocking mode or Non blocking mode using either Interrupt or DMA)
exist for 1Line (simplex) and 2Lines (full duplex) modes.
@endverbatim
* @{
@ -1197,9 +1180,6 @@ HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData,
/* Enable the Tx DMA Stream */
HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
/* Enable Tx DMA Request */
hspi->Instance->CR2 |= SPI_CR2_TXDMAEN;
/* Process Unlocked */
__HAL_UNLOCK(hspi);
@ -1210,6 +1190,9 @@ HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData,
__HAL_SPI_ENABLE(hspi);
}
/* Enable Tx DMA Request */
hspi->Instance->CR2 |= SPI_CR2_TXDMAEN;
return HAL_OK;
}
else
@ -1221,7 +1204,7 @@ HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData,
/**
* @brief Receive an amount of data in no-blocking mode with DMA
* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
* the configuration information for SPI module.
* the configuration information for SPI module.
* @param pData: pointer to data buffer
* @note When the CRC feature is enabled the pData Length must be Size + 1.
* @param Size: amount of data to be sent
@ -1285,9 +1268,6 @@ HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, u
/* Enable the Rx DMA Stream */
HAL_DMA_Start_IT(hspi->hdmarx, (uint32_t)&hspi->Instance->DR, (uint32_t)hspi->pRxBuffPtr, hspi->RxXferCount);
/* Enable Rx DMA Request */
hspi->Instance->CR2 |= SPI_CR2_RXDMAEN;
/* Process Unlocked */
__HAL_UNLOCK(hspi);
@ -1298,6 +1278,9 @@ HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, u
__HAL_SPI_ENABLE(hspi);
}
/* Enable Rx DMA Request */
hspi->Instance->CR2 |= SPI_CR2_RXDMAEN;
return HAL_OK;
}
else
@ -1403,6 +1386,9 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *
/* Enable the Tx DMA Stream */
HAL_DMA_Start_IT(hspi->hdmatx, (uint32_t)hspi->pTxBuffPtr, (uint32_t)&hspi->Instance->DR, hspi->TxXferCount);
/* Process Unlocked */
__HAL_UNLOCK(hspi);
/* Check if the SPI is already enabled */
if((hspi->Instance->CR1 &SPI_CR1_SPE) != SPI_CR1_SPE)
{
@ -1413,8 +1399,6 @@ HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *
/* Enable Tx DMA Request */
hspi->Instance->CR2 |= SPI_CR2_TXDMAEN;
/* Process Unlocked */
__HAL_UNLOCK(hspi);
return HAL_OK;
}
else
@ -2004,47 +1988,54 @@ static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
/* DMA Normal mode */
if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0)
{
if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
if((hspi->Init.Direction == SPI_DIRECTION_2LINES)&&(hspi->Init.Mode == SPI_MODE_MASTER))
{
/* Disable SPI peripheral */
__HAL_SPI_DISABLE(hspi);
SPI_DMAEndTransmitReceive(hspi);
}
/* Disable Rx DMA Request */
hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
/* Disable Tx DMA Request (done by default to handle the case Master RX direction 2 lines) */
hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
hspi->RxXferCount = 0;
hspi->State = HAL_SPI_STATE_READY;
/* Reset CRC Calculation */
if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
/* SPI_DIRECTION_1LINE or SPI_DIRECTION_2LINES_RXONLY */
else
{
/* Wait until RXNE flag is set to send data */
if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
{
hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
/* Disable SPI peripheral */
__HAL_SPI_DISABLE(hspi);
}
/* Read CRC */
tmpreg = hspi->Instance->DR;
UNUSED(tmpreg);
/* Disable Rx DMA Request */
hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
/* Wait until RXNE flag is set */
if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
{
hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
}
hspi->RxXferCount = 0;
/* Check if CRC error occurred */
if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
/* Reset CRC Calculation */
if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
{
hspi->ErrorCode |= HAL_SPI_ERROR_CRC;
__HAL_SPI_CLEAR_CRCERRFLAG(hspi);
/* Wait until RXNE flag is set to send data */
if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
{
hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
}
/* Read CRC */
tmpreg = hspi->Instance->DR;
UNUSED(tmpreg);
/* Wait until RXNE flag is set */
if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
{
hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
}
/* Check if CRC error occurred */
if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
{
hspi->ErrorCode |= HAL_SPI_ERROR_CRC;
__HAL_SPI_CLEAR_CRCERRFLAG(hspi);
}
}
}
hspi->State = HAL_SPI_STATE_READY;
/* Check if Errors has been detected during transfer */
if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
{
@ -2062,65 +2053,75 @@ static void SPI_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
}
/**
* @brief DMA SPI transmit receive process complete callback
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA module.
* @brief End DMA SPI transmit receive process
* @param hspi: pointer to a SPI_HandleTypeDef structure that contains
* the configuration information for SPI module.
* @retval None
*/
static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma)
static void SPI_DMAEndTransmitReceive(SPI_HandleTypeDef *hspi)
{
__IO uint16_t tmpreg;
SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0)
/* Reset CRC Calculation */
if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
{
/* Reset CRC Calculation */
if(hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
/* Check if CRC is done on going (RXNE flag set) */
if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) == HAL_OK)
{
/* Check if CRC is done on going (RXNE flag set) */
if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, SET, SPI_TIMEOUT_VALUE) == HAL_OK)
{
/* Wait until RXNE flag is set to send data */
if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
{
hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
}
}
/* Read CRC */
tmpreg = hspi->Instance->DR;
UNUSED(tmpreg);
/* Check if CRC error occurred */
if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
/* Wait until RXNE flag is set to send data */
if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_RXNE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
{
hspi->ErrorCode |= HAL_SPI_ERROR_CRC;
__HAL_SPI_CLEAR_CRCERRFLAG(hspi);
hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
}
}
/* Wait until TXE flag is set to send data */
if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
{
hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
}
/* Disable Tx DMA Request */
hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
/* Read CRC */
tmpreg = hspi->Instance->DR;
UNUSED(tmpreg);
/* Wait until Busy flag is reset before disabling SPI */
if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
/* Check if CRC error occurred */
if(__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_CRCERR) != RESET)
{
hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
hspi->ErrorCode |= HAL_SPI_ERROR_CRC;
__HAL_SPI_CLEAR_CRCERRFLAG(hspi);
}
/* Disable Rx DMA Request */
hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
hspi->TxXferCount = 0;
hspi->RxXferCount = 0;
}
/* Wait until TXE flag is set to send data */
if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_TXE, RESET, SPI_TIMEOUT_VALUE) != HAL_OK)
{
hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
}
/* Disable Tx DMA Request */
hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_TXDMAEN);
/* Wait until Busy flag is reset before disabling SPI */
if(SPI_WaitOnFlagUntilTimeout(hspi, SPI_FLAG_BSY, SET, SPI_TIMEOUT_VALUE) != HAL_OK)
{
hspi->ErrorCode |= HAL_SPI_ERROR_FLAG;
}
/* Disable Rx DMA Request */
hspi->Instance->CR2 &= (uint32_t)(~SPI_CR2_RXDMAEN);
hspi->TxXferCount = 0;
hspi->RxXferCount = 0;
}
/**
* @brief DMA SPI transmit receive process complete callback
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA module.
* @retval None
*/
static void SPI_DMATransmitReceiveCplt(DMA_HandleTypeDef *hdma)
{
SPI_HandleTypeDef* hspi = ( SPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0)
{ /**/
SPI_DMAEndTransmitReceive(hspi);
hspi->State = HAL_SPI_STATE_READY;
/* Check if Errors has been detected during transfer */
if(hspi->ErrorCode != HAL_SPI_ERROR_NONE)
{

20
Upstream/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c
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@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f4xx_hal_uart.c
* @author MCD Application Team
* @version V1.2.0
* @date 26-December-2014
* @version V1.3.2
* @date 26-June-2015
* @brief UART HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the Universal Asynchronous Receiver Transmitter (UART) peripheral:
@ -126,7 +126,7 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@ -261,6 +261,8 @@ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
if(huart->State == HAL_UART_STATE_RESET)
{
/* Allocate lock resource and initialize it */
huart->Lock = HAL_UNLOCKED;
/* Init the low level hardware */
HAL_UART_MspInit(huart);
}
@ -310,7 +312,9 @@ HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart)
assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
if(huart->State == HAL_UART_STATE_RESET)
{
{
/* Allocate lock resource and initialize it */
huart->Lock = HAL_UNLOCKED;
/* Init the low level hardware */
HAL_UART_MspInit(huart);
}
@ -368,7 +372,9 @@ HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLe
assert_param(IS_UART_LIN_OVERSAMPLING(huart->Init.OverSampling));
if(huart->State == HAL_UART_STATE_RESET)
{
{
/* Allocate lock resource and initialize it */
huart->Lock = HAL_UNLOCKED;
/* Init the low level hardware */
HAL_UART_MspInit(huart);
}
@ -432,7 +438,9 @@ HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Add
assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
if(huart->State == HAL_UART_STATE_RESET)
{
{
/* Allocate lock resource and initialize it */
huart->Lock = HAL_UNLOCKED;
/* Init the low level hardware */
HAL_UART_MspInit(huart);
}

8
Upstream/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_usart.c
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@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f4xx_hal_usart.c
* @author MCD Application Team
* @version V1.2.0
* @date 26-December-2014
* @version V1.3.2
* @date 26-June-2015
* @brief USART HAL module driver.
* This file provides firmware functions to manage the following
* functionalities of the Universal Synchronous Asynchronous Receiver Transmitter (USART) peripheral:
@ -105,7 +105,7 @@
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@ -232,6 +232,8 @@ HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart)
if(husart->State == HAL_USART_STATE_RESET)
{
/* Allocate lock resource and initialize it */
husart->Lock = HAL_UNLOCKED;
/* Init the low level hardware */
HAL_USART_MspInit(husart);
}

98
Upstream/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c
Unescape View File

@ -2,8 +2,8 @@
******************************************************************************
* @file stm32f4xx_ll_usb.c
* @author MCD Application Team
* @version V1.2.0
* @date 26-December-2014
* @version V1.3.2
* @date 26-June-2015
* @brief USB Low Layer HAL module driver.
*
* This file provides firmware functions to manage the following
@ -22,13 +22,13 @@
(#) Call USB_CoreInit() API to initialize the USB Core peripheral.
(#) The upper HAL HCD/PCD driver will call the righ routines for its internal processes.
(#) The upper HAL HCD/PCD driver will call the right routines for its internal processes.
@endverbatim
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@ -72,7 +72,9 @@
/* Private functions ---------------------------------------------------------*/
static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx);
/** @defgroup PCD_Private_Functions
/* Exported functions --------------------------------------------------------*/
/** @defgroup LL_USB_Exported_Functions USB Low Layer Exported Functions
* @{
*/
@ -117,7 +119,6 @@ HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef c
}
else /* FS interface (embedded Phy) */
{
/* Select FS Embedded PHY */
USBx->GUSBCFG |= USB_OTG_GUSBCFG_PHYSEL;
@ -166,7 +167,7 @@ HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx)
* @brief USB_SetCurrentMode : Set functional mode
* @param USBx : Selected device
* @param mode : current core mode
* This parameter can be one of the these values:
* This parameter can be one of these values:
* @arg USB_OTG_DEVICE_MODE: Peripheral mode
* @arg USB_OTG_HOST_MODE: Host mode
* @arg USB_OTG_DRD_MODE: Dual Role Device mode
@ -202,13 +203,27 @@ HAL_StatusTypeDef USB_DevInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef c
uint32_t i = 0;
/*Activate VBUS Sensing B */
#if defined(STM32F446xx)
USBx->GCCFG |= USB_OTG_GCCFG_VBDEN;
if (cfg.vbus_sensing_enable == 0)
{
/* Deactivate VBUS Sensing B */
USBx->GCCFG &= ~USB_OTG_GCCFG_VBDEN;
/* B-peripheral session valid override enable*/
USBx->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN;
USBx->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL;
}
#else
USBx->GCCFG |= USB_OTG_GCCFG_VBUSBSEN;
if (cfg.vbus_sensing_enable == 0)
{
USBx->GCCFG |= USB_OTG_GCCFG_NOVBUSSENS;
}
#endif /* STM32F446xx */
/* Restart the Phy Clock */
USBx_PCGCCTL = 0;
@ -237,7 +252,6 @@ HAL_StatusTypeDef USB_DevInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef c
/* Flush the FIFOs */
USB_FlushTxFifo(USBx , 0x10); /* all Tx FIFOs */
USB_FlushRxFifo(USBx);
/* Clear all pending Device Interrupts */
USBx_DEVICE->DIEPMSK = 0;
@ -330,7 +344,7 @@ HAL_StatusTypeDef USB_FlushTxFifo (USB_OTG_GlobalTypeDef *USBx, uint32_t num )
{
uint32_t count = 0;
USBx->GRSTCTL = ( USB_OTG_GRSTCTL_TXFFLSH |(uint32_t)( num << 5 ));
USBx->GRSTCTL = ( USB_OTG_GRSTCTL_TXFFLSH |(uint32_t)( num << 6));
do
{
@ -373,7 +387,7 @@ HAL_StatusTypeDef USB_FlushRxFifo(USB_OTG_GlobalTypeDef *USBx)
* depending the PHY type and the enumeration speed of the device.
* @param USBx : Selected device
* @param speed : device speed
* This parameter can be one of the these values:
* This parameter can be one of these values:
* @arg USB_OTG_SPEED_HIGH: High speed mode
* @arg USB_OTG_SPEED_HIGH_IN_FULL: High speed core in Full Speed mode
* @arg USB_OTG_SPEED_FULL: Full speed mode
@ -390,7 +404,7 @@ HAL_StatusTypeDef USB_SetDevSpeed(USB_OTG_GlobalTypeDef *USBx , uint8_t speed)
* @brief USB_GetDevSpeed :Return the Dev Speed
* @param USBx : Selected device
* @retval speed : device speed
* This parameter can be one of the these values:
* This parameter can be one of these values:
* @arg USB_OTG_SPEED_HIGH: High speed mode
* @arg USB_OTG_SPEED_FULL: Full speed mode
* @arg USB_OTG_SPEED_LOW: Low speed mode
@ -507,7 +521,6 @@ HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EP
}
else
{
USBx_DEVICE->DEACHMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16));
USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16));
USBx_OUTEP(ep->num)->DOEPCTL &= ~USB_OTG_DOEPCTL_USBAEP;
@ -542,7 +555,7 @@ HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, U
* @param USBx : Selected device
* @param ep: pointer to endpoint structure
* @param dma: USB dma enabled or disabled
* This parameter can be one of the these values:
* This parameter can be one of these values:
* 0 : DMA feature not used
* 1 : DMA feature used
* @retval HAL status
@ -664,7 +677,7 @@ HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDe
* @param USBx : Selected device
* @param ep: pointer to endpoint structure
* @param dma: USB dma enabled or disabled
* This parameter can be one of the these values:
* This parameter can be one of these values:
* 0 : DMA feature not used
* 1 : DMA feature used
* @retval HAL status
@ -753,7 +766,7 @@ HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeD
* @param ch_ep_num : endpoint or host channel number
* @param len : Number of bytes to write
* @param dma: USB dma enabled or disabled
* This parameter can be one of the these values:
* This parameter can be one of these values:
* 0 : DMA feature not used
* 1 : DMA feature used
* @retval HAL status
@ -781,7 +794,7 @@ HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uin
* @param ch_ep_num : endpoint or host channel number
* @param len : Number of bytes to read
* @param dma: USB dma enabled or disabled
* This parameter can be one of the these values:
* This parameter can be one of these values:
* 0 : DMA feature not used
* 1 : DMA feature used
* @retval pointer to destination buffer
@ -1012,7 +1025,7 @@ void USB_ClearInterrupts (USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt)
* @brief Returns USB core mode
* @param USBx : Selected device
* @retval return core mode : Host or Device
* This parameter can be one of the these values:
* This parameter can be one of these values:
* 0 : Host
* 1 : Device
*/
@ -1046,7 +1059,7 @@ HAL_StatusTypeDef USB_ActivateSetup (USB_OTG_GlobalTypeDef *USBx)
* @brief Prepare the EP0 to start the first control setup
* @param USBx : Selected device
* @param dma: USB dma enabled or disabled
* This parameter can be one of the these values:
* This parameter can be one of these values:
* 0 : DMA feature not used
* 1 : DMA feature used
* @param psetup : pointer to setup packet
@ -1121,11 +1134,15 @@ HAL_StatusTypeDef USB_HostInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef
/* Restart the Phy Clock */
USBx_PCGCCTL = 0;
/* no VBUS sensing*/
/* Activate VBUS Sensing B */
#if defined(STM32F446xx)
USBx->GCCFG |= USB_OTG_GCCFG_VBDEN;
#else
USBx->GCCFG &=~ (USB_OTG_GCCFG_VBUSASEN);
USBx->GCCFG &=~ (USB_OTG_GCCFG_VBUSBSEN);
USBx->GCCFG |= USB_OTG_GCCFG_NOVBUSSENS;
#endif /* STM32F446xx */
/* Disable the FS/LS support mode only */
if((cfg.speed == USB_OTG_SPEED_FULL)&&
(USBx != USB_OTG_FS))
@ -1158,7 +1175,6 @@ HAL_StatusTypeDef USB_HostInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef
/* Clear any pending interrupts */
USBx->GINTSTS = 0xFFFFFFFF;
if(USBx == USB_OTG_FS)
{
@ -1166,9 +1182,7 @@ HAL_StatusTypeDef USB_HostInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef
USBx->GRXFSIZ = (uint32_t )0x80;
USBx->DIEPTXF0_HNPTXFSIZ = (uint32_t )(((0x60 << 16)& USB_OTG_NPTXFD) | 0x80);
USBx->HPTXFSIZ = (uint32_t )(((0x40 << 16)& USB_OTG_HPTXFSIZ_PTXFD) | 0xE0);
}
else
{
/* set Rx FIFO size */
@ -1196,7 +1210,7 @@ HAL_StatusTypeDef USB_HostInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef
* HCFG register on the PHY type and set the right frame interval
* @param USBx : Selected device
* @param freq : clock frequency
* This parameter can be one of the these values:
* This parameter can be one of these values:
* HCFG_48_MHZ : Full Speed 48 MHz Clock
* HCFG_6_MHZ : Low Speed 6 MHz Clock
* @retval HAL status
@ -1221,7 +1235,7 @@ HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx , uint8_t freq
* @brief USB_OTG_ResetPort : Reset Host Port
* @param USBx : Selected device
* @retval HAL status
* @note : (1)The application must wait at least 10 ms
* @note (1)The application must wait at least 10 ms
* before clearing the reset bit.
*/
HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx)
@ -1242,7 +1256,7 @@ HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx)
/**
* @brief USB_DriveVbus : activate or de-activate vbus
* @param state : VBUS state
* This parameter can be one of the these values:
* This parameter can be one of these values:
* 0 : VBUS Active
* 1 : VBUS Inactive
* @retval HAL status
@ -1270,7 +1284,7 @@ HAL_StatusTypeDef USB_DriveVbus (USB_OTG_GlobalTypeDef *USBx, uint8_t state)
* @brief Return Host Core speed
* @param USBx : Selected device
* @retval speed : Host speed
* This parameter can be one of the these values:
* This parameter can be one of these values:
* @arg USB_OTG_SPEED_HIGH: High speed mode
* @arg USB_OTG_SPEED_FULL: Full speed mode
* @arg USB_OTG_SPEED_LOW: Low speed mode
@ -1303,12 +1317,12 @@ uint32_t USB_GetCurrentFrame (USB_OTG_GlobalTypeDef *USBx)
* @param dev_address : Current device address
* This parameter can be a value from 0 to 255
* @param speed : Current device speed
* This parameter can be one of the these values:
* This parameter can be one of these values:
* @arg USB_OTG_SPEED_HIGH: High speed mode
* @arg USB_OTG_SPEED_FULL: Full speed mode
* @arg USB_OTG_SPEED_LOW: Low speed mode
* @param ep_type : Endpoint Type
* This parameter can be one of the these values:
* This parameter can be one of these values:
* @arg EP_TYPE_CTRL: Control type
* @arg EP_TYPE_ISOC: Isochronous type
* @arg EP_TYPE_BULK: Bulk type
@ -1354,6 +1368,7 @@ HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx,
}
}
break;
case EP_TYPE_INTR:
USBx_HC(ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM |\
@ -1411,7 +1426,7 @@ HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx,
* @param USBx : Selected device
* @param hc : pointer to host channel structure
* @param dma: USB dma enabled or disabled
* This parameter can be one of the these values:
* This parameter can be one of these values:
* 0 : DMA feature not used
* 1 : DMA feature used
* @retval HAL state
@ -1427,7 +1442,8 @@ HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDe
uint16_t len_words = 0;
uint16_t num_packets = 0;
uint16_t max_hc_pkt_count = 256;
uint32_t tmpreg = 0;
if((USBx != USB_OTG_FS) && (hc->speed == USB_OTG_SPEED_HIGH))
{
if((dma == 0) && (hc->do_ping == 1))
@ -1462,8 +1478,6 @@ HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDe
hc->xfer_len = num_packets * hc->max_packet;
}
/* Initialize the HCTSIZn register */
USBx_HC(hc->ch_num)->HCTSIZ = (((hc->xfer_len) & USB_OTG_HCTSIZ_XFRSIZ)) |\
((num_packets << 19) & USB_OTG_HCTSIZ_PKTCNT) |\
@ -1480,8 +1494,10 @@ HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDe
USBx_HC(hc->ch_num)->HCCHAR |= (is_oddframe << 29);
/* Set host channel enable */
USBx_HC(hc->ch_num)->HCCHAR &= ~USB_OTG_HCCHAR_CHDIS;
USBx_HC(hc->ch_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
tmpreg = USBx_HC(hc->ch_num)->HCCHAR;
tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
tmpreg |= USB_OTG_HCCHAR_CHENA;
USBx_HC(hc->ch_num)->HCCHAR = tmpreg;
if (dma == 0) /* Slave mode */
{
@ -1608,13 +1624,16 @@ HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx , uint8_t hc_num)
HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx , uint8_t ch_num)
{
uint8_t num_packets = 1;
uint32_t tmpreg = 0;
USBx_HC(ch_num)->HCTSIZ = ((num_packets << 19) & USB_OTG_HCTSIZ_PKTCNT) |\
USB_OTG_HCTSIZ_DOPING;
/* Set host channel enable */
USBx_HC(ch_num)->HCCHAR &= ~USB_OTG_HCCHAR_CHDIS;
USBx_HC(ch_num)->HCCHAR |= USB_OTG_HCCHAR_CHENA;
tmpreg = USBx_HC(ch_num)->HCCHAR;
tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
tmpreg |= USB_OTG_HCCHAR_CHENA;
USBx_HC(ch_num)->HCCHAR = tmpreg;
return HAL_OK;
}
@ -1649,8 +1668,7 @@ HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx)
/* Halt all channels to put them into a known state. */
for (i = 0; i <= 15; i++)
{
{
value = USBx_HC(i)->HCCHAR ;
value |= USB_OTG_HCCHAR_CHDIS;

18
Upstream/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c
Unescape View File

@ -2,13 +2,13 @@
******************************************************************************
* @file usbd_core.c
* @author MCD Application Team
* @version V2.3.0
* @date 04-November-2014
* @version V2.4.1
* @date 19-June-2015
* @brief This file provides all the USBD core functions.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
@ -357,6 +357,12 @@ USBD_StatusTypeDef USBD_DataInStage(USBD_HandleTypeDef *pdev ,uint8_t epnum, uin
pep->rem_length);
}
else
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive (pdev,
0,
NULL,
0);
{ /* last packet is MPS multiple, so send ZLP packet */
if((pep->total_length % pep->maxpacket == 0) &&
(pep->total_length >= pep->maxpacket) &&
@ -367,6 +373,12 @@ USBD_StatusTypeDef USBD_DataInStage(USBD_HandleTypeDef *pdev ,uint8_t epnum, uin
pdev->ep0_data_len = 0;
}
else
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive (pdev,
0,
NULL,
0);
{
if((pdev->pClass->EP0_TxSent != NULL)&&
(pdev->dev_state == USBD_STATE_CONFIGURED))

21
Upstream/Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c
Unescape View File

@ -2,13 +2,13 @@
******************************************************************************
* @file usbd_req.c
* @author MCD Application Team
* @version V2.3.0
* @date 04-November-2014
* @version V2.4.1
* @date 19-June-2015
* @brief This file provides the standard USB requests following chapter 9.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
* <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
*
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in compliance with the License.
@ -212,6 +212,14 @@ USBD_StatusTypeDef USBD_StdEPReq (USBD_HandleTypeDef *pdev , USBD_SetupReqTyped
USBD_EndpointTypeDef *pep;
ep_addr = LOBYTE(req->wIndex);
/* Check if it is a class request */
if ((req->bmRequest & 0x60) == 0x20)
{
pdev->pClass->Setup (pdev, req);
return USBD_OK;
}
switch (req->bRequest)
{
@ -328,7 +336,12 @@ static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev ,
switch (req->wValue >> 8)
{
{
#if (USBD_LPM_ENABLED == 1)
case USB_DESC_TYPE_BOS:
pbuf = pdev->pDesc->GetBOSDescriptor(pdev->dev_speed, &len);
break;
#endif
case USB_DESC_TYPE_DEVICE:
pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len);
break;

14
Upstream/Src/downstream_interface_msc.c
Unescape View File

@ -16,8 +16,6 @@
DownstreamInterfaceMSCCallbackTypeDef TestReadyCallback;
DownstreamInterfaceMSCCallbackUintPacketTypeDef GetCapacityCallback;
DownstreamInterfaceMSCCallbackPacketTypeDef GetStreamDataCallback;
uint64_t BlockStart;
uint32_t BlockCount;
uint32_t ByteCount;
DownstreamPacketTypeDef* ReadStreamPacket;
uint8_t ReadStreamBusy;
@ -115,16 +113,14 @@ HAL_StatusTypeDef DownstreamInterface_BeginRead(DownstreamInterfaceMSCCallbackTy
ReadStreamBusy = 0;
TestReadyCallback = callback;
BlockStart = readBlockStart;
BlockCount = readBlockCount;
ByteCount = readByteCount;
freePacket = Downstream_GetFreePacketImmediately();
freePacket->Length = DOWNSTREAM_PACKET_HEADER_LEN + (4 * 3);
freePacket->CommandClass = COMMAND_CLASS_MASS_STORAGE;
freePacket->Command = COMMAND_MSC_BEGIN_READ;
*(uint64_t*)&(freePacket->Data[0]) = BlockStart;
*(uint32_t*)&(freePacket->Data[8]) = BlockCount;
*(uint64_t*)&(freePacket->Data[0]) = readBlockStart;
*(uint32_t*)&(freePacket->Data[8]) = readBlockCount;
tempResult = Downstream_SendPacket(freePacket);
if (tempResult != HAL_OK)
@ -193,15 +189,13 @@ HAL_StatusTypeDef DownstreamInterface_BeginWrite(DownstreamInterfaceMSCCallbackT
HAL_StatusTypeDef tempResult;
TestReadyCallback = callback;
BlockStart = readBlockStart;
BlockCount = readBlockCount;
freePacket = Downstream_GetFreePacketImmediately();
freePacket->Length = DOWNSTREAM_PACKET_HEADER_LEN + (4 * 3);
freePacket->CommandClass = COMMAND_CLASS_MASS_STORAGE;
freePacket->Command = COMMAND_MSC_BEGIN_WRITE;
*(uint64_t*)&(freePacket->Data[0]) = BlockStart;
*(uint32_t*)&(freePacket->Data[8]) = BlockCount;
*(uint64_t*)&(freePacket->Data[0]) = readBlockStart;
*(uint32_t*)&(freePacket->Data[8]) = readBlockCount;
tempResult = Downstream_SendPacket(freePacket);
if (tempResult != HAL_OK)

16
Upstream/Src/downstream_interface_msc_mock.c
Unescape View File

@ -20,8 +20,6 @@
DownstreamInterfaceMSCCallbackTypeDef TestReadyCallback;
DownstreamInterfaceMSCCallbackUintPacketTypeDef GetCapacityCallback;
DownstreamInterfaceMSCCallbackPacketTypeDef GetStreamDataCallback;
uint64_t BlockStart;
uint32_t BlockCount;
uint32_t ByteCount;
DownstreamPacketTypeDef* ReadStreamPacket;
uint8_t ReadStreamBusy;
@ -104,7 +102,7 @@ void DownstreamInterface_GetCapacityReplyCallback(DownstreamPacketTypeDef* reply
*(uint32_t*)&(replyPacket->Data[0]) = 262144; //* 512B = 128MB
*(uint32_t*)&(replyPacket->Data[4]) = 512;
uint[0] = *(uint32_t*)&(replyPacket->Data[0]); /////////check indexing!!!
uint[0] = *(uint32_t*)&(replyPacket->Data[0]);
uint[1] = *(uint32_t*)&(replyPacket->Data[4]);
GetCapacityCallback(HAL_OK, uint, replyPacket); //usb_msc_scsi will use this packet, so don't release now
}
@ -123,16 +121,14 @@ HAL_StatusTypeDef DownstreamInterface_BeginRead(DownstreamInterfaceMSCCallbackTy
ReadStreamBusy = 0;
TestReadyCallback = callback;
BlockStart = readBlockStart;
BlockCount = readBlockCount;
ByteCount = readByteCount;
freePacket = Downstream_GetFreePacketImmediately();
freePacket->Length = DOWNSTREAM_PACKET_HEADER_LEN + (4 * 3);
freePacket->CommandClass = COMMAND_CLASS_MASS_STORAGE;
freePacket->Command = COMMAND_MSC_BEGIN_READ;
*(uint64_t*)&(freePacket->Data[0]) = BlockStart;
*(uint32_t*)&(freePacket->Data[8]) = BlockCount;
*(uint64_t*)&(freePacket->Data[0]) = readBlockStart;
*(uint32_t*)&(freePacket->Data[8]) = readBlockCount;
tempResult = Downstream_SendPacket(freePacket);
if (tempResult != HAL_OK)
@ -205,15 +201,13 @@ HAL_StatusTypeDef DownstreamInterface_BeginWrite(DownstreamInterfaceMSCCallbackT
HAL_StatusTypeDef tempResult;
TestReadyCallback = callback;
BlockStart = readBlockStart;
BlockCount = readBlockCount;
freePacket = Downstream_GetFreePacketImmediately();
freePacket->Length = DOWNSTREAM_PACKET_HEADER_LEN + (4 * 3);
freePacket->CommandClass = COMMAND_CLASS_MASS_STORAGE;
freePacket->Command = COMMAND_MSC_BEGIN_WRITE;
*(uint64_t*)&(freePacket->Data[0]) = BlockStart;
*(uint32_t*)&(freePacket->Data[8]) = BlockCount;
*(uint64_t*)&(freePacket->Data[0]) = readBlockStart;
*(uint32_t*)&(freePacket->Data[8]) = readBlockCount;
tempResult = Downstream_SendPacket(freePacket);
if (tempResult != HAL_OK)

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